drm/exynos/mixer: enable HDMI-PHY before configuring MIXER

Mixer similarly to DECON-TV requires enabled clock generated
by HDMI-PHY to proper work.
The patch fixes hang on Odroid (X)U3 during console blank/unblank.

Change-Id: I9fa14fe02e54d2981fa06b43654f9616cd7074a8
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index fb32d66..77c8d57 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -494,13 +494,6 @@ static void decon_reset(struct decon_context *ctx)
                       CRCCTRL_CRCEN | CRCCTRL_CRCSTART_F | CRCCTRL_CRCCLKEN);
 }
 
-/* this function will be replaced by clk API call */
-#ifdef CONFIG_DRM_EXYNOS_HDMI
-void exynos_hdmiphy_enable(struct exynos_drm_crtc *crtc);
-#else
-static void exynos_hdmiphy_enable(struct exynos_drm_crtc *crtc) {}
-#endif
-
 static void decon_dpms_on(struct decon_context *ctx)
 {
        int ret;

diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index 9378934..d0d77bd 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -314,6 +314,12 @@ static inline int exynos_dpi_remove(struct exynos_drm_display *display)
 }
 #endif
 
+#ifdef CONFIG_DRM_EXYNOS_HDMI
+void exynos_hdmiphy_enable(struct exynos_drm_crtc *crtc);
+#else
+static void exynos_hdmiphy_enable(struct exynos_drm_crtc *crtc) {}
+#endif
+
 /* This function creates a encoder and a connector, and initializes them. */
 int exynos_drm_create_enc_conn(struct drm_device *dev,
                                struct exynos_drm_display *display);

diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index 930ed9c..4180f5f 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -1079,6 +1079,8 @@ static void mixer_poweron(struct mixer_context *ctx)
        ctx->powered = true;
        mutex_unlock(&ctx->mixer_mutex);
 
+       exynos_hdmiphy_enable(ctx->crtc);
+
        mixer_reg_writemask(res, MXR_STATUS, ~0, MXR_STATUS_SOFT_RESET);
 
        mixer_reg_write(res, MXR_INT_EN, ctx->int_en);