[ARC][COMMITTED] Fix typos.

gcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc-options.def: Fix typos and spelling mistakes.
	* config/arc/arc.c (arc_init): Cleanup warning message.
	(arc_override_options): Likewise.

From-SVN: r270540

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ba06d65583cb975d57a3cfc25b8ad7eef634bad0..1c70df7ce9605767df5418777d32297fe9061486 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2019-04-24  Claudiu Zissulescu  <claziss@sysnopsys.com>
+
+       * config/arc/arc-options.def: Fix typos and spelling mistakes.
+       * config/arc/arc.c (arc_init): Cleanup warning message.
+       (arc_override_options): Likewise.
+
 2019-04-24  Jakub Jelinek  <jakub@redhat.com>
 
        PR target/90187

diff --git a/gcc/config/arc/arc-options.def b/gcc/config/arc/arc-options.def
index a521b6f9b4e603447eb646a68d91a6c351e82d07..4b2dcb16e6cda07af081576781a1e83755fdaf72 100644 (file)
--- a/gcc/config/arc/arc-options.def
+++ b/gcc/config/arc/arc-options.def
@@ -68,9 +68,9 @@ ARC_OPT (FL_SWAP,     (1ULL << 7), MASK_SWAP_SET,        "swap")
 ARC_OPT (FL_MUL64,    (1ULL << 8), MASK_MUL64_SET,        "mul64")
 ARC_OPT (FL_MUL32x16, (1ULL << 9), MASK_MULMAC_32BY16_SET, "mul32x16")
 
-ARC_OPT (FL_EA,              (1ULL << 11), MASK_EA_SET,           "extended arithmetics")
-ARC_OPT (FL_SPFP,     (1ULL << 12), MASK_SPFP_COMPACT_SET, "single precission FPX")
-ARC_OPT (FL_DPFP,     (1ULL << 13), MASK_DPFP_COMPACT_SET, "double precission FPX")
+ARC_OPT (FL_EA,              (1ULL << 11), MASK_EA_SET,           "extended arithmetic")
+ARC_OPT (FL_SPFP,     (1ULL << 12), MASK_SPFP_COMPACT_SET, "single precision FPX")
+ARC_OPT (FL_DPFP,     (1ULL << 13), MASK_DPFP_COMPACT_SET, "double precision FPX")
 ARC_OPT (FL_ARGONAUT, (1ULL << 14), MASK_ARGONAUT_SET,    "argonaut")
 ARC_OPT (FL_SIMD,     (1ULL << 15), MASK_SIMD_SET,        "simd")
 
@@ -101,9 +101,9 @@ ARC_OPTX (FL_FPU_FPUD_FMA,  (1ULL << 36), arc_fpu_build, FPU_FPUD_FMA,      "mfpu", "
 ARC_OPTX (FL_FPU_FPUD_ALL,  (1ULL << 37), arc_fpu_build, FPU_FPUD_ALL, "mfpu", "fpud_all")
 ARC_OPTX (FL_FPX_QUARK,            (1ULL << 38), arc_fpu_build, FPX_QK,        "quarkse fp", "N.A.")
 
-ARC_OPT (FL_FPUS,  (0xFULL << 26), 0, "single precission floating point")
-ARC_OPT (FL_FPUDA, (0xFFULL << 26), 0, "double precission fp assist")
-ARC_OPT (FL_FPUD,  (0xF0FULL << 26), 0, "double precission floating point")
+ARC_OPT (FL_FPUS,  (0xFULL << 26), 0, "single precision floating point")
+ARC_OPT (FL_FPUDA, (0xFFULL << 26), 0, "double precision fp assist")
+ARC_OPT (FL_FPUD,  (0xF0FULL << 26), 0, "double precision floating point")
 ARC_OPT (FL_QUARK, (1ULL << 38), 0, "Quark SE fp extension")
 
 /* Local Variables: */

diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 1a04f9ef79397546066c609880ffe20d2bc15273..2f5753b02faba6833a09e33203d58f754d83698e 100644 (file)
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -955,8 +955,7 @@ arc_init (void)
   /* Warn for unimplemented PIC in pre-ARC700 cores, and disable flag_pic.  */
   if (flag_pic && TARGET_ARC600_FAMILY)
     {
-      warning (0,
-              "PIC is not supported for %s.  Generating non-PIC code only",
+      warning (0, "PIC is not supported for %qs",
               arc_cpu_string);
       flag_pic = 0;
     }
@@ -1218,30 +1217,33 @@ arc_override_options (void)
      option is not allowed.  Extra, check options against default
      architecture/cpu flags and throw an warning if we find a
      mismatch.  */
+  /* TRANSLATORS: the DOC/DOC0/DOC1 are strings which shouldn't be
+     translated.  They are like keywords which one can relate with the
+     architectural choices taken for an ARC CPU implementation.  */
 #define ARC_OPTX(NAME, CODE, VAR, VAL, DOC0, DOC1)             \
   do {                                                         \
     if ((!(arc_selected_cpu->arch_info->flags & CODE))         \
        && (VAR == VAL))                                        \
-      error ("option %s=%s is not available for %s CPU",       \
+      error ("option %<%s=%s%> is not available for %qs CPU",  \
             DOC0, DOC1, arc_selected_cpu->name);               \
     if ((arc_selected_cpu->arch_info->dflags & CODE)           \
        && (VAR != DEFAULT_##VAR)                               \
        && (VAR != VAL))                                        \
-      warning (0, "option %s is ignored, the default value %s" \
-              " is considered for %s CPU", DOC0, DOC1,         \
+      warning (0, "option %qs is ignored, the default value %qs"       \
+              " is considered for %qs CPU", DOC0, DOC1,                \
               arc_selected_cpu->name);                         \
  } while (0);
 #define ARC_OPT(NAME, CODE, MASK, DOC)                         \
   do {                                                         \
     if ((!(arc_selected_cpu->arch_info->flags & CODE))         \
        && (target_flags & MASK))                               \
-      error ("option %s is not available for %s CPU",          \
+      error ("option %qs is not available for %qs CPU",                \
             DOC, arc_selected_cpu->name);                      \
     if ((arc_selected_cpu->arch_info->dflags & CODE)           \
        && (target_flags_explicit & MASK)                       \
        && (!(target_flags & MASK)))                            \
-      warning (0, "unset option %s is ignored, it is always"   \
-              " enabled for %s CPU", DOC,                      \
+      warning (0, "unset option %qs is ignored, it is always"  \
+              " enabled for %qs CPU", DOC,                     \
               arc_selected_cpu->name);                         \
   } while (0);