llvm-reduce: Fix register mask test

This was sometimes failing with "input module no longer interesting
after counting chunks" assert.

diff --git a/llvm/test/tools/llvm-reduce/mir/reduce-register-masks.mir b/llvm/test/tools/llvm-reduce/mir/reduce-register-masks.mir
index 396f07a..9dc87ae 100644 (file)
--- a/llvm/test/tools/llvm-reduce/mir/reduce-register-masks.mir
+++ b/llvm/test/tools/llvm-reduce/mir/reduce-register-masks.mir
@@ -9,7 +9,12 @@
 # CHECK-INTERESTINGNESS-SAME: $vgpr23,
 # CHECK-INTERESTINGNESS-SAME: $vgpr48_vgpr49_vgpr50,
 
+# CHECK-INTERESTINGNESS: CustomRegMask
+# CHECK-INTERESTINGNESS-SAME: $sgpr35,$sgpr39,$sgpr40,$sgpr60_sgpr61,$sgpr62_sgpr63,$sgpr64_sgpr65,$sgpr80_sgpr81
+
+
 # RESULT: $sgpr30_sgpr31 = SI_CALL %0, 0, CustomRegMask($vcc_lo,$agpr8,$sgpr99,$vgpr23,$vgpr48_vgpr49_vgpr50,$vgpr49_vgpr50_vgpr51)
+# RESULT: $sgpr30_sgpr31 = SI_CALL %0, 0, CustomRegMask($sgpr35,$sgpr39,$sgpr40,$sgpr60_sgpr61,$sgpr62_sgpr63,$sgpr64_sgpr65,$sgpr80_sgpr81)
 
 ---
 name: func
@@ -18,6 +23,9 @@ body:             |
   bb.0:
     liveins: $vgpr0, $vgpr1, $sgpr8_sgpr9
     %0:sreg_64_xexec = COPY $sgpr8_sgpr9
+
     $sgpr30_sgpr31 = SI_CALL %0:sreg_64_xexec, 0, CustomRegMask($vgpr8_vgpr9, $vgpr9_vgpr10_vgpr11,$vcc_lo,$agpr8,$sgpr99,$vgpr23,$vgpr48_vgpr49_vgpr50,$vgpr49_vgpr50_vgpr51, $vgpr52_vgpr53_vgpr54,$vcc_hi,$sgpr0_sgpr1_sgpr2_sgpr3,$sgpr4_sgpr5_sgpr6_sgpr7)
+     $sgpr30_sgpr31 = SI_CALL %0:sreg_64_xexec, 0, CustomRegMask($sgpr35,$sgpr39,$sgpr40,$sgpr60_sgpr61,$sgpr62_sgpr63,$sgpr64_sgpr65,$sgpr80_sgpr81)
+
     S_ENDPGM 0
 ...

diff --git a/llvm/tools/llvm-reduce/deltas/ReduceRegisterMasks.cpp b/llvm/tools/llvm-reduce/deltas/ReduceRegisterMasks.cpp
index 5cf145a..93d833c 100644 (file)
--- a/llvm/tools/llvm-reduce/deltas/ReduceRegisterMasks.cpp
+++ b/llvm/tools/llvm-reduce/deltas/ReduceRegisterMasks.cpp
@@ -42,7 +42,7 @@ static void reduceMasksInFunction(Oracle &O, MachineFunction &MF) {
 
         bool MadeChange = false;
         for (unsigned I = 0; I != NumRegs; ++I) {
-          if (OldRegMask[I / 32] >> I % 32) {
+          if (OldRegMask[I / 32] & (1u << (I % 32))) {
             if (O.shouldKeep())
               NewMask[I / 32] |= 1u << (I % 32);
           } else