[AArch64] Minor rtx costs tweak

aarch64_rtx_costs uses the number of registers in a mode as the basis
of SET costs.  This patch makes it get the number of registers from
aarch64_hard_regno_nregs rather than repeating the calcalation inline.
Handling SVE modes in aarch64_hard_regno_nregs is then enough to get
the correct SET cost as well.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* config/aarch64/aarch64.c (aarch64_rtx_costs): Use
	aarch64_hard_regno_nregs to get the number of registers
	in a mode.

Reviewed-By: James Greenhalgh  <james.greenhalgh@arm.com>
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254327

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 98fc25e..7ef2988 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -2,6 +2,14 @@
            Alan Hayward  <alan.hayward@arm.com>
            David Sherwood  <david.sherwood@arm.com>
 
+       * config/aarch64/aarch64.c (aarch64_rtx_costs): Use
+       aarch64_hard_regno_nregs to get the number of registers
+       in a mode.
+
+2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
+           Alan Hayward  <alan.hayward@arm.com>
+           David Sherwood  <david.sherwood@arm.com>
+
        * config/aarch64/constraints.md (Upl): Rename to...
        (Uaa): ...this.
        * config/aarch64/aarch64.md

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 39ba218..62682a4 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -6939,18 +6939,16 @@ aarch64_rtx_costs (rtx x, machine_mode mode, int outer ATTRIBUTE_UNUSED,
          /* The cost is one per vector-register copied.  */
          if (VECTOR_MODE_P (GET_MODE (op0)) && REG_P (op1))
            {
-             int n_minus_1 = (GET_MODE_SIZE (GET_MODE (op0)) - 1)
-                             / GET_MODE_SIZE (V4SImode);
-             *cost = COSTS_N_INSNS (n_minus_1 + 1);
+             int nregs = aarch64_hard_regno_nregs (V0_REGNUM, GET_MODE (op0));
+             *cost = COSTS_N_INSNS (nregs);
            }
          /* const0_rtx is in general free, but we will use an
             instruction to set a register to 0.  */
          else if (REG_P (op1) || op1 == const0_rtx)
            {
              /* The cost is 1 per register copied.  */
-             int n_minus_1 = (GET_MODE_SIZE (GET_MODE (op0)) - 1)
-                             / UNITS_PER_WORD;
-             *cost = COSTS_N_INSNS (n_minus_1 + 1);
+             int nregs = aarch64_hard_regno_nregs (R0_REGNUM, GET_MODE (op0));
+             *cost = COSTS_N_INSNS (nregs);
            }
           else
            /* Cost is just the cost of the RHS of the set.  */