[builtins] Use FlushInstructionCache on windows on aarch64 as well

Generalize this handling to a separate toplevel ifdef (since any
windows case should use the same function), instead of indenting
the aarch64 case one step further.

Differential Revision: https://reviews.llvm.org/D42197

llvm-svn: 322928

diff --git a/compiler-rt/lib/builtins/clear_cache.c b/compiler-rt/lib/builtins/clear_cache.c
index 4a01cb4..3614bc9 100644 (file)
--- a/compiler-rt/lib/builtins/clear_cache.c
+++ b/compiler-rt/lib/builtins/clear_cache.c
@@ -96,6 +96,8 @@ void __clear_cache(void *start, void *end) {
  * Intel processors have a unified instruction and data cache
  * so there is nothing to do
  */
+#elif defined(_WIN32) && (defined(__arm__) || defined(__aarch64__))
+    FlushInstructionCache(GetCurrentProcess(), start, end - start);
 #elif defined(__arm__) && !defined(__APPLE__)
     #if defined(__FreeBSD__) || defined(__NetBSD__)
         struct arm_sync_icache_args arg;
@@ -123,8 +125,6 @@ void __clear_cache(void *start, void *end) {
                           : "r"(syscall_nr), "r"(start_reg), "r"(end_reg),
                             "r"(flags));
          assert(start_reg == 0 && "Cache flush syscall failed.");
-    #elif defined(_WIN32)
-        FlushInstructionCache(GetCurrentProcess(), start, end - start);
     #else
         compilerrt_abort();
     #endif