(OPERAND_FFLAG, OPERAND_CFLAG) .
* opcodes/d10v-opc.c (OPERAND_FLAG): Split into:
(OPERAND_FFLAG, OPERAND_CFLAG) .
(FSRC): Split into:
(FFSRC, CFSRC).
* gas/config/tc-d10v.c (parallel_ok, find_opcode):
Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.
Fix for PR 13985.
+Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * config/tc-d10v.c (parallel_ok, find_opcode):
+ Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.
+
Sun Nov 16 10:05:07 1997 Fred Fish <fnf@cygnus.com>
* config/obj-coff.c (fixup_segment): Cast second arg of
+Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * d10v.h (OPERAND_FLAG): Split into:
+ (OPERAND_FFLAG, OPERAND_CFLAG) .
+
+Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
+
+ * mips.h (struct mips_opcode): Changed comments to reflect new
+ field usage.
+
start-sanitize-tx49
Wed Oct 29 17:33:37 1997 Gavin Koch <gavin@cygnus.com>
+Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * d10v-opc.c (OPERAND_FLAG): Split into:
+ (OPERAND_FFLAG, OPERAND_CFLAG) .
+ (FSRC): Split into:
+ (FFSRC, CFSRC).
+
+Thu Nov 13 11:05:33 1997 Gavin Koch <gavin@cygnus.com>
+
+ * mips-opc.c: Move the INSN_MACRO ISA value to the membership
+ field for all INSN_MACRO's.
+ * mips16-opc.c: same
+
Wed Nov 12 10:16:57 1997 Gavin Koch <gavin@cygnus.com>
* mips-opc.c (sync,cache): These are 3900 insns.