select OF_CONTROL
imply CMD_DM
-config ARCH_BCM68360
- bool "Broadcom BCM68360 family"
- select DM
- select OF_CONTROL
- imply CMD_DM
-
config ARCH_BCM6858
bool "Broadcom BCM6858 family"
select DM
source "board/armltd/vexpress64/Kconfig"
source "board/cortina/presidio-asic/Kconfig"
source "board/broadcom/bcm96753ref/Kconfig"
-source "board/broadcom/bcm968360bg/Kconfig"
source "board/broadcom/bcm968580xref/Kconfig"
source "board/broadcom/bcmns3/Kconfig"
source "board/cavium/thunderx/Kconfig"
bcm2837-rpi-cm3-io3.dtb \
bcm2711-rpi-4-b.dtb
-dtb-$(CONFIG_ARCH_BCM68360) += \
- bcm968360bg.dtb
-
dtb-$(CONFIG_ARCH_BCM6753) += \
bcm96753ref.dtb
dtb-$(CONFIG_BCM6846) += \
bcm96846.dtb
dtb-$(CONFIG_BCM6856) += \
- bcm96856.dtb
+ bcm96856.dtb \
+ bcm968360bg.dtb
dtb-$(CONFIG_BCM6878) += \
bcm96878.dtb
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2020 Philippe Reynes <philippe.reynes@softathome.com>
- */
-
-#include "skeleton64.dtsi"
-
-/ {
- compatible = "brcm,bcm68360";
- #address-cells = <2>;
- #size-cells = <2>;
-
- aliases {
- spi0 = &hsspi;
- };
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
- u-boot,dm-pre-reloc;
-
- cpu0: cpu@0 {
- compatible = "arm,cortex-a53", "arm,armv8";
- device_type = "cpu";
- reg = <0x0 0x0>;
- next-level-cache = <&l2>;
- u-boot,dm-pre-reloc;
- };
-
- cpu1: cpu@1 {
- compatible = "arm,cortex-a53", "arm,armv8";
- device_type = "cpu";
- reg = <0x0 0x1>;
- next-level-cache = <&l2>;
- u-boot,dm-pre-reloc;
- };
-
- l2: l2-cache0 {
- compatible = "cache";
- u-boot,dm-pre-reloc;
- };
- };
-
- clocks {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- u-boot,dm-pre-reloc;
-
- periph_osc: periph-osc {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- u-boot,dm-pre-reloc;
- };
-
- hsspi_pll: hsspi-pll {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_osc>;
- clock-mult = <2>;
- clock-div = <1>;
- };
-
- refclk50mhz: refclk50mhz {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <50000000>;
- };
- };
-
- ubus {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- u-boot,dm-pre-reloc;
-
- wdt1: watchdog@ff800480 {
- compatible = "brcm,bcm6345-wdt";
- reg = <0x0 0xff800480 0x0 0x14>;
- clocks = <&refclk50mhz>;
- };
-
- wdt2: watchdog@ff8004c0 {
- compatible = "brcm,bcm6345-wdt";
- reg = <0x0 0xff8004c0 0x0 0x14>;
- clocks = <&refclk50mhz>;
- };
-
- wdt-reboot {
- compatible = "wdt-reboot";
- wdt = <&wdt1>;
- };
-
- uart0: serial@ff800640 {
- compatible = "brcm,bcm6345-uart";
- reg = <0x0 0xff800640 0x0 0x18>;
- clocks = <&periph_osc>;
-
- status = "disabled";
- };
-
- leds: led-controller@ff800800 {
- compatible = "brcm,bcm6858-leds";
- reg = <0x0 0xff800800 0x0 0xe4>;
-
- status = "disabled";
- };
-
- gpio0: gpio-controller@0xff800500 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x0 0xff800500 0x0 0x4>,
- <0x0 0xff800520 0x0 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio1: gpio-controller@0xff800504 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x0 0xff800504 0x0 0x4>,
- <0x0 0xff800524 0x0 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio2: gpio-controller@0xff800508 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x0 0xff800508 0x0 0x4>,
- <0x0 0xff800528 0x0 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio3: gpio-controller@0xff80050c {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x0 0xff80050c 0x0 0x4>,
- <0x0 0xff80052c 0x0 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio4: gpio-controller@0xff800510 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x0 0xff800510 0x0 0x4>,
- <0x0 0xff800530 0x0 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio5: gpio-controller@0xff800514 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x0 0xff800514 0x0 0x4>,
- <0x0 0xff800534 0x0 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio6: gpio-controller@0xff800518 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x0 0xff800518 0x0 0x4>,
- <0x0 0xff800538 0x0 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio7: gpio-controller@0xff80051c {
- compatible = "brcm,bcm6345-gpio";
- reg = <0x0 0xff80051c 0x0 0x4>,
- <0x0 0xff80053c 0x0 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- hsspi: spi-controller@ff801000 {
- compatible = "brcm,bcm6328-hsspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0 0xff801000 0x0 0x600>;
- clocks = <&hsspi_pll>, <&hsspi_pll>;
- clock-names = "hsspi", "pll";
- spi-max-frequency = <100000000>;
- num-cs = <8>;
-
- status = "disabled";
- };
-
- nand: nand-controller@ff801800 {
- compatible = "brcm,nand-bcm68360",
- "brcm,brcmnand-v5.0",
- "brcm,brcmnand";
- reg-names = "nand", "nand-int-base", "nand-cache";
- reg = <0x0 0xff801800 0x0 0x180>,
- <0x0 0xff802000 0x0 0x10>,
- <0x0 0xff801c00 0x0 0x200>;
- parameter-page-big-endian = <0>;
-
- status = "disabled";
- };
- };
-};
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
+ * Copyright (C) 2020 Philippe Reynes <philippe.reynes@softathome.com>
* Copyright 2022 Broadcom Ltd.
*/
};
clocks: clocks {
+ u-boot,dm-pre-reloc;
+
periph_clk:periph-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
};
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-mult = <2>;
+ clock-div = <1>;
+ };
+
+ wdt_clk: wdt-clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-div = <4>;
+ clock-mult = <1>;
+ };
};
psci {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
+ u-boot,dm-pre-reloc;
uart0: serial@640 {
compatible = "brcm,bcm6345-uart";
clock-names = "refclk";
status = "disabled";
};
+
+ wdt1: watchdog@480 {
+ compatible = "brcm,bcm6345-wdt";
+ reg = <0x480 0x14>;
+ clocks = <&wdt_clk>;
+ };
+
+ wdt2: watchdog@4c0 {
+ compatible = "brcm,bcm6345-wdt";
+ reg = <0x4c0 0x14>;
+ clocks = <&wdt_clk>;
+ };
+
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <&wdt1>;
+ };
+
+ leds: led-controller@800 {
+ compatible = "brcm,bcm6858-leds";
+ reg = <0x800 0xe4>;
+
+ status = "disabled";
+ };
+
+ gpio0: gpio-controller@500 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x500 0x4>,
+ <0x520 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio1: gpio-controller@504 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x504 0x4>,
+ <0x524 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio2: gpio-controller@508 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x508 0x4>,
+ <0x528 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio3: gpio-controller@50c {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x50c 0x4>,
+ <0x52c 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio4: gpio-controller@510 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x510 0x4>,
+ <0x530 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio5: gpio-controller@514 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x514 0x4>,
+ <0x534 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio6: gpio-controller@518 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x518 0x4>,
+ <0x538 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio7: gpio-controller@51c {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x51c 0x4>,
+ <0x53c 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ hsspi: spi-controller@1000 {
+ compatible = "brcm,bcm6328-hsspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1000 0x600>;
+ clocks = <&hsspi_pll>, <&hsspi_pll>;
+ clock-names = "hsspi", "pll";
+ spi-max-frequency = <100000000>;
+ num-cs = <8>;
+
+ status = "disabled";
+ };
+
+ nand: nand-controller@1800 {
+ compatible = "brcm,nand-bcm68360",
+ "brcm,brcmnand-v5.0",
+ "brcm,brcmnand";
+ reg-names = "nand", "nand-int-base", "nand-cache";
+ reg = <0x1800 0x180>,
+ <0x2000 0x10>,
+ <0x1c00 0x200>;
+ parameter-page-big-endian = <0>;
+
+ status = "disabled";
+ };
};
};
/dts-v1/;
-#include "bcm68360.dtsi"
+#include "bcm6856.dtsi"
/ {
- model = "Broadcom bcm68360bg";
- compatible = "broadcom,bcm68360bg", "brcm,bcm68360";
+ model = "Broadcom BCM968360BG Reference Board";
+ compatible = "brcm,bcm968360bg", "brcm,bcm6856", "brcm,bcmbca";
aliases {
serial0 = &uart0;
+++ /dev/null
-if ARCH_BCM68360
-
-config SYS_VENDOR
- default "broadcom"
-
-config SYS_BOARD
- default "bcm968360bg"
-
-config SYS_CONFIG_NAME
- default "broadcom_bcm968360bg"
-
-endif
-
-config TARGET_BCM968360BG
- bool "Support Broadcom bcm968360bg"
- depends on ARCH_BCM68360
- select ARM64
+++ /dev/null
-BCM968360BG BOARD
-M: Philippe Reynes <philippe.reynes@softathome.com>
-S: Maintained
-F: board/broadcom/bcm968360bg
-F: include/configs/broadcom_bcm968360bg.h
-F: configs/bcm968360bg_ram_defconfig
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0+
-
-obj-y += bcm968360bg.o
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2020 Philippe Reynes <philippe.reynes@softathome.com>
- */
-
-#include <common.h>
-#include <fdtdec.h>
-#include <init.h>
-#include <linux/io.h>
-
-#ifdef CONFIG_ARM64
-#include <asm/armv8/mmu.h>
-
-static struct mm_region broadcom_bcm968360bg_mem_map[] = {
- {
- /* RAM */
- .virt = 0x00000000UL,
- .phys = 0x00000000UL,
- .size = 8UL * SZ_1G,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- /* SoC */
- .virt = 0x80000000UL,
- .phys = 0x80000000UL,
- .size = 0xff80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = broadcom_bcm968360bg_mem_map;
-#endif
-
-int board_init(void)
-{
- return 0;
-}
-
-int dram_init(void)
-{
- if (fdtdec_setup_mem_size_base() != 0)
- printf("fdtdec_setup_mem_size_base() has failed\n");
-
- return 0;
-}
-
-int dram_init_banksize(void)
-{
- fdtdec_setup_memory_banksize();
-
- return 0;
-}
-
-int print_cpuinfo(void)
-{
- return 0;
-}
+++ /dev/null
-CONFIG_ARM=y
-CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_ARCH_BCM68360=y
-CONFIG_SYS_TEXT_BASE=0x10000000
-CONFIG_SYS_MALLOC_LEN=0x100000
-CONFIG_SYS_MALLOC_F_LEN=0x8000
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_ENV_SIZE=0x2000
-CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="bcm968360bg"
-CONFIG_SYS_LOAD_ADDR=0x10000000
-CONFIG_TARGET_BCM968360BG=y
-CONFIG_ENV_VARS_UBOOT_CONFIG=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x11000000
-CONFIG_FIT=y
-CONFIG_FIT_SIGNATURE=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_MAXARGS=24
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x800000
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_MTD=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SPI=y
-CONFIG_DOS_PARTITION=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-# CONFIG_NET is not set
-CONFIG_CLK=y
-CONFIG_BCM6345_GPIO=y
-CONFIG_LED=y
-CONFIG_LED_BCM6858=y
-CONFIG_LED_BLINK=y
-# CONFIG_MMC is not set
-CONFIG_MTD=y
-CONFIG_DM_MTD=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_NAND_BRCMNAND=y
-CONFIG_NAND_BRCMNAND_68360=y
-CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SFDP_SUPPORT=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPECIFY_CONSOLE_INDEX=y
-CONFIG_CONS_INDEX=0
-CONFIG_DM_SERIAL=y
-CONFIG_SERIAL_SEARCH_ALL=y
-CONFIG_BCM6345_SERIAL=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_BCM63XX_HSSPI=y
-CONFIG_SYSRESET=y
-CONFIG_SYSRESET_WATCHDOG=y
-CONFIG_WDT_BCM6345=y
#define CONFIG_SYS_SDRAM_BASE 0x00000000
+#ifdef CONFIG_MTD_RAW_NAND
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#endif /* CONFIG_MTD_RAW_NAND */
+
#endif
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2020 Philippe Reynes <philippe.reynes@softathome.com>
- */
-
-#include <linux/sizes.h>
-
-/*
- * common
- */
-
-/* UART */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \
- 230400, 500000, 1500000 }
-/* Memory usage */
-
-/*
- * 6858
- */
-
-/* RAM */
-#define CONFIG_SYS_SDRAM_BASE 0x00000000
-
-/* U-Boot */
-
-#ifdef CONFIG_MTD_RAW_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#endif /* CONFIG_MTD_RAW_NAND */
-
-/*
- * 968360bg
- */
projects / platform / kernel / u-boot.git / commitdiff