ARM: socfpga: dts: add i2c busses

Add all 4 i2c busses.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index d13652c..f3df5da 100644 (file)
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -482,6 +482,46 @@
                        status = "disabled";
                };
 
+               i2c0: i2c@ffc04000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "snps,designware-i2c";
+                       reg = <0xffc04000 0x1000>;
+                       clocks = <&l4_sp_clk>;
+                       interrupts = <0 158 0x4>;
+                       status = "disabled";
+               };
+
+               i2c1: i2c@ffc05000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "snps,designware-i2c";
+                       reg = <0xffc05000 0x1000>;
+                       clocks = <&l4_sp_clk>;
+                       interrupts = <0 159 0x4>;
+                       status = "disabled";
+               };
+
+               i2c2: i2c@ffc06000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "snps,designware-i2c";
+                       reg = <0xffc06000 0x1000>;
+                       clocks = <&l4_sp_clk>;
+                       interrupts = <0 160 0x4>;
+                       status = "disabled";
+               };
+
+               i2c3: i2c@ffc07000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "snps,designware-i2c";
+                       reg = <0xffc07000 0x1000>;
+                       clocks = <&l4_sp_clk>;
+                       interrupts = <0 161 0x4>;
+                       status = "disabled";
+               };
+
                L2: l2-cache@fffef000 {
                        compatible = "arm,pl310-cache";
                        reg = <0xfffef000 0x1000>;