gas/testsuite/

2007-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/4027
	* gas/i386/opcode.s: Add more tests for "test".
	* i386/opcode-intel.d: Updated.
	* gas/i386/opcode-suffix.d: Likewise.
	* gas/i386/opcode.d: Likewise.

include/opcode/

2007-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/4027
	* i386.h (i386_optab): Put the real "test" before the pseudo
	one.

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 55418e4..858b385 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2007-02-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/4027
+       * gas/i386/opcode.s: Add more tests for "test".
+       * i386/opcode-intel.d: Updated.
+       * gas/i386/opcode-suffix.d: Likewise.
+       * gas/i386/opcode.d: Likewise.
+
 2007-02-06  Nick Clifton  <nickc@redhat.com>
 
        PR gas/3810 gas/3800

diff --git a/gas/testsuite/gas/i386/opcode-intel.d b/gas/testsuite/gas/i386/opcode-intel.d
index 2a3c44b..2bee617 100644 (file)
--- a/gas/testsuite/gas/i386/opcode-intel.d
+++ b/gas/testsuite/gas/i386/opcode-intel.d
@@ -608,4 +608,8 @@ Disassembly of section .text:
  *[0-9a-f]+:   0f 00 08[       ]+str[  ]+(WORD PTR )?\[eax\]
  *[0-9a-f]+:   0f ad d0 [      ]*shrd[         ]+eax,edx,cl
  *[0-9a-f]+:   0f a5 d0 [      ]*shld[         ]+eax,edx,cl
+ *[0-9a-f]+:   85 c3 [         ]*test[         ]+ebx,eax
+ *[0-9a-f]+:   85 d8 [         ]*test[         ]+eax,ebx
+ *[0-9a-f]+:   85 18 [         ]*test[         ]+(DWORD PTR )?\[eax\],ebx
+#pass
        \.\.\.

diff --git a/gas/testsuite/gas/i386/opcode-suffix.d b/gas/testsuite/gas/i386/opcode-suffix.d
index de9c745..bceb70c 100644 (file)
--- a/gas/testsuite/gas/i386/opcode-suffix.d
+++ b/gas/testsuite/gas/i386/opcode-suffix.d
@@ -585,4 +585,7 @@ Disassembly of section .text:
  *[0-9a-f]+:   0f 00 08[       ]+strw[         ]+\(%eax\)
  *[0-9a-f]+:   0f ad d0 [      ]*shrdl[        ]+%cl,%edx,%eax
  *[0-9a-f]+:   0f a5 d0 [      ]*shldl[        ]+%cl,%edx,%eax
-       \.\.\.
+ *[0-9a-f]+:   85 c3 [         ]*testl[        ]+%eax,%ebx
+ *[0-9a-f]+:   85 d8 [         ]*testl[        ]+%ebx,%eax
+ *[0-9a-f]+:   85 18 [         ]*testl[        ]+%ebx,\(%eax\)
+#pass

diff --git a/gas/testsuite/gas/i386/opcode.d b/gas/testsuite/gas/i386/opcode.d
index f7ae921..337c781 100644 (file)
--- a/gas/testsuite/gas/i386/opcode.d
+++ b/gas/testsuite/gas/i386/opcode.d
@@ -584,4 +584,7 @@ Disassembly of section .text:
  9ec:  0f 00 08 [      ]*str    \(%eax\)
  9ef:  0f ad d0 [      ]*shrd   %cl,%edx,%eax
  9f2:  0f a5 d0 [      ]*shld   %cl,%edx,%eax
-       \.\.\.
+ 9f5:  85 c3 [         ]*test   %eax,%ebx
+ 9f7:  85 d8 [         ]*test   %ebx,%eax
+ 9f9:  85 18 [         ]*test   %ebx,\(%eax\)
+#pass

diff --git a/gas/testsuite/gas/i386/opcode.s b/gas/testsuite/gas/i386/opcode.s
index d5641dc..b54b9fc 100644 (file)
--- a/gas/testsuite/gas/i386/opcode.s
+++ b/gas/testsuite/gas/i386/opcode.s
@@ -581,5 +581,9 @@ foo:
  shrd   %cl,%edx,%eax
  shld   %cl,%edx,%eax
 
+ test   %eax,%ebx
+ test   %ebx,%eax
+ test   (%eax),%ebx
+
 # Force a good alignment.
  .p2align 4,0

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index a0b321f..300a864 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,9 @@
+2007-02-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/4027
+       * i386.h (i386_optab): Put the real "test" before the pseudo
+       one.
+
 2007-01-08  Kazu Hirata  <kazu@codesourcery.com>
 
        * m68k.h (m68010up): OR fido_a.

diff --git a/include/opcode/i386.h b/include/opcode/i386.h
index 3e91aa0..97e3761 100644 (file)
--- a/include/opcode/i386.h
+++ b/include/opcode/i386.h
@@ -251,8 +251,8 @@ static const template i386_optab[] =
 {"cmp",           2,   0x3c, X, 0,      bwlq_Suf|W,            { EncImm, Acc, 0} },
 {"cmp",           2,   0x80, 7, 0,      bwlq_Suf|W|Modrm,      { EncImm, Reg|AnyMem, 0} },
 
-{"test",   2,  0x84, X, 0,      bwlq_Suf|W|Modrm,      { Reg|AnyMem, Reg, 0} },
 {"test",   2,  0x84, X, 0,      bwlq_Suf|W|Modrm,      { Reg, Reg|AnyMem, 0} },
+{"test",   2,  0x84, X, 0,      bwlq_Suf|W|Modrm,      { AnyMem, Reg, 0} },
 {"test",   2,  0xa8, X, 0,      bwlq_Suf|W,            { EncImm, Acc, 0} },
 {"test",   2,  0xf6, 0, 0,      bwlq_Suf|W|Modrm,      { EncImm, Reg|AnyMem, 0} },