drm/i915/vlv: fix up broken precision in vlv_crtc_clock_get

commit 662c6ecbcdca1fe8a5402f6c83d98d242917a043 upstream.

With some divider values we end up with the wrong result.  So remove the
intermediates (like Ville suggested in the first place) to get the right
answer.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 8abe797..f535670 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5040,7 +5040,7 @@ static void vlv_crtc_clock_get(struct intel_crtc *crtc,
        int pipe = pipe_config->cpu_transcoder;
        intel_clock_t clock;
        u32 mdiv;
-       int refclk = 100000, fastclk, update_rate;
+       int refclk = 100000;
 
        mutex_lock(&dev_priv->dpio_lock);
        mdiv = vlv_dpio_read(dev_priv, DPIO_DIV(pipe));
@@ -5052,10 +5052,8 @@ static void vlv_crtc_clock_get(struct intel_crtc *crtc,
        clock.p1 = (mdiv >> DPIO_P1_SHIFT) & 7;
        clock.p2 = (mdiv >> DPIO_P2_SHIFT) & 0x1f;
 
-       update_rate = refclk / clock.n;
-       clock.vco = update_rate * clock.m1 * clock.m2;
-       fastclk = clock.vco / clock.p1 / clock.p2;
-       clock.dot = (2 * fastclk);
+       clock.vco = refclk * clock.m1 * clock.m2 / clock.n;
+       clock.dot = 2 * clock.vco / (clock.p1 * clock.p2);
 
        pipe_config->adjusted_mode.clock = clock.dot / 10;
 }