AM_CONFIG_HEADER(config.h)
+AC_CANONICAL_HOST
+
AC_PROG_CC
AC_PROG_LIBTOOL
AC_CHECK_FUNCS([getisax])
AC_C_BIGENDIAN
AC_C_INLINE
+
+# Checks for Sun Studio compilers
+AC_CHECK_DECL([__SUNPRO_C], [SUNCC="yes"], [SUNCC="no"])
+AC_CHECK_DECL([__amd64], [AMD64_ABI="yes"], [AMD64_ABI="no"])
+
#
# We ignore pixman_major in the version here because the major version should
# always be encoded in the actual library name. Ie., the soname is:
dnl ===========================================================================
dnl Check for MMX
-MMX_CFLAGS="-mmmx -Winline"
+if test "x$MMX_CFLAGS" = "x" ; then
+ if test "x$SUNCC" = "xyes"; then
+ # Sun Studio doesn't have an -xarch=mmx flag, so we have to use sse
+ # but if we're building 64-bit, mmx & sse support is on by default and
+ # -xarch=sse throws an error instead
+ if test "$AMD64_ABI" = "no" ; then
+ MMX_CFLAGS="-xarch=sse"
+ fi
+ else
+ MMX_CFLAGS="-mmmx -Winline"
+ fi
+fi
have_mmx_intrinsics=no
AC_MSG_CHECKING(whether to use MMX intrinsics)
xserver_save_CFLAGS=$CFLAGS
-CFLAGS="$CFLAGS $MMX_CFLAGS"
+CFLAGS="$MMX_CFLAGS $CFLAGS"
AC_COMPILE_IFELSE([
#if defined(__GNUC__) && (__GNUC__ < 3 || (__GNUC__ == 3 && __GNUC_MINOR__ < 4))
error "Need GCC >= 3.4 for MMX intrinsics"
dnl ===========================================================================
dnl Check for SSE2
-SSE2_CFLAGS="-mmmx -msse2 -Winline"
+if test "x$SSE2_CFLAGS" = "x" ; then
+ if test "x$SUNCC" = "xyes"; then
+ # SSE2 is enabled by default in the Sun Studio 64-bit environment
+ if test "$AMD64_ABI" = "no" ; then
+ SSE2_CFLAGS="-xarch=sse2"
+ fi
+ else
+ SSE2_CFLAGS="-mmmx -msse2 -Winline"
+ fi
+fi
have_sse2_intrinsics=no
AC_MSG_CHECKING(whether to use SSE2 intrinsics)
xserver_save_CFLAGS=$CFLAGS
-CFLAGS="$CFLAGS -msse2 $SSE2_CFLAGS"
+CFLAGS="$SSE2_CFLAGS $CFLAGS"
AC_COMPILE_IFELSE([
#if defined(__GNUC__) && (__GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 2))
AM_CONDITIONAL(USE_SSE2, test $have_sse2_intrinsics = yes)
-dnl ========================================================
+dnl ===========================================================================
+dnl Other special flags needed when building code using MMX or SSE instructions
+case $host_os in
+ solaris*)
+ # When building 32-bit binaries, apply a mapfile to ensure that the
+ # binaries aren't flagged as only able to run on MMX+SSE capable CPUs
+ # since they check at runtime before using those instructions
+ if test "$AMD64_ABI" = "no" ; then
+ HWCAP_LDFLAGS='-Wl,-M,$(srcdir)/solaris-hwcap.mapfile'
+ fi
+ if test "x$MMX_LDFLAGS" = "x" ; then
+ MMX_LDFLAGS="$HWCAP_LDFLAGS"
+ fi
+ if test "x$SSE2_LDFLAGS" = "x" ; then
+ SSE2_LDFLAGS="$HWCAP_LDFLAGS"
+ fi
+ ;;
+esac
+
AC_SUBST(MMX_CFLAGS)
+AC_SUBST(MMX_LDFLAGS)
AC_SUBST(SSE2_CFLAGS)
+AC_SUBST(SSE2_LDFLAGS)
+dnl ===========================================================================
dnl Check for VMX/Altivec
if test -n "`$CC -v 2>&1 | grep version | grep Apple`"; then
VMX_CFLAGS="-faltivec"
pixman-mmx.h
libpixman_mmx_la_CFLAGS = $(DEP_CFLAGS) $(MMX_CFLAGS)
libpixman_mmx_la_LIBADD = $(DEP_LIBS)
+libpixman_1_la_LDFLAGS += $(MMX_LDFLAGS)
libpixman_1_la_LIBADD += libpixman-mmx.la
endif
pixman-sse2.h
libpixman_sse2_la_CFLAGS = $(DEP_CFLAGS) $(SSE2_CFLAGS)
libpixman_sse2_la_LIBADD = $(DEP_LIBS)
+libpixman_1_la_LDFLAGS += $(SSE2_LDFLAGS)
libpixman_1_la_LIBADD += libpixman-sse2.la
endif
* possible.
*/
-/* --------------- MMX primitivess ------------------------------------ */
+/* --------------- MMX primitives ------------------------------------- */
+
+typedef uint64_t ullong;
#ifdef __GNUC__
-typedef unsigned long long ullong;
typedef ullong mmxdatafield;
-#endif
-#ifdef _MSC_VER
-typedef unsigned __int64 ullong;
+#else
typedef __m64 mmxdatafield;
+/* If __m64 is defined as a struct or union, define M64_MEMBER to be the
+ name of the member used to access the data */
+# ifdef _MSC_VER
+# define M64_MEMBER m64_u64
+# elif defined(__SUNPRO_C)
+# define M64_MEMBER l_
+# endif
#endif
typedef struct
mmxdatafield mmx_000000000000ffff;
} MMXData;
+#if defined(_MSC_VER)
+# define MMXDATA_INIT(field, val) { val##UI64 }
+#elif defined(M64_MEMBER) /* __m64 is a struct, not an integral type */
+# define MMXDATA_INIT(field, val) field = { val##ULL }
+#else /* __m64 is an integral type */
+# define MMXDATA_INIT(field, val) field = val##ULL
+#endif
+
static const MMXData c =
{
-#ifdef __GNUC__
- .mmx_4x00ff = 0x00ff00ff00ff00ffULL,
- .mmx_4x0080 = 0x0080008000800080ULL,
- .mmx_565_rgb = 0x000001f0003f001fULL,
- .mmx_565_unpack_multiplier = 0x0000008404100840ULL,
- .mmx_565_r = 0x000000f800000000ULL,
- .mmx_565_g = 0x0000000000fc0000ULL,
- .mmx_565_b = 0x00000000000000f8ULL,
- .mmx_mask_0 = 0xffffffffffff0000ULL,
- .mmx_mask_1 = 0xffffffff0000ffffULL,
- .mmx_mask_2 = 0xffff0000ffffffffULL,
- .mmx_mask_3 = 0x0000ffffffffffffULL,
- .mmx_full_alpha = 0x00ff000000000000ULL,
- .mmx_ffff0000ffff0000 = 0xffff0000ffff0000ULL,
- .mmx_0000ffff00000000 = 0x0000ffff00000000ULL,
- .mmx_000000000000ffff = 0x000000000000ffffULL,
-#endif
-#ifdef _MSC_VER
- { 0x00ff00ff00ff00ffUI64 },
- { 0x0080008000800080UI64 },
- { 0x000001f0003f001fUI64 },
- { 0x0000008404100840UI64 },
- { 0x000000f800000000UI64 },
- { 0x0000000000fc0000UI64 },
- { 0x00000000000000f8UI64 },
- { 0xffffffffffff0000UI64 },
- { 0xffffffff0000ffffUI64 },
- { 0xffff0000ffffffffUI64 },
- { 0x0000ffffffffffffUI64 },
- { 0x00ff000000000000UI64 },
- { 0xffff0000ffff0000UI64 },
- { 0x0000ffff00000000UI64 },
- { 0x000000000000ffffUI64 },
-#endif
+ MMXDATA_INIT(.mmx_4x00ff, 0x00ff00ff00ff00ff),
+ MMXDATA_INIT(.mmx_4x0080, 0x0080008000800080),
+ MMXDATA_INIT(.mmx_565_rgb, 0x000001f0003f001f),
+ MMXDATA_INIT(.mmx_565_unpack_multiplier, 0x0000008404100840),
+ MMXDATA_INIT(.mmx_565_r, 0x000000f800000000),
+ MMXDATA_INIT(.mmx_565_g, 0x0000000000fc0000),
+ MMXDATA_INIT(.mmx_565_b, 0x00000000000000f8),
+ MMXDATA_INIT(.mmx_mask_0, 0xffffffffffff0000),
+ MMXDATA_INIT(.mmx_mask_1, 0xffffffff0000ffff),
+ MMXDATA_INIT(.mmx_mask_2, 0xffff0000ffffffff),
+ MMXDATA_INIT(.mmx_mask_3, 0x0000ffffffffffff),
+ MMXDATA_INIT(.mmx_full_alpha, 0x00ff000000000000),
+ MMXDATA_INIT(.mmx_ffff0000ffff0000, 0xffff0000ffff0000),
+ MMXDATA_INIT(.mmx_0000ffff00000000, 0x0000ffff00000000),
+ MMXDATA_INIT(.mmx_000000000000ffff, 0x000000000000ffff),
};
#ifdef __GNUC__
# else
# define MC(x) ((__m64)c.mmx_##x)
# endif
-#endif
-
-#ifdef _MSC_VER
+#else
# define MC(x) c.mmx_##x
#endif
{
#ifdef __ICC
return _mm_cvtsi64_m64 (x);
-#elif defined (__GNUC__)
- return (__m64)x;
-#endif
-
-#ifdef _MSC_VER
+#elif defined M64_MEMBER /* __m64 is a struct, not an integral type */
__m64 res;
- res.m64_u64 = x;
+ res.M64_MEMBER = x;
return res;
+#else /* __m64 is an integral type */
+ return (__m64)x;
#endif
}
{
#ifdef __ICC
return _mm_cvtm64_si64 (x);
-#elif defined (__GNUC__)
- return (ullong)x;
-#endif
-
-#ifdef _MSC_VER
- ullong res;
-
- res = x.m64_u64;
+#elif defined M64_MEMBER /* __m64 is a struct, not an integral type */
+ ullong res = x.M64_MEMBER;
return res;
+#else /* __m64 is an integral type */
+ return (ullong)x;
#endif
}
while (w >= 64)
{
-#ifdef __GNUC__
+#if defined (__GNUC__) || (defined(__SUNPRO_C) && (__SUNPRO_C >= 0x590))
__asm__ (
"movq (%1), %%mm0\n"
"movq 8(%1), %%mm1\n"
/* 'inline' is available only in C++ in MSVC */
# define inline __inline
# define force_inline __forceinline
-#elif defined __GNUC__
+#elif defined __GNUC__ || (defined(__SUNPRO_C) && (__SUNPRO_C >= 0x590))
# define inline __inline__
# define force_inline __inline__ __attribute__ ((__always_inline__))
#else
--- /dev/null
+###############################################################################
+#
+# Copyright 2009 Sun Microsystems, Inc. All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, and/or sell copies of the Software, and to permit persons
+# to whom the Software is furnished to do so, provided that the above
+# copyright notice(s) and this permission notice appear in all copies of
+# the Software and that both the above copyright notice(s) and this
+# permission notice appear in supporting documentation.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT
+# OF THIRD PARTY RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+# HOLDERS INCLUDED IN THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL
+# INDIRECT OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING
+# FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
+# NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
+# WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+#
+# Except as contained in this notice, the name of a copyright holder
+# shall not be used in advertising or otherwise to promote the sale, use
+# or other dealings in this Software without prior written authorization
+# of the copyright holder.
+#
+###############################################################################
+#
+# Override the linker's detection of CMOV/MMX/SSE instructions so this
+# library isn't flagged as only usable on CPU's with those ISA's, since it
+# checks at runtime for availability before calling them
+
+hwcap_1 = V0x0 FPU OVERRIDE;