volatile int& refcall();
-// CHECK: define void @_Z2f1PViPV1S
+// CHECK: define{{.*}} void @_Z2f1PViPV1S
void f1(volatile int *x, volatile S* s) {
// We should perform the load in these cases.
// CHECK: load volatile i32, i32*
// CHECK: ret
}
-// CHECK: define void @_Z2f2PVi
+// CHECK: define{{.*}} void @_Z2f2PVi
// CHECK-NOT: load volatile
// CHECK: ret
void f2(volatile int *x) {
1 ? refcall() : *x;
}
-// CHECK: define void @_Z2f3v()
+// CHECK: define{{.*}} void @_Z2f3v()
// CHECK-NOT: load
// CHECK-NOT: memcpy
export module M;
-// CHECK-DAG: @_ZW1ME1a = constant i32 1
+// CHECK-DAG: @_ZW1ME1a ={{.*}} constant i32 1
const int a = 1;
-// CHECK-DAG: @b = constant i32 2
+// CHECK-DAG: @b ={{.*}} constant i32 2
export const int b = 2;
export int f() { return a + b; }
export module FooBar;
export {
- // CHECK-DAG: define i32 @_Z1fv(
+ // CHECK-DAG: define{{.*}} i32 @_Z1fv(
int f() { return 0; }
}
// CHECK-DAG: define weak_odr void @_ZW6FooBarE2f2v(
inline void f2() { }
-// CHECK-DAG: define void @_ZW6FooBarE2f3v(
+// CHECK-DAG: define{{.*}} void @_ZW6FooBarE2f3v(
static void f3() {}
export void use_f3() { f3(); }
}
-// X86_32: define void @foo(%struct.Y* %P)
+// X86_32: define{{.*}} void @foo(%struct.Y* %P)
// X86_32: call void @bar(%struct.Y* sret(%struct.Y) align 4 %{{[^),]*}})
-// X86_32: define void @bar(%struct.Y* noalias sret(%struct.Y) align 4 %{{[^,)]*}})
+// X86_32: define{{.*}} void @bar(%struct.Y* noalias sret(%struct.Y) align 4 %{{[^,)]*}})
// X86_32: ret void
// RUN: %clang_cc1 -triple i386-unknown-unknown -O2 -emit-llvm -o - %s | FileCheck %s
-// CHECK-LABEL: define i32 @f0()
+// CHECK-LABEL: define{{.*}} i32 @f0()
// CHECK: ret i32 0
-// CHECK-LABEL: define i32 @f1()
+// CHECK-LABEL: define{{.*}} i32 @f1()
// CHECK: ret i32 0
-// CHECK-LABEL: define i32 @f2()
+// CHECK-LABEL: define{{.*}} i32 @f2()
// CHECK: ret i32 0
// <rdar://problem/6113085>
// RUN: %clang_cc1 -triple i386-unknown-unknown -O1 -emit-llvm -o - %s | FileCheck %s
-// CHECK-LABEL: define i32 @f0
+// CHECK-LABEL: define{{.*}} i32 @f0
// CHECK: ret i32 1
-// CHECK-LABEL: define i32 @f1
+// CHECK-LABEL: define{{.*}} i32 @f1
// CHECK: ret i32 1
-// CHECK-LABEL: define i32 @f2
+// CHECK-LABEL: define{{.*}} i32 @f2
// CHECK: ret i32 1
// <rdr://6115726>
// Test RISC-V specific inline assembly constraints.
void test_I() {
-// CHECK-LABEL: define void @test_I()
+// CHECK-LABEL: define{{.*}} void @test_I()
// CHECK: call void asm sideeffect "", "I"(i32 2047)
asm volatile ("" :: "I"(2047));
// CHECK: call void asm sideeffect "", "I"(i32 -2048)
}
void test_J() {
-// CHECK-LABEL: define void @test_J()
+// CHECK-LABEL: define{{.*}} void @test_J()
// CHECK: call void asm sideeffect "", "J"(i32 0)
asm volatile ("" :: "J"(0));
}
void test_K() {
-// CHECK-LABEL: define void @test_K()
+// CHECK-LABEL: define{{.*}} void @test_K()
// CHECK: call void asm sideeffect "", "K"(i32 31)
asm volatile ("" :: "K"(31));
// CHECK: call void asm sideeffect "", "K"(i32 0)
float f;
double d;
void test_f() {
-// CHECK-LABEL: define void @test_f()
+// CHECK-LABEL: define{{.*}} void @test_f()
// CHECK: [[FLT_ARG:%[a-zA-Z_0-9]+]] = load float, float* @f
// CHECK: call void asm sideeffect "", "f"(float [[FLT_ARG]])
asm volatile ("" :: "f"(f));
}
void test_A(int *p) {
-// CHECK-LABEL: define void @test_A(i32* %p)
+// CHECK-LABEL: define{{.*}} void @test_A(i32* %p)
// CHECK: call void asm sideeffect "", "*A"(i32* %p)
asm volatile("" :: "A"(*p));
}
// Scalars passed on the stack should not have signext/zeroext attributes
// (they are anyext).
-// CHECK-LABEL: define i32 @f_scalar_stack_1(i32 %a, i64 %b, float %c, double %d, fp128 %e, i8 zeroext %f, i8 %g, i8 %h)
+// CHECK-LABEL: define{{.*}} i32 @f_scalar_stack_1(i32 %a, i64 %b, float %c, double %d, fp128 %e, i8 zeroext %f, i8 %g, i8 %h)
int f_scalar_stack_1(int32_t a, int64_t b, float c, double d, long double e,
uint8_t f, int8_t g, uint8_t h) {
return g + h;
// the presence of large return values that consume a register due to the need
// to pass a pointer.
-// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 4 %agg.result, float %a, i64 %b, double %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g)
+// CHECK-LABEL: define{{.*}} void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 4 %agg.result, float %a, i64 %b, double %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g)
struct large f_scalar_stack_2(float a, int64_t b, double c, long double d,
uint8_t e, int8_t f, uint8_t g) {
return (struct large){a, e, f, g};
// Aggregates and >=XLen scalars passed on the stack should be lowered just as
// they would be if passed via registers.
-// CHECK-LABEL: define void @f_scalar_stack_3(double %a, i64 %b, double %c, i64 %d, i32 %e, i64 %f, float %g, double %h, fp128 %i)
+// CHECK-LABEL: define{{.*}} void @f_scalar_stack_3(double %a, i64 %b, double %c, i64 %d, i32 %e, i64 %f, float %g, double %h, fp128 %i)
void f_scalar_stack_3(double a, int64_t b, double c, int64_t d, int e,
int64_t f, float g, double h, long double i) {}
-// CHECK-LABEL: define void @f_agg_stack(double %a, i64 %b, double %c, i64 %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* %h)
+// CHECK-LABEL: define{{.*}} void @f_agg_stack(double %a, i64 %b, double %c, i64 %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* %h)
void f_agg_stack(double a, int64_t b, double c, int64_t d, struct tiny e,
struct small f, struct small_aligned g, struct large h) {}
// Scalars passed on the stack should not have signext/zeroext attributes
// (they are anyext).
-// CHECK-LABEL: define i32 @f_scalar_stack_1(i32 %a, i64 %b, i32 %c, double %d, fp128 %e, i8 zeroext %f, i8 %g, i8 %h)
+// CHECK-LABEL: define{{.*}} i32 @f_scalar_stack_1(i32 %a, i64 %b, i32 %c, double %d, fp128 %e, i8 zeroext %f, i8 %g, i8 %h)
int f_scalar_stack_1(int32_t a, int64_t b, int32_t c, double d, long double e,
uint8_t f, int8_t g, uint8_t h) {
return g + h;
// the presence of large return values that consume a register due to the need
// to pass a pointer.
-// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 4 %agg.result, i32 %a, i64 %b, double %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g)
+// CHECK-LABEL: define{{.*}} void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 4 %agg.result, i32 %a, i64 %b, double %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g)
struct large f_scalar_stack_2(int32_t a, int64_t b, double c, long double d,
uint8_t e, int8_t f, uint8_t g) {
return (struct large){a, e, f, g};
// Aggregates and >=XLen scalars passed on the stack should be lowered just as
// they would be if passed via registers.
-// CHECK-LABEL: define void @f_scalar_stack_3(double %a, i64 %b, double %c, i64 %d, i32 %e, i64 %f, i32 %g, double %h, fp128 %i)
+// CHECK-LABEL: define{{.*}} void @f_scalar_stack_3(double %a, i64 %b, double %c, i64 %d, i32 %e, i64 %f, i32 %g, double %h, fp128 %i)
void f_scalar_stack_3(double a, int64_t b, double c, int64_t d, int e,
int64_t f, int32_t g, double h, long double i) {}
-// CHECK-LABEL: define void @f_agg_stack(double %a, i64 %b, double %c, i64 %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* %h)
+// CHECK-LABEL: define{{.*}} void @f_agg_stack(double %a, i64 %b, double %c, i64 %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* %h)
void f_agg_stack(double a, int64_t b, double c, int64_t d, struct tiny e,
struct small f, struct small_aligned g, struct large h) {}
#include <stddef.h>
#include <stdint.h>
-// CHECK-LABEL: define void @f_void()
+// CHECK-LABEL: define{{.*}} void @f_void()
void f_void(void) {}
// Scalar arguments and return values smaller than the word size are extended
// according to the sign of their type, up to 32 bits
-// CHECK-LABEL: define zeroext i1 @f_scalar_0(i1 zeroext %x)
+// CHECK-LABEL: define{{.*}} zeroext i1 @f_scalar_0(i1 zeroext %x)
_Bool f_scalar_0(_Bool x) { return x; }
-// CHECK-LABEL: define signext i8 @f_scalar_1(i8 signext %x)
+// CHECK-LABEL: define{{.*}} signext i8 @f_scalar_1(i8 signext %x)
int8_t f_scalar_1(int8_t x) { return x; }
-// CHECK-LABEL: define zeroext i8 @f_scalar_2(i8 zeroext %x)
+// CHECK-LABEL: define{{.*}} zeroext i8 @f_scalar_2(i8 zeroext %x)
uint8_t f_scalar_2(uint8_t x) { return x; }
-// CHECK-LABEL: define i32 @f_scalar_3(i32 %x)
+// CHECK-LABEL: define{{.*}} i32 @f_scalar_3(i32 %x)
int32_t f_scalar_3(int32_t x) { return x; }
-// CHECK-LABEL: define i64 @f_scalar_4(i64 %x)
+// CHECK-LABEL: define{{.*}} i64 @f_scalar_4(i64 %x)
int64_t f_scalar_4(int64_t x) { return x; }
#ifdef __SIZEOF_INT128__
-// CHECK-FORCEINT128-LABEL: define i128 @f_scalar_5(i128 %x)
+// CHECK-FORCEINT128-LABEL: define{{.*}} i128 @f_scalar_5(i128 %x)
__int128_t f_scalar_5(__int128_t x) { return x; }
#endif
-// CHECK-LABEL: define float @f_fp_scalar_1(float %x)
+// CHECK-LABEL: define{{.*}} float @f_fp_scalar_1(float %x)
float f_fp_scalar_1(float x) { return x; }
-// CHECK-LABEL: define double @f_fp_scalar_2(double %x)
+// CHECK-LABEL: define{{.*}} double @f_fp_scalar_2(double %x)
double f_fp_scalar_2(double x) { return x; }
// Scalars larger than 2*xlen are passed/returned indirect. However, the
// RISC-V LLVM backend can handle this fine, so the function doesn't need to
// be modified.
-// CHECK-LABEL: define fp128 @f_fp_scalar_3(fp128 %x)
+// CHECK-LABEL: define{{.*}} fp128 @f_fp_scalar_3(fp128 %x)
long double f_fp_scalar_3(long double x) { return x; }
// Empty structs or unions are ignored.
struct empty_s {};
-// CHECK-LABEL: define void @f_agg_empty_struct()
+// CHECK-LABEL: define{{.*}} void @f_agg_empty_struct()
struct empty_s f_agg_empty_struct(struct empty_s x) {
return x;
}
union empty_u {};
-// CHECK-LABEL: define void @f_agg_empty_union()
+// CHECK-LABEL: define{{.*}} void @f_agg_empty_union()
union empty_u f_agg_empty_union(union empty_u x) {
return x;
}
uint8_t a, b, c, d;
};
-// CHECK-LABEL: define void @f_agg_tiny(i32 %x.coerce)
+// CHECK-LABEL: define{{.*}} void @f_agg_tiny(i32 %x.coerce)
void f_agg_tiny(struct tiny x) {
x.a += x.b;
x.c += x.d;
}
-// CHECK-LABEL: define i32 @f_agg_tiny_ret()
+// CHECK-LABEL: define{{.*}} i32 @f_agg_tiny_ret()
struct tiny f_agg_tiny_ret() {
return (struct tiny){1, 2, 3, 4};
}
typedef uint8_t v4i8 __attribute__((vector_size(4)));
typedef int32_t v1i32 __attribute__((vector_size(4)));
-// CHECK-LABEL: define void @f_vec_tiny_v4i8(i32 %x.coerce)
+// CHECK-LABEL: define{{.*}} void @f_vec_tiny_v4i8(i32 %x.coerce)
void f_vec_tiny_v4i8(v4i8 x) {
x[0] = x[1];
x[2] = x[3];
}
-// CHECK-LABEL: define i32 @f_vec_tiny_v4i8_ret()
+// CHECK-LABEL: define{{.*}} i32 @f_vec_tiny_v4i8_ret()
v4i8 f_vec_tiny_v4i8_ret() {
return (v4i8){1, 2, 3, 4};
}
-// CHECK-LABEL: define void @f_vec_tiny_v1i32(i32 %x.coerce)
+// CHECK-LABEL: define{{.*}} void @f_vec_tiny_v1i32(i32 %x.coerce)
void f_vec_tiny_v1i32(v1i32 x) {
x[0] = 114;
}
-// CHECK-LABEL: define i32 @f_vec_tiny_v1i32_ret()
+// CHECK-LABEL: define{{.*}} i32 @f_vec_tiny_v1i32_ret()
v1i32 f_vec_tiny_v1i32_ret() {
return (v1i32){1};
}
int32_t a, *b;
};
-// CHECK-LABEL: define void @f_agg_small([2 x i32] %x.coerce)
+// CHECK-LABEL: define{{.*}} void @f_agg_small([2 x i32] %x.coerce)
void f_agg_small(struct small x) {
x.a += *x.b;
x.b = &x.a;
}
-// CHECK-LABEL: define [2 x i32] @f_agg_small_ret()
+// CHECK-LABEL: define{{.*}} [2 x i32] @f_agg_small_ret()
struct small f_agg_small_ret() {
return (struct small){1, 0};
}
typedef uint8_t v8i8 __attribute__((vector_size(8)));
typedef int64_t v1i64 __attribute__((vector_size(8)));
-// CHECK-LABEL: define void @f_vec_small_v8i8(i64 %x.coerce)
+// CHECK-LABEL: define{{.*}} void @f_vec_small_v8i8(i64 %x.coerce)
void f_vec_small_v8i8(v8i8 x) {
x[0] = x[7];
}
-// CHECK-LABEL: define i64 @f_vec_small_v8i8_ret()
+// CHECK-LABEL: define{{.*}} i64 @f_vec_small_v8i8_ret()
v8i8 f_vec_small_v8i8_ret() {
return (v8i8){1, 2, 3, 4, 5, 6, 7, 8};
}
-// CHECK-LABEL: define void @f_vec_small_v1i64(i64 %x.coerce)
+// CHECK-LABEL: define{{.*}} void @f_vec_small_v1i64(i64 %x.coerce)
void f_vec_small_v1i64(v1i64 x) {
x[0] = 114;
}
-// CHECK-LABEL: define i64 @f_vec_small_v1i64_ret()
+// CHECK-LABEL: define{{.*}} i64 @f_vec_small_v1i64_ret()
v1i64 f_vec_small_v1i64_ret() {
return (v1i64){1};
}
int64_t a;
};
-// CHECK-LABEL: define void @f_agg_small_aligned(i64 %x.coerce)
+// CHECK-LABEL: define{{.*}} void @f_agg_small_aligned(i64 %x.coerce)
void f_agg_small_aligned(struct small_aligned x) {
x.a += x.a;
}
-// CHECK-LABEL: define i64 @f_agg_small_aligned_ret(i64 %x.coerce)
+// CHECK-LABEL: define{{.*}} i64 @f_agg_small_aligned_ret(i64 %x.coerce)
struct small_aligned f_agg_small_aligned_ret(struct small_aligned x) {
return (struct small_aligned){10};
}
int32_t a, b, c, d;
};
-// CHECK-LABEL: define void @f_agg_large(%struct.large* %x)
+// CHECK-LABEL: define{{.*}} void @f_agg_large(%struct.large* %x)
void f_agg_large(struct large x) {
x.a = x.b + x.c + x.d;
}
// The address where the struct should be written to will be the first
// argument
-// CHECK-LABEL: define void @f_agg_large_ret(%struct.large* noalias sret(%struct.large) align 4 %agg.result, i32 %i, i8 signext %j)
+// CHECK-LABEL: define{{.*}} void @f_agg_large_ret(%struct.large* noalias sret(%struct.large) align 4 %agg.result, i32 %i, i8 signext %j)
struct large f_agg_large_ret(int32_t i, int8_t j) {
return (struct large){1, 2, 3, 4};
}
typedef unsigned char v16i8 __attribute__((vector_size(16)));
-// CHECK-LABEL: define void @f_vec_large_v16i8(<16 x i8>* %0)
+// CHECK-LABEL: define{{.*}} void @f_vec_large_v16i8(<16 x i8>* %0)
void f_vec_large_v16i8(v16i8 x) {
x[0] = x[7];
}
-// CHECK-LABEL: define void @f_vec_large_v16i8_ret(<16 x i8>* noalias sret(<16 x i8>) align 16 %agg.result)
+// CHECK-LABEL: define{{.*}} void @f_vec_large_v16i8_ret(<16 x i8>* noalias sret(<16 x i8>) align 16 %agg.result)
v16i8 f_vec_large_v16i8_ret() {
return (v16i8){1, 2, 3, 4, 5, 6, 7, 8};
}
// Scalars passed on the stack should not have signext/zeroext attributes
// (they are anyext).
-// CHECK-LABEL: define i32 @f_scalar_stack_1(i32 %a.coerce, [2 x i32] %b.coerce, i64 %c.coerce, %struct.large* %d, i8 zeroext %e, i8 signext %f, i8 %g, i8 %h)
+// CHECK-LABEL: define{{.*}} i32 @f_scalar_stack_1(i32 %a.coerce, [2 x i32] %b.coerce, i64 %c.coerce, %struct.large* %d, i8 zeroext %e, i8 signext %f, i8 %g, i8 %h)
int f_scalar_stack_1(struct tiny a, struct small b, struct small_aligned c,
struct large d, uint8_t e, int8_t f, uint8_t g, int8_t h) {
return g + h;
// the presence of large return values that consume a register due to the need
// to pass a pointer.
-// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 4 %agg.result, i32 %a, i64 %b, i64 %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g)
+// CHECK-LABEL: define{{.*}} void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 4 %agg.result, i32 %a, i64 %b, i64 %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g)
struct large f_scalar_stack_2(int32_t a, int64_t b, int64_t c, long double d,
uint8_t e, int8_t f, uint8_t g) {
return (struct large){a, e, f, g};
}
-// CHECK-LABEL: define fp128 @f_scalar_stack_4(i32 %a, i64 %b, i64 %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g)
+// CHECK-LABEL: define{{.*}} fp128 @f_scalar_stack_4(i32 %a, i64 %b, i64 %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g)
long double f_scalar_stack_4(int32_t a, int64_t b, int64_t c, long double d,
uint8_t e, int8_t f, uint8_t g) {
return d;
// Aggregates and >=XLen scalars passed on the stack should be lowered just as
// they would be if passed via registers.
-// CHECK-LABEL: define void @f_scalar_stack_5(double %a, i64 %b, double %c, i64 %d, i32 %e, i64 %f, float %g, double %h, fp128 %i)
+// CHECK-LABEL: define{{.*}} void @f_scalar_stack_5(double %a, i64 %b, double %c, i64 %d, i32 %e, i64 %f, float %g, double %h, fp128 %i)
void f_scalar_stack_5(double a, int64_t b, double c, int64_t d, int e,
int64_t f, float g, double h, long double i) {}
-// CHECK-LABEL: define void @f_agg_stack(double %a, i64 %b, double %c, i64 %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* %h)
+// CHECK-LABEL: define{{.*}} void @f_agg_stack(double %a, i64 %b, double %c, i64 %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* %h)
void f_agg_stack(double a, int64_t b, double c, int64_t d, struct tiny e,
struct small f, struct small_aligned g, struct large h) {}
int f_va_callee(int, ...);
-// CHECK-LABEL: define void @f_va_caller()
+// CHECK-LABEL: define{{.*}} void @f_va_caller()
// CHECK: call i32 (i32, ...) @f_va_callee(i32 1, i32 2, i64 3, double 4.000000e+00, double 5.000000e+00, i32 {{%.*}}, [2 x i32] {{%.*}}, i64 {{%.*}}, %struct.large* {{%.*}})
void f_va_caller() {
f_va_callee(1, 2, 3LL, 4.0f, 5.0, (struct tiny){6, 7, 8, 9},
(struct large){12, 13, 14, 15});
}
-// CHECK-LABEL: define i32 @f_va_1(i8* %fmt, ...) {{.*}} {
+// CHECK-LABEL: define{{.*}} i32 @f_va_1(i8* %fmt, ...) {{.*}} {
// CHECK: [[FMT_ADDR:%.*]] = alloca i8*, align 4
// CHECK: [[VA:%.*]] = alloca i8*, align 4
// CHECK: [[V:%.*]] = alloca i32, align 4
return v + x;
}
-// CHECK-LABEL: define i32 @f_va_4(i8* %fmt, ...) {{.*}} {
+// CHECK-LABEL: define{{.*}} i32 @f_va_4(i8* %fmt, ...) {{.*}} {
// CHECK: [[FMT_ADDR:%.*]] = alloca i8*, align 4
// CHECK-NEXT: [[VA:%.*]] = alloca i8*, align 4
// CHECK-NEXT: [[V:%.*]] = alloca i32, align 4
// Doubles are passed in FPRs, so argument 'i' will be passed zero-extended
// because it will be passed in a GPR.
-// CHECK: define void @f_fpr_tracking(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, i8 zeroext %i)
+// CHECK: define{{.*}} void @f_fpr_tracking(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, i8 zeroext %i)
void f_fpr_tracking(double a, double b, double c, double d, double e, double f,
double g, double h, uint8_t i) {}
struct double_s { double f; };
-// CHECK: define void @f_double_s_arg(double %0)
+// CHECK: define{{.*}} void @f_double_s_arg(double %0)
void f_double_s_arg(struct double_s a) {}
-// CHECK: define double @f_ret_double_s()
+// CHECK: define{{.*}} double @f_ret_double_s()
struct double_s f_ret_double_s() {
return (struct double_s){1.0};
}
struct zbf_double_s { int : 0; double f; };
struct zbf_double_zbf_s { int : 0; double f; int : 0; };
-// CHECK: define void @f_zbf_double_s_arg(double %0)
+// CHECK: define{{.*}} void @f_zbf_double_s_arg(double %0)
void f_zbf_double_s_arg(struct zbf_double_s a) {}
-// CHECK: define double @f_ret_zbf_double_s()
+// CHECK: define{{.*}} double @f_ret_zbf_double_s()
struct zbf_double_s f_ret_zbf_double_s() {
return (struct zbf_double_s){1.0};
}
-// CHECK: define void @f_zbf_double_zbf_s_arg(double %0)
+// CHECK: define{{.*}} void @f_zbf_double_zbf_s_arg(double %0)
void f_zbf_double_zbf_s_arg(struct zbf_double_zbf_s a) {}
-// CHECK: define double @f_ret_zbf_double_zbf_s()
+// CHECK: define{{.*}} double @f_ret_zbf_double_zbf_s()
struct zbf_double_zbf_s f_ret_zbf_double_zbf_s() {
return (struct zbf_double_zbf_s){1.0};
}
struct double_double_s { double f; double g; };
struct double_float_s { double f; float g; };
-// CHECK: define void @f_double_double_s_arg(double %0, double %1)
+// CHECK: define{{.*}} void @f_double_double_s_arg(double %0, double %1)
void f_double_double_s_arg(struct double_double_s a) {}
-// CHECK: define { double, double } @f_ret_double_double_s()
+// CHECK: define{{.*}} { double, double } @f_ret_double_double_s()
struct double_double_s f_ret_double_double_s() {
return (struct double_double_s){1.0, 2.0};
}
-// CHECK: define void @f_double_float_s_arg(double %0, float %1)
+// CHECK: define{{.*}} void @f_double_float_s_arg(double %0, float %1)
void f_double_float_s_arg(struct double_float_s a) {}
-// CHECK: define { double, float } @f_ret_double_float_s()
+// CHECK: define{{.*}} { double, float } @f_ret_double_float_s()
struct double_float_s f_ret_double_float_s() {
return (struct double_float_s){1.0, 2.0};
}
-// CHECK: define void @f_double_double_s_arg_insufficient_fprs(float %a, double %b, double %c, double %d, double %e, double %f, double %g, %struct.double_double_s* %h)
+// CHECK: define{{.*}} void @f_double_double_s_arg_insufficient_fprs(float %a, double %b, double %c, double %d, double %e, double %f, double %g, %struct.double_double_s* %h)
void f_double_double_s_arg_insufficient_fprs(float a, double b, double c, double d,
double e, double f, double g, struct double_double_s h) {}
struct double_int64bf_s { double f; int64_t i : 32; };
struct double_int8_zbf_s { double f; int8_t i; int : 0; };
-// CHECK: define void @f_double_int8_s_arg(double %0, i8 %1)
+// CHECK: define{{.*}} void @f_double_int8_s_arg(double %0, i8 %1)
void f_double_int8_s_arg(struct double_int8_s a) {}
-// CHECK: define { double, i8 } @f_ret_double_int8_s()
+// CHECK: define{{.*}} { double, i8 } @f_ret_double_int8_s()
struct double_int8_s f_ret_double_int8_s() {
return (struct double_int8_s){1.0, 2};
}
-// CHECK: define void @f_double_uint8_s_arg(double %0, i8 %1)
+// CHECK: define{{.*}} void @f_double_uint8_s_arg(double %0, i8 %1)
void f_double_uint8_s_arg(struct double_uint8_s a) {}
-// CHECK: define { double, i8 } @f_ret_double_uint8_s()
+// CHECK: define{{.*}} { double, i8 } @f_ret_double_uint8_s()
struct double_uint8_s f_ret_double_uint8_s() {
return (struct double_uint8_s){1.0, 2};
}
-// CHECK: define void @f_double_int32_s_arg(double %0, i32 %1)
+// CHECK: define{{.*}} void @f_double_int32_s_arg(double %0, i32 %1)
void f_double_int32_s_arg(struct double_int32_s a) {}
-// CHECK: define { double, i32 } @f_ret_double_int32_s()
+// CHECK: define{{.*}} { double, i32 } @f_ret_double_int32_s()
struct double_int32_s f_ret_double_int32_s() {
return (struct double_int32_s){1.0, 2};
}
-// CHECK: define void @f_double_int64_s_arg(%struct.double_int64_s* %a)
+// CHECK: define{{.*}} void @f_double_int64_s_arg(%struct.double_int64_s* %a)
void f_double_int64_s_arg(struct double_int64_s a) {}
-// CHECK: define void @f_ret_double_int64_s(%struct.double_int64_s* noalias sret(%struct.double_int64_s) align 8 %agg.result)
+// CHECK: define{{.*}} void @f_ret_double_int64_s(%struct.double_int64_s* noalias sret(%struct.double_int64_s) align 8 %agg.result)
struct double_int64_s f_ret_double_int64_s() {
return (struct double_int64_s){1.0, 2};
}
-// CHECK: define void @f_double_int64bf_s_arg(double %0, i32 %1)
+// CHECK: define{{.*}} void @f_double_int64bf_s_arg(double %0, i32 %1)
void f_double_int64bf_s_arg(struct double_int64bf_s a) {}
-// CHECK: define { double, i32 } @f_ret_double_int64bf_s()
+// CHECK: define{{.*}} { double, i32 } @f_ret_double_int64bf_s()
struct double_int64bf_s f_ret_double_int64bf_s() {
return (struct double_int64bf_s){1.0, 2};
}
// The zero-width bitfield means the struct can't be passed according to the
// floating point calling convention.
-// CHECK: define void @f_double_int8_zbf_s(double %0, i8 %1)
+// CHECK: define{{.*}} void @f_double_int8_zbf_s(double %0, i8 %1)
void f_double_int8_zbf_s(struct double_int8_zbf_s a) {}
-// CHECK: define { double, i8 } @f_ret_double_int8_zbf_s()
+// CHECK: define{{.*}} { double, i8 } @f_ret_double_int8_zbf_s()
struct double_int8_zbf_s f_ret_double_int8_zbf_s() {
return (struct double_int8_zbf_s){1.0, 2};
}
-// CHECK: define void @f_double_int8_s_arg_insufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, %struct.double_int8_s* %i)
+// CHECK: define{{.*}} void @f_double_int8_s_arg_insufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, %struct.double_int8_s* %i)
void f_double_int8_s_arg_insufficient_gprs(int a, int b, int c, int d, int e,
int f, int g, int h, struct double_int8_s i) {}
-// CHECK: define void @f_struct_double_int8_insufficient_fprs(float %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, %struct.double_int8_s* %i)
+// CHECK: define{{.*}} void @f_struct_double_int8_insufficient_fprs(float %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, %struct.double_int8_s* %i)
void f_struct_double_int8_insufficient_fprs(float a, double b, double c, double d,
double e, double f, double g, double h, struct double_int8_s i) {}
// Complex floating-point values or structs containing a single complex
// floating-point value should be passed as if it were an fp+fp struct.
-// CHECK: define void @f_doublecomplex(double %a.coerce0, double %a.coerce1)
+// CHECK: define{{.*}} void @f_doublecomplex(double %a.coerce0, double %a.coerce1)
void f_doublecomplex(double __complex__ a) {}
-// CHECK: define { double, double } @f_ret_doublecomplex()
+// CHECK: define{{.*}} { double, double } @f_ret_doublecomplex()
double __complex__ f_ret_doublecomplex() {
return 1.0;
}
struct doublecomplex_s { double __complex__ c; };
-// CHECK: define void @f_doublecomplex_s_arg(double %0, double %1)
+// CHECK: define{{.*}} void @f_doublecomplex_s_arg(double %0, double %1)
void f_doublecomplex_s_arg(struct doublecomplex_s a) {}
-// CHECK: define { double, double } @f_ret_doublecomplex_s()
+// CHECK: define{{.*}} { double, double } @f_ret_doublecomplex_s()
struct doublecomplex_s f_ret_doublecomplex_s() {
return (struct doublecomplex_s){1.0};
}
struct doublearr1_s { double a[1]; };
-// CHECK: define void @f_doublearr1_s_arg(double %0)
+// CHECK: define{{.*}} void @f_doublearr1_s_arg(double %0)
void f_doublearr1_s_arg(struct doublearr1_s a) {}
-// CHECK: define double @f_ret_doublearr1_s()
+// CHECK: define{{.*}} double @f_ret_doublearr1_s()
struct doublearr1_s f_ret_doublearr1_s() {
return (struct doublearr1_s){{1.0}};
}
struct doublearr2_s { double a[2]; };
-// CHECK: define void @f_doublearr2_s_arg(double %0, double %1)
+// CHECK: define{{.*}} void @f_doublearr2_s_arg(double %0, double %1)
void f_doublearr2_s_arg(struct doublearr2_s a) {}
-// CHECK: define { double, double } @f_ret_doublearr2_s()
+// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_s()
struct doublearr2_s f_ret_doublearr2_s() {
return (struct doublearr2_s){{1.0, 2.0}};
}
struct doublearr2_tricky1_s { struct { double f[1]; } g[2]; };
-// CHECK: define void @f_doublearr2_tricky1_s_arg(double %0, double %1)
+// CHECK: define{{.*}} void @f_doublearr2_tricky1_s_arg(double %0, double %1)
void f_doublearr2_tricky1_s_arg(struct doublearr2_tricky1_s a) {}
-// CHECK: define { double, double } @f_ret_doublearr2_tricky1_s()
+// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_tricky1_s()
struct doublearr2_tricky1_s f_ret_doublearr2_tricky1_s() {
return (struct doublearr2_tricky1_s){{{{1.0}}, {{2.0}}}};
}
struct doublearr2_tricky2_s { struct {}; struct { double f[1]; } g[2]; };
-// CHECK: define void @f_doublearr2_tricky2_s_arg(double %0, double %1)
+// CHECK: define{{.*}} void @f_doublearr2_tricky2_s_arg(double %0, double %1)
void f_doublearr2_tricky2_s_arg(struct doublearr2_tricky2_s a) {}
-// CHECK: define { double, double } @f_ret_doublearr2_tricky2_s()
+// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_tricky2_s()
struct doublearr2_tricky2_s f_ret_doublearr2_tricky2_s() {
return (struct doublearr2_tricky2_s){{}, {{{1.0}}, {{2.0}}}};
}
struct doublearr2_tricky3_s { union {}; struct { double f[1]; } g[2]; };
-// CHECK: define void @f_doublearr2_tricky3_s_arg(double %0, double %1)
+// CHECK: define{{.*}} void @f_doublearr2_tricky3_s_arg(double %0, double %1)
void f_doublearr2_tricky3_s_arg(struct doublearr2_tricky3_s a) {}
-// CHECK: define { double, double } @f_ret_doublearr2_tricky3_s()
+// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_tricky3_s()
struct doublearr2_tricky3_s f_ret_doublearr2_tricky3_s() {
return (struct doublearr2_tricky3_s){{}, {{{1.0}}, {{2.0}}}};
}
struct doublearr2_tricky4_s { union {}; struct { struct {}; double f[1]; } g[2]; };
-// CHECK: define void @f_doublearr2_tricky4_s_arg(double %0, double %1)
+// CHECK: define{{.*}} void @f_doublearr2_tricky4_s_arg(double %0, double %1)
void f_doublearr2_tricky4_s_arg(struct doublearr2_tricky4_s a) {}
-// CHECK: define { double, double } @f_ret_doublearr2_tricky4_s()
+// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_tricky4_s()
struct doublearr2_tricky4_s f_ret_doublearr2_tricky4_s() {
return (struct doublearr2_tricky4_s){{}, {{{}, {1.0}}, {{}, {2.0}}}};
}
struct int_double_int_s { int a; double b; int c; };
-// CHECK: define void @f_int_double_int_s_arg(%struct.int_double_int_s* %a)
+// CHECK: define{{.*}} void @f_int_double_int_s_arg(%struct.int_double_int_s* %a)
void f_int_double_int_s_arg(struct int_double_int_s a) {}
-// CHECK: define void @f_ret_int_double_int_s(%struct.int_double_int_s* noalias sret(%struct.int_double_int_s) align 8 %agg.result)
+// CHECK: define{{.*}} void @f_ret_int_double_int_s(%struct.int_double_int_s* noalias sret(%struct.int_double_int_s) align 8 %agg.result)
struct int_double_int_s f_ret_int_double_int_s() {
return (struct int_double_int_s){1, 2.0, 3};
}
struct int64_double_s { int64_t a; double b; };
-// CHECK: define void @f_int64_double_s_arg(%struct.int64_double_s* %a)
+// CHECK: define{{.*}} void @f_int64_double_s_arg(%struct.int64_double_s* %a)
void f_int64_double_s_arg(struct int64_double_s a) {}
-// CHECK: define void @f_ret_int64_double_s(%struct.int64_double_s* noalias sret(%struct.int64_double_s) align 8 %agg.result)
+// CHECK: define{{.*}} void @f_ret_int64_double_s(%struct.int64_double_s* noalias sret(%struct.int64_double_s) align 8 %agg.result)
struct int64_double_s f_ret_int64_double_s() {
return (struct int64_double_s){1, 2.0};
}
struct char_char_double_s { char a; char b; double c; };
-// CHECK-LABEL: define void @f_char_char_double_s_arg(%struct.char_char_double_s* %a)
+// CHECK-LABEL: define{{.*}} void @f_char_char_double_s_arg(%struct.char_char_double_s* %a)
void f_char_char_double_s_arg(struct char_char_double_s a) {}
-// CHECK: define void @f_ret_char_char_double_s(%struct.char_char_double_s* noalias sret(%struct.char_char_double_s) align 8 %agg.result)
+// CHECK: define{{.*}} void @f_ret_char_char_double_s(%struct.char_char_double_s* noalias sret(%struct.char_char_double_s) align 8 %agg.result)
struct char_char_double_s f_ret_char_char_double_s() {
return (struct char_char_double_s){1, 2, 3.0};
}
union double_u { double a; };
-// CHECK: define void @f_double_u_arg(i64 %a.coerce)
+// CHECK: define{{.*}} void @f_double_u_arg(i64 %a.coerce)
void f_double_u_arg(union double_u a) {}
-// CHECK: define i64 @f_ret_double_u()
+// CHECK: define{{.*}} i64 @f_ret_double_u()
union double_u f_ret_double_u() {
return (union double_u){1.0};
}
// returned in registers). This includes complex doubles, which are treated as
// double+double structs by the ABI.
-// CHECK: define { double, i32 } @f_ret_double_int32_s_double_int32_s_just_sufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, double %0, i32 %1)
+// CHECK: define{{.*}} { double, i32 } @f_ret_double_int32_s_double_int32_s_just_sufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, double %0, i32 %1)
struct double_int32_s f_ret_double_int32_s_double_int32_s_just_sufficient_gprs(
int a, int b, int c, int d, int e, int f, int g, struct double_int32_s h) {
return (struct double_int32_s){1.0, 2};
}
-// CHECK: define { double, double } @f_ret_double_double_s_double_int32_s_just_sufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, double %0, i32 %1)
+// CHECK: define{{.*}} { double, double } @f_ret_double_double_s_double_int32_s_just_sufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, double %0, i32 %1)
struct double_double_s f_ret_double_double_s_double_int32_s_just_sufficient_gprs(
int a, int b, int c, int d, int e, int f, int g, struct double_int32_s h) {
return (struct double_double_s){1.0, 2.0};
}
-// CHECK: define { double, double } @f_ret_doublecomplex_double_int32_s_just_sufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, double %0, i32 %1)
+// CHECK: define{{.*}} { double, double } @f_ret_doublecomplex_double_int32_s_just_sufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, double %0, i32 %1)
double __complex__ f_ret_doublecomplex_double_int32_s_just_sufficient_gprs(
int a, int b, int c, int d, int e, int f, int g, struct double_int32_s h) {
return 1.0;
// Doubles are still passed in GPRs, so the 'e' argument will be anyext as
// GPRs are exhausted.
-// CHECK: define void @f_fpr_tracking(double %a, double %b, double %c, double %d, i8 %e)
+// CHECK: define{{.*}} void @f_fpr_tracking(double %a, double %b, double %c, double %d, i8 %e)
void f_fpr_tracking(double a, double b, double c, double d, int8_t e) {}
// Lowering for doubles is unnmodified, as 64 > FLEN.
struct double_s { double d; };
-// CHECK: define void @f_double_s_arg(i64 %a.coerce)
+// CHECK: define{{.*}} void @f_double_s_arg(i64 %a.coerce)
void f_double_s_arg(struct double_s a) {}
-// CHECK: define i64 @f_ret_double_s()
+// CHECK: define{{.*}} i64 @f_ret_double_s()
struct double_s f_ret_double_s() {
return (struct double_s){1.0};
}
struct double_double_s { double d; double e; };
-// CHECK: define void @f_double_double_s_arg(%struct.double_double_s* %a)
+// CHECK: define{{.*}} void @f_double_double_s_arg(%struct.double_double_s* %a)
void f_double_double_s_arg(struct double_double_s a) {}
-// CHECK: define void @f_ret_double_double_s(%struct.double_double_s* noalias sret(%struct.double_double_s) align 8 %agg.result)
+// CHECK: define{{.*}} void @f_ret_double_double_s(%struct.double_double_s* noalias sret(%struct.double_double_s) align 8 %agg.result)
struct double_double_s f_ret_double_double_s() {
return (struct double_double_s){1.0, 2.0};
}
struct int_double_s { int a; double b; };
-// CHECK: define void @f_int_double_s_arg(%struct.int_double_s* %a)
+// CHECK: define{{.*}} void @f_int_double_s_arg(%struct.int_double_s* %a)
void f_int_double_s_arg(struct int_double_s a) {}
-// CHECK: define void @f_ret_int_double_s(%struct.int_double_s* noalias sret(%struct.int_double_s) align 8 %agg.result)
+// CHECK: define{{.*}} void @f_ret_int_double_s(%struct.int_double_s* noalias sret(%struct.int_double_s) align 8 %agg.result)
struct int_double_s f_ret_int_double_s() {
return (struct int_double_s){1, 2.0};
}
// Floats are passed in FPRs, so argument 'i' will be passed zero-extended
// because it will be passed in a GPR.
-// CHECK: define void @f_fpr_tracking(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, i8 zeroext %i)
+// CHECK: define{{.*}} void @f_fpr_tracking(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, i8 zeroext %i)
void f_fpr_tracking(float a, float b, float c, float d, float e, float f,
float g, float h, uint8_t i) {}
struct float_s { float f; };
-// CHECK: define void @f_float_s_arg(float %0)
+// CHECK: define{{.*}} void @f_float_s_arg(float %0)
void f_float_s_arg(struct float_s a) {}
-// CHECK: define float @f_ret_float_s()
+// CHECK: define{{.*}} float @f_ret_float_s()
struct float_s f_ret_float_s() {
return (struct float_s){1.0};
}
struct zbf_float_s { int : 0; float f; };
struct zbf_float_zbf_s { int : 0; float f; int : 0; };
-// CHECK: define void @f_zbf_float_s_arg(float %0)
+// CHECK: define{{.*}} void @f_zbf_float_s_arg(float %0)
void f_zbf_float_s_arg(struct zbf_float_s a) {}
-// CHECK: define float @f_ret_zbf_float_s()
+// CHECK: define{{.*}} float @f_ret_zbf_float_s()
struct zbf_float_s f_ret_zbf_float_s() {
return (struct zbf_float_s){1.0};
}
-// CHECK: define void @f_zbf_float_zbf_s_arg(float %0)
+// CHECK: define{{.*}} void @f_zbf_float_zbf_s_arg(float %0)
void f_zbf_float_zbf_s_arg(struct zbf_float_zbf_s a) {}
-// CHECK: define float @f_ret_zbf_float_zbf_s()
+// CHECK: define{{.*}} float @f_ret_zbf_float_zbf_s()
struct zbf_float_zbf_s f_ret_zbf_float_zbf_s() {
return (struct zbf_float_zbf_s){1.0};
}
struct float_float_s { float f; float g; };
-// CHECK: define void @f_float_float_s_arg(float %0, float %1)
+// CHECK: define{{.*}} void @f_float_float_s_arg(float %0, float %1)
void f_float_float_s_arg(struct float_float_s a) {}
-// CHECK: define { float, float } @f_ret_float_float_s()
+// CHECK: define{{.*}} { float, float } @f_ret_float_float_s()
struct float_float_s f_ret_float_float_s() {
return (struct float_float_s){1.0, 2.0};
}
-// CHECK: define void @f_float_float_s_arg_insufficient_fprs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, [2 x i32] %h.coerce)
+// CHECK: define{{.*}} void @f_float_float_s_arg_insufficient_fprs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, [2 x i32] %h.coerce)
void f_float_float_s_arg_insufficient_fprs(float a, float b, float c, float d,
float e, float f, float g, struct float_float_s h) {}
struct float_int64bf_s { float f; int64_t i : 32; };
struct float_int8_zbf_s { float f; int8_t i; int : 0; };
-// CHECK: define void @f_float_int8_s_arg(float %0, i8 %1)
+// CHECK: define{{.*}} void @f_float_int8_s_arg(float %0, i8 %1)
void f_float_int8_s_arg(struct float_int8_s a) {}
-// CHECK: define { float, i8 } @f_ret_float_int8_s()
+// CHECK: define{{.*}} { float, i8 } @f_ret_float_int8_s()
struct float_int8_s f_ret_float_int8_s() {
return (struct float_int8_s){1.0, 2};
}
-// CHECK: define void @f_float_uint8_s_arg(float %0, i8 %1)
+// CHECK: define{{.*}} void @f_float_uint8_s_arg(float %0, i8 %1)
void f_float_uint8_s_arg(struct float_uint8_s a) {}
-// CHECK: define { float, i8 } @f_ret_float_uint8_s()
+// CHECK: define{{.*}} { float, i8 } @f_ret_float_uint8_s()
struct float_uint8_s f_ret_float_uint8_s() {
return (struct float_uint8_s){1.0, 2};
}
-// CHECK: define void @f_float_int32_s_arg(float %0, i32 %1)
+// CHECK: define{{.*}} void @f_float_int32_s_arg(float %0, i32 %1)
void f_float_int32_s_arg(struct float_int32_s a) {}
-// CHECK: define { float, i32 } @f_ret_float_int32_s()
+// CHECK: define{{.*}} { float, i32 } @f_ret_float_int32_s()
struct float_int32_s f_ret_float_int32_s() {
return (struct float_int32_s){1.0, 2};
}
-// CHECK: define void @f_float_int64_s_arg(%struct.float_int64_s* %a)
+// CHECK: define{{.*}} void @f_float_int64_s_arg(%struct.float_int64_s* %a)
void f_float_int64_s_arg(struct float_int64_s a) {}
-// CHECK: define void @f_ret_float_int64_s(%struct.float_int64_s* noalias sret(%struct.float_int64_s) align 8 %agg.result)
+// CHECK: define{{.*}} void @f_ret_float_int64_s(%struct.float_int64_s* noalias sret(%struct.float_int64_s) align 8 %agg.result)
struct float_int64_s f_ret_float_int64_s() {
return (struct float_int64_s){1.0, 2};
}
-// CHECK: define void @f_float_int64bf_s_arg(float %0, i32 %1)
+// CHECK: define{{.*}} void @f_float_int64bf_s_arg(float %0, i32 %1)
void f_float_int64bf_s_arg(struct float_int64bf_s a) {}
-// CHECK: define { float, i32 } @f_ret_float_int64bf_s()
+// CHECK: define{{.*}} { float, i32 } @f_ret_float_int64bf_s()
struct float_int64bf_s f_ret_float_int64bf_s() {
return (struct float_int64bf_s){1.0, 2};
}
// The zero-width bitfield means the struct can't be passed according to the
// floating point calling convention.
-// CHECK: define void @f_float_int8_zbf_s(float %0, i8 %1)
+// CHECK: define{{.*}} void @f_float_int8_zbf_s(float %0, i8 %1)
void f_float_int8_zbf_s(struct float_int8_zbf_s a) {}
-// CHECK: define { float, i8 } @f_ret_float_int8_zbf_s()
+// CHECK: define{{.*}} { float, i8 } @f_ret_float_int8_zbf_s()
struct float_int8_zbf_s f_ret_float_int8_zbf_s() {
return (struct float_int8_zbf_s){1.0, 2};
}
-// CHECK: define void @f_float_int8_s_arg_insufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, [2 x i32] %i.coerce)
+// CHECK: define{{.*}} void @f_float_int8_s_arg_insufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, [2 x i32] %i.coerce)
void f_float_int8_s_arg_insufficient_gprs(int a, int b, int c, int d, int e,
int f, int g, int h, struct float_int8_s i) {}
-// CHECK: define void @f_struct_float_int8_insufficient_fprs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, [2 x i32] %i.coerce)
+// CHECK: define{{.*}} void @f_struct_float_int8_insufficient_fprs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, [2 x i32] %i.coerce)
void f_struct_float_int8_insufficient_fprs(float a, float b, float c, float d,
float e, float f, float g, float h, struct float_int8_s i) {}
// Complex floating-point values or structs containing a single complex
// floating-point value should be passed as if it were an fp+fp struct.
-// CHECK: define void @f_floatcomplex(float %a.coerce0, float %a.coerce1)
+// CHECK: define{{.*}} void @f_floatcomplex(float %a.coerce0, float %a.coerce1)
void f_floatcomplex(float __complex__ a) {}
-// CHECK: define { float, float } @f_ret_floatcomplex()
+// CHECK: define{{.*}} { float, float } @f_ret_floatcomplex()
float __complex__ f_ret_floatcomplex() {
return 1.0;
}
struct floatcomplex_s { float __complex__ c; };
-// CHECK: define void @f_floatcomplex_s_arg(float %0, float %1)
+// CHECK: define{{.*}} void @f_floatcomplex_s_arg(float %0, float %1)
void f_floatcomplex_s_arg(struct floatcomplex_s a) {}
-// CHECK: define { float, float } @f_ret_floatcomplex_s()
+// CHECK: define{{.*}} { float, float } @f_ret_floatcomplex_s()
struct floatcomplex_s f_ret_floatcomplex_s() {
return (struct floatcomplex_s){1.0};
}
struct floatarr1_s { float a[1]; };
-// CHECK: define void @f_floatarr1_s_arg(float %0)
+// CHECK: define{{.*}} void @f_floatarr1_s_arg(float %0)
void f_floatarr1_s_arg(struct floatarr1_s a) {}
-// CHECK: define float @f_ret_floatarr1_s()
+// CHECK: define{{.*}} float @f_ret_floatarr1_s()
struct floatarr1_s f_ret_floatarr1_s() {
return (struct floatarr1_s){{1.0}};
}
struct floatarr2_s { float a[2]; };
-// CHECK: define void @f_floatarr2_s_arg(float %0, float %1)
+// CHECK: define{{.*}} void @f_floatarr2_s_arg(float %0, float %1)
void f_floatarr2_s_arg(struct floatarr2_s a) {}
-// CHECK: define { float, float } @f_ret_floatarr2_s()
+// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_s()
struct floatarr2_s f_ret_floatarr2_s() {
return (struct floatarr2_s){{1.0, 2.0}};
}
struct floatarr2_tricky1_s { struct { float f[1]; } g[2]; };
-// CHECK: define void @f_floatarr2_tricky1_s_arg(float %0, float %1)
+// CHECK: define{{.*}} void @f_floatarr2_tricky1_s_arg(float %0, float %1)
void f_floatarr2_tricky1_s_arg(struct floatarr2_tricky1_s a) {}
-// CHECK: define { float, float } @f_ret_floatarr2_tricky1_s()
+// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_tricky1_s()
struct floatarr2_tricky1_s f_ret_floatarr2_tricky1_s() {
return (struct floatarr2_tricky1_s){{{{1.0}}, {{2.0}}}};
}
struct floatarr2_tricky2_s { struct {}; struct { float f[1]; } g[2]; };
-// CHECK: define void @f_floatarr2_tricky2_s_arg(float %0, float %1)
+// CHECK: define{{.*}} void @f_floatarr2_tricky2_s_arg(float %0, float %1)
void f_floatarr2_tricky2_s_arg(struct floatarr2_tricky2_s a) {}
-// CHECK: define { float, float } @f_ret_floatarr2_tricky2_s()
+// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_tricky2_s()
struct floatarr2_tricky2_s f_ret_floatarr2_tricky2_s() {
return (struct floatarr2_tricky2_s){{}, {{{1.0}}, {{2.0}}}};
}
struct floatarr2_tricky3_s { union {}; struct { float f[1]; } g[2]; };
-// CHECK: define void @f_floatarr2_tricky3_s_arg(float %0, float %1)
+// CHECK: define{{.*}} void @f_floatarr2_tricky3_s_arg(float %0, float %1)
void f_floatarr2_tricky3_s_arg(struct floatarr2_tricky3_s a) {}
-// CHECK: define { float, float } @f_ret_floatarr2_tricky3_s()
+// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_tricky3_s()
struct floatarr2_tricky3_s f_ret_floatarr2_tricky3_s() {
return (struct floatarr2_tricky3_s){{}, {{{1.0}}, {{2.0}}}};
}
struct floatarr2_tricky4_s { union {}; struct { struct {}; float f[1]; } g[2]; };
-// CHECK: define void @f_floatarr2_tricky4_s_arg(float %0, float %1)
+// CHECK: define{{.*}} void @f_floatarr2_tricky4_s_arg(float %0, float %1)
void f_floatarr2_tricky4_s_arg(struct floatarr2_tricky4_s a) {}
-// CHECK: define { float, float } @f_ret_floatarr2_tricky4_s()
+// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_tricky4_s()
struct floatarr2_tricky4_s f_ret_floatarr2_tricky4_s() {
return (struct floatarr2_tricky4_s){{}, {{{}, {1.0}}, {{}, {2.0}}}};
}
struct int_float_int_s { int a; float b; int c; };
-// CHECK: define void @f_int_float_int_s_arg(%struct.int_float_int_s* %a)
+// CHECK: define{{.*}} void @f_int_float_int_s_arg(%struct.int_float_int_s* %a)
void f_int_float_int_s_arg(struct int_float_int_s a) {}
-// CHECK: define void @f_ret_int_float_int_s(%struct.int_float_int_s* noalias sret(%struct.int_float_int_s) align 4 %agg.result)
+// CHECK: define{{.*}} void @f_ret_int_float_int_s(%struct.int_float_int_s* noalias sret(%struct.int_float_int_s) align 4 %agg.result)
struct int_float_int_s f_ret_int_float_int_s() {
return (struct int_float_int_s){1, 2.0, 3};
}
struct int64_float_s { int64_t a; float b; };
-// CHECK: define void @f_int64_float_s_arg(%struct.int64_float_s* %a)
+// CHECK: define{{.*}} void @f_int64_float_s_arg(%struct.int64_float_s* %a)
void f_int64_float_s_arg(struct int64_float_s a) {}
-// CHECK: define void @f_ret_int64_float_s(%struct.int64_float_s* noalias sret(%struct.int64_float_s) align 8 %agg.result)
+// CHECK: define{{.*}} void @f_ret_int64_float_s(%struct.int64_float_s* noalias sret(%struct.int64_float_s) align 8 %agg.result)
struct int64_float_s f_ret_int64_float_s() {
return (struct int64_float_s){1, 2.0};
}
struct char_char_float_s { char a; char b; float c; };
-// CHECK-LABEL: define void @f_char_char_float_s_arg([2 x i32] %a.coerce)
+// CHECK-LABEL: define{{.*}} void @f_char_char_float_s_arg([2 x i32] %a.coerce)
void f_char_char_float_s_arg(struct char_char_float_s a) {}
-// CHECK: define [2 x i32] @f_ret_char_char_float_s()
+// CHECK: define{{.*}} [2 x i32] @f_ret_char_char_float_s()
struct char_char_float_s f_ret_char_char_float_s() {
return (struct char_char_float_s){1, 2, 3.0};
}
union float_u { float a; };
-// CHECK: define void @f_float_u_arg(i32 %a.coerce)
+// CHECK: define{{.*}} void @f_float_u_arg(i32 %a.coerce)
void f_float_u_arg(union float_u a) {}
-// CHECK: define i32 @f_ret_float_u()
+// CHECK: define{{.*}} i32 @f_ret_float_u()
union float_u f_ret_float_u() {
return (union float_u){1.0};
}
// Scalars passed on the stack should not have signext/zeroext attributes
// (they are anyext).
-// CHECK-LABEL: define signext i32 @f_scalar_stack_1(i32 signext %a, i128 %b, float %c, fp128 %d, <32 x i8>* %0, i8 zeroext %f, i8 %g, i8 %h)
+// CHECK-LABEL: define{{.*}} signext i32 @f_scalar_stack_1(i32 signext %a, i128 %b, float %c, fp128 %d, <32 x i8>* %0, i8 zeroext %f, i8 %g, i8 %h)
int f_scalar_stack_1(int32_t a, __int128_t b, float c, long double d, v32i8 e,
uint8_t f, int8_t g, uint8_t h) {
return g + h;
// the presence of large return values that consume a register due to the need
// to pass a pointer.
-// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 8 %agg.result, double %a, i128 %b, fp128 %c, <32 x i8>* %0, i8 zeroext %e, i8 %f, i8 %g)
+// CHECK-LABEL: define{{.*}} void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 8 %agg.result, double %a, i128 %b, fp128 %c, <32 x i8>* %0, i8 zeroext %e, i8 %f, i8 %g)
struct large f_scalar_stack_2(double a, __int128_t b, long double c, v32i8 d,
uint8_t e, int8_t f, uint8_t g) {
return (struct large){a, e, f, g};
// Complex floating-point values or structs containing a single complex
// floating-point value should be passed in a GPR.
-// CHECK: define void @f_floatcomplex(i64 %a.coerce)
+// CHECK: define{{.*}} void @f_floatcomplex(i64 %a.coerce)
void f_floatcomplex(float __complex__ a) {}
-// CHECK: define i64 @f_ret_floatcomplex()
+// CHECK: define{{.*}} i64 @f_ret_floatcomplex()
float __complex__ f_ret_floatcomplex() {
return 1.0;
}
struct floatcomplex_s { float __complex__ c; };
-// CHECK: define void @f_floatcomplex_s_arg(i64 %a.coerce)
+// CHECK: define{{.*}} void @f_floatcomplex_s_arg(i64 %a.coerce)
void f_floatcomplex_s_arg(struct floatcomplex_s a) {}
-// CHECK: define i64 @f_ret_floatcomplex_s()
+// CHECK: define{{.*}} i64 @f_ret_floatcomplex_s()
struct floatcomplex_s f_ret_floatcomplex_s() {
return (struct floatcomplex_s){1.0};
}
// Scalars passed on the stack should not have signext/zeroext attributes
// (they are anyext).
-// CHECK-LABEL: define signext i32 @f_scalar_stack_1(i32 signext %a, i128 %b, double %c, fp128 %d, <32 x i8>* %0, i8 zeroext %f, i8 %g, i8 %h)
+// CHECK-LABEL: define{{.*}} signext i32 @f_scalar_stack_1(i32 signext %a, i128 %b, double %c, fp128 %d, <32 x i8>* %0, i8 zeroext %f, i8 %g, i8 %h)
int f_scalar_stack_1(int32_t a, __int128_t b, double c, long double d, v32i8 e,
uint8_t f, int8_t g, uint8_t h) {
return g + h;
// the presence of large return values that consume a register due to the need
// to pass a pointer.
-// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 8 %agg.result, double %a, i128 %b, fp128 %c, <32 x i8>* %0, i8 zeroext %e, i8 %f, i8 %g)
+// CHECK-LABEL: define{{.*}} void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 8 %agg.result, double %a, i128 %b, fp128 %c, <32 x i8>* %0, i8 zeroext %e, i8 %f, i8 %g)
struct large f_scalar_stack_2(double a, __int128_t b, long double c, v32i8 d,
uint8_t e, int8_t f, uint8_t g) {
return (struct large){a, e, f, g};
#include <stddef.h>
#include <stdint.h>
-// CHECK-LABEL: define void @f_void()
+// CHECK-LABEL: define{{.*}} void @f_void()
void f_void(void) {}
// Scalar arguments and return values smaller than the word size are extended
// according to the sign of their type, up to 32 bits
-// CHECK-LABEL: define zeroext i1 @f_scalar_0(i1 zeroext %x)
+// CHECK-LABEL: define{{.*}} zeroext i1 @f_scalar_0(i1 zeroext %x)
_Bool f_scalar_0(_Bool x) { return x; }
-// CHECK-LABEL: define signext i8 @f_scalar_1(i8 signext %x)
+// CHECK-LABEL: define{{.*}} signext i8 @f_scalar_1(i8 signext %x)
int8_t f_scalar_1(int8_t x) { return x; }
-// CHECK-LABEL: define zeroext i8 @f_scalar_2(i8 zeroext %x)
+// CHECK-LABEL: define{{.*}} zeroext i8 @f_scalar_2(i8 zeroext %x)
uint8_t f_scalar_2(uint8_t x) { return x; }
-// CHECK-LABEL: define signext i32 @f_scalar_3(i32 signext %x)
+// CHECK-LABEL: define{{.*}} signext i32 @f_scalar_3(i32 signext %x)
uint32_t f_scalar_3(int32_t x) { return x; }
-// CHECK-LABEL: define i64 @f_scalar_4(i64 %x)
+// CHECK-LABEL: define{{.*}} i64 @f_scalar_4(i64 %x)
int64_t f_scalar_4(int64_t x) { return x; }
-// CHECK-LABEL: define float @f_fp_scalar_1(float %x)
+// CHECK-LABEL: define{{.*}} float @f_fp_scalar_1(float %x)
float f_fp_scalar_1(float x) { return x; }
-// CHECK-LABEL: define double @f_fp_scalar_2(double %x)
+// CHECK-LABEL: define{{.*}} double @f_fp_scalar_2(double %x)
double f_fp_scalar_2(double x) { return x; }
-// CHECK-LABEL: define fp128 @f_fp_scalar_3(fp128 %x)
+// CHECK-LABEL: define{{.*}} fp128 @f_fp_scalar_3(fp128 %x)
long double f_fp_scalar_3(long double x) { return x; }
// Empty structs or unions are ignored.
struct empty_s {};
-// CHECK-LABEL: define void @f_agg_empty_struct()
+// CHECK-LABEL: define{{.*}} void @f_agg_empty_struct()
struct empty_s f_agg_empty_struct(struct empty_s x) {
return x;
}
union empty_u {};
-// CHECK-LABEL: define void @f_agg_empty_union()
+// CHECK-LABEL: define{{.*}} void @f_agg_empty_union()
union empty_u f_agg_empty_union(union empty_u x) {
return x;
}
uint16_t a, b, c, d;
};
-// CHECK-LABEL: define void @f_agg_tiny(i64 %x.coerce)
+// CHECK-LABEL: define{{.*}} void @f_agg_tiny(i64 %x.coerce)
void f_agg_tiny(struct tiny x) {
x.a += x.b;
x.c += x.d;
}
-// CHECK-LABEL: define i64 @f_agg_tiny_ret()
+// CHECK-LABEL: define{{.*}} i64 @f_agg_tiny_ret()
struct tiny f_agg_tiny_ret() {
return (struct tiny){1, 2, 3, 4};
}
typedef uint16_t v4i16 __attribute__((vector_size(8)));
typedef int64_t v1i64 __attribute__((vector_size(8)));
-// CHECK-LABEL: define void @f_vec_tiny_v4i16(i64 %x.coerce)
+// CHECK-LABEL: define{{.*}} void @f_vec_tiny_v4i16(i64 %x.coerce)
void f_vec_tiny_v4i16(v4i16 x) {
x[0] = x[1];
x[2] = x[3];
}
-// CHECK-LABEL: define i64 @f_vec_tiny_v4i16_ret()
+// CHECK-LABEL: define{{.*}} i64 @f_vec_tiny_v4i16_ret()
v4i16 f_vec_tiny_v4i16_ret() {
return (v4i16){1, 2, 3, 4};
}
-// CHECK-LABEL: define void @f_vec_tiny_v1i64(i64 %x.coerce)
+// CHECK-LABEL: define{{.*}} void @f_vec_tiny_v1i64(i64 %x.coerce)
void f_vec_tiny_v1i64(v1i64 x) {
x[0] = 114;
}
-// CHECK-LABEL: define i64 @f_vec_tiny_v1i64_ret()
+// CHECK-LABEL: define{{.*}} i64 @f_vec_tiny_v1i64_ret()
v1i64 f_vec_tiny_v1i64_ret() {
return (v1i64){1};
}
int64_t a, *b;
};
-// CHECK-LABEL: define void @f_agg_small([2 x i64] %x.coerce)
+// CHECK-LABEL: define{{.*}} void @f_agg_small([2 x i64] %x.coerce)
void f_agg_small(struct small x) {
x.a += *x.b;
x.b = &x.a;
}
-// CHECK-LABEL: define [2 x i64] @f_agg_small_ret()
+// CHECK-LABEL: define{{.*}} [2 x i64] @f_agg_small_ret()
struct small f_agg_small_ret() {
return (struct small){1, 0};
}
typedef uint16_t v8i16 __attribute__((vector_size(16)));
typedef __int128_t v1i128 __attribute__((vector_size(16)));
-// CHECK-LABEL: define void @f_vec_small_v8i16(i128 %x.coerce)
+// CHECK-LABEL: define{{.*}} void @f_vec_small_v8i16(i128 %x.coerce)
void f_vec_small_v8i16(v8i16 x) {
x[0] = x[7];
}
-// CHECK-LABEL: define i128 @f_vec_small_v8i16_ret()
+// CHECK-LABEL: define{{.*}} i128 @f_vec_small_v8i16_ret()
v8i16 f_vec_small_v8i16_ret() {
return (v8i16){1, 2, 3, 4, 5, 6, 7, 8};
}
-// CHECK-LABEL: define void @f_vec_small_v1i128(i128 %x.coerce)
+// CHECK-LABEL: define{{.*}} void @f_vec_small_v1i128(i128 %x.coerce)
void f_vec_small_v1i128(v1i128 x) {
x[0] = 114;
}
-// CHECK-LABEL: define i128 @f_vec_small_v1i128_ret()
+// CHECK-LABEL: define{{.*}} i128 @f_vec_small_v1i128_ret()
v1i128 f_vec_small_v1i128_ret() {
return (v1i128){1};
}
__int128_t a;
};
-// CHECK-LABEL: define void @f_agg_small_aligned(i128 %x.coerce)
+// CHECK-LABEL: define{{.*}} void @f_agg_small_aligned(i128 %x.coerce)
void f_agg_small_aligned(struct small_aligned x) {
x.a += x.a;
}
-// CHECK-LABEL: define i128 @f_agg_small_aligned_ret(i128 %x.coerce)
+// CHECK-LABEL: define{{.*}} i128 @f_agg_small_aligned_ret(i128 %x.coerce)
struct small_aligned f_agg_small_aligned_ret(struct small_aligned x) {
return (struct small_aligned){10};
}
int64_t a, b, c, d;
};
-// CHECK-LABEL: define void @f_agg_large(%struct.large* %x)
+// CHECK-LABEL: define{{.*}} void @f_agg_large(%struct.large* %x)
void f_agg_large(struct large x) {
x.a = x.b + x.c + x.d;
}
// The address where the struct should be written to will be the first
// argument
-// CHECK-LABEL: define void @f_agg_large_ret(%struct.large* noalias sret(%struct.large) align 8 %agg.result, i32 signext %i, i8 signext %j)
+// CHECK-LABEL: define{{.*}} void @f_agg_large_ret(%struct.large* noalias sret(%struct.large) align 8 %agg.result, i32 signext %i, i8 signext %j)
struct large f_agg_large_ret(int32_t i, int8_t j) {
return (struct large){1, 2, 3, 4};
}
typedef unsigned char v32i8 __attribute__((vector_size(32)));
-// CHECK-LABEL: define void @f_vec_large_v32i8(<32 x i8>* %0)
+// CHECK-LABEL: define{{.*}} void @f_vec_large_v32i8(<32 x i8>* %0)
void f_vec_large_v32i8(v32i8 x) {
x[0] = x[7];
}
-// CHECK-LABEL: define void @f_vec_large_v32i8_ret(<32 x i8>* noalias sret(<32 x i8>) align 32 %agg.result)
+// CHECK-LABEL: define{{.*}} void @f_vec_large_v32i8_ret(<32 x i8>* noalias sret(<32 x i8>) align 32 %agg.result)
v32i8 f_vec_large_v32i8_ret() {
return (v32i8){1, 2, 3, 4, 5, 6, 7, 8};
}
// Scalars passed on the stack should not have signext/zeroext attributes
// (they are anyext).
-// CHECK-LABEL: define signext i32 @f_scalar_stack_1(i64 %a.coerce, [2 x i64] %b.coerce, i128 %c.coerce, %struct.large* %d, i8 zeroext %e, i8 signext %f, i8 %g, i8 %h)
+// CHECK-LABEL: define{{.*}} signext i32 @f_scalar_stack_1(i64 %a.coerce, [2 x i64] %b.coerce, i128 %c.coerce, %struct.large* %d, i8 zeroext %e, i8 signext %f, i8 %g, i8 %h)
int f_scalar_stack_1(struct tiny a, struct small b, struct small_aligned c,
struct large d, uint8_t e, int8_t f, uint8_t g, int8_t h) {
return g + h;
}
-// CHECK-LABEL: define signext i32 @f_scalar_stack_2(i32 signext %a, i128 %b, i64 %c, fp128 %d, <32 x i8>* %0, i8 zeroext %f, i8 %g, i8 %h)
+// CHECK-LABEL: define{{.*}} signext i32 @f_scalar_stack_2(i32 signext %a, i128 %b, i64 %c, fp128 %d, <32 x i8>* %0, i8 zeroext %f, i8 %g, i8 %h)
int f_scalar_stack_2(int32_t a, __int128_t b, int64_t c, long double d, v32i8 e,
uint8_t f, int8_t g, uint8_t h) {
return g + h;
// the presence of large return values that consume a register due to the need
// to pass a pointer.
-// CHECK-LABEL: define void @f_scalar_stack_3(%struct.large* noalias sret(%struct.large) align 8 %agg.result, i32 signext %a, i128 %b, fp128 %c, <32 x i8>* %0, i8 zeroext %e, i8 %f, i8 %g)
+// CHECK-LABEL: define{{.*}} void @f_scalar_stack_3(%struct.large* noalias sret(%struct.large) align 8 %agg.result, i32 signext %a, i128 %b, fp128 %c, <32 x i8>* %0, i8 zeroext %e, i8 %f, i8 %g)
struct large f_scalar_stack_3(uint32_t a, __int128_t b, long double c, v32i8 d,
uint8_t e, int8_t f, uint8_t g) {
return (struct large){a, e, f, g};
int f_va_callee(int, ...);
-// CHECK-LABEL: define void @f_va_caller()
+// CHECK-LABEL: define{{.*}} void @f_va_caller()
void f_va_caller() {
// CHECK: call signext i32 (i32, ...) @f_va_callee(i32 signext 1, i32 signext 2, i64 3, double 4.000000e+00, double 5.000000e+00, i64 {{%.*}}, [2 x i64] {{%.*}}, i128 {{%.*}}, %struct.large* {{%.*}})
f_va_callee(1, 2, 3LL, 4.0f, 5.0, (struct tiny){6, 7, 8, 9},
f_va_callee(1, 2, 3, 4, 5, 6, (struct small){7, NULL}, 8, 9);
}
-// CHECK-LABEL: define signext i32 @f_va_1(i8* %fmt, ...) {{.*}} {
+// CHECK-LABEL: define{{.*}} signext i32 @f_va_1(i8* %fmt, ...) {{.*}} {
// CHECK: [[FMT_ADDR:%.*]] = alloca i8*, align 8
// CHECK: [[VA:%.*]] = alloca i8*, align 8
// CHECK: [[V:%.*]] = alloca i32, align 4
// Doubles are passed in FPRs, so argument 'i' will be passed zero-extended
// because it will be passed in a GPR.
-// CHECK: define void @f_fpr_tracking(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, i8 zeroext %i)
+// CHECK: define{{.*}} void @f_fpr_tracking(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, i8 zeroext %i)
void f_fpr_tracking(double a, double b, double c, double d, double e, double f,
double g, double h, uint8_t i) {}
struct double_s { double f; };
-// CHECK: define void @f_double_s_arg(double %0)
+// CHECK: define{{.*}} void @f_double_s_arg(double %0)
void f_double_s_arg(struct double_s a) {}
-// CHECK: define double @f_ret_double_s()
+// CHECK: define{{.*}} double @f_ret_double_s()
struct double_s f_ret_double_s() {
return (struct double_s){1.0};
}
struct zbf_double_s { int : 0; double f; };
struct zbf_double_zbf_s { int : 0; double f; int : 0; };
-// CHECK: define void @f_zbf_double_s_arg(double %0)
+// CHECK: define{{.*}} void @f_zbf_double_s_arg(double %0)
void f_zbf_double_s_arg(struct zbf_double_s a) {}
-// CHECK: define double @f_ret_zbf_double_s()
+// CHECK: define{{.*}} double @f_ret_zbf_double_s()
struct zbf_double_s f_ret_zbf_double_s() {
return (struct zbf_double_s){1.0};
}
-// CHECK: define void @f_zbf_double_zbf_s_arg(double %0)
+// CHECK: define{{.*}} void @f_zbf_double_zbf_s_arg(double %0)
void f_zbf_double_zbf_s_arg(struct zbf_double_zbf_s a) {}
-// CHECK: define double @f_ret_zbf_double_zbf_s()
+// CHECK: define{{.*}} double @f_ret_zbf_double_zbf_s()
struct zbf_double_zbf_s f_ret_zbf_double_zbf_s() {
return (struct zbf_double_zbf_s){1.0};
}
struct double_double_s { double f; double g; };
struct double_float_s { double f; float g; };
-// CHECK: define void @f_double_double_s_arg(double %0, double %1)
+// CHECK: define{{.*}} void @f_double_double_s_arg(double %0, double %1)
void f_double_double_s_arg(struct double_double_s a) {}
-// CHECK: define { double, double } @f_ret_double_double_s()
+// CHECK: define{{.*}} { double, double } @f_ret_double_double_s()
struct double_double_s f_ret_double_double_s() {
return (struct double_double_s){1.0, 2.0};
}
-// CHECK: define void @f_double_float_s_arg(double %0, float %1)
+// CHECK: define{{.*}} void @f_double_float_s_arg(double %0, float %1)
void f_double_float_s_arg(struct double_float_s a) {}
-// CHECK: define { double, float } @f_ret_double_float_s()
+// CHECK: define{{.*}} { double, float } @f_ret_double_float_s()
struct double_float_s f_ret_double_float_s() {
return (struct double_float_s){1.0, 2.0};
}
-// CHECK: define void @f_double_double_s_arg_insufficient_fprs(float %a, double %b, double %c, double %d, double %e, double %f, double %g, [2 x i64] %h.coerce)
+// CHECK: define{{.*}} void @f_double_double_s_arg_insufficient_fprs(float %a, double %b, double %c, double %d, double %e, double %f, double %g, [2 x i64] %h.coerce)
void f_double_double_s_arg_insufficient_fprs(float a, double b, double c, double d,
double e, double f, double g, struct double_double_s h) {}
struct double_int128bf_s { double f; __int128_t i : 64; };
struct double_int8_zbf_s { double f; int8_t i; int : 0; };
-// CHECK: define void @f_double_int8_s_arg(double %0, i8 %1)
+// CHECK: define{{.*}} void @f_double_int8_s_arg(double %0, i8 %1)
void f_double_int8_s_arg(struct double_int8_s a) {}
-// CHECK: define { double, i8 } @f_ret_double_int8_s()
+// CHECK: define{{.*}} { double, i8 } @f_ret_double_int8_s()
struct double_int8_s f_ret_double_int8_s() {
return (struct double_int8_s){1.0, 2};
}
-// CHECK: define void @f_double_uint8_s_arg(double %0, i8 %1)
+// CHECK: define{{.*}} void @f_double_uint8_s_arg(double %0, i8 %1)
void f_double_uint8_s_arg(struct double_uint8_s a) {}
-// CHECK: define { double, i8 } @f_ret_double_uint8_s()
+// CHECK: define{{.*}} { double, i8 } @f_ret_double_uint8_s()
struct double_uint8_s f_ret_double_uint8_s() {
return (struct double_uint8_s){1.0, 2};
}
-// CHECK: define void @f_double_int32_s_arg(double %0, i32 %1)
+// CHECK: define{{.*}} void @f_double_int32_s_arg(double %0, i32 %1)
void f_double_int32_s_arg(struct double_int32_s a) {}
-// CHECK: define { double, i32 } @f_ret_double_int32_s()
+// CHECK: define{{.*}} { double, i32 } @f_ret_double_int32_s()
struct double_int32_s f_ret_double_int32_s() {
return (struct double_int32_s){1.0, 2};
}
-// CHECK: define void @f_double_int64_s_arg(double %0, i64 %1)
+// CHECK: define{{.*}} void @f_double_int64_s_arg(double %0, i64 %1)
void f_double_int64_s_arg(struct double_int64_s a) {}
-// CHECK: define { double, i64 } @f_ret_double_int64_s()
+// CHECK: define{{.*}} { double, i64 } @f_ret_double_int64_s()
struct double_int64_s f_ret_double_int64_s() {
return (struct double_int64_s){1.0, 2};
}
-// CHECK: define void @f_double_int128bf_s_arg(double %0, i64 %1)
+// CHECK: define{{.*}} void @f_double_int128bf_s_arg(double %0, i64 %1)
void f_double_int128bf_s_arg(struct double_int128bf_s a) {}
-// CHECK: define { double, i64 } @f_ret_double_int128bf_s()
+// CHECK: define{{.*}} { double, i64 } @f_ret_double_int128bf_s()
struct double_int128bf_s f_ret_double_int128bf_s() {
return (struct double_int128bf_s){1.0, 2};
}
// The zero-width bitfield means the struct can't be passed according to the
// floating point calling convention.
-// CHECK: define void @f_double_int8_zbf_s(double %0, i8 %1)
+// CHECK: define{{.*}} void @f_double_int8_zbf_s(double %0, i8 %1)
void f_double_int8_zbf_s(struct double_int8_zbf_s a) {}
-// CHECK: define { double, i8 } @f_ret_double_int8_zbf_s()
+// CHECK: define{{.*}} { double, i8 } @f_ret_double_int8_zbf_s()
struct double_int8_zbf_s f_ret_double_int8_zbf_s() {
return (struct double_int8_zbf_s){1.0, 2};
}
-// CHECK: define void @f_double_int8_s_arg_insufficient_gprs(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e, i32 signext %f, i32 signext %g, i32 signext %h, [2 x i64] %i.coerce)
+// CHECK: define{{.*}} void @f_double_int8_s_arg_insufficient_gprs(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e, i32 signext %f, i32 signext %g, i32 signext %h, [2 x i64] %i.coerce)
void f_double_int8_s_arg_insufficient_gprs(int a, int b, int c, int d, int e,
int f, int g, int h, struct double_int8_s i) {}
-// CHECK: define void @f_struct_double_int8_insufficient_fprs(float %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, [2 x i64] %i.coerce)
+// CHECK: define{{.*}} void @f_struct_double_int8_insufficient_fprs(float %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, [2 x i64] %i.coerce)
void f_struct_double_int8_insufficient_fprs(float a, double b, double c, double d,
double e, double f, double g, double h, struct double_int8_s i) {}
// Complex floating-point values or structs containing a single complex
// floating-point value should be passed as if it were an fp+fp struct.
-// CHECK: define void @f_doublecomplex(double %a.coerce0, double %a.coerce1)
+// CHECK: define{{.*}} void @f_doublecomplex(double %a.coerce0, double %a.coerce1)
void f_doublecomplex(double __complex__ a) {}
-// CHECK: define { double, double } @f_ret_doublecomplex()
+// CHECK: define{{.*}} { double, double } @f_ret_doublecomplex()
double __complex__ f_ret_doublecomplex() {
return 1.0;
}
struct doublecomplex_s { double __complex__ c; };
-// CHECK: define void @f_doublecomplex_s_arg(double %0, double %1)
+// CHECK: define{{.*}} void @f_doublecomplex_s_arg(double %0, double %1)
void f_doublecomplex_s_arg(struct doublecomplex_s a) {}
-// CHECK: define { double, double } @f_ret_doublecomplex_s()
+// CHECK: define{{.*}} { double, double } @f_ret_doublecomplex_s()
struct doublecomplex_s f_ret_doublecomplex_s() {
return (struct doublecomplex_s){1.0};
}
struct doublearr1_s { double a[1]; };
-// CHECK: define void @f_doublearr1_s_arg(double %0)
+// CHECK: define{{.*}} void @f_doublearr1_s_arg(double %0)
void f_doublearr1_s_arg(struct doublearr1_s a) {}
-// CHECK: define double @f_ret_doublearr1_s()
+// CHECK: define{{.*}} double @f_ret_doublearr1_s()
struct doublearr1_s f_ret_doublearr1_s() {
return (struct doublearr1_s){{1.0}};
}
struct doublearr2_s { double a[2]; };
-// CHECK: define void @f_doublearr2_s_arg(double %0, double %1)
+// CHECK: define{{.*}} void @f_doublearr2_s_arg(double %0, double %1)
void f_doublearr2_s_arg(struct doublearr2_s a) {}
-// CHECK: define { double, double } @f_ret_doublearr2_s()
+// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_s()
struct doublearr2_s f_ret_doublearr2_s() {
return (struct doublearr2_s){{1.0, 2.0}};
}
struct doublearr2_tricky1_s { struct { double f[1]; } g[2]; };
-// CHECK: define void @f_doublearr2_tricky1_s_arg(double %0, double %1)
+// CHECK: define{{.*}} void @f_doublearr2_tricky1_s_arg(double %0, double %1)
void f_doublearr2_tricky1_s_arg(struct doublearr2_tricky1_s a) {}
-// CHECK: define { double, double } @f_ret_doublearr2_tricky1_s()
+// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_tricky1_s()
struct doublearr2_tricky1_s f_ret_doublearr2_tricky1_s() {
return (struct doublearr2_tricky1_s){{{{1.0}}, {{2.0}}}};
}
struct doublearr2_tricky2_s { struct {}; struct { double f[1]; } g[2]; };
-// CHECK: define void @f_doublearr2_tricky2_s_arg(double %0, double %1)
+// CHECK: define{{.*}} void @f_doublearr2_tricky2_s_arg(double %0, double %1)
void f_doublearr2_tricky2_s_arg(struct doublearr2_tricky2_s a) {}
-// CHECK: define { double, double } @f_ret_doublearr2_tricky2_s()
+// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_tricky2_s()
struct doublearr2_tricky2_s f_ret_doublearr2_tricky2_s() {
return (struct doublearr2_tricky2_s){{}, {{{1.0}}, {{2.0}}}};
}
struct doublearr2_tricky3_s { union {}; struct { double f[1]; } g[2]; };
-// CHECK: define void @f_doublearr2_tricky3_s_arg(double %0, double %1)
+// CHECK: define{{.*}} void @f_doublearr2_tricky3_s_arg(double %0, double %1)
void f_doublearr2_tricky3_s_arg(struct doublearr2_tricky3_s a) {}
-// CHECK: define { double, double } @f_ret_doublearr2_tricky3_s()
+// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_tricky3_s()
struct doublearr2_tricky3_s f_ret_doublearr2_tricky3_s() {
return (struct doublearr2_tricky3_s){{}, {{{1.0}}, {{2.0}}}};
}
struct doublearr2_tricky4_s { union {}; struct { struct {}; double f[1]; } g[2]; };
-// CHECK: define void @f_doublearr2_tricky4_s_arg(double %0, double %1)
+// CHECK: define{{.*}} void @f_doublearr2_tricky4_s_arg(double %0, double %1)
void f_doublearr2_tricky4_s_arg(struct doublearr2_tricky4_s a) {}
-// CHECK: define { double, double } @f_ret_doublearr2_tricky4_s()
+// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_tricky4_s()
struct doublearr2_tricky4_s f_ret_doublearr2_tricky4_s() {
return (struct doublearr2_tricky4_s){{}, {{{}, {1.0}}, {{}, {2.0}}}};
}
struct int_double_int_s { int a; double b; int c; };
-// CHECK: define void @f_int_double_int_s_arg(%struct.int_double_int_s* %a)
+// CHECK: define{{.*}} void @f_int_double_int_s_arg(%struct.int_double_int_s* %a)
void f_int_double_int_s_arg(struct int_double_int_s a) {}
-// CHECK: define void @f_ret_int_double_int_s(%struct.int_double_int_s* noalias sret(%struct.int_double_int_s) align 8 %agg.result)
+// CHECK: define{{.*}} void @f_ret_int_double_int_s(%struct.int_double_int_s* noalias sret(%struct.int_double_int_s) align 8 %agg.result)
struct int_double_int_s f_ret_int_double_int_s() {
return (struct int_double_int_s){1, 2.0, 3};
}
struct char_char_double_s { char a; char b; double c; };
-// CHECK-LABEL: define void @f_char_char_double_s_arg([2 x i64] %a.coerce)
+// CHECK-LABEL: define{{.*}} void @f_char_char_double_s_arg([2 x i64] %a.coerce)
void f_char_char_double_s_arg(struct char_char_double_s a) {}
-// CHECK: define [2 x i64] @f_ret_char_char_double_s()
+// CHECK: define{{.*}} [2 x i64] @f_ret_char_char_double_s()
struct char_char_double_s f_ret_char_char_double_s() {
return (struct char_char_double_s){1, 2, 3.0};
}
union double_u { double a; };
-// CHECK: define void @f_double_u_arg(i64 %a.coerce)
+// CHECK: define{{.*}} void @f_double_u_arg(i64 %a.coerce)
void f_double_u_arg(union double_u a) {}
-// CHECK: define i64 @f_ret_double_u()
+// CHECK: define{{.*}} i64 @f_ret_double_u()
union double_u f_ret_double_u() {
return (union double_u){1.0};
}
// Floats are passed in FPRs, so argument 'i' will be passed zero-extended
// because it will be passed in a GPR.
-// CHECK: define void @f_fpr_tracking(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, i8 zeroext %i)
+// CHECK: define{{.*}} void @f_fpr_tracking(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, i8 zeroext %i)
void f_fpr_tracking(float a, float b, float c, float d, float e, float f,
float g, float h, uint8_t i) {}
struct float_s { float f; };
-// CHECK: define void @f_float_s_arg(float %0)
+// CHECK: define{{.*}} void @f_float_s_arg(float %0)
void f_float_s_arg(struct float_s a) {}
-// CHECK: define float @f_ret_float_s()
+// CHECK: define{{.*}} float @f_ret_float_s()
struct float_s f_ret_float_s() {
return (struct float_s){1.0};
}
struct zbf_float_s { int : 0; float f; };
struct zbf_float_zbf_s { int : 0; float f; int : 0; };
-// CHECK: define void @f_zbf_float_s_arg(float %0)
+// CHECK: define{{.*}} void @f_zbf_float_s_arg(float %0)
void f_zbf_float_s_arg(struct zbf_float_s a) {}
-// CHECK: define float @f_ret_zbf_float_s()
+// CHECK: define{{.*}} float @f_ret_zbf_float_s()
struct zbf_float_s f_ret_zbf_float_s() {
return (struct zbf_float_s){1.0};
}
-// CHECK: define void @f_zbf_float_zbf_s_arg(float %0)
+// CHECK: define{{.*}} void @f_zbf_float_zbf_s_arg(float %0)
void f_zbf_float_zbf_s_arg(struct zbf_float_zbf_s a) {}
-// CHECK: define float @f_ret_zbf_float_zbf_s()
+// CHECK: define{{.*}} float @f_ret_zbf_float_zbf_s()
struct zbf_float_zbf_s f_ret_zbf_float_zbf_s() {
return (struct zbf_float_zbf_s){1.0};
}
struct float_float_s { float f; float g; };
-// CHECK: define void @f_float_float_s_arg(float %0, float %1)
+// CHECK: define{{.*}} void @f_float_float_s_arg(float %0, float %1)
void f_float_float_s_arg(struct float_float_s a) {}
-// CHECK: define { float, float } @f_ret_float_float_s()
+// CHECK: define{{.*}} { float, float } @f_ret_float_float_s()
struct float_float_s f_ret_float_float_s() {
return (struct float_float_s){1.0, 2.0};
}
-// CHECK: define void @f_float_float_s_arg_insufficient_fprs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, i64 %h.coerce)
+// CHECK: define{{.*}} void @f_float_float_s_arg_insufficient_fprs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, i64 %h.coerce)
void f_float_float_s_arg_insufficient_fprs(float a, float b, float c, float d,
float e, float f, float g, struct float_float_s h) {}
struct float_int128bf_s { float f; __int128_t i : 64; };
struct float_int8_zbf_s { float f; int8_t i; int : 0; };
-// CHECK: define void @f_float_int8_s_arg(float %0, i8 %1)
+// CHECK: define{{.*}} void @f_float_int8_s_arg(float %0, i8 %1)
void f_float_int8_s_arg(struct float_int8_s a) {}
-// CHECK: define { float, i8 } @f_ret_float_int8_s()
+// CHECK: define{{.*}} { float, i8 } @f_ret_float_int8_s()
struct float_int8_s f_ret_float_int8_s() {
return (struct float_int8_s){1.0, 2};
}
-// CHECK: define void @f_float_uint8_s_arg(float %0, i8 %1)
+// CHECK: define{{.*}} void @f_float_uint8_s_arg(float %0, i8 %1)
void f_float_uint8_s_arg(struct float_uint8_s a) {}
-// CHECK: define { float, i8 } @f_ret_float_uint8_s()
+// CHECK: define{{.*}} { float, i8 } @f_ret_float_uint8_s()
struct float_uint8_s f_ret_float_uint8_s() {
return (struct float_uint8_s){1.0, 2};
}
-// CHECK: define void @f_float_int32_s_arg(float %0, i32 %1)
+// CHECK: define{{.*}} void @f_float_int32_s_arg(float %0, i32 %1)
void f_float_int32_s_arg(struct float_int32_s a) {}
-// CHECK: define { float, i32 } @f_ret_float_int32_s()
+// CHECK: define{{.*}} { float, i32 } @f_ret_float_int32_s()
struct float_int32_s f_ret_float_int32_s() {
return (struct float_int32_s){1.0, 2};
}
-// CHECK: define void @f_float_int64_s_arg(float %0, i64 %1)
+// CHECK: define{{.*}} void @f_float_int64_s_arg(float %0, i64 %1)
void f_float_int64_s_arg(struct float_int64_s a) {}
-// CHECK: define { float, i64 } @f_ret_float_int64_s()
+// CHECK: define{{.*}} { float, i64 } @f_ret_float_int64_s()
struct float_int64_s f_ret_float_int64_s() {
return (struct float_int64_s){1.0, 2};
}
-// CHECK: define void @f_float_int128bf_s_arg(float %0, i64 %1)
+// CHECK: define{{.*}} void @f_float_int128bf_s_arg(float %0, i64 %1)
void f_float_int128bf_s_arg(struct float_int128bf_s a) {}
-// CHECK: define <{ float, i64 }> @f_ret_float_int128bf_s()
+// CHECK: define{{.*}} <{ float, i64 }> @f_ret_float_int128bf_s()
struct float_int128bf_s f_ret_float_int128bf_s() {
return (struct float_int128bf_s){1.0, 2};
}
// The zero-width bitfield means the struct can't be passed according to the
// floating point calling convention.
-// CHECK: define void @f_float_int8_zbf_s(float %0, i8 %1)
+// CHECK: define{{.*}} void @f_float_int8_zbf_s(float %0, i8 %1)
void f_float_int8_zbf_s(struct float_int8_zbf_s a) {}
-// CHECK: define { float, i8 } @f_ret_float_int8_zbf_s()
+// CHECK: define{{.*}} { float, i8 } @f_ret_float_int8_zbf_s()
struct float_int8_zbf_s f_ret_float_int8_zbf_s() {
return (struct float_int8_zbf_s){1.0, 2};
}
-// CHECK: define void @f_float_int8_s_arg_insufficient_gprs(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e, i32 signext %f, i32 signext %g, i32 signext %h, i64 %i.coerce)
+// CHECK: define{{.*}} void @f_float_int8_s_arg_insufficient_gprs(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e, i32 signext %f, i32 signext %g, i32 signext %h, i64 %i.coerce)
void f_float_int8_s_arg_insufficient_gprs(int a, int b, int c, int d, int e,
int f, int g, int h, struct float_int8_s i) {}
-// CHECK: define void @f_struct_float_int8_insufficient_fprs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, i64 %i.coerce)
+// CHECK: define{{.*}} void @f_struct_float_int8_insufficient_fprs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, i64 %i.coerce)
void f_struct_float_int8_insufficient_fprs(float a, float b, float c, float d,
float e, float f, float g, float h, struct float_int8_s i) {}
// Complex floating-point values or structs containing a single complex
// floating-point value should be passed as if it were an fp+fp struct.
-// CHECK: define void @f_floatcomplex(float %a.coerce0, float %a.coerce1)
+// CHECK: define{{.*}} void @f_floatcomplex(float %a.coerce0, float %a.coerce1)
void f_floatcomplex(float __complex__ a) {}
-// CHECK: define { float, float } @f_ret_floatcomplex()
+// CHECK: define{{.*}} { float, float } @f_ret_floatcomplex()
float __complex__ f_ret_floatcomplex() {
return 1.0;
}
struct floatcomplex_s { float __complex__ c; };
-// CHECK: define void @f_floatcomplex_s_arg(float %0, float %1)
+// CHECK: define{{.*}} void @f_floatcomplex_s_arg(float %0, float %1)
void f_floatcomplex_s_arg(struct floatcomplex_s a) {}
-// CHECK: define { float, float } @f_ret_floatcomplex_s()
+// CHECK: define{{.*}} { float, float } @f_ret_floatcomplex_s()
struct floatcomplex_s f_ret_floatcomplex_s() {
return (struct floatcomplex_s){1.0};
}
// Complex floating-point values or structs containing a single complex
// floating-point value should be passed in GPRs if no two FPRs is available.
-// CHECK: define void @f_floatcomplex_insufficient_fprs1(float %a.coerce0, float %a.coerce1, float %b.coerce0, float %b.coerce1, float %c.coerce0, float %c.coerce1, float %d.coerce0, float %d.coerce1, i64 %e.coerce)
+// CHECK: define{{.*}} void @f_floatcomplex_insufficient_fprs1(float %a.coerce0, float %a.coerce1, float %b.coerce0, float %b.coerce1, float %c.coerce0, float %c.coerce1, float %d.coerce0, float %d.coerce1, i64 %e.coerce)
void f_floatcomplex_insufficient_fprs1(float __complex__ a, float __complex__ b,
float __complex__ c, float __complex__ d,
float __complex__ e) {}
-// CHECK: define void @f_floatcomplex_s_arg_insufficient_fprs1(float %0, float %1, float %2, float %3, float %4, float %5, float %6, float %7, i64 %e.coerce)
+// CHECK: define{{.*}} void @f_floatcomplex_s_arg_insufficient_fprs1(float %0, float %1, float %2, float %3, float %4, float %5, float %6, float %7, i64 %e.coerce)
void f_floatcomplex_s_arg_insufficient_fprs1(struct floatcomplex_s a,
struct floatcomplex_s b,
struct floatcomplex_s c,
struct floatcomplex_s d,
struct floatcomplex_s e) {}
-// CHECK: define void @f_floatcomplex_insufficient_fprs2(float %a, float %b.coerce0, float %b.coerce1, float %c.coerce0, float %c.coerce1, float %d.coerce0, float %d.coerce1, i64 %e.coerce)
+// CHECK: define{{.*}} void @f_floatcomplex_insufficient_fprs2(float %a, float %b.coerce0, float %b.coerce1, float %c.coerce0, float %c.coerce1, float %d.coerce0, float %d.coerce1, i64 %e.coerce)
void f_floatcomplex_insufficient_fprs2(float a,
float __complex__ b, float __complex__ c,
float __complex__ d, float __complex__ e) {}
-// CHECK: define void @f_floatcomplex_s_arg_insufficient_fprs2(float %a, float %0, float %1, float %2, float %3, float %4, float %5, i64 %e.coerce)
+// CHECK: define{{.*}} void @f_floatcomplex_s_arg_insufficient_fprs2(float %a, float %0, float %1, float %2, float %3, float %4, float %5, i64 %e.coerce)
void f_floatcomplex_s_arg_insufficient_fprs2(float a,
struct floatcomplex_s b,
struct floatcomplex_s c,
struct floatarr1_s { float a[1]; };
-// CHECK: define void @f_floatarr1_s_arg(float %0)
+// CHECK: define{{.*}} void @f_floatarr1_s_arg(float %0)
void f_floatarr1_s_arg(struct floatarr1_s a) {}
-// CHECK: define float @f_ret_floatarr1_s()
+// CHECK: define{{.*}} float @f_ret_floatarr1_s()
struct floatarr1_s f_ret_floatarr1_s() {
return (struct floatarr1_s){{1.0}};
}
struct floatarr2_s { float a[2]; };
-// CHECK: define void @f_floatarr2_s_arg(float %0, float %1)
+// CHECK: define{{.*}} void @f_floatarr2_s_arg(float %0, float %1)
void f_floatarr2_s_arg(struct floatarr2_s a) {}
-// CHECK: define { float, float } @f_ret_floatarr2_s()
+// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_s()
struct floatarr2_s f_ret_floatarr2_s() {
return (struct floatarr2_s){{1.0, 2.0}};
}
struct floatarr2_tricky1_s { struct { float f[1]; } g[2]; };
-// CHECK: define void @f_floatarr2_tricky1_s_arg(float %0, float %1)
+// CHECK: define{{.*}} void @f_floatarr2_tricky1_s_arg(float %0, float %1)
void f_floatarr2_tricky1_s_arg(struct floatarr2_tricky1_s a) {}
-// CHECK: define { float, float } @f_ret_floatarr2_tricky1_s()
+// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_tricky1_s()
struct floatarr2_tricky1_s f_ret_floatarr2_tricky1_s() {
return (struct floatarr2_tricky1_s){{{{1.0}}, {{2.0}}}};
}
struct floatarr2_tricky2_s { struct {}; struct { float f[1]; } g[2]; };
-// CHECK: define void @f_floatarr2_tricky2_s_arg(float %0, float %1)
+// CHECK: define{{.*}} void @f_floatarr2_tricky2_s_arg(float %0, float %1)
void f_floatarr2_tricky2_s_arg(struct floatarr2_tricky2_s a) {}
-// CHECK: define { float, float } @f_ret_floatarr2_tricky2_s()
+// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_tricky2_s()
struct floatarr2_tricky2_s f_ret_floatarr2_tricky2_s() {
return (struct floatarr2_tricky2_s){{}, {{{1.0}}, {{2.0}}}};
}
struct floatarr2_tricky3_s { union {}; struct { float f[1]; } g[2]; };
-// CHECK: define void @f_floatarr2_tricky3_s_arg(float %0, float %1)
+// CHECK: define{{.*}} void @f_floatarr2_tricky3_s_arg(float %0, float %1)
void f_floatarr2_tricky3_s_arg(struct floatarr2_tricky3_s a) {}
-// CHECK: define { float, float } @f_ret_floatarr2_tricky3_s()
+// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_tricky3_s()
struct floatarr2_tricky3_s f_ret_floatarr2_tricky3_s() {
return (struct floatarr2_tricky3_s){{}, {{{1.0}}, {{2.0}}}};
}
struct floatarr2_tricky4_s { union {}; struct { struct {}; float f[1]; } g[2]; };
-// CHECK: define void @f_floatarr2_tricky4_s_arg(float %0, float %1)
+// CHECK: define{{.*}} void @f_floatarr2_tricky4_s_arg(float %0, float %1)
void f_floatarr2_tricky4_s_arg(struct floatarr2_tricky4_s a) {}
-// CHECK: define { float, float } @f_ret_floatarr2_tricky4_s()
+// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_tricky4_s()
struct floatarr2_tricky4_s f_ret_floatarr2_tricky4_s() {
return (struct floatarr2_tricky4_s){{}, {{{}, {1.0}}, {{}, {2.0}}}};
}
struct int_float_int_s { int a; float b; int c; };
-// CHECK: define void @f_int_float_int_s_arg([2 x i64] %a.coerce)
+// CHECK: define{{.*}} void @f_int_float_int_s_arg([2 x i64] %a.coerce)
void f_int_float_int_s_arg(struct int_float_int_s a) {}
-// CHECK: define [2 x i64] @f_ret_int_float_int_s()
+// CHECK: define{{.*}} [2 x i64] @f_ret_int_float_int_s()
struct int_float_int_s f_ret_int_float_int_s() {
return (struct int_float_int_s){1, 2.0, 3};
}
struct char_char_float_s { char a; char b; float c; };
-// CHECK-LABEL: define void @f_char_char_float_s_arg(i64 %a.coerce)
+// CHECK-LABEL: define{{.*}} void @f_char_char_float_s_arg(i64 %a.coerce)
void f_char_char_float_s_arg(struct char_char_float_s a) {}
-// CHECK: define i64 @f_ret_char_char_float_s()
+// CHECK: define{{.*}} i64 @f_ret_char_char_float_s()
struct char_char_float_s f_ret_char_char_float_s() {
return (struct char_char_float_s){1, 2, 3.0};
}
union float_u { float a; };
-// CHECK: define void @f_float_u_arg(i64 %a.coerce)
+// CHECK: define{{.*}} void @f_float_u_arg(i64 %a.coerce)
void f_float_u_arg(union float_u a) {}
-// CHECK: define i64 @f_ret_float_u()
+// CHECK: define{{.*}} i64 @f_ret_float_u()
union float_u f_ret_float_u() {
return (union float_u){1.0};
}
};
char c;
-// CHECK-DAG: @c = global i8 0, align 2
+// CHECK-DAG: @c ={{.*}} global i8 0, align 2
struct test s;
-// CHECK-DAG: @s = global %struct.test zeroinitializer, align 2
+// CHECK-DAG: @s ={{.*}} global %struct.test zeroinitializer, align 2
extern char ec;
// CHECK-DAG: @ec = external global i8, align 2
// RUN: %clang_cc1 -mbackchain -triple s390x-linux -emit-llvm -o - %s | FileCheck %s
-// CHECK: define void @foo() [[NUW:#[0-9]+]]
+// CHECK: define{{.*}} void @foo() [[NUW:#[0-9]+]]
void foo(void) {
}
typedef __attribute__((vector_size(32))) char v32i8;
unsigned int align = __alignof__ (v16i8);
-// CHECK: @align = global i32 16
-// CHECK-VECTOR: @align = global i32 8
+// CHECK: @align ={{.*}} global i32 16
+// CHECK-VECTOR: @align ={{.*}} global i32 8
v1i8 pass_v1i8(v1i8 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v1i8(<1 x i8>* noalias sret(<1 x i8>) align 1 %{{.*}}, <1 x i8>* %0)
-// CHECK-VECTOR-LABEL: define <1 x i8> @pass_v1i8(<1 x i8> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v1i8(<1 x i8>* noalias sret(<1 x i8>) align 1 %{{.*}}, <1 x i8>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <1 x i8> @pass_v1i8(<1 x i8> %{{.*}})
v2i8 pass_v2i8(v2i8 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v2i8(<2 x i8>* noalias sret(<2 x i8>) align 2 %{{.*}}, <2 x i8>* %0)
-// CHECK-VECTOR-LABEL: define <2 x i8> @pass_v2i8(<2 x i8> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v2i8(<2 x i8>* noalias sret(<2 x i8>) align 2 %{{.*}}, <2 x i8>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <2 x i8> @pass_v2i8(<2 x i8> %{{.*}})
v4i8 pass_v4i8(v4i8 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v4i8(<4 x i8>* noalias sret(<4 x i8>) align 4 %{{.*}}, <4 x i8>* %0)
-// CHECK-VECTOR-LABEL: define <4 x i8> @pass_v4i8(<4 x i8> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v4i8(<4 x i8>* noalias sret(<4 x i8>) align 4 %{{.*}}, <4 x i8>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <4 x i8> @pass_v4i8(<4 x i8> %{{.*}})
v8i8 pass_v8i8(v8i8 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v8i8(<8 x i8>* noalias sret(<8 x i8>) align 8 %{{.*}}, <8 x i8>* %0)
-// CHECK-VECTOR-LABEL: define <8 x i8> @pass_v8i8(<8 x i8> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v8i8(<8 x i8>* noalias sret(<8 x i8>) align 8 %{{.*}}, <8 x i8>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <8 x i8> @pass_v8i8(<8 x i8> %{{.*}})
v16i8 pass_v16i8(v16i8 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v16i8(<16 x i8>* noalias sret(<16 x i8>) align 16 %{{.*}}, <16 x i8>* %0)
-// CHECK-VECTOR-LABEL: define <16 x i8> @pass_v16i8(<16 x i8> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v16i8(<16 x i8>* noalias sret(<16 x i8>) align 16 %{{.*}}, <16 x i8>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <16 x i8> @pass_v16i8(<16 x i8> %{{.*}})
v32i8 pass_v32i8(v32i8 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v32i8(<32 x i8>* noalias sret(<32 x i8>) align 32 %{{.*}}, <32 x i8>* %0)
-// CHECK-VECTOR-LABEL: define void @pass_v32i8(<32 x i8>* noalias sret(<32 x i8>) align 8 %{{.*}}, <32 x i8>* %0)
+// CHECK-LABEL: define{{.*}} void @pass_v32i8(<32 x i8>* noalias sret(<32 x i8>) align 32 %{{.*}}, <32 x i8>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} void @pass_v32i8(<32 x i8>* noalias sret(<32 x i8>) align 8 %{{.*}}, <32 x i8>* %0)
v1i16 pass_v1i16(v1i16 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v1i16(<1 x i16>* noalias sret(<1 x i16>) align 2 %{{.*}}, <1 x i16>* %0)
-// CHECK-VECTOR-LABEL: define <1 x i16> @pass_v1i16(<1 x i16> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v1i16(<1 x i16>* noalias sret(<1 x i16>) align 2 %{{.*}}, <1 x i16>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <1 x i16> @pass_v1i16(<1 x i16> %{{.*}})
v2i16 pass_v2i16(v2i16 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v2i16(<2 x i16>* noalias sret(<2 x i16>) align 4 %{{.*}}, <2 x i16>* %0)
-// CHECK-VECTOR-LABEL: define <2 x i16> @pass_v2i16(<2 x i16> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v2i16(<2 x i16>* noalias sret(<2 x i16>) align 4 %{{.*}}, <2 x i16>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <2 x i16> @pass_v2i16(<2 x i16> %{{.*}})
v4i16 pass_v4i16(v4i16 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v4i16(<4 x i16>* noalias sret(<4 x i16>) align 8 %{{.*}}, <4 x i16>* %0)
-// CHECK-VECTOR-LABEL: define <4 x i16> @pass_v4i16(<4 x i16> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v4i16(<4 x i16>* noalias sret(<4 x i16>) align 8 %{{.*}}, <4 x i16>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <4 x i16> @pass_v4i16(<4 x i16> %{{.*}})
v8i16 pass_v8i16(v8i16 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v8i16(<8 x i16>* noalias sret(<8 x i16>) align 16 %{{.*}}, <8 x i16>* %0)
-// CHECK-VECTOR-LABEL: define <8 x i16> @pass_v8i16(<8 x i16> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v8i16(<8 x i16>* noalias sret(<8 x i16>) align 16 %{{.*}}, <8 x i16>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <8 x i16> @pass_v8i16(<8 x i16> %{{.*}})
v1i32 pass_v1i32(v1i32 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v1i32(<1 x i32>* noalias sret(<1 x i32>) align 4 %{{.*}}, <1 x i32>* %0)
-// CHECK-VECTOR-LABEL: define <1 x i32> @pass_v1i32(<1 x i32> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v1i32(<1 x i32>* noalias sret(<1 x i32>) align 4 %{{.*}}, <1 x i32>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <1 x i32> @pass_v1i32(<1 x i32> %{{.*}})
v2i32 pass_v2i32(v2i32 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v2i32(<2 x i32>* noalias sret(<2 x i32>) align 8 %{{.*}}, <2 x i32>* %0)
-// CHECK-VECTOR-LABEL: define <2 x i32> @pass_v2i32(<2 x i32> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v2i32(<2 x i32>* noalias sret(<2 x i32>) align 8 %{{.*}}, <2 x i32>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <2 x i32> @pass_v2i32(<2 x i32> %{{.*}})
v4i32 pass_v4i32(v4i32 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v4i32(<4 x i32>* noalias sret(<4 x i32>) align 16 %{{.*}}, <4 x i32>* %0)
-// CHECK-VECTOR-LABEL: define <4 x i32> @pass_v4i32(<4 x i32> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v4i32(<4 x i32>* noalias sret(<4 x i32>) align 16 %{{.*}}, <4 x i32>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <4 x i32> @pass_v4i32(<4 x i32> %{{.*}})
v1i64 pass_v1i64(v1i64 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v1i64(<1 x i64>* noalias sret(<1 x i64>) align 8 %{{.*}}, <1 x i64>* %0)
-// CHECK-VECTOR-LABEL: define <1 x i64> @pass_v1i64(<1 x i64> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v1i64(<1 x i64>* noalias sret(<1 x i64>) align 8 %{{.*}}, <1 x i64>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <1 x i64> @pass_v1i64(<1 x i64> %{{.*}})
v2i64 pass_v2i64(v2i64 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v2i64(<2 x i64>* noalias sret(<2 x i64>) align 16 %{{.*}}, <2 x i64>* %0)
-// CHECK-VECTOR-LABEL: define <2 x i64> @pass_v2i64(<2 x i64> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v2i64(<2 x i64>* noalias sret(<2 x i64>) align 16 %{{.*}}, <2 x i64>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <2 x i64> @pass_v2i64(<2 x i64> %{{.*}})
v1i128 pass_v1i128(v1i128 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v1i128(<1 x i128>* noalias sret(<1 x i128>) align 16 %{{.*}}, <1 x i128>* %0)
-// CHECK-VECTOR-LABEL: define <1 x i128> @pass_v1i128(<1 x i128> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v1i128(<1 x i128>* noalias sret(<1 x i128>) align 16 %{{.*}}, <1 x i128>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <1 x i128> @pass_v1i128(<1 x i128> %{{.*}})
v1f32 pass_v1f32(v1f32 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v1f32(<1 x float>* noalias sret(<1 x float>) align 4 %{{.*}}, <1 x float>* %0)
-// CHECK-VECTOR-LABEL: define <1 x float> @pass_v1f32(<1 x float> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v1f32(<1 x float>* noalias sret(<1 x float>) align 4 %{{.*}}, <1 x float>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <1 x float> @pass_v1f32(<1 x float> %{{.*}})
v2f32 pass_v2f32(v2f32 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v2f32(<2 x float>* noalias sret(<2 x float>) align 8 %{{.*}}, <2 x float>* %0)
-// CHECK-VECTOR-LABEL: define <2 x float> @pass_v2f32(<2 x float> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v2f32(<2 x float>* noalias sret(<2 x float>) align 8 %{{.*}}, <2 x float>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <2 x float> @pass_v2f32(<2 x float> %{{.*}})
v4f32 pass_v4f32(v4f32 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v4f32(<4 x float>* noalias sret(<4 x float>) align 16 %{{.*}}, <4 x float>* %0)
-// CHECK-VECTOR-LABEL: define <4 x float> @pass_v4f32(<4 x float> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v4f32(<4 x float>* noalias sret(<4 x float>) align 16 %{{.*}}, <4 x float>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <4 x float> @pass_v4f32(<4 x float> %{{.*}})
v1f64 pass_v1f64(v1f64 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v1f64(<1 x double>* noalias sret(<1 x double>) align 8 %{{.*}}, <1 x double>* %0)
-// CHECK-VECTOR-LABEL: define <1 x double> @pass_v1f64(<1 x double> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v1f64(<1 x double>* noalias sret(<1 x double>) align 8 %{{.*}}, <1 x double>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <1 x double> @pass_v1f64(<1 x double> %{{.*}})
v2f64 pass_v2f64(v2f64 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v2f64(<2 x double>* noalias sret(<2 x double>) align 16 %{{.*}}, <2 x double>* %0)
-// CHECK-VECTOR-LABEL: define <2 x double> @pass_v2f64(<2 x double> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v2f64(<2 x double>* noalias sret(<2 x double>) align 16 %{{.*}}, <2 x double>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <2 x double> @pass_v2f64(<2 x double> %{{.*}})
v1f128 pass_v1f128(v1f128 arg) { return arg; }
-// CHECK-LABEL: define void @pass_v1f128(<1 x fp128>* noalias sret(<1 x fp128>) align 16 %{{.*}}, <1 x fp128>* %0)
-// CHECK-VECTOR-LABEL: define <1 x fp128> @pass_v1f128(<1 x fp128> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_v1f128(<1 x fp128>* noalias sret(<1 x fp128>) align 16 %{{.*}}, <1 x fp128>* %0)
+// CHECK-VECTOR-LABEL: define{{.*}} <1 x fp128> @pass_v1f128(<1 x fp128> %{{.*}})
// Vector-like aggregate types
struct agg_v1i8 { v1i8 a; };
struct agg_v1i8 pass_agg_v1i8(struct agg_v1i8 arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_v1i8(%struct.agg_v1i8* noalias sret(%struct.agg_v1i8) align 1 %{{.*}}, i8 %{{.*}})
-// CHECK-VECTOR-LABEL: define void @pass_agg_v1i8(%struct.agg_v1i8* noalias sret(%struct.agg_v1i8) align 1 %{{.*}}, <1 x i8> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_v1i8(%struct.agg_v1i8* noalias sret(%struct.agg_v1i8) align 1 %{{.*}}, i8 %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_v1i8(%struct.agg_v1i8* noalias sret(%struct.agg_v1i8) align 1 %{{.*}}, <1 x i8> %{{.*}})
struct agg_v2i8 { v2i8 a; };
struct agg_v2i8 pass_agg_v2i8(struct agg_v2i8 arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_v2i8(%struct.agg_v2i8* noalias sret(%struct.agg_v2i8) align 2 %{{.*}}, i16 %{{.*}})
-// CHECK-VECTOR-LABEL: define void @pass_agg_v2i8(%struct.agg_v2i8* noalias sret(%struct.agg_v2i8) align 2 %{{.*}}, <2 x i8> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_v2i8(%struct.agg_v2i8* noalias sret(%struct.agg_v2i8) align 2 %{{.*}}, i16 %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_v2i8(%struct.agg_v2i8* noalias sret(%struct.agg_v2i8) align 2 %{{.*}}, <2 x i8> %{{.*}})
struct agg_v4i8 { v4i8 a; };
struct agg_v4i8 pass_agg_v4i8(struct agg_v4i8 arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_v4i8(%struct.agg_v4i8* noalias sret(%struct.agg_v4i8) align 4 %{{.*}}, i32 %{{.*}})
-// CHECK-VECTOR-LABEL: define void @pass_agg_v4i8(%struct.agg_v4i8* noalias sret(%struct.agg_v4i8) align 4 %{{.*}}, <4 x i8> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_v4i8(%struct.agg_v4i8* noalias sret(%struct.agg_v4i8) align 4 %{{.*}}, i32 %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_v4i8(%struct.agg_v4i8* noalias sret(%struct.agg_v4i8) align 4 %{{.*}}, <4 x i8> %{{.*}})
struct agg_v8i8 { v8i8 a; };
struct agg_v8i8 pass_agg_v8i8(struct agg_v8i8 arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_v8i8(%struct.agg_v8i8* noalias sret(%struct.agg_v8i8) align 8 %{{.*}}, i64 %{{.*}})
-// CHECK-VECTOR-LABEL: define void @pass_agg_v8i8(%struct.agg_v8i8* noalias sret(%struct.agg_v8i8) align 8 %{{.*}}, <8 x i8> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_v8i8(%struct.agg_v8i8* noalias sret(%struct.agg_v8i8) align 8 %{{.*}}, i64 %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_v8i8(%struct.agg_v8i8* noalias sret(%struct.agg_v8i8) align 8 %{{.*}}, <8 x i8> %{{.*}})
struct agg_v16i8 { v16i8 a; };
struct agg_v16i8 pass_agg_v16i8(struct agg_v16i8 arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_v16i8(%struct.agg_v16i8* noalias sret(%struct.agg_v16i8) align 16 %{{.*}}, %struct.agg_v16i8* %{{.*}})
-// CHECK-VECTOR-LABEL: define void @pass_agg_v16i8(%struct.agg_v16i8* noalias sret(%struct.agg_v16i8) align 8 %{{.*}}, <16 x i8> %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_v16i8(%struct.agg_v16i8* noalias sret(%struct.agg_v16i8) align 16 %{{.*}}, %struct.agg_v16i8* %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_v16i8(%struct.agg_v16i8* noalias sret(%struct.agg_v16i8) align 8 %{{.*}}, <16 x i8> %{{.*}})
struct agg_v32i8 { v32i8 a; };
struct agg_v32i8 pass_agg_v32i8(struct agg_v32i8 arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_v32i8(%struct.agg_v32i8* noalias sret(%struct.agg_v32i8) align 32 %{{.*}}, %struct.agg_v32i8* %{{.*}})
-// CHECK-VECTOR-LABEL: define void @pass_agg_v32i8(%struct.agg_v32i8* noalias sret(%struct.agg_v32i8) align 8 %{{.*}}, %struct.agg_v32i8* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_v32i8(%struct.agg_v32i8* noalias sret(%struct.agg_v32i8) align 32 %{{.*}}, %struct.agg_v32i8* %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_v32i8(%struct.agg_v32i8* noalias sret(%struct.agg_v32i8) align 8 %{{.*}}, %struct.agg_v32i8* %{{.*}})
// Verify that the following are *not* vector-like aggregate types
struct agg_novector1 { v4i8 a; v4i8 b; };
struct agg_novector1 pass_agg_novector1(struct agg_novector1 arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_novector1(%struct.agg_novector1* noalias sret(%struct.agg_novector1) align 4 %{{.*}}, i64 %{{.*}})
-// CHECK-VECTOR-LABEL: define void @pass_agg_novector1(%struct.agg_novector1* noalias sret(%struct.agg_novector1) align 4 %{{.*}}, i64 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_novector1(%struct.agg_novector1* noalias sret(%struct.agg_novector1) align 4 %{{.*}}, i64 %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_novector1(%struct.agg_novector1* noalias sret(%struct.agg_novector1) align 4 %{{.*}}, i64 %{{.*}})
struct agg_novector2 { v4i8 a; float b; };
struct agg_novector2 pass_agg_novector2(struct agg_novector2 arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_novector2(%struct.agg_novector2* noalias sret(%struct.agg_novector2) align 4 %{{.*}}, i64 %{{.*}})
-// CHECK-VECTOR-LABEL: define void @pass_agg_novector2(%struct.agg_novector2* noalias sret(%struct.agg_novector2) align 4 %{{.*}}, i64 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_novector2(%struct.agg_novector2* noalias sret(%struct.agg_novector2) align 4 %{{.*}}, i64 %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_novector2(%struct.agg_novector2* noalias sret(%struct.agg_novector2) align 4 %{{.*}}, i64 %{{.*}})
struct agg_novector3 { v4i8 a; int : 0; };
struct agg_novector3 pass_agg_novector3(struct agg_novector3 arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_novector3(%struct.agg_novector3* noalias sret(%struct.agg_novector3) align 4 %{{.*}}, i32 %{{.*}})
-// CHECK-VECTOR-LABEL: define void @pass_agg_novector3(%struct.agg_novector3* noalias sret(%struct.agg_novector3) align 4 %{{.*}}, i32 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_novector3(%struct.agg_novector3* noalias sret(%struct.agg_novector3) align 4 %{{.*}}, i32 %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_novector3(%struct.agg_novector3* noalias sret(%struct.agg_novector3) align 4 %{{.*}}, i32 %{{.*}})
struct agg_novector4 { v4i8 a __attribute__((aligned (8))); };
struct agg_novector4 pass_agg_novector4(struct agg_novector4 arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_novector4(%struct.agg_novector4* noalias sret(%struct.agg_novector4) align 8 %{{.*}}, i64 %{{.*}})
-// CHECK-VECTOR-LABEL: define void @pass_agg_novector4(%struct.agg_novector4* noalias sret(%struct.agg_novector4) align 8 %{{.*}}, i64 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_novector4(%struct.agg_novector4* noalias sret(%struct.agg_novector4) align 8 %{{.*}}, i64 %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_novector4(%struct.agg_novector4* noalias sret(%struct.agg_novector4) align 8 %{{.*}}, i64 %{{.*}})
// Accessing variable argument lists
v1i8 va_v1i8(__builtin_va_list l) { return __builtin_va_arg(l, v1i8); }
-// CHECK-LABEL: define void @va_v1i8(<1 x i8>* noalias sret(<1 x i8>) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @va_v1i8(<1 x i8>* noalias sret(<1 x i8>) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <1 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <1 x i8>*, <1 x i8>** [[VA_ARG_ADDR]]
// CHECK: ret void
-// CHECK-VECTOR-LABEL: define <1 x i8> @va_v1i8(%struct.__va_list_tag* %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} <1 x i8> @va_v1i8(%struct.__va_list_tag* %{{.*}})
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <1 x i8>*
// CHECK-VECTOR: ret <1 x i8> [[RET]]
v2i8 va_v2i8(__builtin_va_list l) { return __builtin_va_arg(l, v2i8); }
-// CHECK-LABEL: define void @va_v2i8(<2 x i8>* noalias sret(<2 x i8>) align 2 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @va_v2i8(<2 x i8>* noalias sret(<2 x i8>) align 2 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <2 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <2 x i8>*, <2 x i8>** [[VA_ARG_ADDR]]
// CHECK: ret void
-// CHECK-VECTOR-LABEL: define <2 x i8> @va_v2i8(%struct.__va_list_tag* %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} <2 x i8> @va_v2i8(%struct.__va_list_tag* %{{.*}})
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <2 x i8>*
// CHECK-VECTOR: ret <2 x i8> [[RET]]
v4i8 va_v4i8(__builtin_va_list l) { return __builtin_va_arg(l, v4i8); }
-// CHECK-LABEL: define void @va_v4i8(<4 x i8>* noalias sret(<4 x i8>) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @va_v4i8(<4 x i8>* noalias sret(<4 x i8>) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <4 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <4 x i8>*, <4 x i8>** [[VA_ARG_ADDR]]
// CHECK: ret void
-// CHECK-VECTOR-LABEL: define <4 x i8> @va_v4i8(%struct.__va_list_tag* %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} <4 x i8> @va_v4i8(%struct.__va_list_tag* %{{.*}})
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <4 x i8>*
// CHECK-VECTOR: ret <4 x i8> [[RET]]
v8i8 va_v8i8(__builtin_va_list l) { return __builtin_va_arg(l, v8i8); }
-// CHECK-LABEL: define void @va_v8i8(<8 x i8>* noalias sret(<8 x i8>) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @va_v8i8(<8 x i8>* noalias sret(<8 x i8>) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <8 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <8 x i8>*, <8 x i8>** [[VA_ARG_ADDR]]
// CHECK: ret void
-// CHECK-VECTOR-LABEL: define <8 x i8> @va_v8i8(%struct.__va_list_tag* %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} <8 x i8> @va_v8i8(%struct.__va_list_tag* %{{.*}})
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <8 x i8>*
// CHECK-VECTOR: ret <8 x i8> [[RET]]
v16i8 va_v16i8(__builtin_va_list l) { return __builtin_va_arg(l, v16i8); }
-// CHECK-LABEL: define void @va_v16i8(<16 x i8>* noalias sret(<16 x i8>) align 16 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @va_v16i8(<16 x i8>* noalias sret(<16 x i8>) align 16 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <16 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <16 x i8>*, <16 x i8>** [[VA_ARG_ADDR]]
// CHECK: ret void
-// CHECK-VECTOR-LABEL: define <16 x i8> @va_v16i8(%struct.__va_list_tag* %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} <16 x i8> @va_v16i8(%struct.__va_list_tag* %{{.*}})
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <16 x i8>*
// CHECK-VECTOR: ret <16 x i8> [[RET]]
v32i8 va_v32i8(__builtin_va_list l) { return __builtin_va_arg(l, v32i8); }
-// CHECK-LABEL: define void @va_v32i8(<32 x i8>* noalias sret(<32 x i8>) align 32 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @va_v32i8(<32 x i8>* noalias sret(<32 x i8>) align 32 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <32 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <32 x i8>*, <32 x i8>** [[VA_ARG_ADDR]]
// CHECK: ret void
-// CHECK-VECTOR-LABEL: define void @va_v32i8(<32 x i8>* noalias sret(<32 x i8>) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} void @va_v32i8(<32 x i8>* noalias sret(<32 x i8>) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK-VECTOR: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK-VECTOR: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK-VECTOR: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK-VECTOR: ret void
struct agg_v1i8 va_agg_v1i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v1i8); }
-// CHECK-LABEL: define void @va_agg_v1i8(%struct.agg_v1i8* noalias sret(%struct.agg_v1i8) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @va_agg_v1i8(%struct.agg_v1i8* noalias sret(%struct.agg_v1i8) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v1i8* [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
// CHECK: ret void
-// CHECK-VECTOR-LABEL: define void @va_agg_v1i8(%struct.agg_v1i8* noalias sret(%struct.agg_v1i8) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} void @va_agg_v1i8(%struct.agg_v1i8* noalias sret(%struct.agg_v1i8) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to %struct.agg_v1i8*
// CHECK-VECTOR: ret void
struct agg_v2i8 va_agg_v2i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v2i8); }
-// CHECK-LABEL: define void @va_agg_v2i8(%struct.agg_v2i8* noalias sret(%struct.agg_v2i8) align 2 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @va_agg_v2i8(%struct.agg_v2i8* noalias sret(%struct.agg_v2i8) align 2 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v2i8* [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
// CHECK: ret void
-// CHECK-VECTOR-LABEL: define void @va_agg_v2i8(%struct.agg_v2i8* noalias sret(%struct.agg_v2i8) align 2 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} void @va_agg_v2i8(%struct.agg_v2i8* noalias sret(%struct.agg_v2i8) align 2 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to %struct.agg_v2i8*
// CHECK-VECTOR: ret void
struct agg_v4i8 va_agg_v4i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v4i8); }
-// CHECK-LABEL: define void @va_agg_v4i8(%struct.agg_v4i8* noalias sret(%struct.agg_v4i8) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @va_agg_v4i8(%struct.agg_v4i8* noalias sret(%struct.agg_v4i8) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v4i8* [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
// CHECK: ret void
-// CHECK-VECTOR-LABEL: define void @va_agg_v4i8(%struct.agg_v4i8* noalias sret(%struct.agg_v4i8) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} void @va_agg_v4i8(%struct.agg_v4i8* noalias sret(%struct.agg_v4i8) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to %struct.agg_v4i8*
// CHECK-VECTOR: ret void
struct agg_v8i8 va_agg_v8i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v8i8); }
-// CHECK-LABEL: define void @va_agg_v8i8(%struct.agg_v8i8* noalias sret(%struct.agg_v8i8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @va_agg_v8i8(%struct.agg_v8i8* noalias sret(%struct.agg_v8i8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v8i8* [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
// CHECK: ret void
-// CHECK-VECTOR-LABEL: define void @va_agg_v8i8(%struct.agg_v8i8* noalias sret(%struct.agg_v8i8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} void @va_agg_v8i8(%struct.agg_v8i8* noalias sret(%struct.agg_v8i8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to %struct.agg_v8i8*
// CHECK-VECTOR: ret void
struct agg_v16i8 va_agg_v16i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v16i8); }
-// CHECK-LABEL: define void @va_agg_v16i8(%struct.agg_v16i8* noalias sret(%struct.agg_v16i8) align 16 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @va_agg_v16i8(%struct.agg_v16i8* noalias sret(%struct.agg_v16i8) align 16 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v16i8** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load %struct.agg_v16i8*, %struct.agg_v16i8** [[VA_ARG_ADDR]]
// CHECK: ret void
-// CHECK-VECTOR-LABEL: define void @va_agg_v16i8(%struct.agg_v16i8* noalias sret(%struct.agg_v16i8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} void @va_agg_v16i8(%struct.agg_v16i8* noalias sret(%struct.agg_v16i8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to %struct.agg_v16i8*
// CHECK-VECTOR: ret void
struct agg_v32i8 va_agg_v32i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v32i8); }
-// CHECK-LABEL: define void @va_agg_v32i8(%struct.agg_v32i8* noalias sret(%struct.agg_v32i8) align 32 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @va_agg_v32i8(%struct.agg_v32i8* noalias sret(%struct.agg_v32i8) align 32 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v32i8** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load %struct.agg_v32i8*, %struct.agg_v32i8** [[VA_ARG_ADDR]]
// CHECK: ret void
-// CHECK-VECTOR-LABEL: define void @va_agg_v32i8(%struct.agg_v32i8* noalias sret(%struct.agg_v32i8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-VECTOR-LABEL: define{{.*}} void @va_agg_v32i8(%struct.agg_v32i8* noalias sret(%struct.agg_v32i8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK-VECTOR: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK-VECTOR: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK-VECTOR: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// Scalar types
char pass_char(char arg) { return arg; }
-// CHECK-LABEL: define signext i8 @pass_char(i8 signext %{{.*}})
+// CHECK-LABEL: define{{.*}} signext i8 @pass_char(i8 signext %{{.*}})
short pass_short(short arg) { return arg; }
-// CHECK-LABEL: define signext i16 @pass_short(i16 signext %{{.*}})
+// CHECK-LABEL: define{{.*}} signext i16 @pass_short(i16 signext %{{.*}})
int pass_int(int arg) { return arg; }
-// CHECK-LABEL: define signext i32 @pass_int(i32 signext %{{.*}})
+// CHECK-LABEL: define{{.*}} signext i32 @pass_int(i32 signext %{{.*}})
long pass_long(long arg) { return arg; }
-// CHECK-LABEL: define i64 @pass_long(i64 %{{.*}})
+// CHECK-LABEL: define{{.*}} i64 @pass_long(i64 %{{.*}})
long long pass_longlong(long long arg) { return arg; }
-// CHECK-LABEL: define i64 @pass_longlong(i64 %{{.*}})
+// CHECK-LABEL: define{{.*}} i64 @pass_longlong(i64 %{{.*}})
__int128 pass_int128(__int128 arg) { return arg; }
-// CHECK-LABEL: define void @pass_int128(i128* noalias sret(i128) align 16 %{{.*}}, i128* %0)
+// CHECK-LABEL: define{{.*}} void @pass_int128(i128* noalias sret(i128) align 16 %{{.*}}, i128* %0)
float pass_float(float arg) { return arg; }
-// CHECK-LABEL: define float @pass_float(float %{{.*}})
+// CHECK-LABEL: define{{.*}} float @pass_float(float %{{.*}})
double pass_double(double arg) { return arg; }
-// CHECK-LABEL: define double @pass_double(double %{{.*}})
+// CHECK-LABEL: define{{.*}} double @pass_double(double %{{.*}})
long double pass_longdouble(long double arg) { return arg; }
-// CHECK-LABEL: define void @pass_longdouble(fp128* noalias sret(fp128) align 8 %{{.*}}, fp128* %0)
+// CHECK-LABEL: define{{.*}} void @pass_longdouble(fp128* noalias sret(fp128) align 8 %{{.*}}, fp128* %0)
// Complex types
_Complex char pass_complex_char(_Complex char arg) { return arg; }
-// CHECK-LABEL: define void @pass_complex_char({ i8, i8 }* noalias sret({ i8, i8 }) align 1 %{{.*}}, { i8, i8 }* %{{.*}}arg)
+// CHECK-LABEL: define{{.*}} void @pass_complex_char({ i8, i8 }* noalias sret({ i8, i8 }) align 1 %{{.*}}, { i8, i8 }* %{{.*}}arg)
_Complex short pass_complex_short(_Complex short arg) { return arg; }
-// CHECK-LABEL: define void @pass_complex_short({ i16, i16 }* noalias sret({ i16, i16 }) align 2 %{{.*}}, { i16, i16 }* %{{.*}}arg)
+// CHECK-LABEL: define{{.*}} void @pass_complex_short({ i16, i16 }* noalias sret({ i16, i16 }) align 2 %{{.*}}, { i16, i16 }* %{{.*}}arg)
_Complex int pass_complex_int(_Complex int arg) { return arg; }
-// CHECK-LABEL: define void @pass_complex_int({ i32, i32 }* noalias sret({ i32, i32 }) align 4 %{{.*}}, { i32, i32 }* %{{.*}}arg)
+// CHECK-LABEL: define{{.*}} void @pass_complex_int({ i32, i32 }* noalias sret({ i32, i32 }) align 4 %{{.*}}, { i32, i32 }* %{{.*}}arg)
_Complex long pass_complex_long(_Complex long arg) { return arg; }
-// CHECK-LABEL: define void @pass_complex_long({ i64, i64 }* noalias sret({ i64, i64 }) align 8 %{{.*}}, { i64, i64 }* %{{.*}}arg)
+// CHECK-LABEL: define{{.*}} void @pass_complex_long({ i64, i64 }* noalias sret({ i64, i64 }) align 8 %{{.*}}, { i64, i64 }* %{{.*}}arg)
_Complex long long pass_complex_longlong(_Complex long long arg) { return arg; }
-// CHECK-LABEL: define void @pass_complex_longlong({ i64, i64 }* noalias sret({ i64, i64 }) align 8 %{{.*}}, { i64, i64 }* %{{.*}}arg)
+// CHECK-LABEL: define{{.*}} void @pass_complex_longlong({ i64, i64 }* noalias sret({ i64, i64 }) align 8 %{{.*}}, { i64, i64 }* %{{.*}}arg)
_Complex float pass_complex_float(_Complex float arg) { return arg; }
-// CHECK-LABEL: define void @pass_complex_float({ float, float }* noalias sret({ float, float }) align 4 %{{.*}}, { float, float }* %{{.*}}arg)
+// CHECK-LABEL: define{{.*}} void @pass_complex_float({ float, float }* noalias sret({ float, float }) align 4 %{{.*}}, { float, float }* %{{.*}}arg)
_Complex double pass_complex_double(_Complex double arg) { return arg; }
-// CHECK-LABEL: define void @pass_complex_double({ double, double }* noalias sret({ double, double }) align 8 %{{.*}}, { double, double }* %{{.*}}arg)
+// CHECK-LABEL: define{{.*}} void @pass_complex_double({ double, double }* noalias sret({ double, double }) align 8 %{{.*}}, { double, double }* %{{.*}}arg)
_Complex long double pass_complex_longdouble(_Complex long double arg) { return arg; }
-// CHECK-LABEL: define void @pass_complex_longdouble({ fp128, fp128 }* noalias sret({ fp128, fp128 }) align 8 %{{.*}}, { fp128, fp128 }* %{{.*}}arg)
+// CHECK-LABEL: define{{.*}} void @pass_complex_longdouble({ fp128, fp128 }* noalias sret({ fp128, fp128 }) align 8 %{{.*}}, { fp128, fp128 }* %{{.*}}arg)
// Aggregate types
struct agg_1byte { char a[1]; };
struct agg_1byte pass_agg_1byte(struct agg_1byte arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_1byte(%struct.agg_1byte* noalias sret(%struct.agg_1byte) align 1 %{{.*}}, i8 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_1byte(%struct.agg_1byte* noalias sret(%struct.agg_1byte) align 1 %{{.*}}, i8 %{{.*}})
struct agg_2byte { char a[2]; };
struct agg_2byte pass_agg_2byte(struct agg_2byte arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_2byte(%struct.agg_2byte* noalias sret(%struct.agg_2byte) align 1 %{{.*}}, i16 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_2byte(%struct.agg_2byte* noalias sret(%struct.agg_2byte) align 1 %{{.*}}, i16 %{{.*}})
struct agg_3byte { char a[3]; };
struct agg_3byte pass_agg_3byte(struct agg_3byte arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_3byte(%struct.agg_3byte* noalias sret(%struct.agg_3byte) align 1 %{{.*}}, %struct.agg_3byte* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_3byte(%struct.agg_3byte* noalias sret(%struct.agg_3byte) align 1 %{{.*}}, %struct.agg_3byte* %{{.*}})
struct agg_4byte { char a[4]; };
struct agg_4byte pass_agg_4byte(struct agg_4byte arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_4byte(%struct.agg_4byte* noalias sret(%struct.agg_4byte) align 1 %{{.*}}, i32 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_4byte(%struct.agg_4byte* noalias sret(%struct.agg_4byte) align 1 %{{.*}}, i32 %{{.*}})
struct agg_5byte { char a[5]; };
struct agg_5byte pass_agg_5byte(struct agg_5byte arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_5byte(%struct.agg_5byte* noalias sret(%struct.agg_5byte) align 1 %{{.*}}, %struct.agg_5byte* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_5byte(%struct.agg_5byte* noalias sret(%struct.agg_5byte) align 1 %{{.*}}, %struct.agg_5byte* %{{.*}})
struct agg_6byte { char a[6]; };
struct agg_6byte pass_agg_6byte(struct agg_6byte arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_6byte(%struct.agg_6byte* noalias sret(%struct.agg_6byte) align 1 %{{.*}}, %struct.agg_6byte* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_6byte(%struct.agg_6byte* noalias sret(%struct.agg_6byte) align 1 %{{.*}}, %struct.agg_6byte* %{{.*}})
struct agg_7byte { char a[7]; };
struct agg_7byte pass_agg_7byte(struct agg_7byte arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_7byte(%struct.agg_7byte* noalias sret(%struct.agg_7byte) align 1 %{{.*}}, %struct.agg_7byte* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_7byte(%struct.agg_7byte* noalias sret(%struct.agg_7byte) align 1 %{{.*}}, %struct.agg_7byte* %{{.*}})
struct agg_8byte { char a[8]; };
struct agg_8byte pass_agg_8byte(struct agg_8byte arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_8byte(%struct.agg_8byte* noalias sret(%struct.agg_8byte) align 1 %{{.*}}, i64 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_8byte(%struct.agg_8byte* noalias sret(%struct.agg_8byte) align 1 %{{.*}}, i64 %{{.*}})
struct agg_16byte { char a[16]; };
struct agg_16byte pass_agg_16byte(struct agg_16byte arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_16byte(%struct.agg_16byte* noalias sret(%struct.agg_16byte) align 1 %{{.*}}, %struct.agg_16byte* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_16byte(%struct.agg_16byte* noalias sret(%struct.agg_16byte) align 1 %{{.*}}, %struct.agg_16byte* %{{.*}})
// Float-like aggregate types
struct agg_float { float a; };
struct agg_float pass_agg_float(struct agg_float arg) { return arg; }
-// HARD-FLOAT-LABEL: define void @pass_agg_float(%struct.agg_float* noalias sret(%struct.agg_float) align 4 %{{.*}}, float %{{.*}})
-// SOFT-FLOAT-LABEL: define void @pass_agg_float(%struct.agg_float* noalias sret(%struct.agg_float) align 4 %{{.*}}, i32 %{{.*}})
+// HARD-FLOAT-LABEL: define{{.*}} void @pass_agg_float(%struct.agg_float* noalias sret(%struct.agg_float) align 4 %{{.*}}, float %{{.*}})
+// SOFT-FLOAT-LABEL: define{{.*}} void @pass_agg_float(%struct.agg_float* noalias sret(%struct.agg_float) align 4 %{{.*}}, i32 %{{.*}})
struct agg_double { double a; };
struct agg_double pass_agg_double(struct agg_double arg) { return arg; }
-// HARD-FLOAT-LABEL: define void @pass_agg_double(%struct.agg_double* noalias sret(%struct.agg_double) align 8 %{{.*}}, double %{{.*}})
-// SOFT-FLOAT-LABEL: define void @pass_agg_double(%struct.agg_double* noalias sret(%struct.agg_double) align 8 %{{.*}}, i64 %{{.*}})
+// HARD-FLOAT-LABEL: define{{.*}} void @pass_agg_double(%struct.agg_double* noalias sret(%struct.agg_double) align 8 %{{.*}}, double %{{.*}})
+// SOFT-FLOAT-LABEL: define{{.*}} void @pass_agg_double(%struct.agg_double* noalias sret(%struct.agg_double) align 8 %{{.*}}, i64 %{{.*}})
struct agg_longdouble { long double a; };
struct agg_longdouble pass_agg_longdouble(struct agg_longdouble arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_longdouble(%struct.agg_longdouble* noalias sret(%struct.agg_longdouble) align 8 %{{.*}}, %struct.agg_longdouble* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_longdouble(%struct.agg_longdouble* noalias sret(%struct.agg_longdouble) align 8 %{{.*}}, %struct.agg_longdouble* %{{.*}})
struct agg_float_a8 { float a __attribute__((aligned (8))); };
struct agg_float_a8 pass_agg_float_a8(struct agg_float_a8 arg) { return arg; }
-// HARD-FLOAT-LABEL: define void @pass_agg_float_a8(%struct.agg_float_a8* noalias sret(%struct.agg_float_a8) align 8 %{{.*}}, double %{{.*}})
-// SOFT-FLOAT-LABEL: define void @pass_agg_float_a8(%struct.agg_float_a8* noalias sret(%struct.agg_float_a8) align 8 %{{.*}}, i64 %{{.*}})
+// HARD-FLOAT-LABEL: define{{.*}} void @pass_agg_float_a8(%struct.agg_float_a8* noalias sret(%struct.agg_float_a8) align 8 %{{.*}}, double %{{.*}})
+// SOFT-FLOAT-LABEL: define{{.*}} void @pass_agg_float_a8(%struct.agg_float_a8* noalias sret(%struct.agg_float_a8) align 8 %{{.*}}, i64 %{{.*}})
struct agg_float_a16 { float a __attribute__((aligned (16))); };
struct agg_float_a16 pass_agg_float_a16(struct agg_float_a16 arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_float_a16(%struct.agg_float_a16* noalias sret(%struct.agg_float_a16) align 16 %{{.*}}, %struct.agg_float_a16* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_float_a16(%struct.agg_float_a16* noalias sret(%struct.agg_float_a16) align 16 %{{.*}}, %struct.agg_float_a16* %{{.*}})
// Verify that the following are *not* float-like aggregate types
struct agg_nofloat1 { float a; float b; };
struct agg_nofloat1 pass_agg_nofloat1(struct agg_nofloat1 arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_nofloat1(%struct.agg_nofloat1* noalias sret(%struct.agg_nofloat1) align 4 %{{.*}}, i64 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_nofloat1(%struct.agg_nofloat1* noalias sret(%struct.agg_nofloat1) align 4 %{{.*}}, i64 %{{.*}})
struct agg_nofloat2 { float a; int b; };
struct agg_nofloat2 pass_agg_nofloat2(struct agg_nofloat2 arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_nofloat2(%struct.agg_nofloat2* noalias sret(%struct.agg_nofloat2) align 4 %{{.*}}, i64 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_nofloat2(%struct.agg_nofloat2* noalias sret(%struct.agg_nofloat2) align 4 %{{.*}}, i64 %{{.*}})
struct agg_nofloat3 { float a; int : 0; };
struct agg_nofloat3 pass_agg_nofloat3(struct agg_nofloat3 arg) { return arg; }
-// CHECK-LABEL: define void @pass_agg_nofloat3(%struct.agg_nofloat3* noalias sret(%struct.agg_nofloat3) align 4 %{{.*}}, i32 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_agg_nofloat3(%struct.agg_nofloat3* noalias sret(%struct.agg_nofloat3) align 4 %{{.*}}, i32 %{{.*}})
// Union types likewise are *not* float-like aggregate types
union union_float { float a; };
union union_float pass_union_float(union union_float arg) { return arg; }
-// CHECK-LABEL: define void @pass_union_float(%union.union_float* noalias sret(%union.union_float) align 4 %{{.*}}, i32 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_union_float(%union.union_float* noalias sret(%union.union_float) align 4 %{{.*}}, i32 %{{.*}})
union union_double { double a; };
union union_double pass_union_double(union union_double arg) { return arg; }
-// CHECK-LABEL: define void @pass_union_double(%union.union_double* noalias sret(%union.union_double) align 8 %{{.*}}, i64 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @pass_union_double(%union.union_double* noalias sret(%union.union_double) align 8 %{{.*}}, i64 %{{.*}})
// Accessing variable argument lists
int va_int(__builtin_va_list l) { return __builtin_va_arg(l, int); }
-// CHECK-LABEL: define signext i32 @va_int(%struct.__va_list_tag* %{{.*}})
+// CHECK-LABEL: define{{.*}} signext i32 @va_int(%struct.__va_list_tag* %{{.*}})
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: ret i32 [[RET]]
long va_long(__builtin_va_list l) { return __builtin_va_arg(l, long); }
-// CHECK-LABEL: define i64 @va_long(%struct.__va_list_tag* %{{.*}})
+// CHECK-LABEL: define{{.*}} i64 @va_long(%struct.__va_list_tag* %{{.*}})
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: ret i64 [[RET]]
long long va_longlong(__builtin_va_list l) { return __builtin_va_arg(l, long long); }
-// CHECK-LABEL: define i64 @va_longlong(%struct.__va_list_tag* %{{.*}})
+// CHECK-LABEL: define{{.*}} i64 @va_longlong(%struct.__va_list_tag* %{{.*}})
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: ret i64 [[RET]]
double va_double(__builtin_va_list l) { return __builtin_va_arg(l, double); }
-// CHECK-LABEL: define double @va_double(%struct.__va_list_tag* %{{.*}})
+// CHECK-LABEL: define{{.*}} double @va_double(%struct.__va_list_tag* %{{.*}})
// HARD-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 1
// SOFT-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: ret double [[RET]]
long double va_longdouble(__builtin_va_list l) { return __builtin_va_arg(l, long double); }
-// CHECK-LABEL: define void @va_longdouble(fp128* noalias sret(fp128) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
+// CHECK-LABEL: define{{.*}} void @va_longdouble(fp128* noalias sret(fp128) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: ret void
_Complex char va_complex_char(__builtin_va_list l) { return __builtin_va_arg(l, _Complex char); }
-// CHECK-LABEL: define void @va_complex_char({ i8, i8 }* noalias sret({ i8, i8 }) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
+// CHECK-LABEL: define{{.*}} void @va_complex_char({ i8, i8 }* noalias sret({ i8, i8 }) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: ret void
struct agg_1byte va_agg_1byte(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_1byte); }
-// CHECK-LABEL: define void @va_agg_1byte(%struct.agg_1byte* noalias sret(%struct.agg_1byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
+// CHECK-LABEL: define{{.*}} void @va_agg_1byte(%struct.agg_1byte* noalias sret(%struct.agg_1byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: ret void
struct agg_2byte va_agg_2byte(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_2byte); }
-// CHECK-LABEL: define void @va_agg_2byte(%struct.agg_2byte* noalias sret(%struct.agg_2byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
+// CHECK-LABEL: define{{.*}} void @va_agg_2byte(%struct.agg_2byte* noalias sret(%struct.agg_2byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: ret void
struct agg_3byte va_agg_3byte(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_3byte); }
-// CHECK-LABEL: define void @va_agg_3byte(%struct.agg_3byte* noalias sret(%struct.agg_3byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
+// CHECK-LABEL: define{{.*}} void @va_agg_3byte(%struct.agg_3byte* noalias sret(%struct.agg_3byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: ret void
struct agg_4byte va_agg_4byte(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_4byte); }
-// CHECK-LABEL: define void @va_agg_4byte(%struct.agg_4byte* noalias sret(%struct.agg_4byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
+// CHECK-LABEL: define{{.*}} void @va_agg_4byte(%struct.agg_4byte* noalias sret(%struct.agg_4byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: ret void
struct agg_8byte va_agg_8byte(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_8byte); }
-// CHECK-LABEL: define void @va_agg_8byte(%struct.agg_8byte* noalias sret(%struct.agg_8byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
+// CHECK-LABEL: define{{.*}} void @va_agg_8byte(%struct.agg_8byte* noalias sret(%struct.agg_8byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: ret void
struct agg_float va_agg_float(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_float); }
-// CHECK-LABEL: define void @va_agg_float(%struct.agg_float* noalias sret(%struct.agg_float) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}}
+// CHECK-LABEL: define{{.*}} void @va_agg_float(%struct.agg_float* noalias sret(%struct.agg_float) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}}
// HARD-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 1
// SOFT-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: ret void
struct agg_double va_agg_double(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_double); }
-// CHECK-LABEL: define void @va_agg_double(%struct.agg_double* noalias sret(%struct.agg_double) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}}
+// CHECK-LABEL: define{{.*}} void @va_agg_double(%struct.agg_double* noalias sret(%struct.agg_double) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}}
// HARD-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 1
// SOFT-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: ret void
struct agg_longdouble va_agg_longdouble(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_longdouble); }
-// CHECK-LABEL: define void @va_agg_longdouble(%struct.agg_longdouble* noalias sret(%struct.agg_longdouble) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}}
+// CHECK-LABEL: define{{.*}} void @va_agg_longdouble(%struct.agg_longdouble* noalias sret(%struct.agg_longdouble) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}}
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: ret void
struct agg_float_a8 va_agg_float_a8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_float_a8); }
-// CHECK-LABEL: define void @va_agg_float_a8(%struct.agg_float_a8* noalias sret(%struct.agg_float_a8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}}
+// CHECK-LABEL: define{{.*}} void @va_agg_float_a8(%struct.agg_float_a8* noalias sret(%struct.agg_float_a8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}}
// HARD-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 1
// SOFT-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: ret void
struct agg_float_a16 va_agg_float_a16(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_float_a16); }
-// CHECK-LABEL: define void @va_agg_float_a16(%struct.agg_float_a16* noalias sret(%struct.agg_float_a16) align 16 %{{.*}}, %struct.__va_list_tag* %{{.*}}
+// CHECK-LABEL: define{{.*}} void @va_agg_float_a16(%struct.agg_float_a16* noalias sret(%struct.agg_float_a16) align 16 %{{.*}}, %struct.__va_list_tag* %{{.*}}
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: ret void
struct agg_nofloat1 va_agg_nofloat1(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_nofloat1); }
-// CHECK-LABEL: define void @va_agg_nofloat1(%struct.agg_nofloat1* noalias sret(%struct.agg_nofloat1) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}}
+// CHECK-LABEL: define{{.*}} void @va_agg_nofloat1(%struct.agg_nofloat1* noalias sret(%struct.agg_nofloat1) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}}
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: ret void
struct agg_nofloat2 va_agg_nofloat2(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_nofloat2); }
-// CHECK-LABEL: define void @va_agg_nofloat2(%struct.agg_nofloat2* noalias sret(%struct.agg_nofloat2) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}}
+// CHECK-LABEL: define{{.*}} void @va_agg_nofloat2(%struct.agg_nofloat2* noalias sret(%struct.agg_nofloat2) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}}
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
// CHECK: ret void
struct agg_nofloat3 va_agg_nofloat3(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_nofloat3); }
-// CHECK-LABEL: define void @va_agg_nofloat3(%struct.agg_nofloat3* noalias sret(%struct.agg_nofloat3) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}}
+// CHECK-LABEL: define{{.*}} void @va_agg_nofloat3(%struct.agg_nofloat3* noalias sret(%struct.agg_nofloat3) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}}
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
class agg_float_class { float a; };
class agg_float_class pass_agg_float_class(class agg_float_class arg) { return arg; }
-// CHECK-LABEL: define void @_Z20pass_agg_float_class15agg_float_class(%class.agg_float_class* noalias sret(%class.agg_float_class) align 4 %{{.*}}, float %{{.*}})
-// SOFT-FLOAT-LABEL: define void @_Z20pass_agg_float_class15agg_float_class(%class.agg_float_class* noalias sret(%class.agg_float_class) align 4 %{{.*}}, i32 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @_Z20pass_agg_float_class15agg_float_class(%class.agg_float_class* noalias sret(%class.agg_float_class) align 4 %{{.*}}, float %{{.*}})
+// SOFT-FLOAT-LABEL: define{{.*}} void @_Z20pass_agg_float_class15agg_float_class(%class.agg_float_class* noalias sret(%class.agg_float_class) align 4 %{{.*}}, i32 %{{.*}})
class agg_double_class { double a; };
class agg_double_class pass_agg_double_class(class agg_double_class arg) { return arg; }
-// CHECK-LABEL: define void @_Z21pass_agg_double_class16agg_double_class(%class.agg_double_class* noalias sret(%class.agg_double_class) align 8 %{{.*}}, double %{{.*}})
-// SOFT-FLOAT-LABEL: define void @_Z21pass_agg_double_class16agg_double_class(%class.agg_double_class* noalias sret(%class.agg_double_class) align 8 %{{.*}}, i64 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @_Z21pass_agg_double_class16agg_double_class(%class.agg_double_class* noalias sret(%class.agg_double_class) align 8 %{{.*}}, double %{{.*}})
+// SOFT-FLOAT-LABEL: define{{.*}} void @_Z21pass_agg_double_class16agg_double_class(%class.agg_double_class* noalias sret(%class.agg_double_class) align 8 %{{.*}}, i64 %{{.*}})
// For compatibility with GCC, this structure is passed in an FPR in C++,
struct agg_float_cpp { float a; int : 0; };
struct agg_float_cpp pass_agg_float_cpp(struct agg_float_cpp arg) { return arg; }
-// CHECK-LABEL: define void @_Z18pass_agg_float_cpp13agg_float_cpp(%struct.agg_float_cpp* noalias sret(%struct.agg_float_cpp) align 4 %{{.*}}, float %{{.*}})
-// SOFT-FLOAT-LABEL: define void @_Z18pass_agg_float_cpp13agg_float_cpp(%struct.agg_float_cpp* noalias sret(%struct.agg_float_cpp) align 4 %{{.*}}, i32 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @_Z18pass_agg_float_cpp13agg_float_cpp(%struct.agg_float_cpp* noalias sret(%struct.agg_float_cpp) align 4 %{{.*}}, float %{{.*}})
+// SOFT-FLOAT-LABEL: define{{.*}} void @_Z18pass_agg_float_cpp13agg_float_cpp(%struct.agg_float_cpp* noalias sret(%struct.agg_float_cpp) align 4 %{{.*}}, i32 %{{.*}})
// A field member of empty class type in C++ makes the record nonhomogeneous,
struct empty { };
struct agg_nofloat_empty { float a; empty dummy; };
struct agg_nofloat_empty pass_agg_nofloat_empty(struct agg_nofloat_empty arg) { return arg; }
-// CHECK-LABEL: define void @_Z22pass_agg_nofloat_empty17agg_nofloat_empty(%struct.agg_nofloat_empty* noalias sret(%struct.agg_nofloat_empty) align 4 %{{.*}}, i64 %{{.*}})
-// SOFT-FLOAT-LABEL: define void @_Z22pass_agg_nofloat_empty17agg_nofloat_empty(%struct.agg_nofloat_empty* noalias sret(%struct.agg_nofloat_empty) align 4 %{{.*}}, i64 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @_Z22pass_agg_nofloat_empty17agg_nofloat_empty(%struct.agg_nofloat_empty* noalias sret(%struct.agg_nofloat_empty) align 4 %{{.*}}, i64 %{{.*}})
+// SOFT-FLOAT-LABEL: define{{.*}} void @_Z22pass_agg_nofloat_empty17agg_nofloat_empty(%struct.agg_nofloat_empty* noalias sret(%struct.agg_nofloat_empty) align 4 %{{.*}}, i64 %{{.*}})
struct agg_float_empty { float a; [[no_unique_address]] empty dummy; };
struct agg_float_empty pass_agg_float_empty(struct agg_float_empty arg) { return arg; }
-// CHECK-LABEL: define void @_Z20pass_agg_float_empty15agg_float_empty(%struct.agg_float_empty* noalias sret(%struct.agg_float_empty) align 4 %{{.*}}, float %{{.*}})
-// SOFT-FLOAT-LABEL: define void @_Z20pass_agg_float_empty15agg_float_empty(%struct.agg_float_empty* noalias sret(%struct.agg_float_empty) align 4 %{{.*}}, i32 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @_Z20pass_agg_float_empty15agg_float_empty(%struct.agg_float_empty* noalias sret(%struct.agg_float_empty) align 4 %{{.*}}, float %{{.*}})
+// SOFT-FLOAT-LABEL: define{{.*}} void @_Z20pass_agg_float_empty15agg_float_empty(%struct.agg_float_empty* noalias sret(%struct.agg_float_empty) align 4 %{{.*}}, i32 %{{.*}})
struct agg_nofloat_emptyarray { float a; [[no_unique_address]] empty dummy[3]; };
struct agg_nofloat_emptyarray pass_agg_nofloat_emptyarray(struct agg_nofloat_emptyarray arg) { return arg; }
-// CHECK-LABEL: define void @_Z27pass_agg_nofloat_emptyarray22agg_nofloat_emptyarray(%struct.agg_nofloat_emptyarray* noalias sret(%struct.agg_nofloat_emptyarray) align 4 %{{.*}}, i64 %{{.*}})
-// SOFT-FLOAT-LABEL: define void @_Z27pass_agg_nofloat_emptyarray22agg_nofloat_emptyarray(%struct.agg_nofloat_emptyarray* noalias sret(%struct.agg_nofloat_emptyarray) align 4 %{{.*}}, i64 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @_Z27pass_agg_nofloat_emptyarray22agg_nofloat_emptyarray(%struct.agg_nofloat_emptyarray* noalias sret(%struct.agg_nofloat_emptyarray) align 4 %{{.*}}, i64 %{{.*}})
+// SOFT-FLOAT-LABEL: define{{.*}} void @_Z27pass_agg_nofloat_emptyarray22agg_nofloat_emptyarray(%struct.agg_nofloat_emptyarray* noalias sret(%struct.agg_nofloat_emptyarray) align 4 %{{.*}}, i64 %{{.*}})
// And likewise for members of base classes.
struct noemptybase { empty dummy; };
struct agg_nofloat_emptybase : noemptybase { float a; };
struct agg_nofloat_emptybase pass_agg_nofloat_emptybase(struct agg_nofloat_emptybase arg) { return arg; }
-// CHECK-LABEL: define void @_Z26pass_agg_nofloat_emptybase21agg_nofloat_emptybase(%struct.agg_nofloat_emptybase* noalias sret(%struct.agg_nofloat_emptybase) align 4 %{{.*}}, i64 %{{.*}})
-// SOFT-FLOAT-LABEL: define void @_Z26pass_agg_nofloat_emptybase21agg_nofloat_emptybase(%struct.agg_nofloat_emptybase* noalias sret(%struct.agg_nofloat_emptybase) align 4 %{{.*}}, i64 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @_Z26pass_agg_nofloat_emptybase21agg_nofloat_emptybase(%struct.agg_nofloat_emptybase* noalias sret(%struct.agg_nofloat_emptybase) align 4 %{{.*}}, i64 %{{.*}})
+// SOFT-FLOAT-LABEL: define{{.*}} void @_Z26pass_agg_nofloat_emptybase21agg_nofloat_emptybase(%struct.agg_nofloat_emptybase* noalias sret(%struct.agg_nofloat_emptybase) align 4 %{{.*}}, i64 %{{.*}})
struct emptybase { [[no_unique_address]] empty dummy; };
struct agg_float_emptybase : emptybase { float a; };
struct agg_float_emptybase pass_agg_float_emptybase(struct agg_float_emptybase arg) { return arg; }
-// CHECK-LABEL: define void @_Z24pass_agg_float_emptybase19agg_float_emptybase(%struct.agg_float_emptybase* noalias sret(%struct.agg_float_emptybase) align 4 %{{.*}}, float %{{.*}})
-// SOFT-FLOAT-LABEL: define void @_Z24pass_agg_float_emptybase19agg_float_emptybase(%struct.agg_float_emptybase* noalias sret(%struct.agg_float_emptybase) align 4 %{{.*}}, i32 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @_Z24pass_agg_float_emptybase19agg_float_emptybase(%struct.agg_float_emptybase* noalias sret(%struct.agg_float_emptybase) align 4 %{{.*}}, float %{{.*}})
+// SOFT-FLOAT-LABEL: define{{.*}} void @_Z24pass_agg_float_emptybase19agg_float_emptybase(%struct.agg_float_emptybase* noalias sret(%struct.agg_float_emptybase) align 4 %{{.*}}, i32 %{{.*}})
struct noemptybasearray { [[no_unique_address]] empty dummy[3]; };
struct agg_nofloat_emptybasearray : noemptybasearray { float a; };
struct agg_nofloat_emptybasearray pass_agg_nofloat_emptybasearray(struct agg_nofloat_emptybasearray arg) { return arg; }
-// CHECK-LABEL: define void @_Z31pass_agg_nofloat_emptybasearray26agg_nofloat_emptybasearray(%struct.agg_nofloat_emptybasearray* noalias sret(%struct.agg_nofloat_emptybasearray) align 4 %{{.*}}, i64 %{{.*}})
-// SOFT-FLOAT-LABEL: define void @_Z31pass_agg_nofloat_emptybasearray26agg_nofloat_emptybasearray(%struct.agg_nofloat_emptybasearray* noalias sret(%struct.agg_nofloat_emptybasearray) align 4 %{{.*}}, i64 %{{.*}})
+// CHECK-LABEL: define{{.*}} void @_Z31pass_agg_nofloat_emptybasearray26agg_nofloat_emptybasearray(%struct.agg_nofloat_emptybasearray* noalias sret(%struct.agg_nofloat_emptybasearray) align 4 %{{.*}}, i64 %{{.*}})
+// SOFT-FLOAT-LABEL: define{{.*}} void @_Z31pass_agg_nofloat_emptybasearray26agg_nofloat_emptybasearray(%struct.agg_nofloat_emptybasearray* noalias sret(%struct.agg_nofloat_emptybasearray) align 4 %{{.*}}, i64 %{{.*}})
void test_store_m(unsigned int i) {
asm("st %1, %0" : "=m" (gi) : "r" (i));
-// CHECK-LABEL: define void @test_store_m(i32 zeroext %i)
+// CHECK-LABEL: define{{.*}} void @test_store_m(i32 zeroext %i)
// CHECK: call void asm "st $1, $0", "=*m,r"(i32* nonnull @gi, i32 %i)
}
void test_store_Q(unsigned int i) {
asm("st %1, %0" : "=Q" (gi) : "r" (i));
-// CHECK-LABEL: define void @test_store_Q(i32 zeroext %i)
+// CHECK-LABEL: define{{.*}} void @test_store_Q(i32 zeroext %i)
// CHECK: call void asm "st $1, $0", "=*Q,r"(i32* nonnull @gi, i32 %i)
}
void test_store_R(unsigned int i) {
asm("st %1, %0" : "=R" (gi) : "r" (i));
-// CHECK-LABEL: define void @test_store_R(i32 zeroext %i)
+// CHECK-LABEL: define{{.*}} void @test_store_R(i32 zeroext %i)
// CHECK: call void asm "st $1, $0", "=*R,r"(i32* nonnull @gi, i32 %i)
}
void test_store_S(unsigned int i) {
asm("st %1, %0" : "=S" (gi) : "r" (i));
-// CHECK-LABEL: define void @test_store_S(i32 zeroext %i)
+// CHECK-LABEL: define{{.*}} void @test_store_S(i32 zeroext %i)
// CHECK: call void asm "st $1, $0", "=*S,r"(i32* nonnull @gi, i32 %i)
}
void test_store_T(unsigned int i) {
asm("st %1, %0" : "=T" (gi) : "r" (i));
-// CHECK-LABEL: define void @test_store_T(i32 zeroext %i)
+// CHECK-LABEL: define{{.*}} void @test_store_T(i32 zeroext %i)
// CHECK: call void asm "st $1, $0", "=*T,r"(i32* nonnull @gi, i32 %i)
}
unsigned int i;
asm("l %0, %1" : "=r" (i) : "m" (gi));
return i;
-// CHECK-LABEL: define signext i32 @test_load_m()
+// CHECK-LABEL: define{{.*}} signext i32 @test_load_m()
// CHECK: call i32 asm "l $0, $1", "=r,*m"(i32* nonnull @gi)
}
unsigned int i;
asm("l %0, %1" : "=r" (i) : "Q" (gi));
return i;
-// CHECK-LABEL: define signext i32 @test_load_Q()
+// CHECK-LABEL: define{{.*}} signext i32 @test_load_Q()
// CHECK: call i32 asm "l $0, $1", "=r,*Q"(i32* nonnull @gi)
}
unsigned int i;
asm("l %0, %1" : "=r" (i) : "R" (gi));
return i;
-// CHECK-LABEL: define signext i32 @test_load_R()
+// CHECK-LABEL: define{{.*}} signext i32 @test_load_R()
// CHECK: call i32 asm "l $0, $1", "=r,*R"(i32* nonnull @gi)
}
unsigned int i;
asm("l %0, %1" : "=r" (i) : "S" (gi));
return i;
-// CHECK-LABEL: define signext i32 @test_load_S()
+// CHECK-LABEL: define{{.*}} signext i32 @test_load_S()
// CHECK: call i32 asm "l $0, $1", "=r,*S"(i32* nonnull @gi)
}
unsigned int i;
asm("l %0, %1" : "=r" (i) : "T" (gi));
return i;
-// CHECK-LABEL: define signext i32 @test_load_T()
+// CHECK-LABEL: define{{.*}} signext i32 @test_load_T()
// CHECK: call i32 asm "l $0, $1", "=r,*T"(i32* nonnull @gi)
}
void test_mI(unsigned char *c) {
asm volatile("cli %0, %1" :: "Q" (*c), "I" (100));
-// CHECK-LABEL: define void @test_mI(i8* %c)
+// CHECK-LABEL: define{{.*}} void @test_mI(i8* %c)
// CHECK: call void asm sideeffect "cli $0, $1", "*Q,I"(i8* %c, i32 100)
}
unsigned int test_dJa(unsigned int i, unsigned int j) {
asm("sll %0, %2(%3)" : "=d" (i) : "0" (i), "J" (1000), "a" (j));
return i;
-// CHECK-LABEL: define zeroext i32 @test_dJa(i32 zeroext %i, i32 zeroext %j)
+// CHECK-LABEL: define{{.*}} zeroext i32 @test_dJa(i32 zeroext %i, i32 zeroext %j)
// CHECK: call i32 asm "sll $0, $2($3)", "=d,0,J,a"(i32 %i, i32 1000, i32 %j)
}
unsigned long test_rK(unsigned long i) {
asm("aghi %0, %2" : "=r" (i) : "0" (i), "K" (-30000));
return i;
-// CHECK-LABEL: define i64 @test_rK(i64 %i)
+// CHECK-LABEL: define{{.*}} i64 @test_rK(i64 %i)
// CHECK: call i64 asm "aghi $0, $2", "=r,0,K"(i64 %i, i32 -30000)
}
unsigned long test_rL(unsigned long i) {
asm("sllg %0, %1, %2" : "=r" (i) : "r" (i), "L" (500000));
return i;
-// CHECK-LABEL: define i64 @test_rL(i64 %i)
+// CHECK-LABEL: define{{.*}} i64 @test_rL(i64 %i)
// CHECK: call i64 asm "sllg $0, $1, $2", "=r,r,L"(i64 %i, i32 500000)
}
void test_M() {
asm volatile("#FOO %0" :: "M"(0x7fffffff));
-// CHECK-LABEL: define void @test_M()
+// CHECK-LABEL: define{{.*}} void @test_M()
// CHECK: call void asm sideeffect "#FOO $0", "M"(i32 2147483647)
}
float test_f32(float f, float g) {
asm("aebr %0, %2" : "=f" (f) : "0" (f), "f" (g));
return f;
-// CHECK-LABEL: define float @test_f32(float %f, float %g)
+// CHECK-LABEL: define{{.*}} float @test_f32(float %f, float %g)
// CHECK: call float asm "aebr $0, $2", "=f,0,f"(float %f, float %g)
}
double test_f64(double f, double g) {
asm("adbr %0, %2" : "=f" (f) : "0" (f), "f" (g));
return f;
-// CHECK-LABEL: define double @test_f64(double %f, double %g)
+// CHECK-LABEL: define{{.*}} double @test_f64(double %f, double %g)
// CHECK: call double asm "adbr $0, $2", "=f,0,f"(double %f, double %g)
}
long double test_f128(long double f, long double g) {
asm("axbr %0, %2" : "=f" (f) : "0" (f), "f" (g));
return f;
-// CHECK: define void @test_f128(fp128* noalias nocapture sret(fp128) align 8 [[DEST:%.*]], fp128* nocapture readonly %0, fp128* nocapture readonly %1)
+// CHECK: define{{.*}} void @test_f128(fp128* noalias nocapture sret(fp128) align 8 [[DEST:%.*]], fp128* nocapture readonly %0, fp128* nocapture readonly %1)
// CHECK: %f = load fp128, fp128* %0
// CHECK: %g = load fp128, fp128* %1
// CHECK: [[RESULT:%.*]] = tail call fp128 asm "axbr $0, $2", "=f,0,f"(fp128 %f, fp128 %g)
// Test that there are no tied physreg uses. TwoAddress pass cannot deal with them.
int test_physregs(void) {
- // CHECK-LABEL: define signext i32 @test_physregs()
+ // CHECK-LABEL: define{{.*}} signext i32 @test_physregs()
register int l __asm__("r7") = 0;
// CHECK: call i32 asm "lr $0, $1", "={r7},{r7}"
volatile int cnt;
-// CHECK-LABEL: define void @test_assign() #0 {
+// CHECK-LABEL: define{{.*}} void @test_assign() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: store volatile <16 x i8> [[TMP0]], <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @uc2, align 8
fd = fd2;
}
-// CHECK-LABEL: define void @test_pos() #0 {
+// CHECK-LABEL: define{{.*}} void @test_pos() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: store volatile <16 x i8> [[TMP0]], <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @uc2, align 8
fd = +fd2;
}
-// CHECK-LABEL: define void @test_neg() #0 {
+// CHECK-LABEL: define{{.*}} void @test_neg() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[SUB:%.*]] = sub <16 x i8> zeroinitializer, [[TMP0]]
// CHECK: store volatile <16 x i8> [[SUB]], <16 x i8>* @sc, align 8
fd = -fd2;
}
-// CHECK-LABEL: define void @test_preinc() #0 {
+// CHECK-LABEL: define{{.*}} void @test_preinc() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[INC:%.*]] = add <16 x i8> [[TMP0]], <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
// CHECK: store volatile <16 x i8> [[INC]], <16 x i8>* @sc2, align 8
++fd2;
}
-// CHECK-LABEL: define void @test_postinc() #0 {
+// CHECK-LABEL: define{{.*}} void @test_postinc() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[INC:%.*]] = add <16 x i8> [[TMP0]], <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
// CHECK: store volatile <16 x i8> [[INC]], <16 x i8>* @sc2, align 8
fd2++;
}
-// CHECK-LABEL: define void @test_predec() #0 {
+// CHECK-LABEL: define{{.*}} void @test_predec() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[DEC:%.*]] = add <16 x i8> [[TMP0]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: store volatile <16 x i8> [[DEC]], <16 x i8>* @sc2, align 8
--fd2;
}
-// CHECK-LABEL: define void @test_postdec() #0 {
+// CHECK-LABEL: define{{.*}} void @test_postdec() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[DEC:%.*]] = add <16 x i8> [[TMP0]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: store volatile <16 x i8> [[DEC]], <16 x i8>* @sc2, align 8
fd2--;
}
-// CHECK-LABEL: define void @test_add() #0 {
+// CHECK-LABEL: define{{.*}} void @test_add() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[ADD:%.*]] = add <16 x i8> [[TMP0]], [[TMP1]]
fd = fd + fd2;
}
-// CHECK-LABEL: define void @test_add_assign() #0 {
+// CHECK-LABEL: define{{.*}} void @test_add_assign() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[ADD:%.*]] = add <16 x i8> [[TMP1]], [[TMP0]]
fd += fd2;
}
-// CHECK-LABEL: define void @test_sub() #0 {
+// CHECK-LABEL: define{{.*}} void @test_sub() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[SUB:%.*]] = sub <16 x i8> [[TMP0]], [[TMP1]]
fd = fd - fd2;
}
-// CHECK-LABEL: define void @test_sub_assign() #0 {
+// CHECK-LABEL: define{{.*}} void @test_sub_assign() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[SUB:%.*]] = sub <16 x i8> [[TMP1]], [[TMP0]]
fd -= fd2;
}
-// CHECK-LABEL: define void @test_mul() #0 {
+// CHECK-LABEL: define{{.*}} void @test_mul() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[MUL:%.*]] = mul <16 x i8> [[TMP0]], [[TMP1]]
fd = fd * fd2;
}
-// CHECK-LABEL: define void @test_mul_assign() #0 {
+// CHECK-LABEL: define{{.*}} void @test_mul_assign() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[MUL:%.*]] = mul <16 x i8> [[TMP1]], [[TMP0]]
fd *= fd2;
}
-// CHECK-LABEL: define void @test_div() #0 {
+// CHECK-LABEL: define{{.*}} void @test_div() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[DIV:%.*]] = sdiv <16 x i8> [[TMP0]], [[TMP1]]
fd = fd / fd2;
}
-// CHECK-LABEL: define void @test_div_assign() #0 {
+// CHECK-LABEL: define{{.*}} void @test_div_assign() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[DIV:%.*]] = sdiv <16 x i8> [[TMP1]], [[TMP0]]
fd /= fd2;
}
-// CHECK-LABEL: define void @test_rem() #0 {
+// CHECK-LABEL: define{{.*}} void @test_rem() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[REM:%.*]] = srem <16 x i8> [[TMP0]], [[TMP1]]
ul = ul % ul2;
}
-// CHECK-LABEL: define void @test_rem_assign() #0 {
+// CHECK-LABEL: define{{.*}} void @test_rem_assign() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[REM:%.*]] = srem <16 x i8> [[TMP1]], [[TMP0]]
ul %= ul2;
}
-// CHECK-LABEL: define void @test_not() #0 {
+// CHECK-LABEL: define{{.*}} void @test_not() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[NEG:%.*]] = xor <16 x i8> [[TMP0]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: store volatile <16 x i8> [[NEG]], <16 x i8>* @sc, align 8
bl = ~bl2;
}
-// CHECK-LABEL: define void @test_and() #0 {
+// CHECK-LABEL: define{{.*}} void @test_and() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[AND:%.*]] = and <16 x i8> [[TMP0]], [[TMP1]]
bl = bl & bl2;
}
-// CHECK-LABEL: define void @test_and_assign() #0 {
+// CHECK-LABEL: define{{.*}} void @test_and_assign() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[AND:%.*]] = and <16 x i8> [[TMP1]], [[TMP0]]
bl &= bl2;
}
-// CHECK-LABEL: define void @test_or() #0 {
+// CHECK-LABEL: define{{.*}} void @test_or() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[OR:%.*]] = or <16 x i8> [[TMP0]], [[TMP1]]
bl = bl | bl2;
}
-// CHECK-LABEL: define void @test_or_assign() #0 {
+// CHECK-LABEL: define{{.*}} void @test_or_assign() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[OR:%.*]] = or <16 x i8> [[TMP1]], [[TMP0]]
bl |= bl2;
}
-// CHECK-LABEL: define void @test_xor() #0 {
+// CHECK-LABEL: define{{.*}} void @test_xor() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[XOR:%.*]] = xor <16 x i8> [[TMP0]], [[TMP1]]
bl = bl ^ bl2;
}
-// CHECK-LABEL: define void @test_xor_assign() #0 {
+// CHECK-LABEL: define{{.*}} void @test_xor_assign() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[XOR:%.*]] = xor <16 x i8> [[TMP1]], [[TMP0]]
bl ^= bl2;
}
-// CHECK-LABEL: define void @test_sl() #0 {
+// CHECK-LABEL: define{{.*}} void @test_sl() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[SHL:%.*]] = shl <16 x i8> [[TMP0]], [[TMP1]]
ul = ul << 5;
}
-// CHECK-LABEL: define void @test_sl_assign() #0 {
+// CHECK-LABEL: define{{.*}} void @test_sl_assign() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[SHL:%.*]] = shl <16 x i8> [[TMP1]], [[TMP0]]
ul <<= 5;
}
-// CHECK-LABEL: define void @test_sr() #0 {
+// CHECK-LABEL: define{{.*}} void @test_sr() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[SHR:%.*]] = ashr <16 x i8> [[TMP0]], [[TMP1]]
ul = ul >> 5;
}
-// CHECK-LABEL: define void @test_sr_assign() #0 {
+// CHECK-LABEL: define{{.*}} void @test_sr_assign() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[SHR:%.*]] = ashr <16 x i8> [[TMP1]], [[TMP0]]
}
-// CHECK-LABEL: define void @test_cmpeq() #0 {
+// CHECK-LABEL: define{{.*}} void @test_cmpeq() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[CMP:%.*]] = icmp eq <16 x i8> [[TMP0]], [[TMP1]]
bl = fd == fd2;
}
-// CHECK-LABEL: define void @test_cmpne() #0 {
+// CHECK-LABEL: define{{.*}} void @test_cmpne() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[CMP:%.*]] = icmp ne <16 x i8> [[TMP0]], [[TMP1]]
bl = fd != fd2;
}
-// CHECK-LABEL: define void @test_cmpge() #0 {
+// CHECK-LABEL: define{{.*}} void @test_cmpge() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[CMP:%.*]] = icmp sge <16 x i8> [[TMP0]], [[TMP1]]
bl = fd >= fd2;
}
-// CHECK-LABEL: define void @test_cmpgt() #0 {
+// CHECK-LABEL: define{{.*}} void @test_cmpgt() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[CMP:%.*]] = icmp sgt <16 x i8> [[TMP0]], [[TMP1]]
bl = fd > fd2;
}
-// CHECK-LABEL: define void @test_cmple() #0 {
+// CHECK-LABEL: define{{.*}} void @test_cmple() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[CMP:%.*]] = icmp sle <16 x i8> [[TMP0]], [[TMP1]]
bl = fd <= fd2;
}
-// CHECK-LABEL: define void @test_cmplt() #0 {
+// CHECK-LABEL: define{{.*}} void @test_cmplt() #0 {
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
// CHECK: [[CMP:%.*]] = icmp slt <16 x i8> [[TMP0]], [[TMP1]]
#include <x86intrin.h>
__m64 test_m_pavgusb(__m64 m1, __m64 m2) {
- // PS4-LABEL: define i64 @test_m_pavgusb
- // GCC-LABEL: define double @test_m_pavgusb
+ // PS4-LABEL: define{{.*}} i64 @test_m_pavgusb
+ // GCC-LABEL: define{{.*}} double @test_m_pavgusb
// CHECK: @llvm.x86.3dnow.pavgusb
return _m_pavgusb(m1, m2);
}
__m64 test_m_pf2id(__m64 m) {
- // PS4-LABEL: define i64 @test_m_pf2id
- // GCC-LABEL: define double @test_m_pf2id
+ // PS4-LABEL: define{{.*}} i64 @test_m_pf2id
+ // GCC-LABEL: define{{.*}} double @test_m_pf2id
// CHECK: @llvm.x86.3dnow.pf2id
return _m_pf2id(m);
}
__m64 test_m_pfacc(__m64 m1, __m64 m2) {
- // PS4-LABEL: define i64 @test_m_pfacc
- // GCC-LABEL: define double @test_m_pfacc
+ // PS4-LABEL: define{{.*}} i64 @test_m_pfacc
+ // GCC-LABEL: define{{.*}} double @test_m_pfacc
// CHECK: @llvm.x86.3dnow.pfacc
return _m_pfacc(m1, m2);
}
__m64 test_m_pfadd(__m64 m1, __m64 m2) {
- // PS4-LABEL: define i64 @test_m_pfadd
- // GCC-LABEL: define double @test_m_pfadd
+ // PS4-LABEL: define{{.*}} i64 @test_m_pfadd
+ // GCC-LABEL: define{{.*}} double @test_m_pfadd
// CHECK: @llvm.x86.3dnow.pfadd
return _m_pfadd(m1, m2);
}
__m64 test_m_pfcmpeq(__m64 m1, __m64 m2) {
- // PS4-LABEL: define i64 @test_m_pfcmpeq
- // GCC-LABEL: define double @test_m_pfcmpeq
+ // PS4-LABEL: define{{.*}} i64 @test_m_pfcmpeq
+ // GCC-LABEL: define{{.*}} double @test_m_pfcmpeq
// CHECK: @llvm.x86.3dnow.pfcmpeq
return _m_pfcmpeq(m1, m2);
}
__m64 test_m_pfcmpge(__m64 m1, __m64 m2) {
- // PS4-LABEL: define i64 @test_m_pfcmpge
- // GCC-LABEL: define double @test_m_pfcmpge
+ // PS4-LABEL: define{{.*}} i64 @test_m_pfcmpge
+ // GCC-LABEL: define{{.*}} double @test_m_pfcmpge
// CHECK: @llvm.x86.3dnow.pfcmpge
return _m_pfcmpge(m1, m2);
}
__m64 test_m_pfcmpgt(__m64 m1, __m64 m2) {
- // PS4-LABEL: define i64 @test_m_pfcmpgt
- // GCC-LABEL: define double @test_m_pfcmpgt
+ // PS4-LABEL: define{{.*}} i64 @test_m_pfcmpgt
+ // GCC-LABEL: define{{.*}} double @test_m_pfcmpgt
// CHECK: @llvm.x86.3dnow.pfcmpgt
return _m_pfcmpgt(m1, m2);
}
__m64 test_m_pfmax(__m64 m1, __m64 m2) {
- // PS4-LABEL: define i64 @test_m_pfmax
- // GCC-LABEL: define double @test_m_pfmax
+ // PS4-LABEL: define{{.*}} i64 @test_m_pfmax
+ // GCC-LABEL: define{{.*}} double @test_m_pfmax
// CHECK: @llvm.x86.3dnow.pfmax
return _m_pfmax(m1, m2);
}
__m64 test_m_pfmin(__m64 m1, __m64 m2) {
- // PS4-LABEL: define i64 @test_m_pfmin
- // GCC-LABEL: define double @test_m_pfmin
+ // PS4-LABEL: define{{.*}} i64 @test_m_pfmin
+ // GCC-LABEL: define{{.*}} double @test_m_pfmin
// CHECK: @llvm.x86.3dnow.pfmin
return _m_pfmin(m1, m2);
}
__m64 test_m_pfmul(__m64 m1, __m64 m2) {
- // PS4-LABEL: define i64 @test_m_pfmul
- // GCC-LABEL: define double @test_m_pfmul
+ // PS4-LABEL: define{{.*}} i64 @test_m_pfmul
+ // GCC-LABEL: define{{.*}} double @test_m_pfmul
// CHECK: @llvm.x86.3dnow.pfmul
return _m_pfmul(m1, m2);
}
__m64 test_m_pfrcp(__m64 m) {
- // PS4-LABEL: define i64 @test_m_pfrcp
- // GCC-LABEL: define double @test_m_pfrcp
+ // PS4-LABEL: define{{.*}} i64 @test_m_pfrcp
+ // GCC-LABEL: define{{.*}} double @test_m_pfrcp
// CHECK: @llvm.x86.3dnow.pfrcp
return _m_pfrcp(m);
}
__m64 test_m_pfrcpit1(__m64 m1, __m64 m2) {
- // PS4-LABEL: define i64 @test_m_pfrcpit1
- // GCC-LABEL: define double @test_m_pfrcpit1
+ // PS4-LABEL: define{{.*}} i64 @test_m_pfrcpit1
+ // GCC-LABEL: define{{.*}} double @test_m_pfrcpit1
// CHECK: @llvm.x86.3dnow.pfrcpit1
return _m_pfrcpit1(m1, m2);
}
__m64 test_m_pfrcpit2(__m64 m1, __m64 m2) {
- // PS4-LABEL: define i64 @test_m_pfrcpit2
- // GCC-LABEL: define double @test_m_pfrcpit2
+ // PS4-LABEL: define{{.*}} i64 @test_m_pfrcpit2
+ // GCC-LABEL: define{{.*}} double @test_m_pfrcpit2
// CHECK: @llvm.x86.3dnow.pfrcpit2
return _m_pfrcpit2(m1, m2);
}
__m64 test_m_pfrsqrt(__m64 m) {
- // PS4-LABEL: define i64 @test_m_pfrsqrt
- // GCC-LABEL: define double @test_m_pfrsqrt
+ // PS4-LABEL: define{{.*}} i64 @test_m_pfrsqrt
+ // GCC-LABEL: define{{.*}} double @test_m_pfrsqrt
// CHECK: @llvm.x86.3dnow.pfrsqrt
return _m_pfrsqrt(m);
}
__m64 test_m_pfrsqrtit1(__m64 m1, __m64 m2) {
- // PS4-LABEL: define i64 @test_m_pfrsqrtit1
- // GCC-LABEL: define double @test_m_pfrsqrtit1
+ // PS4-LABEL: define{{.*}} i64 @test_m_pfrsqrtit1
+ // GCC-LABEL: define{{.*}} double @test_m_pfrsqrtit1
// CHECK: @llvm.x86.3dnow.pfrsqit1
return _m_pfrsqrtit1(m1, m2);
}
__m64 test_m_pfsub(__m64 m1, __m64 m2) {
- // PS4-LABEL: define i64 @test_m_pfsub
- // GCC-LABEL: define double @test_m_pfsub
+ // PS4-LABEL: define{{.*}} i64 @test_m_pfsub
+ // GCC-LABEL: define{{.*}} double @test_m_pfsub
// CHECK: @llvm.x86.3dnow.pfsub
return _m_pfsub(m1, m2);
}
__m64 test_m_pfsubr(__m64 m1, __m64 m2) {
- // PS4-LABEL: define i64 @test_m_pfsubr
- // GCC-LABEL: define double @test_m_pfsubr
+ // PS4-LABEL: define{{.*}} i64 @test_m_pfsubr
+ // GCC-LABEL: define{{.*}} double @test_m_pfsubr
// CHECK: @llvm.x86.3dnow.pfsubr
return _m_pfsubr(m1, m2);
}
__m64 test_m_pi2fd(__m64 m) {
- // PS4-LABEL: define i64 @test_m_pi2fd
- // GCC-LABEL: define double @test_m_pi2fd
+ // PS4-LABEL: define{{.*}} i64 @test_m_pi2fd
+ // GCC-LABEL: define{{.*}} double @test_m_pi2fd
// CHECK: @llvm.x86.3dnow.pi2fd
return _m_pi2fd(m);
}
__m64 test_m_pmulhrw(__m64 m1, __m64 m2) {
- // PS4-LABEL: define i64 @test_m_pmulhrw
- // GCC-LABEL: define double @test_m_pmulhrw
+ // PS4-LABEL: define{{.*}} i64 @test_m_pmulhrw
+ // GCC-LABEL: define{{.*}} double @test_m_pmulhrw
// CHECK: @llvm.x86.3dnow.pmulhrw
return _m_pmulhrw(m1, m2);
}
__m64 test_m_pf2iw(__m64 m) {
- // PS4-LABEL: define i64 @test_m_pf2iw
- // GCC-LABEL: define double @test_m_pf2iw
+ // PS4-LABEL: define{{.*}} i64 @test_m_pf2iw
+ // GCC-LABEL: define{{.*}} double @test_m_pf2iw
// CHECK: @llvm.x86.3dnowa.pf2iw
return _m_pf2iw(m);
}
__m64 test_m_pfnacc(__m64 m1, __m64 m2) {
- // PS4-LABEL: define i64 @test_m_pfnacc
- // GCC-LABEL: define double @test_m_pfnacc
+ // PS4-LABEL: define{{.*}} i64 @test_m_pfnacc
+ // GCC-LABEL: define{{.*}} double @test_m_pfnacc
// CHECK: @llvm.x86.3dnowa.pfnacc
return _m_pfnacc(m1, m2);
}
__m64 test_m_pfpnacc(__m64 m1, __m64 m2) {
- // PS4-LABEL: define i64 @test_m_pfpnacc
- // GCC-LABEL: define double @test_m_pfpnacc
+ // PS4-LABEL: define{{.*}} i64 @test_m_pfpnacc
+ // GCC-LABEL: define{{.*}} double @test_m_pfpnacc
// CHECK: @llvm.x86.3dnowa.pfpnacc
return _m_pfpnacc(m1, m2);
}
__m64 test_m_pi2fw(__m64 m) {
- // PS4-LABEL: define i64 @test_m_pi2fw
- // GCC-LABEL: define double @test_m_pi2fw
+ // PS4-LABEL: define{{.*}} i64 @test_m_pi2fw
+ // GCC-LABEL: define{{.*}} double @test_m_pi2fw
// CHECK: @llvm.x86.3dnowa.pi2fw
return _m_pi2fw(m);
}
__m64 test_m_pswapdsf(__m64 m) {
- // PS4-LABEL: define i64 @test_m_pswapdsf
- // GCC-LABEL: define double @test_m_pswapdsf
+ // PS4-LABEL: define{{.*}} i64 @test_m_pswapdsf
+ // GCC-LABEL: define{{.*}} double @test_m_pswapdsf
// CHECK: @llvm.x86.3dnowa.pswapd
return _m_pswapdsf(m);
}
__m64 test_m_pswapdsi(__m64 m) {
- // PS4-LABEL: define i64 @test_m_pswapdsi
- // GCC-LABEL: define double @test_m_pswapdsi
+ // PS4-LABEL: define{{.*}} i64 @test_m_pswapdsi
+ // GCC-LABEL: define{{.*}} double @test_m_pswapdsi
// CHECK: @llvm.x86.3dnowa.pswapd
return _m_pswapdsi(m);
}
extern void foo2(union M512 A);
union M256 m1;
union M512 m2;
-// CHECK-LABEL: define void @test()
+// CHECK-LABEL: define{{.*}} void @test()
// CHECK: call void @foo1(<4 x double>
// CHECK-LEGACY: call void @foo1(%union.M256* byval(%union.M256) align 32
// AVX: call void @foo2(%union.M512* byval(%union.M512) align 64
void test_m_prefetch(void *p) {
return _m_prefetch(p);
- // CHECK-LABEL: define void @test_m_prefetch
+ // CHECK-LABEL: define{{.*}} void @test_m_prefetch
// CHECK: call void @llvm.prefetch.p0i8({{.*}}, i32 0, i32 3, i32 1)
}
void test_m_prefetch_w(void *p) {
return _m_prefetchw(p);
- // CHECK-LABEL: define void @test_m_prefetch_w
+ // CHECK-LABEL: define{{.*}} void @test_m_prefetch_w
// CHECK: call void @llvm.prefetch.p0i8({{.*}}, i32 1, i32 3, i32 1)
}
typedef long long __m256i __attribute__ ((vector_size (32)));
typedef long long __m512i __attribute__ ((vector_size (64)));
-// CHECK: define <2 x i64> @testXMMout(<2 x i64>* %p) #0
+// CHECK: define{{.*}} <2 x i64> @testXMMout(<2 x i64>* %p) #0
__m128i testXMMout(__m128i *p) {
__m128i xmm0;
__asm__("vmovdqu %1, %0" :"=v"(xmm0) : "m"(*(__m128i*)p));
return xmm0;
}
-// CHECK: define <4 x i64> @testYMMout(<4 x i64>* %p) #1
+// CHECK: define{{.*}} <4 x i64> @testYMMout(<4 x i64>* %p) #1
__m256i testYMMout(__m256i *p) {
__m256i ymm0;
__asm__("vmovdqu %1, %0" :"=v"(ymm0) : "m"(*(__m256i*)p));
return ymm0;
}
-// CHECK: define <8 x i64> @testZMMout(<8 x i64>* %p) #2
+// CHECK: define{{.*}} <8 x i64> @testZMMout(<8 x i64>* %p) #2
__m512i testZMMout(__m512i *p) {
__m512i zmm0;
__asm__("vmovdqu64 %1, %0" :"=v"(zmm0) : "m"(*(__m512i*)p));
return zmm0;
}
-// CHECK: define void @testXMMin(<2 x i64> %xmm0, <2 x i64>* %p) #0
+// CHECK: define{{.*}} void @testXMMin(<2 x i64> %xmm0, <2 x i64>* %p) #0
void testXMMin(__m128i xmm0, __m128i *p) {
__asm__("vmovdqu %0, %1" : : "v"(xmm0), "m"(*(__m128i*)p));
}
-// CHECK: define void @testYMMin(<4 x i64> %ymm0, <4 x i64>* %p) #1
+// CHECK: define{{.*}} void @testYMMin(<4 x i64> %ymm0, <4 x i64>* %p) #1
void testYMMin(__m256i ymm0, __m256i *p) {
__asm__("vmovdqu %0, %1" : : "v"(ymm0), "m"(*(__m256i*)p));
}
-// CHECK: define void @testZMMin(<8 x i64> %zmm0, <8 x i64>* %p) #2
+// CHECK: define{{.*}} void @testZMMin(<8 x i64> %zmm0, <8 x i64>* %p) #2
void testZMMin(__m512i zmm0, __m512i *p) {
__asm__("vmovdqu64 %0, %1" : : "v"(zmm0), "m"(*(__m512i*)p));
}
// RUN: %clang_cc1 -triple i386-unknown-unknown -mregparm 3 -emit-llvm %s -o - | FileCheck %s -check-prefix=HARD
// RUN: %clang_cc1 -triple i386-unknown-unknown -mregparm 3 -mfloat-abi soft -emit-llvm %s -o - | FileCheck %s -check-prefix=SOFT
-// HARD: define void @f1(float %a)
-// SOFT: define void @f1(float inreg %a)
+// HARD: define{{.*}} void @f1(float %a)
+// SOFT: define{{.*}} void @f1(float inreg %a)
void f1(float a) {}
// RUN: %clang_cc1 -w -triple i386-pc-elfiamcu -mfloat-abi soft -emit-llvm -o - %s | FileCheck %s
-// CHECK-LABEL: define void @ints(i32 %a, i32 %b, i32 %c, i32 %d)
+// CHECK-LABEL: define{{.*}} void @ints(i32 %a, i32 %b, i32 %c, i32 %d)
void ints(int a, int b, int c, int d) {}
-// CHECK-LABEL: define void @floats(float %a, float %b, float %c, float %d)
+// CHECK-LABEL: define{{.*}} void @floats(float %a, float %b, float %c, float %d)
void floats(float a, float b, float c, float d) {}
-// CHECK-LABEL: define void @mixed(i32 %a, float %b, i32 %c, float %d)
+// CHECK-LABEL: define{{.*}} void @mixed(i32 %a, float %b, i32 %c, float %d)
void mixed(int a, float b, int c, float d) {}
-// CHECK-LABEL: define void @doubles(double %d1, double %d2)
+// CHECK-LABEL: define{{.*}} void @doubles(double %d1, double %d2)
void doubles(double d1, double d2) {}
-// CHECK-LABEL: define void @mixedDoubles(i32 %a, double %d1)
+// CHECK-LABEL: define{{.*}} void @mixedDoubles(i32 %a, double %d1)
void mixedDoubles(int a, double d1) {}
typedef struct st3_t {
int c;
} st12_t;
-// CHECK-LABEL: define void @smallStructs(i32 %st1.coerce, i32 %st2.coerce, i32 %st3.coerce)
+// CHECK-LABEL: define{{.*}} void @smallStructs(i32 %st1.coerce, i32 %st2.coerce, i32 %st3.coerce)
void smallStructs(st4_t st1, st4_t st2, st4_t st3) {}
-// CHECK-LABEL: define void @paddedStruct(i32 %i1, i32 %st.coerce0, i32 %st.coerce1, i32 %st4.0)
+// CHECK-LABEL: define{{.*}} void @paddedStruct(i32 %i1, i32 %st.coerce0, i32 %st.coerce1, i32 %st4.0)
void paddedStruct(int i1, st5_t st, st4_t st4) {}
-// CHECK-LABEL: define void @largeStructBegin(%struct.st12_t* byval(%struct.st12_t) align 4 %st)
+// CHECK-LABEL: define{{.*}} void @largeStructBegin(%struct.st12_t* byval(%struct.st12_t) align 4 %st)
void largeStructBegin(st12_t st) {}
-// CHECK-LABEL: define void @largeStructMiddle(i32 %i1, %struct.st12_t* byval(%struct.st12_t) align 4 %st, i32 %i2, i32 %i3)
+// CHECK-LABEL: define{{.*}} void @largeStructMiddle(i32 %i1, %struct.st12_t* byval(%struct.st12_t) align 4 %st, i32 %i2, i32 %i3)
void largeStructMiddle(int i1, st12_t st, int i2, int i3) {}
-// CHECK-LABEL: define void @largeStructEnd(i32 %i1, i32 %i2, i32 %i3, i32 %st.0, i32 %st.1, i32 %st.2)
+// CHECK-LABEL: define{{.*}} void @largeStructEnd(i32 %i1, i32 %i2, i32 %i3, i32 %st.0, i32 %st.1, i32 %st.2)
void largeStructEnd(int i1, int i2, int i3, st12_t st) {}
-// CHECK-LABEL: define i24 @retNonPow2Struct(i32 %r.coerce)
+// CHECK-LABEL: define{{.*}} i24 @retNonPow2Struct(i32 %r.coerce)
st3_t retNonPow2Struct(st3_t r) { return r; }
-// CHECK-LABEL: define i32 @retSmallStruct(i32 %r.coerce)
+// CHECK-LABEL: define{{.*}} i32 @retSmallStruct(i32 %r.coerce)
st4_t retSmallStruct(st4_t r) { return r; }
-// CHECK-LABEL: define i64 @retPaddedStruct(i32 %r.coerce0, i32 %r.coerce1)
+// CHECK-LABEL: define{{.*}} i64 @retPaddedStruct(i32 %r.coerce0, i32 %r.coerce1)
st5_t retPaddedStruct(st5_t r) { return r; }
-// CHECK-LABEL: define void @retLargeStruct(%struct.st12_t* noalias sret(%struct.st12_t) align 4 %agg.result, i32 %i1, %struct.st12_t* byval(%struct.st12_t) align 4 %r)
+// CHECK-LABEL: define{{.*}} void @retLargeStruct(%struct.st12_t* noalias sret(%struct.st12_t) align 4 %agg.result, i32 %i1, %struct.st12_t* byval(%struct.st12_t) align 4 %r)
st12_t retLargeStruct(int i1, st12_t r) { return r; }
-// CHECK-LABEL: define i32 @varArgs(i32 %i1, ...)
+// CHECK-LABEL: define{{.*}} i32 @varArgs(i32 %i1, ...)
int varArgs(int i1, ...) { return i1; }
-// CHECK-LABEL: define double @longDoubleArg(double %ld1)
+// CHECK-LABEL: define{{.*}} double @longDoubleArg(double %ld1)
long double longDoubleArg(long double ld1) { return ld1; }
// RUN: %clang_cc1 -w -fblocks -triple i386-pc-linux-gnu -target-cpu pentium4 -emit-llvm -o %t %s
// RUN: FileCheck < %t %s
-// CHECK-LABEL: define void @f56(
+// CHECK-LABEL: define{{.*}} void @f56(
// CHECK: i8 signext %a0, %struct.s56_0* byval(%struct.s56_0) align 4 %a1,
// CHECK: i64 %a2.coerce, %struct.s56_1* byval(%struct.s56_1) align 4 %0,
// CHECK: <1 x double> %a4, %struct.s56_2* byval(%struct.s56_2) align 4 %1,
// no-mmx should put mmx into memory
typedef int __attribute__((vector_size (8))) i32v2;
int a(i32v2 x) { return x[0]; }
-// CHECK-LABEL: define i32 @a(i64 %x.coerce)
+// CHECK-LABEL: define{{.*}} i32 @a(i64 %x.coerce)
// but SSE2 vectors should still go into an SSE2 register
typedef int __attribute__((vector_size (16))) i32v4;
int b(i32v4 x) { return x[0]; }
-// CHECK-LABEL: define i32 @b(<4 x i32> %x)
+// CHECK-LABEL: define{{.*}} i32 @b(<4 x i32> %x)
union PP_VarValue value;
};
-// CHECK: define { i64, i64 } @f0()
+// CHECK: define{{.*}} { i64, i64 } @f0()
struct PP_Var f0() {
struct PP_Var result = { 0, 0, 0 };
return result;
}
-// CHECK-LABEL: define void @f1(i64 %p1.coerce0, i64 %p1.coerce1)
+// CHECK-LABEL: define{{.*}} void @f1(i64 %p1.coerce0, i64 %p1.coerce1)
void f1(struct PP_Var p1) { while(1) {} }
// long doubles are 64 bits on NaCl
-// CHECK-LABEL: define double @f5()
+// CHECK-LABEL: define{{.*}} double @f5()
long double f5(void) {
return 0;
}
-// CHECK-LABEL: define void @f6(i8 signext %a0, i16 signext %a1, i32 %a2, i64 %a3, i8* %a4)
+// CHECK-LABEL: define{{.*}} void @f6(i8 signext %a0, i16 signext %a1, i32 %a2, i64 %a3, i8* %a4)
void f6(char a0, short a1, int a2, long long a3, void *a4) {
}
-// CHECK-LABEL: define i64 @f8_1()
-// CHECK-LABEL: define void @f8_2(i64 %a0.coerce)
+// CHECK-LABEL: define{{.*}} i64 @f8_1()
+// CHECK-LABEL: define{{.*}} void @f8_2(i64 %a0.coerce)
union u8 {
long double a;
int b;
union u8 f8_1() { while (1) {} }
void f8_2(union u8 a0) {}
-// CHECK-LABEL: define i64 @f9()
+// CHECK-LABEL: define{{.*}} i64 @f9()
struct s9 { int a; int b; int : 0; } f9(void) { while (1) {} }
-// CHECK-LABEL: define void @f10(i64 %a0.coerce)
+// CHECK-LABEL: define{{.*}} void @f10(i64 %a0.coerce)
struct s10 { int a; int b; int : 0; };
void f10(struct s10 a0) {}
-// CHECK-LABEL: define double @f11()
+// CHECK-LABEL: define{{.*}} double @f11()
union { long double a; float b; } f11() { while (1) {} }
-// CHECK-LABEL: define i32 @f12_0()
-// CHECK-LABEL: define void @f12_1(i32 %a0.coerce)
+// CHECK-LABEL: define{{.*}} i32 @f12_0()
+// CHECK-LABEL: define{{.*}} void @f12_1(i32 %a0.coerce)
struct s12 { int a __attribute__((aligned(16))); };
struct s12 f12_0(void) { while (1) {} }
void f12_1(struct s12 a0) {}
// Check that sret parameter is accounted for when checking available integer
// registers.
-// CHECK: define void @f13(%struct.s13_0* noalias sret(%struct.s13_0) align 8 %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* byval({{.*}}) align 8 %e, i32 %f)
+// CHECK: define{{.*}} void @f13(%struct.s13_0* noalias sret(%struct.s13_0) align 8 %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* byval({{.*}}) align 8 %e, i32 %f)
struct s13_0 { long long f0[3]; };
struct s13_1 { long long f0[2]; };
struct s13_0 f13(int a, int b, int c, int d,
struct s13_1 e, int f) { while (1) {} }
-// CHECK-LABEL: define void @f20(%struct.s20* byval(%struct.s20) align 32 %x)
+// CHECK-LABEL: define{{.*}} void @f20(%struct.s20* byval(%struct.s20) align 32 %x)
struct __attribute__((aligned(32))) s20 {
int x;
int y;
// RUN: FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX512
#include <stdarg.h>
-// CHECK-LABEL: define signext i8 @f0()
+// CHECK-LABEL: define{{.*}} signext i8 @f0()
char f0(void) {
return 0;
}
-// CHECK-LABEL: define signext i16 @f1()
+// CHECK-LABEL: define{{.*}} signext i16 @f1()
short f1(void) {
return 0;
}
-// CHECK-LABEL: define i32 @f2()
+// CHECK-LABEL: define{{.*}} i32 @f2()
int f2(void) {
return 0;
}
-// CHECK-LABEL: define float @f3()
+// CHECK-LABEL: define{{.*}} float @f3()
float f3(void) {
return 0;
}
-// CHECK-LABEL: define double @f4()
+// CHECK-LABEL: define{{.*}} double @f4()
double f4(void) {
return 0;
}
-// CHECK-LABEL: define x86_fp80 @f5()
+// CHECK-LABEL: define{{.*}} x86_fp80 @f5()
long double f5(void) {
return 0;
}
-// CHECK-LABEL: define void @f6(i8 signext %a0, i16 signext %a1, i32 %a2, i64 %a3, i8* %a4)
+// CHECK-LABEL: define{{.*}} void @f6(i8 signext %a0, i16 signext %a1, i32 %a2, i64 %a3, i8* %a4)
void f6(char a0, short a1, int a2, long long a3, void *a4) {
}
-// CHECK-LABEL: define void @f7(i32 %a0)
+// CHECK-LABEL: define{{.*}} void @f7(i32 %a0)
typedef enum { A, B, C } e7;
void f7(e7 a0) {
}
// Test merging/passing of upper eightbyte with X87 class.
//
-// CHECK-LABEL: define void @f8_1(%union.u8* noalias sret(%union.u8) align 16 %agg.result)
-// CHECK-LABEL: define void @f8_2(%union.u8* byval(%union.u8) align 16 %a0)
+// CHECK-LABEL: define{{.*}} void @f8_1(%union.u8* noalias sret(%union.u8) align 16 %agg.result)
+// CHECK-LABEL: define{{.*}} void @f8_2(%union.u8* byval(%union.u8) align 16 %a0)
union u8 {
long double a;
int b;
union u8 f8_1() { while (1) {} }
void f8_2(union u8 a0) {}
-// CHECK-LABEL: define i64 @f9()
+// CHECK-LABEL: define{{.*}} i64 @f9()
struct s9 { int a; int b; int : 0; } f9(void) { while (1) {} }
-// CHECK-LABEL: define void @f10(i64 %a0.coerce)
+// CHECK-LABEL: define{{.*}} void @f10(i64 %a0.coerce)
struct s10 { int a; int b; int : 0; };
void f10(struct s10 a0) {}
-// CHECK-LABEL: define void @f11(%union.anon* noalias sret(%union.anon) align 16 %agg.result)
+// CHECK-LABEL: define{{.*}} void @f11(%union.anon* noalias sret(%union.anon) align 16 %agg.result)
union { long double a; float b; } f11() { while (1) {} }
-// CHECK-LABEL: define i32 @f12_0()
-// CHECK-LABEL: define void @f12_1(i32 %a0.coerce)
+// CHECK-LABEL: define{{.*}} i32 @f12_0()
+// CHECK-LABEL: define{{.*}} void @f12_1(i32 %a0.coerce)
struct s12 { int a __attribute__((aligned(16))); };
struct s12 f12_0(void) { while (1) {} }
void f12_1(struct s12 a0) {}
// Check that sret parameter is accounted for when checking available integer
// registers.
-// CHECK: define void @f13(%struct.s13_0* noalias sret(%struct.s13_0) align 8 %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* byval({{.*}}) align 8 %e, i32 %f)
+// CHECK: define{{.*}} void @f13(%struct.s13_0* noalias sret(%struct.s13_0) align 8 %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* byval({{.*}}) align 8 %e, i32 %f)
struct s13_0 { long long f0[3]; };
struct s13_1 { long long f0[2]; };
struct s13_0 f13(int a, int b, int c, int d,
struct s13_1 e, int f) { while (1) {} }
-// CHECK: define void @f14({{.*}}, i8 signext %X)
+// CHECK: define{{.*}} void @f14({{.*}}, i8 signext %X)
void f14(int a, int b, int c, int d, int e, int f, char X) {}
-// CHECK: define void @f15({{.*}}, i8* %X)
+// CHECK: define{{.*}} void @f15({{.*}}, i8* %X)
void f15(int a, int b, int c, int d, int e, int f, void *X) {}
-// CHECK: define void @f16({{.*}}, float %X)
+// CHECK: define{{.*}} void @f16({{.*}}, float %X)
void f16(float a, float b, float c, float d, float e, float f, float g, float h,
float X) {}
-// CHECK: define void @f17({{.*}}, x86_fp80 %X)
+// CHECK: define{{.*}} void @f17({{.*}}, x86_fp80 %X)
void f17(float a, float b, float c, float d, float e, float f, float g, float h,
long double X) {}
// Check for valid coercion. The struct should be passed/returned as i32, not
// as i64 for better code quality.
// rdar://8135035
-// CHECK-LABEL: define void @f18(i32 %a, i32 %f18_arg1.coerce)
+// CHECK-LABEL: define{{.*}} void @f18(i32 %a, i32 %f18_arg1.coerce)
struct f18_s0 { int f0; };
void f18(int a, struct f18_s0 f18_arg1) { while (1) {} }
// Check byval alignment.
-// CHECK-LABEL: define void @f19(%struct.s19* byval(%struct.s19) align 16 %x)
+// CHECK-LABEL: define{{.*}} void @f19(%struct.s19* byval(%struct.s19) align 16 %x)
struct s19 {
long double a;
};
void f19(struct s19 x) {}
-// CHECK-LABEL: define void @f20(%struct.s20* byval(%struct.s20) align 32 %x)
+// CHECK-LABEL: define{{.*}} void @f20(%struct.s20* byval(%struct.s20) align 32 %x)
struct __attribute__((aligned(32))) s20 {
int x;
int y;
};
// rdar://7375902
-// CHECK-LABEL: define i8* @f21(i64 %S.coerce0, i8* %S.coerce1)
+// CHECK-LABEL: define{{.*}} i8* @f21(i64 %S.coerce0, i8* %S.coerce1)
const char *f21(struct StringRef S) { return S.x+S.Ptr; }
// PR7567
void f23(int A, struct f23S B) {
- // CHECK-LABEL: define void @f23(i32 %A, i64 %B.coerce0, i32 %B.coerce1)
+ // CHECK-LABEL: define{{.*}} void @f23(i32 %A, i64 %B.coerce0, i32 %B.coerce1)
}
struct f24s { long a; int b; };
struct f23S f24(struct f23S *X, struct f24s *P2) {
return *X;
- // CHECK: define { i64, i32 } @f24(%struct.f23S* %X, %struct.f24s* %P2)
+ // CHECK: define{{.*}} { i64, i32 } @f24(%struct.f23S* %X, %struct.f24s* %P2)
}
// rdar://8248065
typedef float v4f32 __attribute__((__vector_size__(16)));
v4f32 f25(v4f32 X) {
- // CHECK-LABEL: define <4 x float> @f25(<4 x float> %X)
+ // CHECK-LABEL: define{{.*}} <4 x float> @f25(<4 x float> %X)
// CHECK-NOT: alloca
// CHECK: alloca <4 x float>
// CHECK-NOT: alloca
};
struct foo26 f26(struct foo26 *P) {
- // CHECK: define { i32*, float* } @f26(%struct.foo26* %P)
+ // CHECK: define{{.*}} { i32*, float* } @f26(%struct.foo26* %P)
return *P;
}
};
struct v4f32wrapper f27(struct v4f32wrapper X) {
- // CHECK-LABEL: define <4 x float> @f27(<4 x float> %X.coerce)
+ // CHECK-LABEL: define{{.*}} <4 x float> @f27(<4 x float> %X.coerce)
return X;
}
};
struct v8f32wrapper f27a(struct v8f32wrapper X) {
- // AVX-LABEL: define <8 x float> @f27a(<8 x float> %X.coerce)
+ // AVX-LABEL: define{{.*}} <8 x float> @f27a(<8 x float> %X.coerce)
return X;
}
};
struct v8f32wrapper_wrapper f27b(struct v8f32wrapper_wrapper X) {
- // AVX-LABEL: define <8 x float> @f27b(<8 x float> %X.coerce)
+ // AVX-LABEL: define{{.*}} <8 x float> @f27b(<8 x float> %X.coerce)
return X;
}
int y;
};
void f28(struct f28c C) {
- // CHECK-LABEL: define void @f28(double %C.coerce0, i32 %C.coerce1)
+ // CHECK-LABEL: define{{.*}} void @f28(double %C.coerce0, i32 %C.coerce1)
}
struct f29a {
};
void f29a(struct f29a A) {
- // CHECK-LABEL: define void @f29a(double %A.coerce0, i32 %A.coerce1)
+ // CHECK-LABEL: define{{.*}} void @f29a(double %A.coerce0, i32 %A.coerce1)
}
// rdar://8249586
struct S0 { char f0[8]; char f2; char f3; char f4; };
void f30(struct S0 p_4) {
- // CHECK-LABEL: define void @f30(i64 %p_4.coerce0, i24 %p_4.coerce1)
+ // CHECK-LABEL: define{{.*}} void @f30(i64 %p_4.coerce0, i24 %p_4.coerce1)
}
// Pass the third element as a float when followed by tail padding.
// rdar://8251384
struct f31foo { float a, b, c; };
float f31(struct f31foo X) {
- // CHECK-LABEL: define float @f31(<2 x float> %X.coerce0, float %X.coerce1)
+ // CHECK-LABEL: define{{.*}} float @f31(<2 x float> %X.coerce0, float %X.coerce1)
return X.c;
}
_Complex float f32(_Complex float A, _Complex float B) {
// rdar://6379669
- // CHECK-LABEL: define <2 x float> @f32(<2 x float> %A.coerce, <2 x float> %B.coerce)
+ // CHECK-LABEL: define{{.*}} <2 x float> @f32(<2 x float> %A.coerce, <2 x float> %B.coerce)
return A+B;
}
typedef unsigned long long v1i64 __attribute__((__vector_size__(8)));
// rdar://8359248
-// CHECK-LABEL: define double @f34(double %arg.coerce)
+// CHECK-LABEL: define{{.*}} double @f34(double %arg.coerce)
v1i64 f34(v1i64 arg) { return arg; }
// rdar://8358475
-// CHECK-LABEL: define double @f35(double %arg.coerce)
+// CHECK-LABEL: define{{.*}} double @f35(double %arg.coerce)
typedef unsigned long v1i64_2 __attribute__((__vector_size__(8)));
v1i64_2 f35(v1i64_2 arg) { return arg+arg; }
func(ss);
}
-// CHECK-LABEL: define double @f36(double %arg.coerce)
+// CHECK-LABEL: define{{.*}} double @f36(double %arg.coerce)
typedef unsigned v2i32 __attribute((__vector_size__(8)));
v2i32 f36(v2i32 arg) { return arg; }
func42(s);
}
-// CHECK-LABEL: define i32 @f44
+// CHECK-LABEL: define{{.*}} i32 @f44
// CHECK: ptrtoint
// CHECK-NEXT: add i64 %{{[0-9]+}}, 31
// CHECK-NEXT: and i64 %{{[0-9]+}}, -32
}
// Text that vec3 returns the correct LLVM IR type.
-// AVX-LABEL: define i32 @foo(<3 x i64> %X)
+// AVX-LABEL: define{{.*}} i32 @foo(<3 x i64> %X)
typedef long long3 __attribute((ext_vector_type(3)));
int foo(long3 X)
{
void test49(double d, double e) {
test49_helper(d, e);
}
-// CHECK-LABEL: define void @test49(
+// CHECK-LABEL: define{{.*}} void @test49(
// CHECK: [[T0:%.*]] = load double, double*
// CHECK-NEXT: [[T1:%.*]] = load double, double*
// CHECK-NEXT: call void (double, ...) @test49_helper(double [[T0]], double [[T1]])
void test50(double d, double e) {
test50_helper(d, e);
}
-// CHECK-LABEL: define void @test50(
+// CHECK-LABEL: define{{.*}} void @test50(
// CHECK: [[T0:%.*]] = load double, double*
// CHECK-NEXT: [[T1:%.*]] = load double, double*
// CHECK-NEXT: call void (double, double, ...) bitcast (void (...)* @test50_helper to void (double, double, ...)*)(double [[T0]], double [[T1]])
*s = __builtin_va_arg(argList, struct test51_s);
}
-// CHECK-LABEL: define void @test51
+// CHECK-LABEL: define{{.*}} void @test51
// CHECK: [[TMP_ADDR:%.*]] = alloca [[STRUCT_TEST51:%.*]], align 16
// CHECK: br i1
// CHECK: [[REG_SAVE_AREA_PTR:%.*]] = getelementptr inbounds {{.*}}, i32 0, i32 3
void test53(__m256 *m, __builtin_va_list argList) {
*m = __builtin_va_arg(argList, __m256);
}
-// AVX-LABEL: define void @test53
+// AVX-LABEL: define{{.*}} void @test53
// AVX-NOT: br i1
// AVX: ret void
// Like for __m256 on AVX, we always pass __m512 in memory, and don't
// need to use the register save area.
//
-// AVX512-LABEL: define void @f63
+// AVX512-LABEL: define{{.*}} void @f63
// AVX512-NOT: br i1
// AVX512: ret void
void f63(__m512 *m, __builtin_va_list argList) {
vec3f vec = __builtin_va_arg(ap, vec3f);
return vec.x + vec.y + vec.z;
}
-// CHECK: define double @Vec3FTest
+// CHECK: define{{.*}} double @Vec3FTest
// CHECK: vaarg.in_reg:
// CHECK: [[Vec3FLoad1:%.*]] = load <2 x float>, <2 x float>*
// CHECK: [[Vec3FGEP1:%.*]] = getelementptr inbounds { <2 x float>, float }, { <2 x float>, float }* {{%.*}}, i32 0, i32 0
vec4f vec = __builtin_va_arg(ap, vec4f);
return vec.x + vec.y + vec.z + vec.q;
}
-// CHECK: define double @Vec4FTest
+// CHECK: define{{.*}} double @Vec4FTest
// CHECK: vaarg.in_reg:
// CHECK: [[Vec4FLoad1:%.*]] = load <2 x float>, <2 x float>*
// CHECK: [[Vec4FGEP1:%.*]] = getelementptr inbounds { <2 x float>, <2 x float> }, { <2 x float>, <2 x float> }* {{%.*}}, i32 0, i32 0
vec2d vec = __builtin_va_arg(ap, vec2d);
return vec.x + vec.y;
}
-// CHECK: define double @Vec2DTest
+// CHECK: define{{.*}} double @Vec2DTest
// CHECK: vaarg.in_reg:
// CHECK: [[Vec2DLoad1:%.*]] = load double, double*
// CHECK: [[Vec2DGEP1:%.*]] = getelementptr inbounds { double, double }, { double, double }* {{%.*}}, i32 0, i32 0
vec2f1d vec = __builtin_va_arg(ap, vec2f1d);
return vec.x + vec.y + vec.z;
}
-// CHECK: define double @Vec2F1DTest
+// CHECK: define{{.*}} double @Vec2F1DTest
// CHECK: vaarg.in_reg:
// CHECK: [[Vec2F1DLoad1:%.*]] = load <2 x float>, <2 x float>*
// CHECK: [[Vec2F1DGEP1:%.*]] = getelementptr inbounds { <2 x float>, double }, { <2 x float>, double }* {{%.*}}, i32 0, i32 0
vec1d2f vec = __builtin_va_arg(ap, vec1d2f);
return vec.x + vec.y + vec.z;
}
-// CHECK: define double @Vec1D2FTest
+// CHECK: define{{.*}} double @Vec1D2FTest
// CHECK: vaarg.in_reg:
// CHECK: [[Vec1D2FLoad1:%.*]] = load double, double*
// CHECK: [[Vec1D2FGEP1:%.*]] = getelementptr inbounds { double, <2 x float> }, { double, <2 x float> }* {{%.*}}, i32 0, i32 0
vec1f1d vec = __builtin_va_arg(ap, vec1f1d);
return vec.x + vec.z;
}
-// CHECK: define double @Vec1F1DTest
+// CHECK: define{{.*}} double @Vec1F1DTest
// CHECK: vaarg.in_reg:
// CHECK: [[Vec1F1DLoad1:%.*]] = load float, float*
// CHECK: [[Vec1F1DGEP1:%.*]] = getelementptr inbounds { float, double }, { float, double }* {{%.*}}, i32 0, i32 0
vec1d1f vec = __builtin_va_arg(ap, vec1d1f);
return vec.x + vec.z;
}
-// CHECK: define double @Vec1D1FTest
+// CHECK: define{{.*}} double @Vec1D1FTest
// CHECK: vaarg.in_reg:
// CHECK: [[Vec1D1FLoad1:%.*]] = load double, double*
// CHECK: [[Vec1D1FGEP1:%.*]] = getelementptr inbounds { double, float }, { double, float }* {{%.*}}, i32 0, i32 0
// Android uses fp128 for long double but other x86_64 targets use x86_fp80.
long double dataLD = 1.0L;
-// ANDROID: @dataLD = local_unnamed_addr global fp128 0xL00000000000000003FFF000000000000, align 16
-// GNU: @dataLD = local_unnamed_addr global x86_fp80 0xK3FFF8000000000000000, align 16
+// ANDROID: @dataLD ={{.*}} local_unnamed_addr global fp128 0xL00000000000000003FFF000000000000, align 16
+// GNU: @dataLD ={{.*}} local_unnamed_addr global x86_fp80 0xK3FFF8000000000000000, align 16
long double _Complex dataLDC = {1.0L, 1.0L};
-// ANDROID: @dataLDC = local_unnamed_addr global { fp128, fp128 } { fp128 0xL00000000000000003FFF000000000000, fp128 0xL00000000000000003FFF000000000000 }, align 16
-// GNU: @dataLDC = local_unnamed_addr global { x86_fp80, x86_fp80 } { x86_fp80 0xK3FFF8000000000000000, x86_fp80 0xK3FFF8000000000000000 }, align 16
+// ANDROID: @dataLDC ={{.*}} local_unnamed_addr global { fp128, fp128 } { fp128 0xL00000000000000003FFF000000000000, fp128 0xL00000000000000003FFF000000000000 }, align 16
+// GNU: @dataLDC ={{.*}} local_unnamed_addr global { x86_fp80, x86_fp80 } { x86_fp80 0xK3FFF8000000000000000, x86_fp80 0xK3FFF8000000000000000 }, align 16
long double TestLD(long double x) {
return x * x;
-// ANDROID: define fp128 @TestLD(fp128 %x)
-// GNU: define x86_fp80 @TestLD(x86_fp80 %x)
-// NACL: define double @TestLD(double %x)
+// ANDROID: define{{.*}} fp128 @TestLD(fp128 %x)
+// GNU: define{{.*}} x86_fp80 @TestLD(x86_fp80 %x)
+// NACL: define{{.*}} double @TestLD(double %x)
}
long double _Complex TestLDC(long double _Complex x) {
return x * x;
-// ANDROID: define void @TestLDC({ fp128, fp128 }* {{.*}}, { fp128, fp128 }* {{.*}} %x)
-// GNU: define { x86_fp80, x86_fp80 } @TestLDC({ x86_fp80, x86_fp80 }* {{.*}} %x)
-// NACL: define { double, double } @TestLDC(double %x{{.*}}, double %x{{.*}})
+// ANDROID: define{{.*}} void @TestLDC({ fp128, fp128 }* {{.*}}, { fp128, fp128 }* {{.*}} %x)
+// GNU: define{{.*}} { x86_fp80, x86_fp80 } @TestLDC({ x86_fp80, x86_fp80 }* {{.*}} %x)
+// NACL: define{{.*}} { double, double } @TestLDC(double %x{{.*}}, double %x{{.*}})
}
typedef __builtin_va_list va_list;
int TestGetVarInt(va_list ap) {
return __builtin_va_arg(ap, int);
// Since int can be passed in memory or register there are two branches.
-// CHECK: define i32 @TestGetVarInt(
+// CHECK: define{{.*}} i32 @TestGetVarInt(
// CHECK: br label
// CHECK: br label
// CHECK: = phi
double TestGetVarDouble(va_list ap) {
return __builtin_va_arg(ap, double);
// Since double can be passed in memory or register there are two branches.
-// CHECK: define double @TestGetVarDouble(
+// CHECK: define{{.*}} double @TestGetVarDouble(
// CHECK: br label
// CHECK: br label
// CHECK: = phi
return __builtin_va_arg(ap, long double);
// fp128 and double can be passed in memory or in register, but x86_fp80 is in
// memory.
-// ANDROID: define fp128 @TestGetVarLD(
-// GNU: define x86_fp80 @TestGetVarLD(
-// NACL: define double @TestGetVarLD(
+// ANDROID: define{{.*}} fp128 @TestGetVarLD(
+// GNU: define{{.*}} x86_fp80 @TestGetVarLD(
+// NACL: define{{.*}} double @TestGetVarLD(
// ANDROID: br label
// ANDROID: br label
// NACL: br
long double _Complex TestGetVarLDC(va_list ap) {
return __builtin_va_arg(ap, long double _Complex);
// Pair of fp128 or x86_fp80 are passed as struct in memory.
-// ANDROID: define void @TestGetVarLDC({ fp128, fp128 }* {{.*}}, %struct.__va_list_tag*
-// GNU: define { x86_fp80, x86_fp80 } @TestGetVarLDC(
+// ANDROID: define{{.*}} void @TestGetVarLDC({ fp128, fp128 }* {{.*}}, %struct.__va_list_tag*
+// GNU: define{{.*}} { x86_fp80, x86_fp80 } @TestGetVarLDC(
// Pair of double can go in SSE registers or memory
-// NACL: define { double, double } @TestGetVarLDC(
+// NACL: define{{.*}} { double, double } @TestGetVarLDC(
// ANDROID-NOT: br
// GNU-NOT: br
// NACL: br
void TestPassVarInt(int x) {
TestVarArg("A", x);
-// CHECK: define void @TestPassVarInt(i32 %x)
+// CHECK: define{{.*}} void @TestPassVarInt(i32 %x)
// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, i32 %x)
}
void TestPassVarFloat(float x) {
TestVarArg("A", x);
-// CHECK: define void @TestPassVarFloat(float %x)
+// CHECK: define{{.*}} void @TestPassVarFloat(float %x)
// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, double %
}
void TestPassVarDouble(double x) {
TestVarArg("A", x);
-// CHECK: define void @TestPassVarDouble(double %x)
+// CHECK: define{{.*}} void @TestPassVarDouble(double %x)
// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, double %x
}
void TestPassVarLD(long double x) {
TestVarArg("A", x);
-// ANDROID: define void @TestPassVarLD(fp128 %x)
+// ANDROID: define{{.*}} void @TestPassVarLD(fp128 %x)
// ANDROID: call {{.*}} @TestVarArg(i8* {{.*}}, fp128 %x
-// GNU: define void @TestPassVarLD(x86_fp80 %x)
+// GNU: define{{.*}} void @TestPassVarLD(x86_fp80 %x)
// GNU: call {{.*}} @TestVarArg(i8* {{.*}}, x86_fp80 %x
-// NACL: define void @TestPassVarLD(double %x)
+// NACL: define{{.*}} void @TestPassVarLD(double %x)
// NACL: call {{.*}} @TestVarArg(i8* {{.*}}, double %x
}
void TestPassVarLDC(long double _Complex x) {
TestVarArg("A", x);
-// ANDROID: define void @TestPassVarLDC({ fp128, fp128 }* {{.*}} %x)
+// ANDROID: define{{.*}} void @TestPassVarLDC({ fp128, fp128 }* {{.*}} %x)
// ANDROID: store fp128 %{{.*}}, fp128* %
// ANDROID-NEXT: store fp128 %{{.*}}, fp128* %
// ANDROID-NEXT: call {{.*}} @TestVarArg(i8* {{.*}}, { fp128, fp128 }* {{.*}} %
-// GNU: define void @TestPassVarLDC({ x86_fp80, x86_fp80 }* {{.*}} %x)
+// GNU: define{{.*}} void @TestPassVarLDC({ x86_fp80, x86_fp80 }* {{.*}} %x)
// GNU: store x86_fp80 %{{.*}}, x86_fp80* %
// GNU-NEXT: store x86_fp80 %{{.*}}, x86_fp80* %
// GNU-NEXT: call {{.*}} @TestVarArg(i8* {{.*}}, { x86_fp80, x86_fp80 }* {{.*}} %
-// NACL: define void @TestPassVarLDC(double %x{{.*}}, double %x{{.*}})
+// NACL: define{{.*}} void @TestPassVarLDC(double %x{{.*}}, double %x{{.*}})
// NACL: call {{.*}} @TestVarArg(i8* {{.*}}, double %x{{.*}}, double %x{{.*}})
}
// RUN: %clang_cc1 -triple i386 -emit-llvm -O2 -o - %s | FileCheck %s
-// CHECK-LABEL: define i32 @f0()
+// CHECK-LABEL: define{{.*}} i32 @f0()
// CHECK: ret i32 1
// CHECK: }
f0(1, s);
f0m(1, 2, 3, 4, 5, s);
}
-// CHECK: define void @g0
+// CHECK: define{{.*}} void @g0
// CHECK: call void @f0(i32 1, [2 x i32] [i32 6, i32 7]
// CHECK: call void @f0m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i32] [i32 6, i32 7]
// CHECK: declare void @f0(i32, [2 x i32])
f1(1, s);
f1m(1, 2, 3, 4, 5, s);
}
-// CHECK: define void @g1
+// CHECK: define{{.*}} void @g1
// CHECK: call void @f1(i32 1, [2 x i32] [i32 6, i32 7]
// CHECK: call void @f1m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i32] [i32 6, i32 7]
// CHECK: declare void @f1(i32, [2 x i32])
f2(1, s);
f2m(1, 2, 3, 4, 5, s);
}
-// CHECK: define void @g2
+// CHECK: define{{.*}} void @g2
// CHECK: call void @f2(i32 1, [4 x i32] [i32 6, i32 7
// CHECK: call void @f2m(i32 1, i32 2, i32 3, i32 4, i32 5, [4 x i32] [i32 6, i32 7
// CHECK: declare void @f2(i32, [4 x i32])
f3(1, s);
f3m(1, 2, 3, 4, 5, s);
}
-// CHECK: define void @g3
+// CHECK: define{{.*}} void @g3
// CHECK: call void @f3(i32 1, [1 x i64] [i64 30064771078]
// CHECK: call void @f3m(i32 1, i32 2, i32 3, i32 4, i32 5, [1 x i64] [i64 30064771078]
// CHECK: declare void @f3(i32, [1 x i64])
f4(1, s);
f4m(1, 2, 3, 4, 5, s);
}
-// CHECK: define void @g4
+// CHECK: define{{.*}} void @g4
// CHECK: call void @f4(i32 1, %struct.SF16* nonnull byval(%struct.SF16) align 8
// CHECK: call void @f4m(i32 1, i32 2, i32 3, i32 4, i32 5, %struct.SF16* nonnull byval(%struct.SF16) align 8
// CHECK: declare void @f4(i32, %struct.SF16* byval(%struct.SF16) align 8)
f5(1, s);
f5m(1, 2, 3, 4, 5, s);
}
-// CHECK: define void @g5
+// CHECK: define{{.*}} void @g5
// CHECK: call void @f5(i32 1, [3 x i32] [i32 6, i32 7, i32 0])
// CHECK: call void @f5m(i32 1, i32 2, i32 3, i32 4, i32 5, [3 x i32] [i32 6, i32 7, i32 0])
// CHECK: declare void @f5(i32, [3 x i32])
f6(1, s);
f6m(1, 2, 3, 4, 5, s);
}
-// CHECK: define void @g6
+// CHECK: define{{.*}} void @g6
// CHECK: call void @f6(i32 1, [4 x i32] [i32 6, i32 7, i32 0, i32 0])
// CHECK: call void @f6m(i32 1, i32 2, i32 3, i32 4, i32 5, [4 x i32] [i32 6, i32 7, i32 0, i32 0])
// CHECK: declare void @f6(i32, [4 x i32])
f0(1, s);
f0m(1, 2, 3, 4, 5, s);
}
-// CHECK: define void @g0
+// CHECK: define{{.*}} void @g0
// CHECK: call void @f0(i64 1, [2 x i64] [i64 6, i64 7]
// CHECK: call void @f0m{{.*}}[2 x i64] [i64 6, i64 7]
// CHECK: declare void @f0(i64, [2 x i64])
f1(1, s);
f1m(1, 2, 3, 4, 5, s);
}
-// CHECK: define void @g1
+// CHECK: define{{.*}} void @g1
// CHECK: call void @f1{{.*}}[2 x i64] [i64 6, i64 7]
// CHECK: call void @f1m{{.*}}[2 x i64] [i64 6, i64 7]
// CHECK: declare void @f1(i64, [2 x i64])
f3(1, s);
f3m(1, 2, 3, 4, 5, s);
}
-// CHECK: define void @g3
+// CHECK: define{{.*}} void @g3
// CHECK: call void @f3(i64 1, i128 129127208515966861318)
// CHECK: call void @f3m(i64 1, i64 2, i64 3, i64 4, i64 5, i128 129127208515966861318)
// CHECK: declare void @f3(i64, i128)
f4(1, s);
f4m(1, 2, 3, 4, 5, s);
}
-// CHECK: define void @g4()
+// CHECK: define{{.*}} void @g4()
// CHECK: call void @f4(i32 1, [2 x i64] [i64 30064771078, i64 0])
// CHECK: void @f4m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i64] [i64 30064771078, i64 0])
// CHECK: declare void @f4(i32, [2 x i64])
f5(1, s);
f5m(1, 2, 3, 4, 5, s);
}
-// CHECK: define void @g5()
+// CHECK: define{{.*}} void @g5()
// CHECK: call void @f5(i32 1, [2 x i64] [i64 30064771078, i64 0])
// CHECK: void @f5m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i64] [i64 30064771078, i64 0])
// CHECK: declare void @f5(i32, [2 x i64])
__attribute__ ((target("branch-protection=none")))
void none() {}
-// CHECK: define void @none() #[[#NONE:]]
+// CHECK: define{{.*}} void @none() #[[#NONE:]]
__attribute__ ((target("branch-protection=standard")))
void std() {}
-// CHECK: define void @std() #[[#STD:]]
+// CHECK: define{{.*}} void @std() #[[#STD:]]
__attribute__ ((target("branch-protection=bti")))
void btionly() {}
-// CHECK: define void @btionly() #[[#BTI:]]
+// CHECK: define{{.*}} void @btionly() #[[#BTI:]]
__attribute__ ((target("branch-protection=pac-ret")))
void paconly() {}
-// CHECK: define void @paconly() #[[#PAC:]]
+// CHECK: define{{.*}} void @paconly() #[[#PAC:]]
__attribute__ ((target("branch-protection=pac-ret+bti")))
void pacbti0() {}
-// CHECK: define void @pacbti0() #[[#PACBTI:]]
+// CHECK: define{{.*}} void @pacbti0() #[[#PACBTI:]]
__attribute__ ((target("branch-protection=bti+pac-ret")))
void pacbti1() {}
-// CHECK: define void @pacbti1() #[[#PACBTI]]
+// CHECK: define{{.*}} void @pacbti1() #[[#PACBTI]]
__attribute__ ((target("branch-protection=pac-ret+leaf")))
void leaf() {}
-// CHECK: define void @leaf() #[[#PACLEAF:]]
+// CHECK: define{{.*}} void @leaf() #[[#PACLEAF:]]
__attribute__ ((target("branch-protection=pac-ret+b-key")))
void bkey() {}
-// CHECK: define void @bkey() #[[#PACBKEY:]]
+// CHECK: define{{.*}} void @bkey() #[[#PACBKEY:]]
__attribute__ ((target("branch-protection=pac-ret+b-key+leaf")))
void bkeyleaf0() {}
-// CHECK: define void @bkeyleaf0() #[[#PACBKEYLEAF:]]
+// CHECK: define{{.*}} void @bkeyleaf0() #[[#PACBKEYLEAF:]]
__attribute__ ((target("branch-protection=pac-ret+leaf+b-key")))
void bkeyleaf1() {}
-// CHECK: define void @bkeyleaf1() #[[#PACBKEYLEAF]]
+// CHECK: define{{.*}} void @bkeyleaf1() #[[#PACBKEYLEAF]]
__attribute__ ((target("branch-protection=pac-ret+leaf+bti")))
void btileaf() {}
-// CHECK: define void @btileaf() #[[#BTIPACLEAF:]]
+// CHECK: define{{.*}} void @btileaf() #[[#BTIPACLEAF:]]
// CHECK-DAG: attributes #[[#NONE]] = { {{.*}} "branch-target-enforcement"="false" {{.*}} "sign-return-address"="none"
pass_large(l);
pass_large(l);
}
-// CHECK-O0-LABEL: define void @example(
+// CHECK-O0-LABEL: define{{.*}} void @example(
// The alloca for the struct on the stack.
// CHECK-O0: %[[l:[0-9A-Za-z-]+]] = alloca %struct.large, align 8
// The alloca for the temporary stack space that we use to pass the argument.
//
// At O3, we should have lifetime markers to help the optimizer re-use the temporary allocas.
//
-// CHECK-O3-LABEL: define void @example(
+// CHECK-O3-LABEL: define{{.*}} void @example(
// The alloca for the struct on the stack.
// CHECK-O3: %[[l:[0-9A-Za-z-]+]] = alloca %struct.large, align 8
// The alloca for the temporary stack space that we use to pass the argument.
#ifdef __ARM_FEATURE_MATMUL_INT8
extern "C" void arm_feature_matmulint8_defined() {}
#endif
-// CHECK: define void @arm_feature_matmulint8_defined()
+// CHECK: define{{.*}} void @arm_feature_matmulint8_defined()
#include <arm_neon.h>
-// CHECK-LABEL: define <8 x i8> @test_vand_s8(<8 x i8> %a, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vand_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[AND_I:%.*]] = and <8 x i8> %a, %b
// CHECK: ret <8 x i8> [[AND_I]]
int8x8_t test_vand_s8(int8x8_t a, int8x8_t b) {
return vand_s8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vandq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vandq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[AND_I:%.*]] = and <16 x i8> %a, %b
// CHECK: ret <16 x i8> [[AND_I]]
int8x16_t test_vandq_s8(int8x16_t a, int8x16_t b) {
return vandq_s8(a, b);
}
-// CHECK-LABEL: define <4 x i16> @test_vand_s16(<4 x i16> %a, <4 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vand_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[AND_I:%.*]] = and <4 x i16> %a, %b
// CHECK: ret <4 x i16> [[AND_I]]
int16x4_t test_vand_s16(int16x4_t a, int16x4_t b) {
return vand_s16(a, b);
}
-// CHECK-LABEL: define <8 x i16> @test_vandq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vandq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[AND_I:%.*]] = and <8 x i16> %a, %b
// CHECK: ret <8 x i16> [[AND_I]]
int16x8_t test_vandq_s16(int16x8_t a, int16x8_t b) {
return vandq_s16(a, b);
}
-// CHECK-LABEL: define <2 x i32> @test_vand_s32(<2 x i32> %a, <2 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vand_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[AND_I:%.*]] = and <2 x i32> %a, %b
// CHECK: ret <2 x i32> [[AND_I]]
int32x2_t test_vand_s32(int32x2_t a, int32x2_t b) {
return vand_s32(a, b);
}
-// CHECK-LABEL: define <4 x i32> @test_vandq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vandq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[AND_I:%.*]] = and <4 x i32> %a, %b
// CHECK: ret <4 x i32> [[AND_I]]
int32x4_t test_vandq_s32(int32x4_t a, int32x4_t b) {
return vandq_s32(a, b);
}
-// CHECK-LABEL: define <1 x i64> @test_vand_s64(<1 x i64> %a, <1 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vand_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[AND_I:%.*]] = and <1 x i64> %a, %b
// CHECK: ret <1 x i64> [[AND_I]]
int64x1_t test_vand_s64(int64x1_t a, int64x1_t b) {
return vand_s64(a, b);
}
-// CHECK-LABEL: define <2 x i64> @test_vandq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vandq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[AND_I:%.*]] = and <2 x i64> %a, %b
// CHECK: ret <2 x i64> [[AND_I]]
int64x2_t test_vandq_s64(int64x2_t a, int64x2_t b) {
return vandq_s64(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vand_u8(<8 x i8> %a, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vand_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[AND_I:%.*]] = and <8 x i8> %a, %b
// CHECK: ret <8 x i8> [[AND_I]]
uint8x8_t test_vand_u8(uint8x8_t a, uint8x8_t b) {
return vand_u8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vandq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vandq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[AND_I:%.*]] = and <16 x i8> %a, %b
// CHECK: ret <16 x i8> [[AND_I]]
uint8x16_t test_vandq_u8(uint8x16_t a, uint8x16_t b) {
return vandq_u8(a, b);
}
-// CHECK-LABEL: define <4 x i16> @test_vand_u16(<4 x i16> %a, <4 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vand_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[AND_I:%.*]] = and <4 x i16> %a, %b
// CHECK: ret <4 x i16> [[AND_I]]
uint16x4_t test_vand_u16(uint16x4_t a, uint16x4_t b) {
return vand_u16(a, b);
}
-// CHECK-LABEL: define <8 x i16> @test_vandq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vandq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[AND_I:%.*]] = and <8 x i16> %a, %b
// CHECK: ret <8 x i16> [[AND_I]]
uint16x8_t test_vandq_u16(uint16x8_t a, uint16x8_t b) {
return vandq_u16(a, b);
}
-// CHECK-LABEL: define <2 x i32> @test_vand_u32(<2 x i32> %a, <2 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vand_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[AND_I:%.*]] = and <2 x i32> %a, %b
// CHECK: ret <2 x i32> [[AND_I]]
uint32x2_t test_vand_u32(uint32x2_t a, uint32x2_t b) {
return vand_u32(a, b);
}
-// CHECK-LABEL: define <4 x i32> @test_vandq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vandq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[AND_I:%.*]] = and <4 x i32> %a, %b
// CHECK: ret <4 x i32> [[AND_I]]
uint32x4_t test_vandq_u32(uint32x4_t a, uint32x4_t b) {
return vandq_u32(a, b);
}
-// CHECK-LABEL: define <1 x i64> @test_vand_u64(<1 x i64> %a, <1 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vand_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[AND_I:%.*]] = and <1 x i64> %a, %b
// CHECK: ret <1 x i64> [[AND_I]]
uint64x1_t test_vand_u64(uint64x1_t a, uint64x1_t b) {
return vand_u64(a, b);
}
-// CHECK-LABEL: define <2 x i64> @test_vandq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vandq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[AND_I:%.*]] = and <2 x i64> %a, %b
// CHECK: ret <2 x i64> [[AND_I]]
uint64x2_t test_vandq_u64(uint64x2_t a, uint64x2_t b) {
return vandq_u64(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vorr_s8(<8 x i8> %a, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vorr_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[OR_I:%.*]] = or <8 x i8> %a, %b
// CHECK: ret <8 x i8> [[OR_I]]
int8x8_t test_vorr_s8(int8x8_t a, int8x8_t b) {
return vorr_s8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vorrq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vorrq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[OR_I:%.*]] = or <16 x i8> %a, %b
// CHECK: ret <16 x i8> [[OR_I]]
int8x16_t test_vorrq_s8(int8x16_t a, int8x16_t b) {
return vorrq_s8(a, b);
}
-// CHECK-LABEL: define <4 x i16> @test_vorr_s16(<4 x i16> %a, <4 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vorr_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[OR_I:%.*]] = or <4 x i16> %a, %b
// CHECK: ret <4 x i16> [[OR_I]]
int16x4_t test_vorr_s16(int16x4_t a, int16x4_t b) {
return vorr_s16(a, b);
}
-// CHECK-LABEL: define <8 x i16> @test_vorrq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vorrq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[OR_I:%.*]] = or <8 x i16> %a, %b
// CHECK: ret <8 x i16> [[OR_I]]
int16x8_t test_vorrq_s16(int16x8_t a, int16x8_t b) {
return vorrq_s16(a, b);
}
-// CHECK-LABEL: define <2 x i32> @test_vorr_s32(<2 x i32> %a, <2 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vorr_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[OR_I:%.*]] = or <2 x i32> %a, %b
// CHECK: ret <2 x i32> [[OR_I]]
int32x2_t test_vorr_s32(int32x2_t a, int32x2_t b) {
return vorr_s32(a, b);
}
-// CHECK-LABEL: define <4 x i32> @test_vorrq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vorrq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[OR_I:%.*]] = or <4 x i32> %a, %b
// CHECK: ret <4 x i32> [[OR_I]]
int32x4_t test_vorrq_s32(int32x4_t a, int32x4_t b) {
return vorrq_s32(a, b);
}
-// CHECK-LABEL: define <1 x i64> @test_vorr_s64(<1 x i64> %a, <1 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vorr_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[OR_I:%.*]] = or <1 x i64> %a, %b
// CHECK: ret <1 x i64> [[OR_I]]
int64x1_t test_vorr_s64(int64x1_t a, int64x1_t b) {
return vorr_s64(a, b);
}
-// CHECK-LABEL: define <2 x i64> @test_vorrq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vorrq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[OR_I:%.*]] = or <2 x i64> %a, %b
// CHECK: ret <2 x i64> [[OR_I]]
int64x2_t test_vorrq_s64(int64x2_t a, int64x2_t b) {
return vorrq_s64(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vorr_u8(<8 x i8> %a, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vorr_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[OR_I:%.*]] = or <8 x i8> %a, %b
// CHECK: ret <8 x i8> [[OR_I]]
uint8x8_t test_vorr_u8(uint8x8_t a, uint8x8_t b) {
return vorr_u8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vorrq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vorrq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[OR_I:%.*]] = or <16 x i8> %a, %b
// CHECK: ret <16 x i8> [[OR_I]]
uint8x16_t test_vorrq_u8(uint8x16_t a, uint8x16_t b) {
return vorrq_u8(a, b);
}
-// CHECK-LABEL: define <4 x i16> @test_vorr_u16(<4 x i16> %a, <4 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vorr_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[OR_I:%.*]] = or <4 x i16> %a, %b
// CHECK: ret <4 x i16> [[OR_I]]
uint16x4_t test_vorr_u16(uint16x4_t a, uint16x4_t b) {
return vorr_u16(a, b);
}
-// CHECK-LABEL: define <8 x i16> @test_vorrq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vorrq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[OR_I:%.*]] = or <8 x i16> %a, %b
// CHECK: ret <8 x i16> [[OR_I]]
uint16x8_t test_vorrq_u16(uint16x8_t a, uint16x8_t b) {
return vorrq_u16(a, b);
}
-// CHECK-LABEL: define <2 x i32> @test_vorr_u32(<2 x i32> %a, <2 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vorr_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[OR_I:%.*]] = or <2 x i32> %a, %b
// CHECK: ret <2 x i32> [[OR_I]]
uint32x2_t test_vorr_u32(uint32x2_t a, uint32x2_t b) {
return vorr_u32(a, b);
}
-// CHECK-LABEL: define <4 x i32> @test_vorrq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vorrq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[OR_I:%.*]] = or <4 x i32> %a, %b
// CHECK: ret <4 x i32> [[OR_I]]
uint32x4_t test_vorrq_u32(uint32x4_t a, uint32x4_t b) {
return vorrq_u32(a, b);
}
-// CHECK-LABEL: define <1 x i64> @test_vorr_u64(<1 x i64> %a, <1 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vorr_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[OR_I:%.*]] = or <1 x i64> %a, %b
// CHECK: ret <1 x i64> [[OR_I]]
uint64x1_t test_vorr_u64(uint64x1_t a, uint64x1_t b) {
return vorr_u64(a, b);
}
-// CHECK-LABEL: define <2 x i64> @test_vorrq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vorrq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[OR_I:%.*]] = or <2 x i64> %a, %b
// CHECK: ret <2 x i64> [[OR_I]]
uint64x2_t test_vorrq_u64(uint64x2_t a, uint64x2_t b) {
return vorrq_u64(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_veor_s8(<8 x i8> %a, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_veor_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[XOR_I:%.*]] = xor <8 x i8> %a, %b
// CHECK: ret <8 x i8> [[XOR_I]]
int8x8_t test_veor_s8(int8x8_t a, int8x8_t b) {
return veor_s8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_veorq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_veorq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[XOR_I:%.*]] = xor <16 x i8> %a, %b
// CHECK: ret <16 x i8> [[XOR_I]]
int8x16_t test_veorq_s8(int8x16_t a, int8x16_t b) {
return veorq_s8(a, b);
}
-// CHECK-LABEL: define <4 x i16> @test_veor_s16(<4 x i16> %a, <4 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_veor_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[XOR_I:%.*]] = xor <4 x i16> %a, %b
// CHECK: ret <4 x i16> [[XOR_I]]
int16x4_t test_veor_s16(int16x4_t a, int16x4_t b) {
return veor_s16(a, b);
}
-// CHECK-LABEL: define <8 x i16> @test_veorq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_veorq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[XOR_I:%.*]] = xor <8 x i16> %a, %b
// CHECK: ret <8 x i16> [[XOR_I]]
int16x8_t test_veorq_s16(int16x8_t a, int16x8_t b) {
return veorq_s16(a, b);
}
-// CHECK-LABEL: define <2 x i32> @test_veor_s32(<2 x i32> %a, <2 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_veor_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[XOR_I:%.*]] = xor <2 x i32> %a, %b
// CHECK: ret <2 x i32> [[XOR_I]]
int32x2_t test_veor_s32(int32x2_t a, int32x2_t b) {
return veor_s32(a, b);
}
-// CHECK-LABEL: define <4 x i32> @test_veorq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_veorq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[XOR_I:%.*]] = xor <4 x i32> %a, %b
// CHECK: ret <4 x i32> [[XOR_I]]
int32x4_t test_veorq_s32(int32x4_t a, int32x4_t b) {
return veorq_s32(a, b);
}
-// CHECK-LABEL: define <1 x i64> @test_veor_s64(<1 x i64> %a, <1 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_veor_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[XOR_I:%.*]] = xor <1 x i64> %a, %b
// CHECK: ret <1 x i64> [[XOR_I]]
int64x1_t test_veor_s64(int64x1_t a, int64x1_t b) {
return veor_s64(a, b);
}
-// CHECK-LABEL: define <2 x i64> @test_veorq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_veorq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[XOR_I:%.*]] = xor <2 x i64> %a, %b
// CHECK: ret <2 x i64> [[XOR_I]]
int64x2_t test_veorq_s64(int64x2_t a, int64x2_t b) {
return veorq_s64(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_veor_u8(<8 x i8> %a, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_veor_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[XOR_I:%.*]] = xor <8 x i8> %a, %b
// CHECK: ret <8 x i8> [[XOR_I]]
uint8x8_t test_veor_u8(uint8x8_t a, uint8x8_t b) {
return veor_u8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_veorq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_veorq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[XOR_I:%.*]] = xor <16 x i8> %a, %b
// CHECK: ret <16 x i8> [[XOR_I]]
uint8x16_t test_veorq_u8(uint8x16_t a, uint8x16_t b) {
return veorq_u8(a, b);
}
-// CHECK-LABEL: define <4 x i16> @test_veor_u16(<4 x i16> %a, <4 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_veor_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[XOR_I:%.*]] = xor <4 x i16> %a, %b
// CHECK: ret <4 x i16> [[XOR_I]]
uint16x4_t test_veor_u16(uint16x4_t a, uint16x4_t b) {
return veor_u16(a, b);
}
-// CHECK-LABEL: define <8 x i16> @test_veorq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_veorq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[XOR_I:%.*]] = xor <8 x i16> %a, %b
// CHECK: ret <8 x i16> [[XOR_I]]
uint16x8_t test_veorq_u16(uint16x8_t a, uint16x8_t b) {
return veorq_u16(a, b);
}
-// CHECK-LABEL: define <2 x i32> @test_veor_u32(<2 x i32> %a, <2 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_veor_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[XOR_I:%.*]] = xor <2 x i32> %a, %b
// CHECK: ret <2 x i32> [[XOR_I]]
uint32x2_t test_veor_u32(uint32x2_t a, uint32x2_t b) {
return veor_u32(a, b);
}
-// CHECK-LABEL: define <4 x i32> @test_veorq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_veorq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[XOR_I:%.*]] = xor <4 x i32> %a, %b
// CHECK: ret <4 x i32> [[XOR_I]]
uint32x4_t test_veorq_u32(uint32x4_t a, uint32x4_t b) {
return veorq_u32(a, b);
}
-// CHECK-LABEL: define <1 x i64> @test_veor_u64(<1 x i64> %a, <1 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_veor_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[XOR_I:%.*]] = xor <1 x i64> %a, %b
// CHECK: ret <1 x i64> [[XOR_I]]
uint64x1_t test_veor_u64(uint64x1_t a, uint64x1_t b) {
return veor_u64(a, b);
}
-// CHECK-LABEL: define <2 x i64> @test_veorq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_veorq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[XOR_I:%.*]] = xor <2 x i64> %a, %b
// CHECK: ret <2 x i64> [[XOR_I]]
uint64x2_t test_veorq_u64(uint64x2_t a, uint64x2_t b) {
return veorq_u64(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vbic_s8(<8 x i8> %a, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vbic_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: [[AND_I:%.*]] = and <8 x i8> %a, [[NEG_I]]
// CHECK: ret <8 x i8> [[AND_I]]
return vbic_s8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vbicq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vbicq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: [[AND_I:%.*]] = and <16 x i8> %a, [[NEG_I]]
// CHECK: ret <16 x i8> [[AND_I]]
return vbicq_s8(a, b);
}
-// CHECK-LABEL: define <4 x i16> @test_vbic_s16(<4 x i16> %a, <4 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vbic_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1>
// CHECK: [[AND_I:%.*]] = and <4 x i16> %a, [[NEG_I]]
// CHECK: ret <4 x i16> [[AND_I]]
return vbic_s16(a, b);
}
-// CHECK-LABEL: define <8 x i16> @test_vbicq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vbicq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
// CHECK: [[AND_I:%.*]] = and <8 x i16> %a, [[NEG_I]]
// CHECK: ret <8 x i16> [[AND_I]]
return vbicq_s16(a, b);
}
-// CHECK-LABEL: define <2 x i32> @test_vbic_s32(<2 x i32> %a, <2 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vbic_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, <i32 -1, i32 -1>
// CHECK: [[AND_I:%.*]] = and <2 x i32> %a, [[NEG_I]]
// CHECK: ret <2 x i32> [[AND_I]]
return vbic_s32(a, b);
}
-// CHECK-LABEL: define <4 x i32> @test_vbicq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vbicq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
// CHECK: [[AND_I:%.*]] = and <4 x i32> %a, [[NEG_I]]
// CHECK: ret <4 x i32> [[AND_I]]
return vbicq_s32(a, b);
}
-// CHECK-LABEL: define <1 x i64> @test_vbic_s64(<1 x i64> %a, <1 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vbic_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, <i64 -1>
// CHECK: [[AND_I:%.*]] = and <1 x i64> %a, [[NEG_I]]
// CHECK: ret <1 x i64> [[AND_I]]
return vbic_s64(a, b);
}
-// CHECK-LABEL: define <2 x i64> @test_vbicq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vbicq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, <i64 -1, i64 -1>
// CHECK: [[AND_I:%.*]] = and <2 x i64> %a, [[NEG_I]]
// CHECK: ret <2 x i64> [[AND_I]]
return vbicq_s64(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vbic_u8(<8 x i8> %a, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vbic_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: [[AND_I:%.*]] = and <8 x i8> %a, [[NEG_I]]
// CHECK: ret <8 x i8> [[AND_I]]
return vbic_u8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vbicq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vbicq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: [[AND_I:%.*]] = and <16 x i8> %a, [[NEG_I]]
// CHECK: ret <16 x i8> [[AND_I]]
return vbicq_u8(a, b);
}
-// CHECK-LABEL: define <4 x i16> @test_vbic_u16(<4 x i16> %a, <4 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vbic_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1>
// CHECK: [[AND_I:%.*]] = and <4 x i16> %a, [[NEG_I]]
// CHECK: ret <4 x i16> [[AND_I]]
return vbic_u16(a, b);
}
-// CHECK-LABEL: define <8 x i16> @test_vbicq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vbicq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
// CHECK: [[AND_I:%.*]] = and <8 x i16> %a, [[NEG_I]]
// CHECK: ret <8 x i16> [[AND_I]]
return vbicq_u16(a, b);
}
-// CHECK-LABEL: define <2 x i32> @test_vbic_u32(<2 x i32> %a, <2 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vbic_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, <i32 -1, i32 -1>
// CHECK: [[AND_I:%.*]] = and <2 x i32> %a, [[NEG_I]]
// CHECK: ret <2 x i32> [[AND_I]]
return vbic_u32(a, b);
}
-// CHECK-LABEL: define <4 x i32> @test_vbicq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vbicq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
// CHECK: [[AND_I:%.*]] = and <4 x i32> %a, [[NEG_I]]
// CHECK: ret <4 x i32> [[AND_I]]
return vbicq_u32(a, b);
}
-// CHECK-LABEL: define <1 x i64> @test_vbic_u64(<1 x i64> %a, <1 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vbic_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, <i64 -1>
// CHECK: [[AND_I:%.*]] = and <1 x i64> %a, [[NEG_I]]
// CHECK: ret <1 x i64> [[AND_I]]
return vbic_u64(a, b);
}
-// CHECK-LABEL: define <2 x i64> @test_vbicq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vbicq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, <i64 -1, i64 -1>
// CHECK: [[AND_I:%.*]] = and <2 x i64> %a, [[NEG_I]]
// CHECK: ret <2 x i64> [[AND_I]]
return vbicq_u64(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vorn_s8(<8 x i8> %a, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vorn_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: [[OR_I:%.*]] = or <8 x i8> %a, [[NEG_I]]
// CHECK: ret <8 x i8> [[OR_I]]
return vorn_s8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vornq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vornq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: [[OR_I:%.*]] = or <16 x i8> %a, [[NEG_I]]
// CHECK: ret <16 x i8> [[OR_I]]
return vornq_s8(a, b);
}
-// CHECK-LABEL: define <4 x i16> @test_vorn_s16(<4 x i16> %a, <4 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vorn_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1>
// CHECK: [[OR_I:%.*]] = or <4 x i16> %a, [[NEG_I]]
// CHECK: ret <4 x i16> [[OR_I]]
return vorn_s16(a, b);
}
-// CHECK-LABEL: define <8 x i16> @test_vornq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vornq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
// CHECK: [[OR_I:%.*]] = or <8 x i16> %a, [[NEG_I]]
// CHECK: ret <8 x i16> [[OR_I]]
return vornq_s16(a, b);
}
-// CHECK-LABEL: define <2 x i32> @test_vorn_s32(<2 x i32> %a, <2 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vorn_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, <i32 -1, i32 -1>
// CHECK: [[OR_I:%.*]] = or <2 x i32> %a, [[NEG_I]]
// CHECK: ret <2 x i32> [[OR_I]]
return vorn_s32(a, b);
}
-// CHECK-LABEL: define <4 x i32> @test_vornq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vornq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
// CHECK: [[OR_I:%.*]] = or <4 x i32> %a, [[NEG_I]]
// CHECK: ret <4 x i32> [[OR_I]]
return vornq_s32(a, b);
}
-// CHECK-LABEL: define <1 x i64> @test_vorn_s64(<1 x i64> %a, <1 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vorn_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, <i64 -1>
// CHECK: [[OR_I:%.*]] = or <1 x i64> %a, [[NEG_I]]
// CHECK: ret <1 x i64> [[OR_I]]
return vorn_s64(a, b);
}
-// CHECK-LABEL: define <2 x i64> @test_vornq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vornq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, <i64 -1, i64 -1>
// CHECK: [[OR_I:%.*]] = or <2 x i64> %a, [[NEG_I]]
// CHECK: ret <2 x i64> [[OR_I]]
return vornq_s64(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vorn_u8(<8 x i8> %a, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vorn_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: [[OR_I:%.*]] = or <8 x i8> %a, [[NEG_I]]
// CHECK: ret <8 x i8> [[OR_I]]
return vorn_u8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vornq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vornq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: [[OR_I:%.*]] = or <16 x i8> %a, [[NEG_I]]
// CHECK: ret <16 x i8> [[OR_I]]
return vornq_u8(a, b);
}
-// CHECK-LABEL: define <4 x i16> @test_vorn_u16(<4 x i16> %a, <4 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vorn_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1>
// CHECK: [[OR_I:%.*]] = or <4 x i16> %a, [[NEG_I]]
// CHECK: ret <4 x i16> [[OR_I]]
return vorn_u16(a, b);
}
-// CHECK-LABEL: define <8 x i16> @test_vornq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vornq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
// CHECK: [[OR_I:%.*]] = or <8 x i16> %a, [[NEG_I]]
// CHECK: ret <8 x i16> [[OR_I]]
return vornq_u16(a, b);
}
-// CHECK-LABEL: define <2 x i32> @test_vorn_u32(<2 x i32> %a, <2 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vorn_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, <i32 -1, i32 -1>
// CHECK: [[OR_I:%.*]] = or <2 x i32> %a, [[NEG_I]]
// CHECK: ret <2 x i32> [[OR_I]]
return vorn_u32(a, b);
}
-// CHECK-LABEL: define <4 x i32> @test_vornq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vornq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
// CHECK: [[OR_I:%.*]] = or <4 x i32> %a, [[NEG_I]]
// CHECK: ret <4 x i32> [[OR_I]]
return vornq_u32(a, b);
}
-// CHECK-LABEL: define <1 x i64> @test_vorn_u64(<1 x i64> %a, <1 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vorn_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, <i64 -1>
// CHECK: [[OR_I:%.*]] = or <1 x i64> %a, [[NEG_I]]
// CHECK: ret <1 x i64> [[OR_I]]
return vorn_u64(a, b);
}
-// CHECK-LABEL: define <2 x i64> @test_vornq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vornq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, <i64 -1, i64 -1>
// CHECK: [[OR_I:%.*]] = or <2 x i64> %a, [[NEG_I]]
// CHECK: ret <2 x i64> [[OR_I]]
#include <arm_neon.h>
-// CHECK-LABEL: define i16 @test_vaddlv_s8(<8 x i8> %a) #0 {
+// CHECK-LABEL: define{{.*}} i16 @test_vaddlv_s8(<8 x i8> %a) #0 {
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v8i8(<8 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16
// CHECK: ret i16 [[TMP0]]
return vaddlv_s8(a);
}
-// CHECK-LABEL: define i32 @test_vaddlv_s16(<4 x i16> %a) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vaddlv_s16(<4 x i16> %a) #0 {
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v4i16(<4 x i16> %a) #3
// CHECK: ret i32 [[VADDLV_I]]
int32_t test_vaddlv_s16(int16x4_t a) {
return vaddlv_s16(a);
}
-// CHECK-LABEL: define i16 @test_vaddlv_u8(<8 x i8> %a) #0 {
+// CHECK-LABEL: define{{.*}} i16 @test_vaddlv_u8(<8 x i8> %a) #0 {
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v8i8(<8 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16
// CHECK: ret i16 [[TMP0]]
return vaddlv_u8(a);
}
-// CHECK-LABEL: define i32 @test_vaddlv_u16(<4 x i16> %a) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vaddlv_u16(<4 x i16> %a) #0 {
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v4i16(<4 x i16> %a) #3
// CHECK: ret i32 [[VADDLV_I]]
uint32_t test_vaddlv_u16(uint16x4_t a) {
return vaddlv_u16(a);
}
-// CHECK-LABEL: define i16 @test_vaddlvq_s8(<16 x i8> %a) #1 {
+// CHECK-LABEL: define{{.*}} i16 @test_vaddlvq_s8(<16 x i8> %a) #1 {
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v16i8(<16 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16
// CHECK: ret i16 [[TMP0]]
return vaddlvq_s8(a);
}
-// CHECK-LABEL: define i32 @test_vaddlvq_s16(<8 x i16> %a) #1 {
+// CHECK-LABEL: define{{.*}} i32 @test_vaddlvq_s16(<8 x i16> %a) #1 {
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v8i16(<8 x i16> %a) #3
// CHECK: ret i32 [[VADDLV_I]]
int32_t test_vaddlvq_s16(int16x8_t a) {
return vaddlvq_s16(a);
}
-// CHECK-LABEL: define i64 @test_vaddlvq_s32(<4 x i32> %a) #1 {
+// CHECK-LABEL: define{{.*}} i64 @test_vaddlvq_s32(<4 x i32> %a) #1 {
// CHECK: [[VADDLVQ_S32_I:%.*]] = call i64 @llvm.aarch64.neon.saddlv.i64.v4i32(<4 x i32> %a) #3
// CHECK: ret i64 [[VADDLVQ_S32_I]]
int64_t test_vaddlvq_s32(int32x4_t a) {
return vaddlvq_s32(a);
}
-// CHECK-LABEL: define i16 @test_vaddlvq_u8(<16 x i8> %a) #1 {
+// CHECK-LABEL: define{{.*}} i16 @test_vaddlvq_u8(<16 x i8> %a) #1 {
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v16i8(<16 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16
// CHECK: ret i16 [[TMP0]]
return vaddlvq_u8(a);
}
-// CHECK-LABEL: define i32 @test_vaddlvq_u16(<8 x i16> %a) #1 {
+// CHECK-LABEL: define{{.*}} i32 @test_vaddlvq_u16(<8 x i16> %a) #1 {
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v8i16(<8 x i16> %a) #3
// CHECK: ret i32 [[VADDLV_I]]
uint32_t test_vaddlvq_u16(uint16x8_t a) {
return vaddlvq_u16(a);
}
-// CHECK-LABEL: define i64 @test_vaddlvq_u32(<4 x i32> %a) #1 {
+// CHECK-LABEL: define{{.*}} i64 @test_vaddlvq_u32(<4 x i32> %a) #1 {
// CHECK: [[VADDLVQ_U32_I:%.*]] = call i64 @llvm.aarch64.neon.uaddlv.i64.v4i32(<4 x i32> %a) #3
// CHECK: ret i64 [[VADDLVQ_U32_I]]
uint64_t test_vaddlvq_u32(uint32x4_t a) {
return vaddlvq_u32(a);
}
-// CHECK-LABEL: define i8 @test_vmaxv_s8(<8 x i8> %a) #0 {
+// CHECK-LABEL: define{{.*}} i8 @test_vmaxv_s8(<8 x i8> %a) #0 {
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v8i8(<8 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8
// CHECK: ret i8 [[TMP0]]
return vmaxv_s8(a);
}
-// CHECK-LABEL: define i16 @test_vmaxv_s16(<4 x i16> %a) #0 {
+// CHECK-LABEL: define{{.*}} i16 @test_vmaxv_s16(<4 x i16> %a) #0 {
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v4i16(<4 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16
// CHECK: ret i16 [[TMP2]]
return vmaxv_s16(a);
}
-// CHECK-LABEL: define i8 @test_vmaxv_u8(<8 x i8> %a) #0 {
+// CHECK-LABEL: define{{.*}} i8 @test_vmaxv_u8(<8 x i8> %a) #0 {
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v8i8(<8 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8
// CHECK: ret i8 [[TMP0]]
return vmaxv_u8(a);
}
-// CHECK-LABEL: define i16 @test_vmaxv_u16(<4 x i16> %a) #0 {
+// CHECK-LABEL: define{{.*}} i16 @test_vmaxv_u16(<4 x i16> %a) #0 {
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v4i16(<4 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16
// CHECK: ret i16 [[TMP2]]
return vmaxv_u16(a);
}
-// CHECK-LABEL: define i8 @test_vmaxvq_s8(<16 x i8> %a) #1 {
+// CHECK-LABEL: define{{.*}} i8 @test_vmaxvq_s8(<16 x i8> %a) #1 {
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v16i8(<16 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8
// CHECK: ret i8 [[TMP0]]
return vmaxvq_s8(a);
}
-// CHECK-LABEL: define i16 @test_vmaxvq_s16(<8 x i16> %a) #1 {
+// CHECK-LABEL: define{{.*}} i16 @test_vmaxvq_s16(<8 x i16> %a) #1 {
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v8i16(<8 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16
// CHECK: ret i16 [[TMP2]]
return vmaxvq_s16(a);
}
-// CHECK-LABEL: define i32 @test_vmaxvq_s32(<4 x i32> %a) #1 {
+// CHECK-LABEL: define{{.*}} i32 @test_vmaxvq_s32(<4 x i32> %a) #1 {
// CHECK: [[VMAXVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v4i32(<4 x i32> %a) #3
// CHECK: ret i32 [[VMAXVQ_S32_I]]
int32_t test_vmaxvq_s32(int32x4_t a) {
return vmaxvq_s32(a);
}
-// CHECK-LABEL: define i8 @test_vmaxvq_u8(<16 x i8> %a) #1 {
+// CHECK-LABEL: define{{.*}} i8 @test_vmaxvq_u8(<16 x i8> %a) #1 {
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v16i8(<16 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8
// CHECK: ret i8 [[TMP0]]
return vmaxvq_u8(a);
}
-// CHECK-LABEL: define i16 @test_vmaxvq_u16(<8 x i16> %a) #1 {
+// CHECK-LABEL: define{{.*}} i16 @test_vmaxvq_u16(<8 x i16> %a) #1 {
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v8i16(<8 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16
// CHECK: ret i16 [[TMP2]]
return vmaxvq_u16(a);
}
-// CHECK-LABEL: define i32 @test_vmaxvq_u32(<4 x i32> %a) #1 {
+// CHECK-LABEL: define{{.*}} i32 @test_vmaxvq_u32(<4 x i32> %a) #1 {
// CHECK: [[VMAXVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v4i32(<4 x i32> %a) #3
// CHECK: ret i32 [[VMAXVQ_U32_I]]
uint32_t test_vmaxvq_u32(uint32x4_t a) {
return vmaxvq_u32(a);
}
-// CHECK-LABEL: define i8 @test_vminv_s8(<8 x i8> %a) #0 {
+// CHECK-LABEL: define{{.*}} i8 @test_vminv_s8(<8 x i8> %a) #0 {
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v8i8(<8 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8
// CHECK: ret i8 [[TMP0]]
return vminv_s8(a);
}
-// CHECK-LABEL: define i16 @test_vminv_s16(<4 x i16> %a) #0 {
+// CHECK-LABEL: define{{.*}} i16 @test_vminv_s16(<4 x i16> %a) #0 {
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v4i16(<4 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16
// CHECK: ret i16 [[TMP2]]
return vminv_s16(a);
}
-// CHECK-LABEL: define i8 @test_vminv_u8(<8 x i8> %a) #0 {
+// CHECK-LABEL: define{{.*}} i8 @test_vminv_u8(<8 x i8> %a) #0 {
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v8i8(<8 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8
// CHECK: ret i8 [[TMP0]]
return vminv_u8(a);
}
-// CHECK-LABEL: define i16 @test_vminv_u16(<4 x i16> %a) #0 {
+// CHECK-LABEL: define{{.*}} i16 @test_vminv_u16(<4 x i16> %a) #0 {
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v4i16(<4 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16
// CHECK: ret i16 [[TMP2]]
return vminv_u16(a);
}
-// CHECK-LABEL: define i8 @test_vminvq_s8(<16 x i8> %a) #1 {
+// CHECK-LABEL: define{{.*}} i8 @test_vminvq_s8(<16 x i8> %a) #1 {
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v16i8(<16 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8
// CHECK: ret i8 [[TMP0]]
return vminvq_s8(a);
}
-// CHECK-LABEL: define i16 @test_vminvq_s16(<8 x i16> %a) #1 {
+// CHECK-LABEL: define{{.*}} i16 @test_vminvq_s16(<8 x i16> %a) #1 {
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v8i16(<8 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16
// CHECK: ret i16 [[TMP2]]
return vminvq_s16(a);
}
-// CHECK-LABEL: define i32 @test_vminvq_s32(<4 x i32> %a) #1 {
+// CHECK-LABEL: define{{.*}} i32 @test_vminvq_s32(<4 x i32> %a) #1 {
// CHECK: [[VMINVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v4i32(<4 x i32> %a) #3
// CHECK: ret i32 [[VMINVQ_S32_I]]
int32_t test_vminvq_s32(int32x4_t a) {
return vminvq_s32(a);
}
-// CHECK-LABEL: define i8 @test_vminvq_u8(<16 x i8> %a) #1 {
+// CHECK-LABEL: define{{.*}} i8 @test_vminvq_u8(<16 x i8> %a) #1 {
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v16i8(<16 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8
// CHECK: ret i8 [[TMP0]]
return vminvq_u8(a);
}
-// CHECK-LABEL: define i16 @test_vminvq_u16(<8 x i16> %a) #1 {
+// CHECK-LABEL: define{{.*}} i16 @test_vminvq_u16(<8 x i16> %a) #1 {
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v8i16(<8 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16
// CHECK: ret i16 [[TMP2]]
return vminvq_u16(a);
}
-// CHECK-LABEL: define i32 @test_vminvq_u32(<4 x i32> %a) #1 {
+// CHECK-LABEL: define{{.*}} i32 @test_vminvq_u32(<4 x i32> %a) #1 {
// CHECK: [[VMINVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v4i32(<4 x i32> %a) #3
// CHECK: ret i32 [[VMINVQ_U32_I]]
uint32_t test_vminvq_u32(uint32x4_t a) {
return vminvq_u32(a);
}
-// CHECK-LABEL: define i8 @test_vaddv_s8(<8 x i8> %a) #0 {
+// CHECK-LABEL: define{{.*}} i8 @test_vaddv_s8(<8 x i8> %a) #0 {
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v8i8(<8 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8
// CHECK: ret i8 [[TMP0]]
return vaddv_s8(a);
}
-// CHECK-LABEL: define i16 @test_vaddv_s16(<4 x i16> %a) #0 {
+// CHECK-LABEL: define{{.*}} i16 @test_vaddv_s16(<4 x i16> %a) #0 {
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v4i16(<4 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16
// CHECK: ret i16 [[TMP2]]
return vaddv_s16(a);
}
-// CHECK-LABEL: define i8 @test_vaddv_u8(<8 x i8> %a) #0 {
+// CHECK-LABEL: define{{.*}} i8 @test_vaddv_u8(<8 x i8> %a) #0 {
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v8i8(<8 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8
// CHECK: ret i8 [[TMP0]]
return vaddv_u8(a);
}
-// CHECK-LABEL: define i16 @test_vaddv_u16(<4 x i16> %a) #0 {
+// CHECK-LABEL: define{{.*}} i16 @test_vaddv_u16(<4 x i16> %a) #0 {
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v4i16(<4 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16
// CHECK: ret i16 [[TMP2]]
return vaddv_u16(a);
}
-// CHECK-LABEL: define i8 @test_vaddvq_s8(<16 x i8> %a) #1 {
+// CHECK-LABEL: define{{.*}} i8 @test_vaddvq_s8(<16 x i8> %a) #1 {
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v16i8(<16 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8
// CHECK: ret i8 [[TMP0]]
return vaddvq_s8(a);
}
-// CHECK-LABEL: define i16 @test_vaddvq_s16(<8 x i16> %a) #1 {
+// CHECK-LABEL: define{{.*}} i16 @test_vaddvq_s16(<8 x i16> %a) #1 {
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v8i16(<8 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16
// CHECK: ret i16 [[TMP2]]
return vaddvq_s16(a);
}
-// CHECK-LABEL: define i32 @test_vaddvq_s32(<4 x i32> %a) #1 {
+// CHECK-LABEL: define{{.*}} i32 @test_vaddvq_s32(<4 x i32> %a) #1 {
// CHECK: [[VADDVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v4i32(<4 x i32> %a) #3
// CHECK: ret i32 [[VADDVQ_S32_I]]
int32_t test_vaddvq_s32(int32x4_t a) {
return vaddvq_s32(a);
}
-// CHECK-LABEL: define i8 @test_vaddvq_u8(<16 x i8> %a) #1 {
+// CHECK-LABEL: define{{.*}} i8 @test_vaddvq_u8(<16 x i8> %a) #1 {
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v16i8(<16 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8
// CHECK: ret i8 [[TMP0]]
return vaddvq_u8(a);
}
-// CHECK-LABEL: define i16 @test_vaddvq_u16(<8 x i16> %a) #1 {
+// CHECK-LABEL: define{{.*}} i16 @test_vaddvq_u16(<8 x i16> %a) #1 {
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v8i16(<8 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16
// CHECK: ret i16 [[TMP2]]
return vaddvq_u16(a);
}
-// CHECK-LABEL: define i32 @test_vaddvq_u32(<4 x i32> %a) #1 {
+// CHECK-LABEL: define{{.*}} i32 @test_vaddvq_u32(<4 x i32> %a) #1 {
// CHECK: [[VADDVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v4i32(<4 x i32> %a) #3
// CHECK: ret i32 [[VADDVQ_U32_I]]
uint32_t test_vaddvq_u32(uint32x4_t a) {
return vaddvq_u32(a);
}
-// CHECK-LABEL: define float @test_vmaxvq_f32(<4 x float> %a) #1 {
+// CHECK-LABEL: define{{.*}} float @test_vmaxvq_f32(<4 x float> %a) #1 {
// CHECK: [[VMAXVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxv.f32.v4f32(<4 x float> %a) #3
// CHECK: ret float [[VMAXVQ_F32_I]]
float32_t test_vmaxvq_f32(float32x4_t a) {
return vmaxvq_f32(a);
}
-// CHECK-LABEL: define float @test_vminvq_f32(<4 x float> %a) #1 {
+// CHECK-LABEL: define{{.*}} float @test_vminvq_f32(<4 x float> %a) #1 {
// CHECK: [[VMINVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float> %a) #3
// CHECK: ret float [[VMINVQ_F32_I]]
float32_t test_vminvq_f32(float32x4_t a) {
return vminvq_f32(a);
}
-// CHECK-LABEL: define float @test_vmaxnmvq_f32(<4 x float> %a) #1 {
+// CHECK-LABEL: define{{.*}} float @test_vmaxnmvq_f32(<4 x float> %a) #1 {
// CHECK: [[VMAXNMVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float> %a) #3
// CHECK: ret float [[VMAXNMVQ_F32_I]]
float32_t test_vmaxnmvq_f32(float32x4_t a) {
return vmaxnmvq_f32(a);
}
-// CHECK-LABEL: define float @test_vminnmvq_f32(<4 x float> %a) #1 {
+// CHECK-LABEL: define{{.*}} float @test_vminnmvq_f32(<4 x float> %a) #1 {
// CHECK: [[VMINNMVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fminnmv.f32.v4f32(<4 x float> %a) #3
// CHECK: ret float [[VMINNMVQ_F32_I]]
float32_t test_vminnmvq_f32(float32x4_t a) {
#include <arm_neon.h>
uint32x2_t test_vdot_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
-// CHECK-LABEL: define <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.aarch64.neon.udot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: ret <2 x i32> [[RESULT]]
return vdot_u32(a, b, c);
}
uint32x4_t test_vdotq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) {
-// CHECK-LABEL: define <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: ret <4 x i32> [[RESULT]]
return vdotq_u32(a, b, c);
}
int32x2_t test_vdot_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
-// CHECK-LABEL: define <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.aarch64.neon.sdot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: ret <2 x i32> [[RESULT]]
return vdot_s32(a, b, c);
}
int32x4_t test_vdotq_s32(int32x4_t a, int8x16_t b, int8x16_t c) {
-// CHECK-LABEL: define <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: ret <4 x i32> [[RESULT]]
return vdotq_s32(a, b, c);
}
uint32x2_t test_vdot_lane_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
-// CHECK-LABEL: define <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> <i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
}
uint32x4_t test_vdotq_lane_u32(uint32x4_t a, uint8x16_t b, uint8x8_t c) {
-// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
}
uint32x2_t test_vdot_laneq_u32(uint32x2_t a, uint8x8_t b, uint8x16_t c) {
-// CHECK-LABEL: define <2 x i32> @test_vdot_laneq_u32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c)
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_laneq_u32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <2 x i32> <i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
}
uint32x4_t test_vdotq_laneq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) {
-// CHECK-LABEL: define <4 x i32> @test_vdotq_laneq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_laneq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
}
int32x2_t test_vdot_lane_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
-// CHECK-LABEL: define <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> <i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
}
int32x4_t test_vdotq_lane_s32(int32x4_t a, int8x16_t b, int8x8_t c) {
-// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
}
int32x2_t test_vdot_laneq_s32(int32x2_t a, int8x8_t b, int8x16_t c) {
-// CHECK-LABEL: define <2 x i32> @test_vdot_laneq_s32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c)
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_laneq_s32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <2 x i32> <i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
}
int32x4_t test_vdotq_laneq_s32(int32x4_t a, int8x16_t b, int8x16_t c) {
-// CHECK-LABEL: define <4 x i32> @test_vdotq_laneq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_laneq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
#include <arm_neon.h>
-// CHECK-LABEL: define <8 x i8> @test_vext_s8(<8 x i8> %a, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vext_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
// CHECK: ret <8 x i8> [[VEXT]]
int8x8_t test_vext_s8(int8x8_t a, int8x8_t b) {
return vext_s8(a, b, 2);
}
-// CHECK-LABEL: define <4 x i16> @test_vext_s16(<4 x i16> %a, <4 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vext_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
return vext_s16(a, b, 3);
}
-// CHECK-LABEL: define <2 x i32> @test_vext_s32(<2 x i32> %a, <2 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vext_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
return vext_s32(a, b, 1);
}
-// CHECK-LABEL: define <1 x i64> @test_vext_s64(<1 x i64> %a, <1 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vext_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
return vext_s64(a, b, 0);
}
-// CHECK-LABEL: define <16 x i8> @test_vextq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vextq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>
// CHECK: ret <16 x i8> [[VEXT]]
int8x16_t test_vextq_s8(int8x16_t a, int8x16_t b) {
return vextq_s8(a, b, 2);
}
-// CHECK-LABEL: define <8 x i16> @test_vextq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vextq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
return vextq_s16(a, b, 3);
}
-// CHECK-LABEL: define <4 x i32> @test_vextq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vextq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
return vextq_s32(a, b, 1);
}
-// CHECK-LABEL: define <2 x i64> @test_vextq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vextq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
return vextq_s64(a, b, 1);
}
-// CHECK-LABEL: define <8 x i8> @test_vext_u8(<8 x i8> %a, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vext_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
// CHECK: ret <8 x i8> [[VEXT]]
uint8x8_t test_vext_u8(uint8x8_t a, uint8x8_t b) {
return vext_u8(a, b, 2);
}
-// CHECK-LABEL: define <4 x i16> @test_vext_u16(<4 x i16> %a, <4 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vext_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
return vext_u16(a, b, 3);
}
-// CHECK-LABEL: define <2 x i32> @test_vext_u32(<2 x i32> %a, <2 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vext_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
return vext_u32(a, b, 1);
}
-// CHECK-LABEL: define <1 x i64> @test_vext_u64(<1 x i64> %a, <1 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vext_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
return vext_u64(a, b, 0);
}
-// CHECK-LABEL: define <16 x i8> @test_vextq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vextq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>
// CHECK: ret <16 x i8> [[VEXT]]
uint8x16_t test_vextq_u8(uint8x16_t a, uint8x16_t b) {
return vextq_u8(a, b, 2);
}
-// CHECK-LABEL: define <8 x i16> @test_vextq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vextq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
return vextq_u16(a, b, 3);
}
-// CHECK-LABEL: define <4 x i32> @test_vextq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vextq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
return vextq_u32(a, b, 1);
}
-// CHECK-LABEL: define <2 x i64> @test_vextq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vextq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
return vextq_u64(a, b, 1);
}
-// CHECK-LABEL: define <2 x float> @test_vext_f32(<2 x float> %a, <2 x float> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vext_f32(<2 x float> %a, <2 x float> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
return vext_f32(a, b, 1);
}
-// CHECK-LABEL: define <1 x double> @test_vext_f64(<1 x double> %a, <1 x double> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x double> @test_vext_f64(<1 x double> %a, <1 x double> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x double>
return vext_f64(a, b, 0);
}
-// CHECK-LABEL: define <4 x float> @test_vextq_f32(<4 x float> %a, <4 x float> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vextq_f32(<4 x float> %a, <4 x float> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x float> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
return vextq_f32(a, b, 1);
}
-// CHECK-LABEL: define <2 x double> @test_vextq_f64(<2 x double> %a, <2 x double> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x double> @test_vextq_f64(<2 x double> %a, <2 x double> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x double> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x double>
return vextq_f64(a, b, 1);
}
-// CHECK-LABEL: define <8 x i8> @test_vext_p8(<8 x i8> %a, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vext_p8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
// CHECK: ret <8 x i8> [[VEXT]]
poly8x8_t test_vext_p8(poly8x8_t a, poly8x8_t b) {
return vext_p8(a, b, 2);
}
-// CHECK-LABEL: define <4 x i16> @test_vext_p16(<4 x i16> %a, <4 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vext_p16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
return vext_p16(a, b, 3);
}
-// CHECK-LABEL: define <16 x i8> @test_vextq_p8(<16 x i8> %a, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vextq_p8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>
// CHECK: ret <16 x i8> [[VEXT]]
poly8x16_t test_vextq_p8(poly8x16_t a, poly8x16_t b) {
return vextq_p8(a, b, 2);
}
-// CHECK-LABEL: define <8 x i16> @test_vextq_p16(<8 x i16> %a, <8 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vextq_p16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
#include <arm_neon.h>
-// CHECK-LABEL: define float @test_vcvtxd_f32_f64(double %a) #0 {
+// CHECK-LABEL: define{{.*}} float @test_vcvtxd_f32_f64(double %a) #0 {
// CHECK: [[VCVTXD_F32_F64_I:%.*]] = call float @llvm.aarch64.sisd.fcvtxn(double %a) #2
// CHECK: ret float [[VCVTXD_F32_F64_I]]
float32_t test_vcvtxd_f32_f64(float64_t a) {
return (float32_t)vcvtxd_f32_f64(a);
}
-// CHECK-LABEL: define i32 @test_vcvtas_s32_f32(float %a) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vcvtas_s32_f32(float %a) #0 {
// CHECK: [[VCVTAS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtas.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTAS_S32_F32_I]]
int32_t test_vcvtas_s32_f32(float32_t a) {
return (int32_t)vcvtas_s32_f32(a);
}
-// CHECK-LABEL: define i64 @test_test_vcvtad_s64_f64(double %a) #0 {
+// CHECK-LABEL: define{{.*}} i64 @test_test_vcvtad_s64_f64(double %a) #0 {
// CHECK: [[VCVTAD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtas.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTAD_S64_F64_I]]
int64_t test_test_vcvtad_s64_f64(float64_t a) {
return (int64_t)vcvtad_s64_f64(a);
}
-// CHECK-LABEL: define i32 @test_vcvtas_u32_f32(float %a) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vcvtas_u32_f32(float %a) #0 {
// CHECK: [[VCVTAS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtau.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTAS_U32_F32_I]]
uint32_t test_vcvtas_u32_f32(float32_t a) {
return (uint32_t)vcvtas_u32_f32(a);
}
-// CHECK-LABEL: define i64 @test_vcvtad_u64_f64(double %a) #0 {
+// CHECK-LABEL: define{{.*}} i64 @test_vcvtad_u64_f64(double %a) #0 {
// CHECK: [[VCVTAD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtau.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTAD_U64_F64_I]]
uint64_t test_vcvtad_u64_f64(float64_t a) {
return (uint64_t)vcvtad_u64_f64(a);
}
-// CHECK-LABEL: define i32 @test_vcvtms_s32_f32(float %a) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vcvtms_s32_f32(float %a) #0 {
// CHECK: [[VCVTMS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtms.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTMS_S32_F32_I]]
int32_t test_vcvtms_s32_f32(float32_t a) {
return (int32_t)vcvtms_s32_f32(a);
}
-// CHECK-LABEL: define i64 @test_vcvtmd_s64_f64(double %a) #0 {
+// CHECK-LABEL: define{{.*}} i64 @test_vcvtmd_s64_f64(double %a) #0 {
// CHECK: [[VCVTMD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtms.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTMD_S64_F64_I]]
int64_t test_vcvtmd_s64_f64(float64_t a) {
return (int64_t)vcvtmd_s64_f64(a);
}
-// CHECK-LABEL: define i32 @test_vcvtms_u32_f32(float %a) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vcvtms_u32_f32(float %a) #0 {
// CHECK: [[VCVTMS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTMS_U32_F32_I]]
uint32_t test_vcvtms_u32_f32(float32_t a) {
return (uint32_t)vcvtms_u32_f32(a);
}
-// CHECK-LABEL: define i64 @test_vcvtmd_u64_f64(double %a) #0 {
+// CHECK-LABEL: define{{.*}} i64 @test_vcvtmd_u64_f64(double %a) #0 {
// CHECK: [[VCVTMD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtmu.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTMD_U64_F64_I]]
uint64_t test_vcvtmd_u64_f64(float64_t a) {
return (uint64_t)vcvtmd_u64_f64(a);
}
-// CHECK-LABEL: define i32 @test_vcvtns_s32_f32(float %a) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vcvtns_s32_f32(float %a) #0 {
// CHECK: [[VCVTNS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtns.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTNS_S32_F32_I]]
int32_t test_vcvtns_s32_f32(float32_t a) {
return (int32_t)vcvtns_s32_f32(a);
}
-// CHECK-LABEL: define i64 @test_vcvtnd_s64_f64(double %a) #0 {
+// CHECK-LABEL: define{{.*}} i64 @test_vcvtnd_s64_f64(double %a) #0 {
// CHECK: [[VCVTND_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtns.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTND_S64_F64_I]]
int64_t test_vcvtnd_s64_f64(float64_t a) {
return (int64_t)vcvtnd_s64_f64(a);
}
-// CHECK-LABEL: define i32 @test_vcvtns_u32_f32(float %a) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vcvtns_u32_f32(float %a) #0 {
// CHECK: [[VCVTNS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtnu.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTNS_U32_F32_I]]
uint32_t test_vcvtns_u32_f32(float32_t a) {
return (uint32_t)vcvtns_u32_f32(a);
}
-// CHECK-LABEL: define i64 @test_vcvtnd_u64_f64(double %a) #0 {
+// CHECK-LABEL: define{{.*}} i64 @test_vcvtnd_u64_f64(double %a) #0 {
// CHECK: [[VCVTND_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtnu.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTND_U64_F64_I]]
uint64_t test_vcvtnd_u64_f64(float64_t a) {
return (uint64_t)vcvtnd_u64_f64(a);
}
-// CHECK-LABEL: define i32 @test_vcvtps_s32_f32(float %a) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vcvtps_s32_f32(float %a) #0 {
// CHECK: [[VCVTPS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtps.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTPS_S32_F32_I]]
int32_t test_vcvtps_s32_f32(float32_t a) {
return (int32_t)vcvtps_s32_f32(a);
}
-// CHECK-LABEL: define i64 @test_vcvtpd_s64_f64(double %a) #0 {
+// CHECK-LABEL: define{{.*}} i64 @test_vcvtpd_s64_f64(double %a) #0 {
// CHECK: [[VCVTPD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtps.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTPD_S64_F64_I]]
int64_t test_vcvtpd_s64_f64(float64_t a) {
return (int64_t)vcvtpd_s64_f64(a);
}
-// CHECK-LABEL: define i32 @test_vcvtps_u32_f32(float %a) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vcvtps_u32_f32(float %a) #0 {
// CHECK: [[VCVTPS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtpu.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTPS_U32_F32_I]]
uint32_t test_vcvtps_u32_f32(float32_t a) {
return (uint32_t)vcvtps_u32_f32(a);
}
-// CHECK-LABEL: define i64 @test_vcvtpd_u64_f64(double %a) #0 {
+// CHECK-LABEL: define{{.*}} i64 @test_vcvtpd_u64_f64(double %a) #0 {
// CHECK: [[VCVTPD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtpu.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTPD_U64_F64_I]]
uint64_t test_vcvtpd_u64_f64(float64_t a) {
return (uint64_t)vcvtpd_u64_f64(a);
}
-// CHECK-LABEL: define i32 @test_vcvts_s32_f32(float %a) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vcvts_s32_f32(float %a) #0 {
// CHECK: [[TMP0:%.*]] = call i32 @llvm.aarch64.neon.fcvtzs.i32.f32(float %a)
// CHECK: ret i32 [[TMP0]]
int32_t test_vcvts_s32_f32(float32_t a) {
return (int32_t)vcvts_s32_f32(a);
}
-// CHECK-LABEL: define i64 @test_vcvtd_s64_f64(double %a) #0 {
+// CHECK-LABEL: define{{.*}} i64 @test_vcvtd_s64_f64(double %a) #0 {
// CHECK: [[TMP0:%.*]] = call i64 @llvm.aarch64.neon.fcvtzs.i64.f64(double %a)
// CHECK: ret i64 [[TMP0]]
int64_t test_vcvtd_s64_f64(float64_t a) {
return (int64_t)vcvtd_s64_f64(a);
}
-// CHECK-LABEL: define i32 @test_vcvts_u32_f32(float %a) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vcvts_u32_f32(float %a) #0 {
// CHECK: [[TMP0:%.*]] = call i32 @llvm.aarch64.neon.fcvtzu.i32.f32(float %a)
// CHECK: ret i32 [[TMP0]]
uint32_t test_vcvts_u32_f32(float32_t a) {
return (uint32_t)vcvts_u32_f32(a);
}
-// CHECK-LABEL: define i64 @test_vcvtd_u64_f64(double %a) #0 {
+// CHECK-LABEL: define{{.*}} i64 @test_vcvtd_u64_f64(double %a) #0 {
// CHECK: [[TMP0:%.*]] = call i64 @llvm.aarch64.neon.fcvtzu.i64.f64(double %a)
// CHECK: ret i64 [[TMP0]]
uint64_t test_vcvtd_u64_f64(float64_t a) {
#include <arm_neon.h>
-// CHECK-LABEL: define <2 x float> @test_vmla_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %c, i32 1
// CHECK: [[MUL_I:%.*]] = fmul <2 x float> %b, [[VECINIT1_I]]
return vmla_n_f32(a, b, c);
}
-// CHECK-LABEL: define <4 x float> @test_vmlaq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %c, i32 1
// CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %c, i32 2
return vmlaq_n_f32(a, b, c);
}
-// CHECK-LABEL: define <4 x float> @test_vmlsq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %c, i32 1
// CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %c, i32 2
return vmlsq_n_f32(a, b, c);
}
-// CHECK-LABEL: define <2 x float> @test_vmls_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %c, i32 1
// CHECK: [[MUL_I:%.*]] = fmul <2 x float> %b, [[VECINIT1_I]]
return vmls_n_f32(a, b, c);
}
-// CHECK-LABEL: define <2 x float> @test_vmla_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> zeroinitializer
return vmla_lane_f32(a, b, v, 0);
}
-// CHECK-LABEL: define <4 x float> @test_vmlaq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> zeroinitializer
return vmlaq_lane_f32(a, b, v, 0);
}
-// CHECK-LABEL: define <2 x float> @test_vmla_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> zeroinitializer
return vmla_laneq_f32(a, b, v, 0);
}
-// CHECK-LABEL: define <4 x float> @test_vmlaq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> zeroinitializer
return vmlaq_laneq_f32(a, b, v, 0);
}
-// CHECK-LABEL: define <2 x float> @test_vmls_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> zeroinitializer
return vmls_lane_f32(a, b, v, 0);
}
-// CHECK-LABEL: define <4 x float> @test_vmlsq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> zeroinitializer
return vmlsq_lane_f32(a, b, v, 0);
}
-// CHECK-LABEL: define <2 x float> @test_vmls_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> zeroinitializer
return vmls_laneq_f32(a, b, v, 0);
}
-// CHECK-LABEL: define <4 x float> @test_vmlsq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> zeroinitializer
return vmlsq_laneq_f32(a, b, v, 0);
}
-// CHECK-LABEL: define <2 x float> @test_vmla_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> <i32 1, i32 1>
return vmla_lane_f32(a, b, v, 1);
}
-// CHECK-LABEL: define <4 x float> @test_vmlaq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> <i32 1, i32 1, i32 1, i32 1>
return vmlaq_lane_f32(a, b, v, 1);
}
-// CHECK-LABEL: define <2 x float> @test_vmla_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> <i32 3, i32 3>
return vmla_laneq_f32(a, b, v, 3);
}
-// CHECK-LABEL: define <4 x float> @test_vmlaq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> <i32 3, i32 3, i32 3, i32 3>
return vmlaq_laneq_f32(a, b, v, 3);
}
-// CHECK-LABEL: define <2 x float> @test_vmls_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> <i32 1, i32 1>
return vmls_lane_f32(a, b, v, 1);
}
-// CHECK-LABEL: define <4 x float> @test_vmlsq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> <i32 1, i32 1, i32 1, i32 1>
float32x4_t test_vmlsq_lane_f32(float32x4_t a, float32x4_t b, float32x2_t v) {
return vmlsq_lane_f32(a, b, v, 1);
}
-// CHECK-LABEL: define <2 x float> @test_vmls_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> <i32 3, i32 3>
return vmls_laneq_f32(a, b, v, 3);
}
-// CHECK-LABEL: define <4 x float> @test_vmlsq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> <i32 3, i32 3, i32 3, i32 3>
return vmlsq_laneq_f32(a, b, v, 3);
}
-// CHECK-LABEL: define <2 x double> @test_vfmaq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
+// CHECK-LABEL: define{{.*}} <2 x double> @test_vfmaq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1
// CHECK: [[TMP6:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %b, <2 x double> [[VECINIT1_I]], <2 x double> %a)
return vfmaq_n_f64(a, b, c);
}
-// CHECK-LABEL: define <2 x double> @test_vfmsq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
+// CHECK-LABEL: define{{.*}} <2 x double> @test_vfmsq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
// CHECK: [[SUB_I:%.*]] = fneg <2 x double> %b
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1
#include <arm_neon.h>
-// CHECK-LABEL: define <16 x i8> @test_vld1q_dup_u8(i8* %a) #0 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_dup_u8(i8* %a) #0 {
// CHECK: [[TMP0:%.*]] = load i8, i8* %a
// CHECK: [[TMP1:%.*]] = insertelement <16 x i8> undef, i8 [[TMP0]], i32 0
// CHECK: [[LANE:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> [[TMP1]], <16 x i32> zeroinitializer
return vld1q_dup_u8(a);
}
-// CHECK-LABEL: define <8 x i16> @test_vld1q_dup_u16(i16* %a) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_dup_u16(i16* %a) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16*
// CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]]
return vld1q_dup_u16(a);
}
-// CHECK-LABEL: define <4 x i32> @test_vld1q_dup_u32(i32* %a) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vld1q_dup_u32(i32* %a) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
// CHECK: [[TMP2:%.*]] = load i32, i32* [[TMP1]]
return vld1q_dup_u32(a);
}
-// CHECK-LABEL: define <2 x i64> @test_vld1q_dup_u64(i64* %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_dup_u64(i64* %a) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64*
// CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]]
return vld1q_dup_u64(a);
}
-// CHECK-LABEL: define <16 x i8> @test_vld1q_dup_s8(i8* %a) #0 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_dup_s8(i8* %a) #0 {
// CHECK: [[TMP0:%.*]] = load i8, i8* %a
// CHECK: [[TMP1:%.*]] = insertelement <16 x i8> undef, i8 [[TMP0]], i32 0
// CHECK: [[LANE:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> [[TMP1]], <16 x i32> zeroinitializer
return vld1q_dup_s8(a);
}
-// CHECK-LABEL: define <8 x i16> @test_vld1q_dup_s16(i16* %a) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_dup_s16(i16* %a) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16*
// CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]]
return vld1q_dup_s16(a);
}
-// CHECK-LABEL: define <4 x i32> @test_vld1q_dup_s32(i32* %a) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vld1q_dup_s32(i32* %a) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
// CHECK: [[TMP2:%.*]] = load i32, i32* [[TMP1]]
return vld1q_dup_s32(a);
}
-// CHECK-LABEL: define <2 x i64> @test_vld1q_dup_s64(i64* %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_dup_s64(i64* %a) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64*
// CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]]
return vld1q_dup_s64(a);
}
-// CHECK-LABEL: define <8 x half> @test_vld1q_dup_f16(half* %a) #0 {
+// CHECK-LABEL: define{{.*}} <8 x half> @test_vld1q_dup_f16(half* %a) #0 {
// CHECK: [[TMP0:%.*]] = bitcast half* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to half*
// CHECK: [[TMP2:%.*]] = load half, half* [[TMP1]]
return vld1q_dup_f16(a);
}
-// CHECK-LABEL: define <4 x float> @test_vld1q_dup_f32(float* %a) #0 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vld1q_dup_f32(float* %a) #0 {
// CHECK: [[TMP0:%.*]] = bitcast float* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to float*
// CHECK: [[TMP2:%.*]] = load float, float* [[TMP1]]
return vld1q_dup_f32(a);
}
-// CHECK-LABEL: define <2 x double> @test_vld1q_dup_f64(double* %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x double> @test_vld1q_dup_f64(double* %a) #0 {
// CHECK: [[TMP0:%.*]] = bitcast double* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to double*
// CHECK: [[TMP2:%.*]] = load double, double* [[TMP1]]
return vld1q_dup_f64(a);
}
-// CHECK-LABEL: define <16 x i8> @test_vld1q_dup_p8(i8* %a) #0 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_dup_p8(i8* %a) #0 {
// CHECK: [[TMP0:%.*]] = load i8, i8* %a
// CHECK: [[TMP1:%.*]] = insertelement <16 x i8> undef, i8 [[TMP0]], i32 0
// CHECK: [[LANE:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> [[TMP1]], <16 x i32> zeroinitializer
return vld1q_dup_p8(a);
}
-// CHECK-LABEL: define <8 x i16> @test_vld1q_dup_p16(i16* %a) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_dup_p16(i16* %a) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16*
// CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]]
return vld1q_dup_p16(a);
}
-// CHECK-LABEL: define <2 x i64> @test_vld1q_dup_p64(i64* %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_dup_p64(i64* %a) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64*
// CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]]
return vld1q_dup_p64(a);
}
-// CHECK-LABEL: define <8 x i8> @test_vld1_dup_u8(i8* %a) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_dup_u8(i8* %a) #1 {
// CHECK: [[TMP0:%.*]] = load i8, i8* %a
// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 [[TMP0]], i32 0
// CHECK: [[LANE:%.*]] = shufflevector <8 x i8> [[TMP1]], <8 x i8> [[TMP1]], <8 x i32> zeroinitializer
return vld1_dup_u8(a);
}
-// CHECK-LABEL: define <4 x i16> @test_vld1_dup_u16(i16* %a) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_dup_u16(i16* %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16*
// CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]]
return vld1_dup_u16(a);
}
-// CHECK-LABEL: define <2 x i32> @test_vld1_dup_u32(i32* %a) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vld1_dup_u32(i32* %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
// CHECK: [[TMP2:%.*]] = load i32, i32* [[TMP1]]
return vld1_dup_u32(a);
}
-// CHECK-LABEL: define <1 x i64> @test_vld1_dup_u64(i64* %a) #1 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_dup_u64(i64* %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64*
// CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]]
return vld1_dup_u64(a);
}
-// CHECK-LABEL: define <8 x i8> @test_vld1_dup_s8(i8* %a) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_dup_s8(i8* %a) #1 {
// CHECK: [[TMP0:%.*]] = load i8, i8* %a
// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 [[TMP0]], i32 0
// CHECK: [[LANE:%.*]] = shufflevector <8 x i8> [[TMP1]], <8 x i8> [[TMP1]], <8 x i32> zeroinitializer
return vld1_dup_s8(a);
}
-// CHECK-LABEL: define <4 x i16> @test_vld1_dup_s16(i16* %a) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_dup_s16(i16* %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16*
// CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]]
return vld1_dup_s16(a);
}
-// CHECK-LABEL: define <2 x i32> @test_vld1_dup_s32(i32* %a) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vld1_dup_s32(i32* %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
// CHECK: [[TMP2:%.*]] = load i32, i32* [[TMP1]]
return vld1_dup_s32(a);
}
-// CHECK-LABEL: define <1 x i64> @test_vld1_dup_s64(i64* %a) #1 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_dup_s64(i64* %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64*
// CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]]
return vld1_dup_s64(a);
}
-// CHECK-LABEL: define <4 x half> @test_vld1_dup_f16(half* %a) #1 {
+// CHECK-LABEL: define{{.*}} <4 x half> @test_vld1_dup_f16(half* %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast half* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to half*
// CHECK: [[TMP2:%.*]] = load half, half* [[TMP1]]
return vld1_dup_f16(a);
}
-// CHECK-LABEL: define <2 x float> @test_vld1_dup_f32(float* %a) #1 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vld1_dup_f32(float* %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast float* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to float*
// CHECK: [[TMP2:%.*]] = load float, float* [[TMP1]]
return vld1_dup_f32(a);
}
-// CHECK-LABEL: define <1 x double> @test_vld1_dup_f64(double* %a) #1 {
+// CHECK-LABEL: define{{.*}} <1 x double> @test_vld1_dup_f64(double* %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast double* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to double*
// CHECK: [[TMP2:%.*]] = load double, double* [[TMP1]]
return vld1_dup_f64(a);
}
-// CHECK-LABEL: define <8 x i8> @test_vld1_dup_p8(i8* %a) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_dup_p8(i8* %a) #1 {
// CHECK: [[TMP0:%.*]] = load i8, i8* %a
// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 [[TMP0]], i32 0
// CHECK: [[LANE:%.*]] = shufflevector <8 x i8> [[TMP1]], <8 x i8> [[TMP1]], <8 x i32> zeroinitializer
return vld1_dup_p8(a);
}
-// CHECK-LABEL: define <4 x i16> @test_vld1_dup_p16(i16* %a) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_dup_p16(i16* %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16*
// CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]]
return vld1_dup_p16(a);
}
-// CHECK-LABEL: define <1 x i64> @test_vld1_dup_p64(i64* %a) #1 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_dup_p64(i64* %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64*
// CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]]
return vld1_dup_p64(a);
}
-// CHECK-LABEL: define %struct.uint64x2x2_t @test_vld2q_dup_u64(i64* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint64x2x2_t @test_vld2q_dup_u64(i64* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x2_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.uint64x2x2_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x2_t* [[__RET]] to i8*
return vld2q_dup_u64(a);
}
-// CHECK-LABEL: define %struct.int64x2x2_t @test_vld2q_dup_s64(i64* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int64x2x2_t @test_vld2q_dup_s64(i64* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x2_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.int64x2x2_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x2_t* [[__RET]] to i8*
return vld2q_dup_s64(a);
}
-// CHECK-LABEL: define %struct.float64x2x2_t @test_vld2q_dup_f64(double* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float64x2x2_t @test_vld2q_dup_f64(double* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x2_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.float64x2x2_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x2_t* [[__RET]] to i8*
return vld2q_dup_f64(a);
}
-// CHECK-LABEL: define %struct.poly64x2x2_t @test_vld2q_dup_p64(i64* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x2x2_t @test_vld2q_dup_p64(i64* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x2_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x2_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x2_t* [[__RET]] to i8*
return vld2q_dup_p64(a);
}
-// CHECK-LABEL: define %struct.float64x1x2_t @test_vld2_dup_f64(double* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float64x1x2_t @test_vld2_dup_f64(double* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x2_t, align 8
// CHECK: [[__RET:%.*]] = alloca %struct.float64x1x2_t, align 8
// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x2_t* [[__RET]] to i8*
return vld2_dup_f64(a);
}
-// CHECK-LABEL: define %struct.poly64x1x2_t @test_vld2_dup_p64(i64* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x1x2_t @test_vld2_dup_p64(i64* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x2_t, align 8
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x2_t, align 8
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x2_t* [[__RET]] to i8*
return vld2_dup_p64(a);
}
-// CHECK-LABEL: define %struct.uint64x2x3_t @test_vld3q_dup_u64(i64* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint64x2x3_t @test_vld3q_dup_u64(i64* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x3_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.uint64x2x3_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x3_t* [[__RET]] to i8*
// [{{x[0-9]+|sp}}]
}
-// CHECK-LABEL: define %struct.int64x2x3_t @test_vld3q_dup_s64(i64* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int64x2x3_t @test_vld3q_dup_s64(i64* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x3_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.int64x2x3_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x3_t* [[__RET]] to i8*
// [{{x[0-9]+|sp}}]
}
-// CHECK-LABEL: define %struct.float64x2x3_t @test_vld3q_dup_f64(double* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float64x2x3_t @test_vld3q_dup_f64(double* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x3_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.float64x2x3_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x3_t* [[__RET]] to i8*
// [{{x[0-9]+|sp}}]
}
-// CHECK-LABEL: define %struct.poly64x2x3_t @test_vld3q_dup_p64(i64* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x2x3_t @test_vld3q_dup_p64(i64* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x3_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x3_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x3_t* [[__RET]] to i8*
// [{{x[0-9]+|sp}}]
}
-// CHECK-LABEL: define %struct.float64x1x3_t @test_vld3_dup_f64(double* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float64x1x3_t @test_vld3_dup_f64(double* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x3_t, align 8
// CHECK: [[__RET:%.*]] = alloca %struct.float64x1x3_t, align 8
// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x3_t* [[__RET]] to i8*
// [{{x[0-9]+|sp}}]
}
-// CHECK-LABEL: define %struct.poly64x1x3_t @test_vld3_dup_p64(i64* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x1x3_t @test_vld3_dup_p64(i64* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x3_t, align 8
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x3_t, align 8
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x3_t* [[__RET]] to i8*
// [{{x[0-9]+|sp}}]
}
-// CHECK-LABEL: define %struct.uint64x2x4_t @test_vld4q_dup_u64(i64* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint64x2x4_t @test_vld4q_dup_u64(i64* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x4_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.uint64x2x4_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x4_t* [[__RET]] to i8*
return vld4q_dup_u64(a);
}
-// CHECK-LABEL: define %struct.int64x2x4_t @test_vld4q_dup_s64(i64* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int64x2x4_t @test_vld4q_dup_s64(i64* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x4_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.int64x2x4_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x4_t* [[__RET]] to i8*
return vld4q_dup_s64(a);
}
-// CHECK-LABEL: define %struct.float64x2x4_t @test_vld4q_dup_f64(double* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float64x2x4_t @test_vld4q_dup_f64(double* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x4_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.float64x2x4_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x4_t* [[__RET]] to i8*
return vld4q_dup_f64(a);
}
-// CHECK-LABEL: define %struct.poly64x2x4_t @test_vld4q_dup_p64(i64* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x2x4_t @test_vld4q_dup_p64(i64* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x4_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x4_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x4_t* [[__RET]] to i8*
return vld4q_dup_p64(a);
}
-// CHECK-LABEL: define %struct.float64x1x4_t @test_vld4_dup_f64(double* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float64x1x4_t @test_vld4_dup_f64(double* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x4_t, align 8
// CHECK: [[__RET:%.*]] = alloca %struct.float64x1x4_t, align 8
// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x4_t* [[__RET]] to i8*
return vld4_dup_f64(a);
}
-// CHECK-LABEL: define %struct.poly64x1x4_t @test_vld4_dup_p64(i64* %a) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x1x4_t @test_vld4_dup_p64(i64* %a) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x4_t, align 8
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x4_t, align 8
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x4_t* [[__RET]] to i8*
return vld4_dup_p64(a);
}
-// CHECK-LABEL: define <16 x i8> @test_vld1q_lane_u8(i8* %a, <16 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_lane_u8(i8* %a, <16 x i8> %b) #0 {
// CHECK: [[TMP0:%.*]] = load i8, i8* %a
// CHECK: [[VLD1_LANE:%.*]] = insertelement <16 x i8> %b, i8 [[TMP0]], i32 15
// CHECK: ret <16 x i8> [[VLD1_LANE]]
return vld1q_lane_u8(a, b, 15);
}
-// CHECK-LABEL: define <8 x i16> @test_vld1q_lane_u16(i16* %a, <8 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_lane_u16(i16* %a, <8 x i16> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
return vld1q_lane_u16(a, b, 7);
}
-// CHECK-LABEL: define <4 x i32> @test_vld1q_lane_u32(i32* %a, <4 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vld1q_lane_u32(i32* %a, <4 x i32> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
return vld1q_lane_u32(a, b, 3);
}
-// CHECK-LABEL: define <2 x i64> @test_vld1q_lane_u64(i64* %a, <2 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_lane_u64(i64* %a, <2 x i64> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
return vld1q_lane_u64(a, b, 1);
}
-// CHECK-LABEL: define <16 x i8> @test_vld1q_lane_s8(i8* %a, <16 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_lane_s8(i8* %a, <16 x i8> %b) #0 {
// CHECK: [[TMP0:%.*]] = load i8, i8* %a
// CHECK: [[VLD1_LANE:%.*]] = insertelement <16 x i8> %b, i8 [[TMP0]], i32 15
// CHECK: ret <16 x i8> [[VLD1_LANE]]
return vld1q_lane_s8(a, b, 15);
}
-// CHECK-LABEL: define <8 x i16> @test_vld1q_lane_s16(i16* %a, <8 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_lane_s16(i16* %a, <8 x i16> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
return vld1q_lane_s16(a, b, 7);
}
-// CHECK-LABEL: define <4 x i32> @test_vld1q_lane_s32(i32* %a, <4 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vld1q_lane_s32(i32* %a, <4 x i32> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
return vld1q_lane_s32(a, b, 3);
}
-// CHECK-LABEL: define <2 x i64> @test_vld1q_lane_s64(i64* %a, <2 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_lane_s64(i64* %a, <2 x i64> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
return vld1q_lane_s64(a, b, 1);
}
-// CHECK-LABEL: define <8 x half> @test_vld1q_lane_f16(half* %a, <8 x half> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x half> @test_vld1q_lane_f16(half* %a, <8 x half> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast half* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <8 x half> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>
return vld1q_lane_f16(a, b, 7);
}
-// CHECK-LABEL: define <4 x float> @test_vld1q_lane_f32(float* %a, <4 x float> %b) #0 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vld1q_lane_f32(float* %a, <4 x float> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast float* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <4 x float> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>
return vld1q_lane_f32(a, b, 3);
}
-// CHECK-LABEL: define <2 x double> @test_vld1q_lane_f64(double* %a, <2 x double> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x double> @test_vld1q_lane_f64(double* %a, <2 x double> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast double* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <2 x double> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double>
return vld1q_lane_f64(a, b, 1);
}
-// CHECK-LABEL: define <16 x i8> @test_vld1q_lane_p8(i8* %a, <16 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_lane_p8(i8* %a, <16 x i8> %b) #0 {
// CHECK: [[TMP0:%.*]] = load i8, i8* %a
// CHECK: [[VLD1_LANE:%.*]] = insertelement <16 x i8> %b, i8 [[TMP0]], i32 15
// CHECK: ret <16 x i8> [[VLD1_LANE]]
return vld1q_lane_p8(a, b, 15);
}
-// CHECK-LABEL: define <8 x i16> @test_vld1q_lane_p16(i16* %a, <8 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_lane_p16(i16* %a, <8 x i16> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
return vld1q_lane_p16(a, b, 7);
}
-// CHECK-LABEL: define <2 x i64> @test_vld1q_lane_p64(i64* %a, <2 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_lane_p64(i64* %a, <2 x i64> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
return vld1q_lane_p64(a, b, 1);
}
-// CHECK-LABEL: define <8 x i8> @test_vld1_lane_u8(i8* %a, <8 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_lane_u8(i8* %a, <8 x i8> %b) #1 {
// CHECK: [[TMP0:%.*]] = load i8, i8* %a
// CHECK: [[VLD1_LANE:%.*]] = insertelement <8 x i8> %b, i8 [[TMP0]], i32 7
// CHECK: ret <8 x i8> [[VLD1_LANE]]
return vld1_lane_u8(a, b, 7);
}
-// CHECK-LABEL: define <4 x i16> @test_vld1_lane_u16(i16* %a, <4 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_lane_u16(i16* %a, <4 x i16> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
return vld1_lane_u16(a, b, 3);
}
-// CHECK-LABEL: define <2 x i32> @test_vld1_lane_u32(i32* %a, <2 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vld1_lane_u32(i32* %a, <2 x i32> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
return vld1_lane_u32(a, b, 1);
}
-// CHECK-LABEL: define <1 x i64> @test_vld1_lane_u64(i64* %a, <1 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_lane_u64(i64* %a, <1 x i64> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>
return vld1_lane_u64(a, b, 0);
}
-// CHECK-LABEL: define <8 x i8> @test_vld1_lane_s8(i8* %a, <8 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_lane_s8(i8* %a, <8 x i8> %b) #1 {
// CHECK: [[TMP0:%.*]] = load i8, i8* %a
// CHECK: [[VLD1_LANE:%.*]] = insertelement <8 x i8> %b, i8 [[TMP0]], i32 7
// CHECK: ret <8 x i8> [[VLD1_LANE]]
return vld1_lane_s8(a, b, 7);
}
-// CHECK-LABEL: define <4 x i16> @test_vld1_lane_s16(i16* %a, <4 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_lane_s16(i16* %a, <4 x i16> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
return vld1_lane_s16(a, b, 3);
}
-// CHECK-LABEL: define <2 x i32> @test_vld1_lane_s32(i32* %a, <2 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vld1_lane_s32(i32* %a, <2 x i32> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
return vld1_lane_s32(a, b, 1);
}
-// CHECK-LABEL: define <1 x i64> @test_vld1_lane_s64(i64* %a, <1 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_lane_s64(i64* %a, <1 x i64> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>
return vld1_lane_s64(a, b, 0);
}
-// CHECK-LABEL: define <4 x half> @test_vld1_lane_f16(half* %a, <4 x half> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x half> @test_vld1_lane_f16(half* %a, <4 x half> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast half* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <4 x half> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>
return vld1_lane_f16(a, b, 3);
}
-// CHECK-LABEL: define <2 x float> @test_vld1_lane_f32(float* %a, <2 x float> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vld1_lane_f32(float* %a, <2 x float> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast float* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>
return vld1_lane_f32(a, b, 1);
}
-// CHECK-LABEL: define <1 x double> @test_vld1_lane_f64(double* %a, <1 x double> %b) #1 {
+// CHECK-LABEL: define{{.*}} <1 x double> @test_vld1_lane_f64(double* %a, <1 x double> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast double* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double>
return vld1_lane_f64(a, b, 0);
}
-// CHECK-LABEL: define <8 x i8> @test_vld1_lane_p8(i8* %a, <8 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_lane_p8(i8* %a, <8 x i8> %b) #1 {
// CHECK: [[TMP0:%.*]] = load i8, i8* %a
// CHECK: [[VLD1_LANE:%.*]] = insertelement <8 x i8> %b, i8 [[TMP0]], i32 7
// CHECK: ret <8 x i8> [[VLD1_LANE]]
return vld1_lane_p8(a, b, 7);
}
-// CHECK-LABEL: define <4 x i16> @test_vld1_lane_p16(i16* %a, <4 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_lane_p16(i16* %a, <4 x i16> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
return vld1_lane_p16(a, b, 3);
}
-// CHECK-LABEL: define <1 x i64> @test_vld1_lane_p64(i64* %a, <1 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_lane_p64(i64* %a, <1 x i64> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>
return vld1_lane_p64(a, b, 0);
}
-// CHECK-LABEL: define %struct.int8x16x2_t @test_vld2q_lane_s8(i8* %ptr, [2 x <16 x i8>] %src.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int8x16x2_t @test_vld2q_lane_s8(i8* %ptr, [2 x <16 x i8>] %src.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[SRC:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int8x16x2_t, align 16
return vld2q_lane_s8(ptr, src, 15);
}
-// CHECK-LABEL: define %struct.uint8x16x2_t @test_vld2q_lane_u8(i8* %ptr, [2 x <16 x i8>] %src.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint8x16x2_t @test_vld2q_lane_u8(i8* %ptr, [2 x <16 x i8>] %src.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[SRC:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x2_t, align 16
return vld2q_lane_u8(ptr, src, 15);
}
-// CHECK-LABEL: define %struct.poly8x16x2_t @test_vld2q_lane_p8(i8* %ptr, [2 x <16 x i8>] %src.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly8x16x2_t @test_vld2q_lane_p8(i8* %ptr, [2 x <16 x i8>] %src.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[SRC:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x2_t, align 16
return vld2q_lane_p8(ptr, src, 15);
}
-// CHECK-LABEL: define %struct.int8x16x3_t @test_vld3q_lane_s8(i8* %ptr, [3 x <16 x i8>] %src.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int8x16x3_t @test_vld3q_lane_s8(i8* %ptr, [3 x <16 x i8>] %src.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[SRC:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int8x16x3_t, align 16
return vld3q_lane_s8(ptr, src, 15);
}
-// CHECK-LABEL: define %struct.uint8x16x3_t @test_vld3q_lane_u8(i8* %ptr, [3 x <16 x i8>] %src.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint8x16x3_t @test_vld3q_lane_u8(i8* %ptr, [3 x <16 x i8>] %src.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[SRC:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x3_t, align 16
return vld3q_lane_u8(ptr, src, 15);
}
-// CHECK-LABEL: define %struct.uint16x8x2_t @test_vld2q_lane_u16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint16x8x2_t @test_vld2q_lane_u16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x8x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint16x8x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x2_t, align 16
return vld2q_lane_u16(a, b, 7);
}
-// CHECK-LABEL: define %struct.uint32x4x2_t @test_vld2q_lane_u32(i32* %a, [2 x <4 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint32x4x2_t @test_vld2q_lane_u32(i32* %a, [2 x <4 x i32>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x4x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint32x4x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x2_t, align 16
return vld2q_lane_u32(a, b, 3);
}
-// CHECK-LABEL: define %struct.uint64x2x2_t @test_vld2q_lane_u64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint64x2x2_t @test_vld2q_lane_u64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint64x2x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x2_t, align 16
return vld2q_lane_u64(a, b, 1);
}
-// CHECK-LABEL: define %struct.int16x8x2_t @test_vld2q_lane_s16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int16x8x2_t @test_vld2q_lane_s16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int16x8x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int16x8x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int16x8x2_t, align 16
return vld2q_lane_s16(a, b, 7);
}
-// CHECK-LABEL: define %struct.int32x4x2_t @test_vld2q_lane_s32(i32* %a, [2 x <4 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int32x4x2_t @test_vld2q_lane_s32(i32* %a, [2 x <4 x i32>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int32x4x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int32x4x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int32x4x2_t, align 16
return vld2q_lane_s32(a, b, 3);
}
-// CHECK-LABEL: define %struct.int64x2x2_t @test_vld2q_lane_s64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int64x2x2_t @test_vld2q_lane_s64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int64x2x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int64x2x2_t, align 16
return vld2q_lane_s64(a, b, 1);
}
-// CHECK-LABEL: define %struct.float16x8x2_t @test_vld2q_lane_f16(half* %a, [2 x <8 x half>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float16x8x2_t @test_vld2q_lane_f16(half* %a, [2 x <8 x half>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float16x8x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.float16x8x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float16x8x2_t, align 16
return vld2q_lane_f16(a, b, 7);
}
-// CHECK-LABEL: define %struct.float32x4x2_t @test_vld2q_lane_f32(float* %a, [2 x <4 x float>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float32x4x2_t @test_vld2q_lane_f32(float* %a, [2 x <4 x float>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float32x4x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.float32x4x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float32x4x2_t, align 16
return vld2q_lane_f32(a, b, 3);
}
-// CHECK-LABEL: define %struct.float64x2x2_t @test_vld2q_lane_f64(double* %a, [2 x <2 x double>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float64x2x2_t @test_vld2q_lane_f64(double* %a, [2 x <2 x double>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.float64x2x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float64x2x2_t, align 16
return vld2q_lane_f64(a, b, 1);
}
-// CHECK-LABEL: define %struct.poly16x8x2_t @test_vld2q_lane_p16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly16x8x2_t @test_vld2q_lane_p16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x8x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly16x8x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x2_t, align 16
return vld2q_lane_p16(a, b, 7);
}
-// CHECK-LABEL: define %struct.poly64x2x2_t @test_vld2q_lane_p64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x2x2_t @test_vld2q_lane_p64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly64x2x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x2_t, align 16
return vld2q_lane_p64(a, b, 1);
}
-// CHECK-LABEL: define %struct.uint8x8x2_t @test_vld2_lane_u8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint8x8x2_t @test_vld2_lane_u8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x8x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint8x8x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x2_t, align 8
return vld2_lane_u8(a, b, 7);
}
-// CHECK-LABEL: define %struct.uint16x4x2_t @test_vld2_lane_u16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint16x4x2_t @test_vld2_lane_u16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x4x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint16x4x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x2_t, align 8
return vld2_lane_u16(a, b, 3);
}
-// CHECK-LABEL: define %struct.uint32x2x2_t @test_vld2_lane_u32(i32* %a, [2 x <2 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint32x2x2_t @test_vld2_lane_u32(i32* %a, [2 x <2 x i32>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x2x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint32x2x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x2_t, align 8
return vld2_lane_u32(a, b, 1);
}
-// CHECK-LABEL: define %struct.uint64x1x2_t @test_vld2_lane_u64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint64x1x2_t @test_vld2_lane_u64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x1x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint64x1x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x2_t, align 8
return vld2_lane_u64(a, b, 0);
}
-// CHECK-LABEL: define %struct.int8x8x2_t @test_vld2_lane_s8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int8x8x2_t @test_vld2_lane_s8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int8x8x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int8x8x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int8x8x2_t, align 8
return vld2_lane_s8(a, b, 7);
}
-// CHECK-LABEL: define %struct.int16x4x2_t @test_vld2_lane_s16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int16x4x2_t @test_vld2_lane_s16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int16x4x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int16x4x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int16x4x2_t, align 8
return vld2_lane_s16(a, b, 3);
}
-// CHECK-LABEL: define %struct.int32x2x2_t @test_vld2_lane_s32(i32* %a, [2 x <2 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int32x2x2_t @test_vld2_lane_s32(i32* %a, [2 x <2 x i32>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int32x2x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int32x2x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int32x2x2_t, align 8
return vld2_lane_s32(a, b, 1);
}
-// CHECK-LABEL: define %struct.int64x1x2_t @test_vld2_lane_s64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int64x1x2_t @test_vld2_lane_s64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int64x1x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int64x1x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int64x1x2_t, align 8
return vld2_lane_s64(a, b, 0);
}
-// CHECK-LABEL: define %struct.float16x4x2_t @test_vld2_lane_f16(half* %a, [2 x <4 x half>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float16x4x2_t @test_vld2_lane_f16(half* %a, [2 x <4 x half>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float16x4x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.float16x4x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float16x4x2_t, align 8
return vld2_lane_f16(a, b, 3);
}
-// CHECK-LABEL: define %struct.float32x2x2_t @test_vld2_lane_f32(float* %a, [2 x <2 x float>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float32x2x2_t @test_vld2_lane_f32(float* %a, [2 x <2 x float>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float32x2x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.float32x2x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float32x2x2_t, align 8
return vld2_lane_f32(a, b, 1);
}
-// CHECK-LABEL: define %struct.float64x1x2_t @test_vld2_lane_f64(double* %a, [2 x <1 x double>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float64x1x2_t @test_vld2_lane_f64(double* %a, [2 x <1 x double>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.float64x1x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float64x1x2_t, align 8
return vld2_lane_f64(a, b, 0);
}
-// CHECK-LABEL: define %struct.poly8x8x2_t @test_vld2_lane_p8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly8x8x2_t @test_vld2_lane_p8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x8x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.poly8x8x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x2_t, align 8
return vld2_lane_p8(a, b, 7);
}
-// CHECK-LABEL: define %struct.poly16x4x2_t @test_vld2_lane_p16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly16x4x2_t @test_vld2_lane_p16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x4x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.poly16x4x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x2_t, align 8
return vld2_lane_p16(a, b, 3);
}
-// CHECK-LABEL: define %struct.poly64x1x2_t @test_vld2_lane_p64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x1x2_t @test_vld2_lane_p64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.poly64x1x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x2_t, align 8
return vld2_lane_p64(a, b, 0);
}
-// CHECK-LABEL: define %struct.uint16x8x3_t @test_vld3q_lane_u16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint16x8x3_t @test_vld3q_lane_u16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x8x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint16x8x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x3_t, align 16
return vld3q_lane_u16(a, b, 7);
}
-// CHECK-LABEL: define %struct.uint32x4x3_t @test_vld3q_lane_u32(i32* %a, [3 x <4 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint32x4x3_t @test_vld3q_lane_u32(i32* %a, [3 x <4 x i32>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x4x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint32x4x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x3_t, align 16
return vld3q_lane_u32(a, b, 3);
}
-// CHECK-LABEL: define %struct.uint64x2x3_t @test_vld3q_lane_u64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint64x2x3_t @test_vld3q_lane_u64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint64x2x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x3_t, align 16
return vld3q_lane_u64(a, b, 1);
}
-// CHECK-LABEL: define %struct.int16x8x3_t @test_vld3q_lane_s16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int16x8x3_t @test_vld3q_lane_s16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int16x8x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int16x8x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int16x8x3_t, align 16
return vld3q_lane_s16(a, b, 7);
}
-// CHECK-LABEL: define %struct.int32x4x3_t @test_vld3q_lane_s32(i32* %a, [3 x <4 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int32x4x3_t @test_vld3q_lane_s32(i32* %a, [3 x <4 x i32>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int32x4x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int32x4x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int32x4x3_t, align 16
return vld3q_lane_s32(a, b, 3);
}
-// CHECK-LABEL: define %struct.int64x2x3_t @test_vld3q_lane_s64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int64x2x3_t @test_vld3q_lane_s64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int64x2x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int64x2x3_t, align 16
return vld3q_lane_s64(a, b, 1);
}
-// CHECK-LABEL: define %struct.float16x8x3_t @test_vld3q_lane_f16(half* %a, [3 x <8 x half>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float16x8x3_t @test_vld3q_lane_f16(half* %a, [3 x <8 x half>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float16x8x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.float16x8x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float16x8x3_t, align 16
return vld3q_lane_f16(a, b, 7);
}
-// CHECK-LABEL: define %struct.float32x4x3_t @test_vld3q_lane_f32(float* %a, [3 x <4 x float>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float32x4x3_t @test_vld3q_lane_f32(float* %a, [3 x <4 x float>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float32x4x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.float32x4x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float32x4x3_t, align 16
return vld3q_lane_f32(a, b, 3);
}
-// CHECK-LABEL: define %struct.float64x2x3_t @test_vld3q_lane_f64(double* %a, [3 x <2 x double>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float64x2x3_t @test_vld3q_lane_f64(double* %a, [3 x <2 x double>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.float64x2x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float64x2x3_t, align 16
return vld3q_lane_f64(a, b, 1);
}
-// CHECK-LABEL: define %struct.poly8x16x3_t @test_vld3q_lane_p8(i8* %a, [3 x <16 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly8x16x3_t @test_vld3q_lane_p8(i8* %a, [3 x <16 x i8>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x3_t, align 16
return vld3q_lane_p8(a, b, 15);
}
-// CHECK-LABEL: define %struct.poly16x8x3_t @test_vld3q_lane_p16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly16x8x3_t @test_vld3q_lane_p16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x8x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly16x8x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x3_t, align 16
return vld3q_lane_p16(a, b, 7);
}
-// CHECK-LABEL: define %struct.poly64x2x3_t @test_vld3q_lane_p64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x2x3_t @test_vld3q_lane_p64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly64x2x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x3_t, align 16
return vld3q_lane_p64(a, b, 1);
}
-// CHECK-LABEL: define %struct.uint8x8x3_t @test_vld3_lane_u8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint8x8x3_t @test_vld3_lane_u8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x8x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint8x8x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x3_t, align 8
return vld3_lane_u8(a, b, 7);
}
-// CHECK-LABEL: define %struct.uint16x4x3_t @test_vld3_lane_u16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint16x4x3_t @test_vld3_lane_u16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x4x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint16x4x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x3_t, align 8
return vld3_lane_u16(a, b, 3);
}
-// CHECK-LABEL: define %struct.uint32x2x3_t @test_vld3_lane_u32(i32* %a, [3 x <2 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint32x2x3_t @test_vld3_lane_u32(i32* %a, [3 x <2 x i32>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x2x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint32x2x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x3_t, align 8
return vld3_lane_u32(a, b, 1);
}
-// CHECK-LABEL: define %struct.uint64x1x3_t @test_vld3_lane_u64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint64x1x3_t @test_vld3_lane_u64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x1x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint64x1x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x3_t, align 8
return vld3_lane_u64(a, b, 0);
}
-// CHECK-LABEL: define %struct.int8x8x3_t @test_vld3_lane_s8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int8x8x3_t @test_vld3_lane_s8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int8x8x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int8x8x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int8x8x3_t, align 8
return vld3_lane_s8(a, b, 7);
}
-// CHECK-LABEL: define %struct.int16x4x3_t @test_vld3_lane_s16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int16x4x3_t @test_vld3_lane_s16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int16x4x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int16x4x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int16x4x3_t, align 8
return vld3_lane_s16(a, b, 3);
}
-// CHECK-LABEL: define %struct.int32x2x3_t @test_vld3_lane_s32(i32* %a, [3 x <2 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int32x2x3_t @test_vld3_lane_s32(i32* %a, [3 x <2 x i32>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int32x2x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int32x2x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int32x2x3_t, align 8
return vld3_lane_s32(a, b, 1);
}
-// CHECK-LABEL: define %struct.int64x1x3_t @test_vld3_lane_s64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int64x1x3_t @test_vld3_lane_s64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int64x1x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int64x1x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int64x1x3_t, align 8
return vld3_lane_s64(a, b, 0);
}
-// CHECK-LABEL: define %struct.float16x4x3_t @test_vld3_lane_f16(half* %a, [3 x <4 x half>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float16x4x3_t @test_vld3_lane_f16(half* %a, [3 x <4 x half>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float16x4x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.float16x4x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float16x4x3_t, align 8
return vld3_lane_f16(a, b, 3);
}
-// CHECK-LABEL: define %struct.float32x2x3_t @test_vld3_lane_f32(float* %a, [3 x <2 x float>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float32x2x3_t @test_vld3_lane_f32(float* %a, [3 x <2 x float>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float32x2x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.float32x2x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float32x2x3_t, align 8
return vld3_lane_f32(a, b, 1);
}
-// CHECK-LABEL: define %struct.float64x1x3_t @test_vld3_lane_f64(double* %a, [3 x <1 x double>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float64x1x3_t @test_vld3_lane_f64(double* %a, [3 x <1 x double>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.float64x1x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float64x1x3_t, align 8
return vld3_lane_f64(a, b, 0);
}
-// CHECK-LABEL: define %struct.poly8x8x3_t @test_vld3_lane_p8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly8x8x3_t @test_vld3_lane_p8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x8x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.poly8x8x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x3_t, align 8
return vld3_lane_p8(a, b, 7);
}
-// CHECK-LABEL: define %struct.poly16x4x3_t @test_vld3_lane_p16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly16x4x3_t @test_vld3_lane_p16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x4x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.poly16x4x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x3_t, align 8
return vld3_lane_p16(a, b, 3);
}
-// CHECK-LABEL: define %struct.poly64x1x3_t @test_vld3_lane_p64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x1x3_t @test_vld3_lane_p64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.poly64x1x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x3_t, align 8
return vld3_lane_p64(a, b, 0);
}
-// CHECK-LABEL: define %struct.uint8x16x4_t @test_vld4q_lane_u8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint8x16x4_t @test_vld4q_lane_u8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x4_t, align 16
return vld4q_lane_u8(a, b, 15);
}
-// CHECK-LABEL: define %struct.uint16x8x4_t @test_vld4q_lane_u16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint16x8x4_t @test_vld4q_lane_u16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x8x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint16x8x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x4_t, align 16
return vld4q_lane_u16(a, b, 7);
}
-// CHECK-LABEL: define %struct.uint32x4x4_t @test_vld4q_lane_u32(i32* %a, [4 x <4 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint32x4x4_t @test_vld4q_lane_u32(i32* %a, [4 x <4 x i32>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x4x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint32x4x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x4_t, align 16
return vld4q_lane_u32(a, b, 3);
}
-// CHECK-LABEL: define %struct.uint64x2x4_t @test_vld4q_lane_u64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint64x2x4_t @test_vld4q_lane_u64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint64x2x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x4_t, align 16
return vld4q_lane_u64(a, b, 1);
}
-// CHECK-LABEL: define %struct.int8x16x4_t @test_vld4q_lane_s8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int8x16x4_t @test_vld4q_lane_s8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int8x16x4_t, align 16
return vld4q_lane_s8(a, b, 15);
}
-// CHECK-LABEL: define %struct.int16x8x4_t @test_vld4q_lane_s16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int16x8x4_t @test_vld4q_lane_s16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int16x8x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int16x8x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int16x8x4_t, align 16
return vld4q_lane_s16(a, b, 7);
}
-// CHECK-LABEL: define %struct.int32x4x4_t @test_vld4q_lane_s32(i32* %a, [4 x <4 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int32x4x4_t @test_vld4q_lane_s32(i32* %a, [4 x <4 x i32>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int32x4x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int32x4x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int32x4x4_t, align 16
return vld4q_lane_s32(a, b, 3);
}
-// CHECK-LABEL: define %struct.int64x2x4_t @test_vld4q_lane_s64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int64x2x4_t @test_vld4q_lane_s64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int64x2x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int64x2x4_t, align 16
return vld4q_lane_s64(a, b, 1);
}
-// CHECK-LABEL: define %struct.float16x8x4_t @test_vld4q_lane_f16(half* %a, [4 x <8 x half>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float16x8x4_t @test_vld4q_lane_f16(half* %a, [4 x <8 x half>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float16x8x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.float16x8x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float16x8x4_t, align 16
return vld4q_lane_f16(a, b, 7);
}
-// CHECK-LABEL: define %struct.float32x4x4_t @test_vld4q_lane_f32(float* %a, [4 x <4 x float>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float32x4x4_t @test_vld4q_lane_f32(float* %a, [4 x <4 x float>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float32x4x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.float32x4x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float32x4x4_t, align 16
return vld4q_lane_f32(a, b, 3);
}
-// CHECK-LABEL: define %struct.float64x2x4_t @test_vld4q_lane_f64(double* %a, [4 x <2 x double>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float64x2x4_t @test_vld4q_lane_f64(double* %a, [4 x <2 x double>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.float64x2x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float64x2x4_t, align 16
return vld4q_lane_f64(a, b, 1);
}
-// CHECK-LABEL: define %struct.poly8x16x4_t @test_vld4q_lane_p8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly8x16x4_t @test_vld4q_lane_p8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x4_t, align 16
return vld4q_lane_p8(a, b, 15);
}
-// CHECK-LABEL: define %struct.poly16x8x4_t @test_vld4q_lane_p16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly16x8x4_t @test_vld4q_lane_p16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x8x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly16x8x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x4_t, align 16
return vld4q_lane_p16(a, b, 7);
}
-// CHECK-LABEL: define %struct.poly64x2x4_t @test_vld4q_lane_p64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x2x4_t @test_vld4q_lane_p64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly64x2x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x4_t, align 16
return vld4q_lane_p64(a, b, 1);
}
-// CHECK-LABEL: define %struct.uint8x8x4_t @test_vld4_lane_u8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint8x8x4_t @test_vld4_lane_u8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x8x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint8x8x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x4_t, align 8
return vld4_lane_u8(a, b, 7);
}
-// CHECK-LABEL: define %struct.uint16x4x4_t @test_vld4_lane_u16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint16x4x4_t @test_vld4_lane_u16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x4x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint16x4x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x4_t, align 8
return vld4_lane_u16(a, b, 3);
}
-// CHECK-LABEL: define %struct.uint32x2x4_t @test_vld4_lane_u32(i32* %a, [4 x <2 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint32x2x4_t @test_vld4_lane_u32(i32* %a, [4 x <2 x i32>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x2x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint32x2x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x4_t, align 8
return vld4_lane_u32(a, b, 1);
}
-// CHECK-LABEL: define %struct.uint64x1x4_t @test_vld4_lane_u64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.uint64x1x4_t @test_vld4_lane_u64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x1x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint64x1x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x4_t, align 8
return vld4_lane_u64(a, b, 0);
}
-// CHECK-LABEL: define %struct.int8x8x4_t @test_vld4_lane_s8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int8x8x4_t @test_vld4_lane_s8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int8x8x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int8x8x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int8x8x4_t, align 8
return vld4_lane_s8(a, b, 7);
}
-// CHECK-LABEL: define %struct.int16x4x4_t @test_vld4_lane_s16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int16x4x4_t @test_vld4_lane_s16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int16x4x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int16x4x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int16x4x4_t, align 8
return vld4_lane_s16(a, b, 3);
}
-// CHECK-LABEL: define %struct.int32x2x4_t @test_vld4_lane_s32(i32* %a, [4 x <2 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int32x2x4_t @test_vld4_lane_s32(i32* %a, [4 x <2 x i32>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int32x2x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int32x2x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int32x2x4_t, align 8
return vld4_lane_s32(a, b, 1);
}
-// CHECK-LABEL: define %struct.int64x1x4_t @test_vld4_lane_s64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.int64x1x4_t @test_vld4_lane_s64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.int64x1x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int64x1x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int64x1x4_t, align 8
return vld4_lane_s64(a, b, 0);
}
-// CHECK-LABEL: define %struct.float16x4x4_t @test_vld4_lane_f16(half* %a, [4 x <4 x half>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float16x4x4_t @test_vld4_lane_f16(half* %a, [4 x <4 x half>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float16x4x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.float16x4x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float16x4x4_t, align 8
return vld4_lane_f16(a, b, 3);
}
-// CHECK-LABEL: define %struct.float32x2x4_t @test_vld4_lane_f32(float* %a, [4 x <2 x float>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float32x2x4_t @test_vld4_lane_f32(float* %a, [4 x <2 x float>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float32x2x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.float32x2x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float32x2x4_t, align 8
return vld4_lane_f32(a, b, 1);
}
-// CHECK-LABEL: define %struct.float64x1x4_t @test_vld4_lane_f64(double* %a, [4 x <1 x double>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.float64x1x4_t @test_vld4_lane_f64(double* %a, [4 x <1 x double>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.float64x1x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float64x1x4_t, align 8
return vld4_lane_f64(a, b, 0);
}
-// CHECK-LABEL: define %struct.poly8x8x4_t @test_vld4_lane_p8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly8x8x4_t @test_vld4_lane_p8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x8x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.poly8x8x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x4_t, align 8
return vld4_lane_p8(a, b, 7);
}
-// CHECK-LABEL: define %struct.poly16x4x4_t @test_vld4_lane_p16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly16x4x4_t @test_vld4_lane_p16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x4x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.poly16x4x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x4_t, align 8
return vld4_lane_p16(a, b, 3);
}
-// CHECK-LABEL: define %struct.poly64x1x4_t @test_vld4_lane_p64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x1x4_t @test_vld4_lane_p64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.poly64x1x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x4_t, align 8
return vld4_lane_p64(a, b, 0);
}
-// CHECK-LABEL: define void @test_vst1q_lane_u8(i8* %a, <16 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_u8(i8* %a, <16 x i8> %b) #0 {
// CHECK: [[TMP0:%.*]] = extractelement <16 x i8> %b, i32 15
// CHECK: store i8 [[TMP0]], i8* %a
// CHECK: ret void
vst1q_lane_u8(a, b, 15);
}
-// CHECK-LABEL: define void @test_vst1q_lane_u16(i16* %a, <8 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_u16(i16* %a, <8 x i16> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
vst1q_lane_u16(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst1q_lane_u32(i32* %a, <4 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_u32(i32* %a, <4 x i32> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
vst1q_lane_u32(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst1q_lane_u64(i64* %a, <2 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_u64(i64* %a, <2 x i64> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
vst1q_lane_u64(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst1q_lane_s8(i8* %a, <16 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_s8(i8* %a, <16 x i8> %b) #0 {
// CHECK: [[TMP0:%.*]] = extractelement <16 x i8> %b, i32 15
// CHECK: store i8 [[TMP0]], i8* %a
// CHECK: ret void
vst1q_lane_s8(a, b, 15);
}
-// CHECK-LABEL: define void @test_vst1q_lane_s16(i16* %a, <8 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_s16(i16* %a, <8 x i16> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
vst1q_lane_s16(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst1q_lane_s32(i32* %a, <4 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_s32(i32* %a, <4 x i32> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
vst1q_lane_s32(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst1q_lane_s64(i64* %a, <2 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_s64(i64* %a, <2 x i64> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
vst1q_lane_s64(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst1q_lane_f16(half* %a, <8 x half> %b) #0 {
+// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_f16(half* %a, <8 x half> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast half* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <8 x half> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>
vst1q_lane_f16(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst1q_lane_f32(float* %a, <4 x float> %b) #0 {
+// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_f32(float* %a, <4 x float> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast float* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <4 x float> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>
vst1q_lane_f32(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst1q_lane_f64(double* %a, <2 x double> %b) #0 {
+// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_f64(double* %a, <2 x double> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast double* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <2 x double> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double>
vst1q_lane_f64(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst1q_lane_p8(i8* %a, <16 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_p8(i8* %a, <16 x i8> %b) #0 {
// CHECK: [[TMP0:%.*]] = extractelement <16 x i8> %b, i32 15
// CHECK: store i8 [[TMP0]], i8* %a
// CHECK: ret void
vst1q_lane_p8(a, b, 15);
}
-// CHECK-LABEL: define void @test_vst1q_lane_p16(i16* %a, <8 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_p16(i16* %a, <8 x i16> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
vst1q_lane_p16(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst1q_lane_p64(i64* %a, <2 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_p64(i64* %a, <2 x i64> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
vst1q_lane_p64(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst1_lane_u8(i8* %a, <8 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} void @test_vst1_lane_u8(i8* %a, <8 x i8> %b) #1 {
// CHECK: [[TMP0:%.*]] = extractelement <8 x i8> %b, i32 7
// CHECK: store i8 [[TMP0]], i8* %a
// CHECK: ret void
vst1_lane_u8(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst1_lane_u16(i16* %a, <4 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} void @test_vst1_lane_u16(i16* %a, <4 x i16> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
vst1_lane_u16(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst1_lane_u32(i32* %a, <2 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} void @test_vst1_lane_u32(i32* %a, <2 x i32> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
vst1_lane_u32(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst1_lane_u64(i64* %a, <1 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} void @test_vst1_lane_u64(i64* %a, <1 x i64> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>
vst1_lane_u64(a, b, 0);
}
-// CHECK-LABEL: define void @test_vst1_lane_s8(i8* %a, <8 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} void @test_vst1_lane_s8(i8* %a, <8 x i8> %b) #1 {
// CHECK: [[TMP0:%.*]] = extractelement <8 x i8> %b, i32 7
// CHECK: store i8 [[TMP0]], i8* %a
// CHECK: ret void
vst1_lane_s8(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst1_lane_s16(i16* %a, <4 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} void @test_vst1_lane_s16(i16* %a, <4 x i16> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
vst1_lane_s16(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst1_lane_s32(i32* %a, <2 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} void @test_vst1_lane_s32(i32* %a, <2 x i32> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
vst1_lane_s32(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst1_lane_s64(i64* %a, <1 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} void @test_vst1_lane_s64(i64* %a, <1 x i64> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>
vst1_lane_s64(a, b, 0);
}
-// CHECK-LABEL: define void @test_vst1_lane_f16(half* %a, <4 x half> %b) #1 {
+// CHECK-LABEL: define{{.*}} void @test_vst1_lane_f16(half* %a, <4 x half> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast half* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <4 x half> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>
vst1_lane_f16(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst1_lane_f32(float* %a, <2 x float> %b) #1 {
+// CHECK-LABEL: define{{.*}} void @test_vst1_lane_f32(float* %a, <2 x float> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast float* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>
vst1_lane_f32(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst1_lane_f64(double* %a, <1 x double> %b) #1 {
+// CHECK-LABEL: define{{.*}} void @test_vst1_lane_f64(double* %a, <1 x double> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast double* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double>
vst1_lane_f64(a, b, 0);
}
-// CHECK-LABEL: define void @test_vst1_lane_p8(i8* %a, <8 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} void @test_vst1_lane_p8(i8* %a, <8 x i8> %b) #1 {
// CHECK: [[TMP0:%.*]] = extractelement <8 x i8> %b, i32 7
// CHECK: store i8 [[TMP0]], i8* %a
// CHECK: ret void
vst1_lane_p8(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst1_lane_p16(i16* %a, <4 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} void @test_vst1_lane_p16(i16* %a, <4 x i16> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
vst1_lane_p16(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst1_lane_p64(i64* %a, <1 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} void @test_vst1_lane_p64(i64* %a, <1 x i64> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8*
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>
vst1_lane_p64(a, b, 0);
}
-// CHECK-LABEL: define void @test_vst2q_lane_u8(i8* %a, [2 x <16 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_u8(i8* %a, [2 x <16 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[B]], i32 0, i32 0
vst2q_lane_u8(a, b, 15);
}
-// CHECK-LABEL: define void @test_vst2q_lane_u16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_u16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint16x8x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x2_t, %struct.uint16x8x2_t* [[B]], i32 0, i32 0
vst2q_lane_u16(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst2q_lane_u32(i32* %a, [2 x <4 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_u32(i32* %a, [2 x <4 x i32>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint32x4x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x2_t, %struct.uint32x4x2_t* [[B]], i32 0, i32 0
vst2q_lane_u32(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst2q_lane_u64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_u64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint64x2x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x2_t, %struct.uint64x2x2_t* [[B]], i32 0, i32 0
vst2q_lane_u64(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst2q_lane_s8(i8* %a, [2 x <16 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_s8(i8* %a, [2 x <16 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[B]], i32 0, i32 0
vst2q_lane_s8(a, b, 15);
}
-// CHECK-LABEL: define void @test_vst2q_lane_s16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_s16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int16x8x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int16x8x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x2_t, %struct.int16x8x2_t* [[B]], i32 0, i32 0
vst2q_lane_s16(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst2q_lane_s32(i32* %a, [2 x <4 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_s32(i32* %a, [2 x <4 x i32>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int32x4x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int32x4x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x2_t, %struct.int32x4x2_t* [[B]], i32 0, i32 0
vst2q_lane_s32(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst2q_lane_s64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_s64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int64x2x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int64x2x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x2_t, %struct.int64x2x2_t* [[B]], i32 0, i32 0
vst2q_lane_s64(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst2q_lane_f16(half* %a, [2 x <8 x half>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_f16(half* %a, [2 x <8 x half>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float16x8x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float16x8x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x2_t, %struct.float16x8x2_t* [[B]], i32 0, i32 0
vst2q_lane_f16(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst2q_lane_f32(float* %a, [2 x <4 x float>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_f32(float* %a, [2 x <4 x float>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float32x4x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float32x4x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x2_t, %struct.float32x4x2_t* [[B]], i32 0, i32 0
vst2q_lane_f32(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst2q_lane_f64(double* %a, [2 x <2 x double>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_f64(double* %a, [2 x <2 x double>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float64x2x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float64x2x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x2_t, %struct.float64x2x2_t* [[B]], i32 0, i32 0
vst2q_lane_f64(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst2q_lane_p8(i8* %a, [2 x <16 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_p8(i8* %a, [2 x <16 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[B]], i32 0, i32 0
vst2q_lane_p8(a, b, 15);
}
-// CHECK-LABEL: define void @test_vst2q_lane_p16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_p16(i16* %a, [2 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly16x8x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x2_t, %struct.poly16x8x2_t* [[B]], i32 0, i32 0
vst2q_lane_p16(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst2q_lane_p64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_p64(i64* %a, [2 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly64x2x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, %struct.poly64x2x2_t* [[B]], i32 0, i32 0
vst2q_lane_p64(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst2_lane_u8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2_lane_u8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint8x8x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[B]], i32 0, i32 0
vst2_lane_u8(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst2_lane_u16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2_lane_u16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint16x4x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x2_t, %struct.uint16x4x2_t* [[B]], i32 0, i32 0
vst2_lane_u16(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst2_lane_u32(i32* %a, [2 x <2 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2_lane_u32(i32* %a, [2 x <2 x i32>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint32x2x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x2_t, %struct.uint32x2x2_t* [[B]], i32 0, i32 0
vst2_lane_u32(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst2_lane_u64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2_lane_u64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint64x1x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x2_t, %struct.uint64x1x2_t* [[B]], i32 0, i32 0
vst2_lane_u64(a, b, 0);
}
-// CHECK-LABEL: define void @test_vst2_lane_s8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2_lane_s8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int8x8x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int8x8x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[B]], i32 0, i32 0
vst2_lane_s8(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst2_lane_s16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2_lane_s16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int16x4x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int16x4x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x2_t, %struct.int16x4x2_t* [[B]], i32 0, i32 0
vst2_lane_s16(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst2_lane_s32(i32* %a, [2 x <2 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2_lane_s32(i32* %a, [2 x <2 x i32>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int32x2x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int32x2x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x2_t, %struct.int32x2x2_t* [[B]], i32 0, i32 0
vst2_lane_s32(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst2_lane_s64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2_lane_s64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int64x1x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int64x1x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x2_t, %struct.int64x1x2_t* [[B]], i32 0, i32 0
vst2_lane_s64(a, b, 0);
}
-// CHECK-LABEL: define void @test_vst2_lane_f16(half* %a, [2 x <4 x half>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2_lane_f16(half* %a, [2 x <4 x half>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float16x4x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float16x4x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x2_t, %struct.float16x4x2_t* [[B]], i32 0, i32 0
vst2_lane_f16(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst2_lane_f32(float* %a, [2 x <2 x float>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2_lane_f32(float* %a, [2 x <2 x float>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float32x2x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float32x2x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x2_t, %struct.float32x2x2_t* [[B]], i32 0, i32 0
vst2_lane_f32(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst2_lane_f64(double* %a, [2 x <1 x double>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2_lane_f64(double* %a, [2 x <1 x double>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float64x1x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float64x1x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x2_t, %struct.float64x1x2_t* [[B]], i32 0, i32 0
vst2_lane_f64(a, b, 0);
}
-// CHECK-LABEL: define void @test_vst2_lane_p8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2_lane_p8(i8* %a, [2 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly8x8x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[B]], i32 0, i32 0
vst2_lane_p8(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst2_lane_p16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2_lane_p16(i16* %a, [2 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly16x4x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x2_t, %struct.poly16x4x2_t* [[B]], i32 0, i32 0
vst2_lane_p16(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst2_lane_p64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2_lane_p64(i64* %a, [2 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly64x1x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, %struct.poly64x1x2_t* [[B]], i32 0, i32 0
vst2_lane_p64(a, b, 0);
}
-// CHECK-LABEL: define void @test_vst3q_lane_u8(i8* %a, [3 x <16 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_u8(i8* %a, [3 x <16 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[B]], i32 0, i32 0
vst3q_lane_u8(a, b, 15);
}
-// CHECK-LABEL: define void @test_vst3q_lane_u16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_u16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint16x8x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, %struct.uint16x8x3_t* [[B]], i32 0, i32 0
vst3q_lane_u16(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst3q_lane_u32(i32* %a, [3 x <4 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_u32(i32* %a, [3 x <4 x i32>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint32x4x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, %struct.uint32x4x3_t* [[B]], i32 0, i32 0
vst3q_lane_u32(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst3q_lane_u64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_u64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint64x2x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, %struct.uint64x2x3_t* [[B]], i32 0, i32 0
vst3q_lane_u64(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst3q_lane_s8(i8* %a, [3 x <16 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_s8(i8* %a, [3 x <16 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[B]], i32 0, i32 0
vst3q_lane_s8(a, b, 15);
}
-// CHECK-LABEL: define void @test_vst3q_lane_s16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_s16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int16x8x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int16x8x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x3_t, %struct.int16x8x3_t* [[B]], i32 0, i32 0
vst3q_lane_s16(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst3q_lane_s32(i32* %a, [3 x <4 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_s32(i32* %a, [3 x <4 x i32>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int32x4x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int32x4x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x3_t, %struct.int32x4x3_t* [[B]], i32 0, i32 0
vst3q_lane_s32(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst3q_lane_s64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_s64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int64x2x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int64x2x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x3_t, %struct.int64x2x3_t* [[B]], i32 0, i32 0
vst3q_lane_s64(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst3q_lane_f16(half* %a, [3 x <8 x half>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_f16(half* %a, [3 x <8 x half>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float16x8x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float16x8x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x3_t, %struct.float16x8x3_t* [[B]], i32 0, i32 0
vst3q_lane_f16(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst3q_lane_f32(float* %a, [3 x <4 x float>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_f32(float* %a, [3 x <4 x float>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float32x4x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float32x4x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x3_t, %struct.float32x4x3_t* [[B]], i32 0, i32 0
vst3q_lane_f32(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst3q_lane_f64(double* %a, [3 x <2 x double>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_f64(double* %a, [3 x <2 x double>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float64x2x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float64x2x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x3_t, %struct.float64x2x3_t* [[B]], i32 0, i32 0
vst3q_lane_f64(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst3q_lane_p8(i8* %a, [3 x <16 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_p8(i8* %a, [3 x <16 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[B]], i32 0, i32 0
vst3q_lane_p8(a, b, 15);
}
-// CHECK-LABEL: define void @test_vst3q_lane_p16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_p16(i16* %a, [3 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly16x8x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, %struct.poly16x8x3_t* [[B]], i32 0, i32 0
vst3q_lane_p16(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst3q_lane_p64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_p64(i64* %a, [3 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly64x2x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[B]], i32 0, i32 0
vst3q_lane_p64(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst3_lane_u8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3_lane_u8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint8x8x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[B]], i32 0, i32 0
vst3_lane_u8(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst3_lane_u16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3_lane_u16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint16x4x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, %struct.uint16x4x3_t* [[B]], i32 0, i32 0
vst3_lane_u16(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst3_lane_u32(i32* %a, [3 x <2 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3_lane_u32(i32* %a, [3 x <2 x i32>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint32x2x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, %struct.uint32x2x3_t* [[B]], i32 0, i32 0
vst3_lane_u32(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst3_lane_u64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3_lane_u64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint64x1x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, %struct.uint64x1x3_t* [[B]], i32 0, i32 0
vst3_lane_u64(a, b, 0);
}
-// CHECK-LABEL: define void @test_vst3_lane_s8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3_lane_s8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int8x8x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int8x8x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[B]], i32 0, i32 0
vst3_lane_s8(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst3_lane_s16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3_lane_s16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int16x4x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int16x4x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x3_t, %struct.int16x4x3_t* [[B]], i32 0, i32 0
vst3_lane_s16(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst3_lane_s32(i32* %a, [3 x <2 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3_lane_s32(i32* %a, [3 x <2 x i32>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int32x2x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int32x2x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x3_t, %struct.int32x2x3_t* [[B]], i32 0, i32 0
vst3_lane_s32(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst3_lane_s64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3_lane_s64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int64x1x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int64x1x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x3_t, %struct.int64x1x3_t* [[B]], i32 0, i32 0
vst3_lane_s64(a, b, 0);
}
-// CHECK-LABEL: define void @test_vst3_lane_f16(half* %a, [3 x <4 x half>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3_lane_f16(half* %a, [3 x <4 x half>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float16x4x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float16x4x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x3_t, %struct.float16x4x3_t* [[B]], i32 0, i32 0
vst3_lane_f16(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst3_lane_f32(float* %a, [3 x <2 x float>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3_lane_f32(float* %a, [3 x <2 x float>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float32x2x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float32x2x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x3_t, %struct.float32x2x3_t* [[B]], i32 0, i32 0
vst3_lane_f32(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst3_lane_f64(double* %a, [3 x <1 x double>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3_lane_f64(double* %a, [3 x <1 x double>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float64x1x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float64x1x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x3_t, %struct.float64x1x3_t* [[B]], i32 0, i32 0
vst3_lane_f64(a, b, 0);
}
-// CHECK-LABEL: define void @test_vst3_lane_p8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3_lane_p8(i8* %a, [3 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly8x8x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[B]], i32 0, i32 0
vst3_lane_p8(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst3_lane_p16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3_lane_p16(i16* %a, [3 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly16x4x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, %struct.poly16x4x3_t* [[B]], i32 0, i32 0
vst3_lane_p16(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst3_lane_p64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3_lane_p64(i64* %a, [3 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly64x1x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[B]], i32 0, i32 0
vst3_lane_p64(a, b, 0);
}
-// CHECK-LABEL: define void @test_vst4q_lane_u8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_u8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[B]], i32 0, i32 0
vst4q_lane_u8(a, b, 15);
}
-// CHECK-LABEL: define void @test_vst4q_lane_u16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_u16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint16x8x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, %struct.uint16x8x4_t* [[B]], i32 0, i32 0
vst4q_lane_u16(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst4q_lane_u32(i32* %a, [4 x <4 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_u32(i32* %a, [4 x <4 x i32>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint32x4x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, %struct.uint32x4x4_t* [[B]], i32 0, i32 0
vst4q_lane_u32(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst4q_lane_u64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_u64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint64x2x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, %struct.uint64x2x4_t* [[B]], i32 0, i32 0
vst4q_lane_u64(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst4q_lane_s8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_s8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[B]], i32 0, i32 0
vst4q_lane_s8(a, b, 15);
}
-// CHECK-LABEL: define void @test_vst4q_lane_s16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_s16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int16x8x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int16x8x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x4_t, %struct.int16x8x4_t* [[B]], i32 0, i32 0
vst4q_lane_s16(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst4q_lane_s32(i32* %a, [4 x <4 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_s32(i32* %a, [4 x <4 x i32>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int32x4x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int32x4x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x4_t, %struct.int32x4x4_t* [[B]], i32 0, i32 0
vst4q_lane_s32(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst4q_lane_s64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_s64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int64x2x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.int64x2x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x4_t, %struct.int64x2x4_t* [[B]], i32 0, i32 0
vst4q_lane_s64(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst4q_lane_f16(half* %a, [4 x <8 x half>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_f16(half* %a, [4 x <8 x half>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float16x8x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float16x8x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x4_t, %struct.float16x8x4_t* [[B]], i32 0, i32 0
vst4q_lane_f16(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst4q_lane_f32(float* %a, [4 x <4 x float>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_f32(float* %a, [4 x <4 x float>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float32x4x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float32x4x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x4_t, %struct.float32x4x4_t* [[B]], i32 0, i32 0
vst4q_lane_f32(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst4q_lane_f64(double* %a, [4 x <2 x double>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_f64(double* %a, [4 x <2 x double>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float64x2x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.float64x2x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x4_t, %struct.float64x2x4_t* [[B]], i32 0, i32 0
vst4q_lane_f64(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst4q_lane_p8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_p8(i8* %a, [4 x <16 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[B]], i32 0, i32 0
vst4q_lane_p8(a, b, 15);
}
-// CHECK-LABEL: define void @test_vst4q_lane_p16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_p16(i16* %a, [4 x <8 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly16x8x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, %struct.poly16x8x4_t* [[B]], i32 0, i32 0
vst4q_lane_p16(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst4q_lane_p64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_p64(i64* %a, [4 x <2 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly64x2x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[B]], i32 0, i32 0
vst4q_lane_p64(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst4_lane_u8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4_lane_u8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint8x8x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[B]], i32 0, i32 0
vst4_lane_u8(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst4_lane_u16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4_lane_u16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint16x4x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, %struct.uint16x4x4_t* [[B]], i32 0, i32 0
vst4_lane_u16(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst4_lane_u32(i32* %a, [4 x <2 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4_lane_u32(i32* %a, [4 x <2 x i32>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint32x2x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, %struct.uint32x2x4_t* [[B]], i32 0, i32 0
vst4_lane_u32(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst4_lane_u64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4_lane_u64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.uint64x1x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, %struct.uint64x1x4_t* [[B]], i32 0, i32 0
vst4_lane_u64(a, b, 0);
}
-// CHECK-LABEL: define void @test_vst4_lane_s8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4_lane_s8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int8x8x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int8x8x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[B]], i32 0, i32 0
vst4_lane_s8(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst4_lane_s16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4_lane_s16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int16x4x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int16x4x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x4_t, %struct.int16x4x4_t* [[B]], i32 0, i32 0
vst4_lane_s16(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst4_lane_s32(i32* %a, [4 x <2 x i32>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4_lane_s32(i32* %a, [4 x <2 x i32>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int32x2x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int32x2x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x4_t, %struct.int32x2x4_t* [[B]], i32 0, i32 0
vst4_lane_s32(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst4_lane_s64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4_lane_s64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.int64x1x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.int64x1x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x4_t, %struct.int64x1x4_t* [[B]], i32 0, i32 0
vst4_lane_s64(a, b, 0);
}
-// CHECK-LABEL: define void @test_vst4_lane_f16(half* %a, [4 x <4 x half>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4_lane_f16(half* %a, [4 x <4 x half>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float16x4x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float16x4x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x4_t, %struct.float16x4x4_t* [[B]], i32 0, i32 0
vst4_lane_f16(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst4_lane_f32(float* %a, [4 x <2 x float>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4_lane_f32(float* %a, [4 x <2 x float>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float32x2x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float32x2x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x4_t, %struct.float32x2x4_t* [[B]], i32 0, i32 0
vst4_lane_f32(a, b, 1);
}
-// CHECK-LABEL: define void @test_vst4_lane_f64(double* %a, [4 x <1 x double>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4_lane_f64(double* %a, [4 x <1 x double>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.float64x1x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.float64x1x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x4_t, %struct.float64x1x4_t* [[B]], i32 0, i32 0
vst4_lane_f64(a, b, 0);
}
-// CHECK-LABEL: define void @test_vst4_lane_p8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4_lane_p8(i8* %a, [4 x <8 x i8>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly8x8x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[B]], i32 0, i32 0
vst4_lane_p8(a, b, 7);
}
-// CHECK-LABEL: define void @test_vst4_lane_p16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4_lane_p16(i16* %a, [4 x <4 x i16>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly16x4x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, %struct.poly16x4x4_t* [[B]], i32 0, i32 0
vst4_lane_p16(a, b, 3);
}
-// CHECK-LABEL: define void @test_vst4_lane_p64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4_lane_p64(i64* %a, [4 x <1 x i64>] %b.coerce) #2 {
// CHECK: [[B:%.*]] = alloca %struct.poly64x1x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[B]], i32 0, i32 0
#include <arm_neon.h>
-// CHECK-LABEL: define float @test_vdups_lane_f32(<2 x float> %a) #0 {
+// CHECK-LABEL: define{{.*}} float @test_vdups_lane_f32(<2 x float> %a) #0 {
// CHECK: [[VDUPS_LANE:%.*]] = extractelement <2 x float> %a, i32 1
// CHECK: ret float [[VDUPS_LANE]]
float32_t test_vdups_lane_f32(float32x2_t a) {
}
-// CHECK-LABEL: define double @test_vdupd_lane_f64(<1 x double> %a) #0 {
+// CHECK-LABEL: define{{.*}} double @test_vdupd_lane_f64(<1 x double> %a) #0 {
// CHECK: [[VDUPD_LANE:%.*]] = extractelement <1 x double> %a, i32 0
// CHECK: ret double [[VDUPD_LANE]]
float64_t test_vdupd_lane_f64(float64x1_t a) {
}
-// CHECK-LABEL: define float @test_vdups_laneq_f32(<4 x float> %a) #1 {
+// CHECK-LABEL: define{{.*}} float @test_vdups_laneq_f32(<4 x float> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %a, i32 3
// CHECK: ret float [[VGETQ_LANE]]
float32_t test_vdups_laneq_f32(float32x4_t a) {
}
-// CHECK-LABEL: define double @test_vdupd_laneq_f64(<2 x double> %a) #1 {
+// CHECK-LABEL: define{{.*}} double @test_vdupd_laneq_f64(<2 x double> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %a, i32 1
// CHECK: ret double [[VGETQ_LANE]]
float64_t test_vdupd_laneq_f64(float64x2_t a) {
}
-// CHECK-LABEL: define i8 @test_vdupb_lane_s8(<8 x i8> %a) #0 {
+// CHECK-LABEL: define{{.*}} i8 @test_vdupb_lane_s8(<8 x i8> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7
// CHECK: ret i8 [[VGET_LANE]]
int8_t test_vdupb_lane_s8(int8x8_t a) {
}
-// CHECK-LABEL: define i16 @test_vduph_lane_s16(<4 x i16> %a) #0 {
+// CHECK-LABEL: define{{.*}} i16 @test_vduph_lane_s16(<4 x i16> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3
// CHECK: ret i16 [[VGET_LANE]]
int16_t test_vduph_lane_s16(int16x4_t a) {
}
-// CHECK-LABEL: define i32 @test_vdups_lane_s32(<2 x i32> %a) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vdups_lane_s32(<2 x i32> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1
// CHECK: ret i32 [[VGET_LANE]]
int32_t test_vdups_lane_s32(int32x2_t a) {
}
-// CHECK-LABEL: define i64 @test_vdupd_lane_s64(<1 x i64> %a) #0 {
+// CHECK-LABEL: define{{.*}} i64 @test_vdupd_lane_s64(<1 x i64> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0
// CHECK: ret i64 [[VGET_LANE]]
int64_t test_vdupd_lane_s64(int64x1_t a) {
}
-// CHECK-LABEL: define i8 @test_vdupb_lane_u8(<8 x i8> %a) #0 {
+// CHECK-LABEL: define{{.*}} i8 @test_vdupb_lane_u8(<8 x i8> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7
// CHECK: ret i8 [[VGET_LANE]]
uint8_t test_vdupb_lane_u8(uint8x8_t a) {
}
-// CHECK-LABEL: define i16 @test_vduph_lane_u16(<4 x i16> %a) #0 {
+// CHECK-LABEL: define{{.*}} i16 @test_vduph_lane_u16(<4 x i16> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3
// CHECK: ret i16 [[VGET_LANE]]
uint16_t test_vduph_lane_u16(uint16x4_t a) {
}
-// CHECK-LABEL: define i32 @test_vdups_lane_u32(<2 x i32> %a) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vdups_lane_u32(<2 x i32> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1
// CHECK: ret i32 [[VGET_LANE]]
uint32_t test_vdups_lane_u32(uint32x2_t a) {
}
-// CHECK-LABEL: define i64 @test_vdupd_lane_u64(<1 x i64> %a) #0 {
+// CHECK-LABEL: define{{.*}} i64 @test_vdupd_lane_u64(<1 x i64> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0
// CHECK: ret i64 [[VGET_LANE]]
uint64_t test_vdupd_lane_u64(uint64x1_t a) {
return vdupd_lane_u64(a, 0);
}
-// CHECK-LABEL: define i8 @test_vdupb_laneq_s8(<16 x i8> %a) #1 {
+// CHECK-LABEL: define{{.*}} i8 @test_vdupb_laneq_s8(<16 x i8> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15
// CHECK: ret i8 [[VGETQ_LANE]]
int8_t test_vdupb_laneq_s8(int8x16_t a) {
}
-// CHECK-LABEL: define i16 @test_vduph_laneq_s16(<8 x i16> %a) #1 {
+// CHECK-LABEL: define{{.*}} i16 @test_vduph_laneq_s16(<8 x i16> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7
// CHECK: ret i16 [[VGETQ_LANE]]
int16_t test_vduph_laneq_s16(int16x8_t a) {
}
-// CHECK-LABEL: define i32 @test_vdups_laneq_s32(<4 x i32> %a) #1 {
+// CHECK-LABEL: define{{.*}} i32 @test_vdups_laneq_s32(<4 x i32> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3
// CHECK: ret i32 [[VGETQ_LANE]]
int32_t test_vdups_laneq_s32(int32x4_t a) {
}
-// CHECK-LABEL: define i64 @test_vdupd_laneq_s64(<2 x i64> %a) #1 {
+// CHECK-LABEL: define{{.*}} i64 @test_vdupd_laneq_s64(<2 x i64> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1
// CHECK: ret i64 [[VGETQ_LANE]]
int64_t test_vdupd_laneq_s64(int64x2_t a) {
}
-// CHECK-LABEL: define i8 @test_vdupb_laneq_u8(<16 x i8> %a) #1 {
+// CHECK-LABEL: define{{.*}} i8 @test_vdupb_laneq_u8(<16 x i8> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15
// CHECK: ret i8 [[VGETQ_LANE]]
uint8_t test_vdupb_laneq_u8(uint8x16_t a) {
}
-// CHECK-LABEL: define i16 @test_vduph_laneq_u16(<8 x i16> %a) #1 {
+// CHECK-LABEL: define{{.*}} i16 @test_vduph_laneq_u16(<8 x i16> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7
// CHECK: ret i16 [[VGETQ_LANE]]
uint16_t test_vduph_laneq_u16(uint16x8_t a) {
}
-// CHECK-LABEL: define i32 @test_vdups_laneq_u32(<4 x i32> %a) #1 {
+// CHECK-LABEL: define{{.*}} i32 @test_vdups_laneq_u32(<4 x i32> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3
// CHECK: ret i32 [[VGETQ_LANE]]
uint32_t test_vdups_laneq_u32(uint32x4_t a) {
}
-// CHECK-LABEL: define i64 @test_vdupd_laneq_u64(<2 x i64> %a) #1 {
+// CHECK-LABEL: define{{.*}} i64 @test_vdupd_laneq_u64(<2 x i64> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1
// CHECK: ret i64 [[VGETQ_LANE]]
uint64_t test_vdupd_laneq_u64(uint64x2_t a) {
return vdupd_laneq_u64(a, 1);
}
-// CHECK-LABEL: define i8 @test_vdupb_lane_p8(<8 x i8> %a) #0 {
+// CHECK-LABEL: define{{.*}} i8 @test_vdupb_lane_p8(<8 x i8> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7
// CHECK: ret i8 [[VGET_LANE]]
poly8_t test_vdupb_lane_p8(poly8x8_t a) {
return vdupb_lane_p8(a, 7);
}
-// CHECK-LABEL: define i16 @test_vduph_lane_p16(<4 x i16> %a) #0 {
+// CHECK-LABEL: define{{.*}} i16 @test_vduph_lane_p16(<4 x i16> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3
// CHECK: ret i16 [[VGET_LANE]]
poly16_t test_vduph_lane_p16(poly16x4_t a) {
return vduph_lane_p16(a, 3);
}
-// CHECK-LABEL: define i8 @test_vdupb_laneq_p8(<16 x i8> %a) #1 {
+// CHECK-LABEL: define{{.*}} i8 @test_vdupb_laneq_p8(<16 x i8> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15
// CHECK: ret i8 [[VGETQ_LANE]]
poly8_t test_vdupb_laneq_p8(poly8x16_t a) {
return vdupb_laneq_p8(a, 15);
}
-// CHECK-LABEL: define i16 @test_vduph_laneq_p16(<8 x i16> %a) #1 {
+// CHECK-LABEL: define{{.*}} i16 @test_vduph_laneq_p16(<8 x i16> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7
// CHECK: ret i16 [[VGETQ_LANE]]
poly16_t test_vduph_laneq_p16(poly16x8_t a) {
#include <arm_neon.h>
-// CHECK-LABEL: define float @test_vmuls_lane_f32(float %a, <2 x float> %b) #0 {
+// CHECK-LABEL: define{{.*}} float @test_vmuls_lane_f32(float %a, <2 x float> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x float> %b, i32 1
// CHECK: [[MUL:%.*]] = fmul float %a, [[VGET_LANE]]
// CHECK: ret float [[MUL]]
return vmuls_lane_f32(a, b, 1);
}
-// CHECK-LABEL: define double @test_vmuld_lane_f64(double %a, <1 x double> %b) #0 {
+// CHECK-LABEL: define{{.*}} double @test_vmuld_lane_f64(double %a, <1 x double> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %b, i32 0
// CHECK: [[MUL:%.*]] = fmul double %a, [[VGET_LANE]]
// CHECK: ret double [[MUL]]
return vmuld_lane_f64(a, b, 0);
}
-// CHECK-LABEL: define float @test_vmuls_laneq_f32(float %a, <4 x float> %b) #1 {
+// CHECK-LABEL: define{{.*}} float @test_vmuls_laneq_f32(float %a, <4 x float> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %b, i32 3
// CHECK: [[MUL:%.*]] = fmul float %a, [[VGETQ_LANE]]
// CHECK: ret float [[MUL]]
return vmuls_laneq_f32(a, b, 3);
}
-// CHECK-LABEL: define double @test_vmuld_laneq_f64(double %a, <2 x double> %b) #1 {
+// CHECK-LABEL: define{{.*}} double @test_vmuld_laneq_f64(double %a, <2 x double> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1
// CHECK: [[MUL:%.*]] = fmul double %a, [[VGETQ_LANE]]
// CHECK: ret double [[MUL]]
return vmuld_laneq_f64(a, b, 1);
}
-// CHECK-LABEL: define <1 x double> @test_vmul_n_f64(<1 x double> %a, double %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x double> @test_vmul_n_f64(<1 x double> %a, double %b) #0 {
// CHECK: [[TMP2:%.*]] = bitcast <1 x double> %a to double
// CHECK: [[TMP3:%.*]] = fmul double [[TMP2]], %b
// CHECK: [[TMP4:%.*]] = bitcast double [[TMP3]] to <1 x double>
return vmul_n_f64(a, b);
}
-// CHECK-LABEL: define float @test_vmulxs_lane_f32(float %a, <2 x float> %b) #0 {
+// CHECK-LABEL: define{{.*}} float @test_vmulxs_lane_f32(float %a, <2 x float> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x float> %b, i32 1
// CHECK: [[VMULXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmulx.f32(float %a, float [[VGET_LANE]])
// CHECK: ret float [[VMULXS_F32_I]]
return vmulxs_lane_f32(a, b, 1);
}
-// CHECK-LABEL: define float @test_vmulxs_laneq_f32(float %a, <4 x float> %b) #1 {
+// CHECK-LABEL: define{{.*}} float @test_vmulxs_laneq_f32(float %a, <4 x float> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %b, i32 3
// CHECK: [[VMULXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmulx.f32(float %a, float [[VGETQ_LANE]])
// CHECK: ret float [[VMULXS_F32_I]]
return vmulxs_laneq_f32(a, b, 3);
}
-// CHECK-LABEL: define double @test_vmulxd_lane_f64(double %a, <1 x double> %b) #0 {
+// CHECK-LABEL: define{{.*}} double @test_vmulxd_lane_f64(double %a, <1 x double> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %b, i32 0
// CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double %a, double [[VGET_LANE]])
// CHECK: ret double [[VMULXD_F64_I]]
return vmulxd_lane_f64(a, b, 0);
}
-// CHECK-LABEL: define double @test_vmulxd_laneq_f64(double %a, <2 x double> %b) #1 {
+// CHECK-LABEL: define{{.*}} double @test_vmulxd_laneq_f64(double %a, <2 x double> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1
// CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double %a, double [[VGETQ_LANE]])
// CHECK: ret double [[VMULXD_F64_I]]
return vmulxd_laneq_f64(a, b, 1);
}
-// CHECK-LABEL: define <1 x double> @test_vmulx_lane_f64(<1 x double> %a, <1 x double> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x double> @test_vmulx_lane_f64(<1 x double> %a, <1 x double> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0
// CHECK: [[VGET_LANE6:%.*]] = extractelement <1 x double> %b, i32 0
// CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGET_LANE6]])
}
-// CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_0(<1 x double> %a, <2 x double> %b) #1 {
+// CHECK-LABEL: define{{.*}} <1 x double> @test_vmulx_laneq_f64_0(<1 x double> %a, <2 x double> %b) #1 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 0
// CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGETQ_LANE]])
return vmulx_laneq_f64(a, b, 0);
}
-// CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_1(<1 x double> %a, <2 x double> %b) #1 {
+// CHECK-LABEL: define{{.*}} <1 x double> @test_vmulx_laneq_f64_1(<1 x double> %a, <2 x double> %b) #1 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1
// CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGETQ_LANE]])
}
-// CHECK-LABEL: define float @test_vfmas_lane_f32(float %a, float %b, <2 x float> %c) #0 {
+// CHECK-LABEL: define{{.*}} float @test_vfmas_lane_f32(float %a, float %b, <2 x float> %c) #0 {
// CHECK: [[EXTRACT:%.*]] = extractelement <2 x float> %c, i32 1
// CHECK: [[TMP2:%.*]] = call float @llvm.fma.f32(float %b, float [[EXTRACT]], float %a)
// CHECK: ret float [[TMP2]]
return vfmas_lane_f32(a, b, c, 1);
}
-// CHECK-LABEL: define double @test_vfmad_lane_f64(double %a, double %b, <1 x double> %c) #0 {
+// CHECK-LABEL: define{{.*}} double @test_vfmad_lane_f64(double %a, double %b, <1 x double> %c) #0 {
// CHECK: [[EXTRACT:%.*]] = extractelement <1 x double> %c, i32 0
// CHECK: [[TMP2:%.*]] = call double @llvm.fma.f64(double %b, double [[EXTRACT]], double %a)
// CHECK: ret double [[TMP2]]
return vfmad_lane_f64(a, b, c, 0);
}
-// CHECK-LABEL: define double @test_vfmad_laneq_f64(double %a, double %b, <2 x double> %c) #1 {
+// CHECK-LABEL: define{{.*}} double @test_vfmad_laneq_f64(double %a, double %b, <2 x double> %c) #1 {
// CHECK: [[EXTRACT:%.*]] = extractelement <2 x double> %c, i32 1
// CHECK: [[TMP2:%.*]] = call double @llvm.fma.f64(double %b, double [[EXTRACT]], double %a)
// CHECK: ret double [[TMP2]]
return vfmad_laneq_f64(a, b, c, 1);
}
-// CHECK-LABEL: define float @test_vfmss_lane_f32(float %a, float %b, <2 x float> %c) #0 {
+// CHECK-LABEL: define{{.*}} float @test_vfmss_lane_f32(float %a, float %b, <2 x float> %c) #0 {
// CHECK: [[SUB:%.*]] = fneg float %b
// CHECK: [[EXTRACT:%.*]] = extractelement <2 x float> %c, i32 1
// CHECK: [[TMP2:%.*]] = call float @llvm.fma.f32(float [[SUB]], float [[EXTRACT]], float %a)
return vfmss_lane_f32(a, b, c, 1);
}
-// CHECK-LABEL: define <1 x double> @test_vfma_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 {
+// CHECK-LABEL: define{{.*}} <1 x double> @test_vfma_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <1 x double> %v to <8 x i8>
return vfma_lane_f64(a, b, v, 0);
}
-// CHECK-LABEL: define <1 x double> @test_vfms_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 {
+// CHECK-LABEL: define{{.*}} <1 x double> @test_vfms_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 {
// CHECK: [[SUB:%.*]] = fneg <1 x double> %b
// CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8>
return vfms_lane_f64(a, b, v, 0);
}
-// CHECK-LABEL: define <1 x double> @test_vfma_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 {
+// CHECK-LABEL: define{{.*}} <1 x double> @test_vfma_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <2 x double> %v to <16 x i8>
return vfma_laneq_f64(a, b, v, 0);
}
-// CHECK-LABEL: define <1 x double> @test_vfms_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 {
+// CHECK-LABEL: define{{.*}} <1 x double> @test_vfms_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 {
// CHECK: [[SUB:%.*]] = fneg <1 x double> %b
// CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8>
return vfms_laneq_f64(a, b, v, 0);
}
-// CHECK-LABEL: define i32 @test_vqdmullh_lane_s16(i16 %a, <4 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vqdmullh_lane_s16(i16 %a, <4 x i16> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0
return vqdmullh_lane_s16(a, b, 3);
}
-// CHECK-LABEL: define i64 @test_vqdmulls_lane_s32(i32 %a, <2 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} i64 @test_vqdmulls_lane_s32(i32 %a, <2 x i32> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1
// CHECK: [[VQDMULLS_S32_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %a, i32 [[VGET_LANE]])
// CHECK: ret i64 [[VQDMULLS_S32_I]]
return vqdmulls_lane_s32(a, b, 1);
}
-// CHECK-LABEL: define i32 @test_vqdmullh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} i32 @test_vqdmullh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0
return vqdmullh_laneq_s16(a, b, 7);
}
-// CHECK-LABEL: define i64 @test_vqdmulls_laneq_s32(i32 %a, <4 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} i64 @test_vqdmulls_laneq_s32(i32 %a, <4 x i32> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3
// CHECK: [[VQDMULLS_S32_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %a, i32 [[VGETQ_LANE]])
// CHECK: ret i64 [[VQDMULLS_S32_I]]
return vqdmulls_laneq_s32(a, b, 3);
}
-// CHECK-LABEL: define i16 @test_vqdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} i16 @test_vqdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0
return vqdmulhh_lane_s16(a, b, 3);
}
-// CHECK-LABEL: define i32 @test_vqdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vqdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1
// CHECK: [[VQDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqdmulh.i32(i32 %a, i32 [[VGET_LANE]])
// CHECK: ret i32 [[VQDMULHS_S32_I]]
}
-// CHECK-LABEL: define i16 @test_vqdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} i16 @test_vqdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0
}
-// CHECK-LABEL: define i32 @test_vqdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} i32 @test_vqdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3
// CHECK: [[VQDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqdmulh.i32(i32 %a, i32 [[VGETQ_LANE]])
// CHECK: ret i32 [[VQDMULHS_S32_I]]
return vqdmulhs_laneq_s32(a, b, 3);
}
-// CHECK-LABEL: define i16 @test_vqrdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 {
+// CHECK-LABEL: define{{.*}} i16 @test_vqrdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0
return vqrdmulhh_lane_s16(a, b, 3);
}
-// CHECK-LABEL: define i32 @test_vqrdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vqrdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1
// CHECK: [[VQRDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrdmulh.i32(i32 %a, i32 [[VGET_LANE]])
// CHECK: ret i32 [[VQRDMULHS_S32_I]]
}
-// CHECK-LABEL: define i16 @test_vqrdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
+// CHECK-LABEL: define{{.*}} i16 @test_vqrdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0
}
-// CHECK-LABEL: define i32 @test_vqrdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 {
+// CHECK-LABEL: define{{.*}} i32 @test_vqrdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3
// CHECK: [[VQRDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrdmulh.i32(i32 %a, i32 [[VGETQ_LANE]])
// CHECK: ret i32 [[VQRDMULHS_S32_I]]
return vqrdmulhs_laneq_s32(a, b, 3);
}
-// CHECK-LABEL: define i32 @test_vqdmlalh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vqdmlalh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 {
// CHECK: [[LANE:%.*]] = extractelement <4 x i16> %c, i32 3
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0
return vqdmlalh_lane_s16(a, b, c, 3);
}
-// CHECK-LABEL: define i64 @test_vqdmlals_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 {
+// CHECK-LABEL: define{{.*}} i64 @test_vqdmlals_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 {
// CHECK: [[LANE:%.*]] = extractelement <2 x i32> %c, i32 1
// CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]])
// CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 %a, i64 [[VQDMLXL]])
return vqdmlals_lane_s32(a, b, c, 1);
}
-// CHECK-LABEL: define i32 @test_vqdmlalh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 {
+// CHECK-LABEL: define{{.*}} i32 @test_vqdmlalh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 {
// CHECK: [[LANE:%.*]] = extractelement <8 x i16> %c, i32 7
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0
return vqdmlalh_laneq_s16(a, b, c, 7);
}
-// CHECK-LABEL: define i64 @test_vqdmlals_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 {
+// CHECK-LABEL: define{{.*}} i64 @test_vqdmlals_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 {
// CHECK: [[LANE:%.*]] = extractelement <4 x i32> %c, i32 3
// CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]])
// CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 %a, i64 [[VQDMLXL]])
return vqdmlals_laneq_s32(a, b, c, 3);
}
-// CHECK-LABEL: define i32 @test_vqdmlslh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 {
+// CHECK-LABEL: define{{.*}} i32 @test_vqdmlslh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 {
// CHECK: [[LANE:%.*]] = extractelement <4 x i16> %c, i32 3
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0
return vqdmlslh_lane_s16(a, b, c, 3);
}
-// CHECK-LABEL: define i64 @test_vqdmlsls_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 {
+// CHECK-LABEL: define{{.*}} i64 @test_vqdmlsls_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 {
// CHECK: [[LANE:%.*]] = extractelement <2 x i32> %c, i32 1
// CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]])
// CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 %a, i64 [[VQDMLXL]])
return vqdmlsls_lane_s32(a, b, c, 1);
}
-// CHECK-LABEL: define i32 @test_vqdmlslh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 {
+// CHECK-LABEL: define{{.*}} i32 @test_vqdmlslh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 {
// CHECK: [[LANE:%.*]] = extractelement <8 x i16> %c, i32 7
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0
return vqdmlslh_laneq_s16(a, b, c, 7);
}
-// CHECK-LABEL: define i64 @test_vqdmlsls_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 {
+// CHECK-LABEL: define{{.*}} i64 @test_vqdmlsls_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 {
// CHECK: [[LANE:%.*]] = extractelement <4 x i32> %c, i32 3
// CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]])
// CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 %a, i64 [[VQDMLXL]])
return vqdmlsls_laneq_s32(a, b, c, 3);
}
-// CHECK-LABEL: define <1 x double> @test_vmulx_lane_f64_0() #0 {
+// CHECK-LABEL: define{{.*}} <1 x double> @test_vmulx_lane_f64_0() #0 {
// CHECK: [[TMP0:%.*]] = bitcast i64 4599917171378402754 to <1 x double>
// CHECK: [[TMP1:%.*]] = bitcast i64 4606655882138939123 to <1 x double>
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> [[TMP0]], i32 0
return result;
}
-// CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_2() #1 {
+// CHECK-LABEL: define{{.*}} <1 x double> @test_vmulx_laneq_f64_2() #1 {
// CHECK: [[TMP0:%.*]] = bitcast i64 4599917171378402754 to <1 x double>
// CHECK: [[TMP1:%.*]] = bitcast i64 4606655882138939123 to <1 x double>
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x double> [[TMP0]], <1 x double> [[TMP1]], <2 x i32> <i32 0, i32 1>
#include <arm_neon.h>
-// CHECK-LABEL: define <8 x i8> @test_vtbl1_s8(<8 x i8> %a, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl1_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %b) #3
// CHECK: ret <8 x i8> [[VTBL11_I]]
return vtbl1_s8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbl1_s8(<16 x i8> %a, <8 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl1_s8(<16 x i8> %a, <8 x i8> %b) #1 {
// CHECK: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> %a, <8 x i8> %b) #3
// CHECK: ret <8 x i8> [[VTBL1_I]]
int8x8_t test_vqtbl1_s8(int8x16_t a, uint8x8_t b) {
return vqtbl1_s8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbl2_s8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl2_s8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x8x2_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.int8x8x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[A]], i32 0, i32 0
return vtbl2_s8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbl2_s8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl2_s8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[A]], i32 0, i32 0
return vqtbl2_s8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbl3_s8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl3_s8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x8x3_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.int8x8x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[A]], i32 0, i32 0
return vtbl3_s8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbl3_s8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl3_s8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[A]], i32 0, i32 0
return vqtbl3_s8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbl4_s8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl4_s8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x8x4_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.int8x8x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[A]], i32 0, i32 0
return vtbl4_s8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbl4_s8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl4_s8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[A]], i32 0, i32 0
return vqtbl4_s8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbl1q_s8(<16 x i8> %a, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl1q_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> %a, <16 x i8> %b) #3
// CHECK: ret <16 x i8> [[VTBL1_I]]
int8x16_t test_vqtbl1q_s8(int8x16_t a, int8x16_t b) {
return vqtbl1q_s8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbl2q_s8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl2q_s8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[A]], i32 0, i32 0
return vqtbl2q_s8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbl3q_s8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl3q_s8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[A]], i32 0, i32 0
return vqtbl3q_s8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbl4q_s8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl4q_s8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[A]], i32 0, i32 0
return vqtbl4q_s8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbx1_s8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx1_s8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %b, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %c) #3
// CHECK: [[TMP0:%.*]] = icmp uge <8 x i8> %c, <i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8>
return vtbx1_s8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbx2_s8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx2_s8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x8x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int8x8x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[B]], i32 0, i32 0
return vtbx2_s8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbx3_s8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx3_s8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x8x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int8x8x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[B]], i32 0, i32 0
return vtbx3_s8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbx4_s8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx4_s8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x8x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int8x8x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[B]], i32 0, i32 0
return vtbx4_s8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbx1_s8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx1_s8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
// CHECK: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #3
// CHECK: ret <8 x i8> [[VTBX1_I]]
int8x8_t test_vqtbx1_s8(int8x8_t a, int8x16_t b, uint8x8_t c) {
return vqtbx1_s8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbx2_s8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx2_s8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[B]], i32 0, i32 0
return vqtbx2_s8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbx3_s8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx3_s8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[B]], i32 0, i32 0
return vqtbx3_s8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbx4_s8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx4_s8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[B]], i32 0, i32 0
return vqtbx4_s8(a, b, c);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbx1q_s8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx1q_s8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
// CHECK: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #3
// CHECK: ret <16 x i8> [[VTBX1_I]]
int8x16_t test_vqtbx1q_s8(int8x16_t a, int8x16_t b, uint8x16_t c) {
return vqtbx1q_s8(a, b, c);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbx2q_s8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx2q_s8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[B]], i32 0, i32 0
return vqtbx2q_s8(a, b, c);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbx3q_s8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx3q_s8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[B]], i32 0, i32 0
return vqtbx3q_s8(a, b, c);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbx4q_s8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx4q_s8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[B]], i32 0, i32 0
return vqtbx4q_s8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbl1_u8(<8 x i8> %a, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl1_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %b) #3
// CHECK: ret <8 x i8> [[VTBL11_I]]
return vtbl1_u8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbl1_u8(<16 x i8> %a, <8 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl1_u8(<16 x i8> %a, <8 x i8> %b) #1 {
// CHECK: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> %a, <8 x i8> %b) #3
// CHECK: ret <8 x i8> [[VTBL1_I]]
uint8x8_t test_vqtbl1_u8(uint8x16_t a, uint8x8_t b) {
return vqtbl1_u8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbl2_u8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl2_u8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x8x2_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.uint8x8x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[A]], i32 0, i32 0
return vtbl2_u8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbl2_u8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl2_u8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[A]], i32 0, i32 0
return vqtbl2_u8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbl3_u8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl3_u8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x8x3_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.uint8x8x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[A]], i32 0, i32 0
return vtbl3_u8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbl3_u8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl3_u8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[A]], i32 0, i32 0
return vqtbl3_u8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbl4_u8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl4_u8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x8x4_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.uint8x8x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[A]], i32 0, i32 0
return vtbl4_u8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbl4_u8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl4_u8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[A]], i32 0, i32 0
return vqtbl4_u8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbl1q_u8(<16 x i8> %a, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl1q_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> %a, <16 x i8> %b) #3
// CHECK: ret <16 x i8> [[VTBL1_I]]
uint8x16_t test_vqtbl1q_u8(uint8x16_t a, uint8x16_t b) {
return vqtbl1q_u8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbl2q_u8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl2q_u8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[A]], i32 0, i32 0
return vqtbl2q_u8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbl3q_u8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl3q_u8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[A]], i32 0, i32 0
return vqtbl3q_u8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbl4q_u8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl4q_u8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[A]], i32 0, i32 0
return vqtbl4q_u8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbx1_u8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx1_u8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %b, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %c) #3
// CHECK: [[TMP0:%.*]] = icmp uge <8 x i8> %c, <i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8>
return vtbx1_u8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbx2_u8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx2_u8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x8x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint8x8x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[B]], i32 0, i32 0
return vtbx2_u8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbx3_u8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx3_u8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x8x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint8x8x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[B]], i32 0, i32 0
return vtbx3_u8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbx4_u8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx4_u8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x8x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint8x8x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[B]], i32 0, i32 0
return vtbx4_u8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbx1_u8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx1_u8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
// CHECK: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #3
// CHECK: ret <8 x i8> [[VTBX1_I]]
uint8x8_t test_vqtbx1_u8(uint8x8_t a, uint8x16_t b, uint8x8_t c) {
return vqtbx1_u8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbx2_u8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx2_u8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[B]], i32 0, i32 0
return vqtbx2_u8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbx3_u8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx3_u8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[B]], i32 0, i32 0
return vqtbx3_u8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbx4_u8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx4_u8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[B]], i32 0, i32 0
return vqtbx4_u8(a, b, c);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbx1q_u8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx1q_u8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
// CHECK: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #3
// CHECK: ret <16 x i8> [[VTBX1_I]]
uint8x16_t test_vqtbx1q_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c) {
return vqtbx1q_u8(a, b, c);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbx2q_u8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx2q_u8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[B]], i32 0, i32 0
return vqtbx2q_u8(a, b, c);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbx3q_u8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx3q_u8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[B]], i32 0, i32 0
return vqtbx3q_u8(a, b, c);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbx4q_u8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx4q_u8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[B]], i32 0, i32 0
return vqtbx4q_u8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbl1_p8(<8 x i8> %a, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl1_p8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %b) #3
// CHECK: ret <8 x i8> [[VTBL11_I]]
return vtbl1_p8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbl1_p8(<16 x i8> %a, <8 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl1_p8(<16 x i8> %a, <8 x i8> %b) #1 {
// CHECK: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> %a, <8 x i8> %b) #3
// CHECK: ret <8 x i8> [[VTBL1_I]]
poly8x8_t test_vqtbl1_p8(poly8x16_t a, uint8x8_t b) {
return vqtbl1_p8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbl2_p8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl2_p8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x8x2_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.poly8x8x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[A]], i32 0, i32 0
return vtbl2_p8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbl2_p8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl2_p8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[A]], i32 0, i32 0
return vqtbl2_p8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbl3_p8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl3_p8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x8x3_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.poly8x8x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[A]], i32 0, i32 0
return vtbl3_p8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbl3_p8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl3_p8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[A]], i32 0, i32 0
return vqtbl3_p8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbl4_p8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl4_p8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x8x4_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.poly8x8x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[A]], i32 0, i32 0
return vtbl4_p8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbl4_p8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl4_p8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[A]], i32 0, i32 0
return vqtbl4_p8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbl1q_p8(<16 x i8> %a, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl1q_p8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> %a, <16 x i8> %b) #3
// CHECK: ret <16 x i8> [[VTBL1_I]]
poly8x16_t test_vqtbl1q_p8(poly8x16_t a, uint8x16_t b) {
return vqtbl1q_p8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbl2q_p8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl2q_p8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[A]], i32 0, i32 0
return vqtbl2q_p8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbl3q_p8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl3q_p8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[A]], i32 0, i32 0
return vqtbl3q_p8(a, b);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbl4q_p8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl4q_p8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[A]], i32 0, i32 0
return vqtbl4q_p8(a, b);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbx1_p8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx1_p8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %b, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %c) #3
// CHECK: [[TMP0:%.*]] = icmp uge <8 x i8> %c, <i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8>
return vtbx1_p8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbx2_p8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx2_p8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x8x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.poly8x8x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[B]], i32 0, i32 0
return vtbx2_p8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbx3_p8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx3_p8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x8x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.poly8x8x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[B]], i32 0, i32 0
return vtbx3_p8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vtbx4_p8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx4_p8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x8x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.poly8x8x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[B]], i32 0, i32 0
return vtbx4_p8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbx1_p8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx1_p8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
// CHECK: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #3
// CHECK: ret <8 x i8> [[VTBX1_I]]
poly8x8_t test_vqtbx1_p8(poly8x8_t a, uint8x16_t b, uint8x8_t c) {
return vqtbx1_p8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbx2_p8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx2_p8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[B]], i32 0, i32 0
return vqtbx2_p8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbx3_p8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx3_p8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[B]], i32 0, i32 0
return vqtbx3_p8(a, b, c);
}
-// CHECK-LABEL: define <8 x i8> @test_vqtbx4_p8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx4_p8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[B]], i32 0, i32 0
return vqtbx4_p8(a, b, c);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbx1q_p8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx1q_p8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
// CHECK: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #3
// CHECK: ret <16 x i8> [[VTBX1_I]]
poly8x16_t test_vqtbx1q_p8(poly8x16_t a, uint8x16_t b, uint8x16_t c) {
return vqtbx1q_p8(a, b, c);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbx2q_p8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx2q_p8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[B]], i32 0, i32 0
return vqtbx2q_p8(a, b, c);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbx3q_p8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx3q_p8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[B]], i32 0, i32 0
return vqtbx3q_p8(a, b, c);
}
-// CHECK-LABEL: define <16 x i8> @test_vqtbx4q_p8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx4q_p8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[B]], i32 0, i32 0
#include <arm_neon.h>
-// CHECK-LABEL: define <16 x i8> @test_vcombine_s8(<8 x i8> %low, <8 x i8> %high) #0 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vcombine_s8(<8 x i8> %low, <8 x i8> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: ret <16 x i8> [[SHUFFLE_I]]
int8x16_t test_vcombine_s8(int8x8_t low, int8x8_t high) {
return vcombine_s8(low, high);
}
-// CHECK-LABEL: define <8 x i16> @test_vcombine_s16(<4 x i16> %low, <4 x i16> %high) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vcombine_s16(<4 x i16> %low, <4 x i16> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <8 x i16> [[SHUFFLE_I]]
int16x8_t test_vcombine_s16(int16x4_t low, int16x4_t high) {
return vcombine_s16(low, high);
}
-// CHECK-LABEL: define <4 x i32> @test_vcombine_s32(<2 x i32> %low, <2 x i32> %high) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcombine_s32(<2 x i32> %low, <2 x i32> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> %low, <2 x i32> %high, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
// CHECK: ret <4 x i32> [[SHUFFLE_I]]
int32x4_t test_vcombine_s32(int32x2_t low, int32x2_t high) {
return vcombine_s32(low, high);
}
-// CHECK-LABEL: define <2 x i64> @test_vcombine_s64(<1 x i64> %low, <1 x i64> %high) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vcombine_s64(<1 x i64> %low, <1 x i64> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> <i32 0, i32 1>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
int64x2_t test_vcombine_s64(int64x1_t low, int64x1_t high) {
return vcombine_s64(low, high);
}
-// CHECK-LABEL: define <16 x i8> @test_vcombine_u8(<8 x i8> %low, <8 x i8> %high) #0 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vcombine_u8(<8 x i8> %low, <8 x i8> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: ret <16 x i8> [[SHUFFLE_I]]
uint8x16_t test_vcombine_u8(uint8x8_t low, uint8x8_t high) {
return vcombine_u8(low, high);
}
-// CHECK-LABEL: define <8 x i16> @test_vcombine_u16(<4 x i16> %low, <4 x i16> %high) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vcombine_u16(<4 x i16> %low, <4 x i16> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <8 x i16> [[SHUFFLE_I]]
uint16x8_t test_vcombine_u16(uint16x4_t low, uint16x4_t high) {
return vcombine_u16(low, high);
}
-// CHECK-LABEL: define <4 x i32> @test_vcombine_u32(<2 x i32> %low, <2 x i32> %high) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcombine_u32(<2 x i32> %low, <2 x i32> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> %low, <2 x i32> %high, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
// CHECK: ret <4 x i32> [[SHUFFLE_I]]
uint32x4_t test_vcombine_u32(uint32x2_t low, uint32x2_t high) {
return vcombine_u32(low, high);
}
-// CHECK-LABEL: define <2 x i64> @test_vcombine_u64(<1 x i64> %low, <1 x i64> %high) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vcombine_u64(<1 x i64> %low, <1 x i64> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> <i32 0, i32 1>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
uint64x2_t test_vcombine_u64(uint64x1_t low, uint64x1_t high) {
return vcombine_u64(low, high);
}
-// CHECK-LABEL: define <2 x i64> @test_vcombine_p64(<1 x i64> %low, <1 x i64> %high) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vcombine_p64(<1 x i64> %low, <1 x i64> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> <i32 0, i32 1>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
poly64x2_t test_vcombine_p64(poly64x1_t low, poly64x1_t high) {
return vcombine_p64(low, high);
}
-// CHECK-LABEL: define <8 x half> @test_vcombine_f16(<4 x half> %low, <4 x half> %high) #0 {
+// CHECK-LABEL: define{{.*}} <8 x half> @test_vcombine_f16(<4 x half> %low, <4 x half> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x half> %low, <4 x half> %high, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <8 x half> [[SHUFFLE_I]]
float16x8_t test_vcombine_f16(float16x4_t low, float16x4_t high) {
return vcombine_f16(low, high);
}
-// CHECK-LABEL: define <4 x float> @test_vcombine_f32(<2 x float> %low, <2 x float> %high) #0 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vcombine_f32(<2 x float> %low, <2 x float> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x float> %low, <2 x float> %high, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
// CHECK: ret <4 x float> [[SHUFFLE_I]]
float32x4_t test_vcombine_f32(float32x2_t low, float32x2_t high) {
return vcombine_f32(low, high);
}
-// CHECK-LABEL: define <16 x i8> @test_vcombine_p8(<8 x i8> %low, <8 x i8> %high) #0 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vcombine_p8(<8 x i8> %low, <8 x i8> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: ret <16 x i8> [[SHUFFLE_I]]
poly8x16_t test_vcombine_p8(poly8x8_t low, poly8x8_t high) {
return vcombine_p8(low, high);
}
-// CHECK-LABEL: define <8 x i16> @test_vcombine_p16(<4 x i16> %low, <4 x i16> %high) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vcombine_p16(<4 x i16> %low, <4 x i16> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <8 x i16> [[SHUFFLE_I]]
poly16x8_t test_vcombine_p16(poly16x4_t low, poly16x4_t high) {
return vcombine_p16(low, high);
}
-// CHECK-LABEL: define <2 x double> @test_vcombine_f64(<1 x double> %low, <1 x double> %high) #0 {
+// CHECK-LABEL: define{{.*}} <2 x double> @test_vcombine_f64(<1 x double> %low, <1 x double> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x double> %low, <1 x double> %high, <2 x i32> <i32 0, i32 1>
// CHECK: ret <2 x double> [[SHUFFLE_I]]
float64x2_t test_vcombine_f64(float64x1_t low, float64x1_t high) {
#include <arm_neon.h>
-// CHECK-LABEL: define <8 x i8> @test_vget_high_s8(<16 x i8> %a) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vget_high_s8(<16 x i8> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
int8x8_t test_vget_high_s8(int8x16_t a) {
return vget_high_s8(a);
}
-// CHECK-LABEL: define <4 x i16> @test_vget_high_s16(<8 x i16> %a) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vget_high_s16(<8 x i16> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
int16x4_t test_vget_high_s16(int16x8_t a) {
return vget_high_s16(a);
}
-// CHECK-LABEL: define <2 x i32> @test_vget_high_s32(<4 x i32> %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vget_high_s32(<4 x i32> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> <i32 2, i32 3>
// CHECK: ret <2 x i32> [[SHUFFLE_I]]
int32x2_t test_vget_high_s32(int32x4_t a) {
return vget_high_s32(a);
}
-// CHECK-LABEL: define <1 x i64> @test_vget_high_s64(<2 x i64> %a) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vget_high_s64(<2 x i64> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> <i32 1>
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
int64x1_t test_vget_high_s64(int64x2_t a) {
return vget_high_s64(a);
}
-// CHECK-LABEL: define <8 x i8> @test_vget_high_u8(<16 x i8> %a) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vget_high_u8(<16 x i8> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
uint8x8_t test_vget_high_u8(uint8x16_t a) {
return vget_high_u8(a);
}
-// CHECK-LABEL: define <4 x i16> @test_vget_high_u16(<8 x i16> %a) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vget_high_u16(<8 x i16> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
uint16x4_t test_vget_high_u16(uint16x8_t a) {
return vget_high_u16(a);
}
-// CHECK-LABEL: define <2 x i32> @test_vget_high_u32(<4 x i32> %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vget_high_u32(<4 x i32> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> <i32 2, i32 3>
// CHECK: ret <2 x i32> [[SHUFFLE_I]]
uint32x2_t test_vget_high_u32(uint32x4_t a) {
return vget_high_u32(a);
}
-// CHECK-LABEL: define <1 x i64> @test_vget_high_u64(<2 x i64> %a) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vget_high_u64(<2 x i64> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> <i32 1>
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
uint64x1_t test_vget_high_u64(uint64x2_t a) {
return vget_high_u64(a);
}
-// CHECK-LABEL: define <1 x i64> @test_vget_high_p64(<2 x i64> %a) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vget_high_p64(<2 x i64> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> <i32 1>
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
poly64x1_t test_vget_high_p64(poly64x2_t a) {
return vget_high_p64(a);
}
-// CHECK-LABEL: define <4 x half> @test_vget_high_f16(<8 x half> %a) #0 {
+// CHECK-LABEL: define{{.*}} <4 x half> @test_vget_high_f16(<8 x half> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <4 x half> [[SHUFFLE_I]]
float16x4_t test_vget_high_f16(float16x8_t a) {
return vget_high_f16(a);
}
-// CHECK-LABEL: define <2 x float> @test_vget_high_f32(<4 x float> %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vget_high_f32(<4 x float> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 2, i32 3>
// CHECK: ret <2 x float> [[SHUFFLE_I]]
float32x2_t test_vget_high_f32(float32x4_t a) {
return vget_high_f32(a);
}
-// CHECK-LABEL: define <8 x i8> @test_vget_high_p8(<16 x i8> %a) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vget_high_p8(<16 x i8> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
poly8x8_t test_vget_high_p8(poly8x16_t a) {
return vget_high_p8(a);
}
-// CHECK-LABEL: define <4 x i16> @test_vget_high_p16(<8 x i16> %a) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vget_high_p16(<8 x i16> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
poly16x4_t test_vget_high_p16(poly16x8_t a) {
return vget_high_p16(a);
}
-// CHECK-LABEL: define <1 x double> @test_vget_high_f64(<2 x double> %a) #0 {
+// CHECK-LABEL: define{{.*}} <1 x double> @test_vget_high_f64(<2 x double> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x double> %a, <2 x double> %a, <1 x i32> <i32 1>
// CHECK: ret <1 x double> [[SHUFFLE_I]]
float64x1_t test_vget_high_f64(float64x2_t a) {
return vget_high_f64(a);
}
-// CHECK-LABEL: define <8 x i8> @test_vget_low_s8(<16 x i8> %a) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vget_low_s8(<16 x i8> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
int8x8_t test_vget_low_s8(int8x16_t a) {
return vget_low_s8(a);
}
-// CHECK-LABEL: define <4 x i16> @test_vget_low_s16(<8 x i16> %a) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vget_low_s16(<8 x i16> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
int16x4_t test_vget_low_s16(int16x8_t a) {
return vget_low_s16(a);
}
-// CHECK-LABEL: define <2 x i32> @test_vget_low_s32(<4 x i32> %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vget_low_s32(<4 x i32> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> <i32 0, i32 1>
// CHECK: ret <2 x i32> [[SHUFFLE_I]]
int32x2_t test_vget_low_s32(int32x4_t a) {
return vget_low_s32(a);
}
-// CHECK-LABEL: define <1 x i64> @test_vget_low_s64(<2 x i64> %a) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vget_low_s64(<2 x i64> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> zeroinitializer
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
int64x1_t test_vget_low_s64(int64x2_t a) {
return vget_low_s64(a);
}
-// CHECK-LABEL: define <8 x i8> @test_vget_low_u8(<16 x i8> %a) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vget_low_u8(<16 x i8> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
uint8x8_t test_vget_low_u8(uint8x16_t a) {
return vget_low_u8(a);
}
-// CHECK-LABEL: define <4 x i16> @test_vget_low_u16(<8 x i16> %a) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vget_low_u16(<8 x i16> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
uint16x4_t test_vget_low_u16(uint16x8_t a) {
return vget_low_u16(a);
}
-// CHECK-LABEL: define <2 x i32> @test_vget_low_u32(<4 x i32> %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vget_low_u32(<4 x i32> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> <i32 0, i32 1>
// CHECK: ret <2 x i32> [[SHUFFLE_I]]
uint32x2_t test_vget_low_u32(uint32x4_t a) {
return vget_low_u32(a);
}
-// CHECK-LABEL: define <1 x i64> @test_vget_low_u64(<2 x i64> %a) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vget_low_u64(<2 x i64> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> zeroinitializer
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
uint64x1_t test_vget_low_u64(uint64x2_t a) {
return vget_low_u64(a);
}
-// CHECK-LABEL: define <1 x i64> @test_vget_low_p64(<2 x i64> %a) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vget_low_p64(<2 x i64> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> zeroinitializer
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
poly64x1_t test_vget_low_p64(poly64x2_t a) {
return vget_low_p64(a);
}
-// CHECK-LABEL: define <4 x half> @test_vget_low_f16(<8 x half> %a) #0 {
+// CHECK-LABEL: define{{.*}} <4 x half> @test_vget_low_f16(<8 x half> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
// CHECK: ret <4 x half> [[SHUFFLE_I]]
float16x4_t test_vget_low_f16(float16x8_t a) {
return vget_low_f16(a);
}
-// CHECK-LABEL: define <2 x float> @test_vget_low_f32(<4 x float> %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vget_low_f32(<4 x float> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 0, i32 1>
// CHECK: ret <2 x float> [[SHUFFLE_I]]
float32x2_t test_vget_low_f32(float32x4_t a) {
return vget_low_f32(a);
}
-// CHECK-LABEL: define <8 x i8> @test_vget_low_p8(<16 x i8> %a) #0 {
+// CHECK-LABEL: define{{.*}} <8 x i8> @test_vget_low_p8(<16 x i8> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
poly8x8_t test_vget_low_p8(poly8x16_t a) {
return vget_low_p8(a);
}
-// CHECK-LABEL: define <4 x i16> @test_vget_low_p16(<8 x i16> %a) #0 {
+// CHECK-LABEL: define{{.*}} <4 x i16> @test_vget_low_p16(<8 x i16> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
poly16x4_t test_vget_low_p16(poly16x8_t a) {
return vget_low_p16(a);
}
-// CHECK-LABEL: define <1 x double> @test_vget_low_f64(<2 x double> %a) #0 {
+// CHECK-LABEL: define{{.*}} <1 x double> @test_vget_low_f64(<2 x double> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x double> %a, <2 x double> %a, <1 x i32> zeroinitializer
// CHECK: ret <1 x double> [[SHUFFLE_I]]
float64x1_t test_vget_low_f64(float64x2_t a) {
#include <arm_neon.h>
-// CHECK-LABEL: define void @test_vstrq_p128(i128* %ptr, i128 %val) #0 {
+// CHECK-LABEL: define{{.*}} void @test_vstrq_p128(i128* %ptr, i128 %val) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i128* %ptr to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i128*
// CHECK: store i128 %val, i128* [[TMP1]]
}
-// CHECK-LABEL: define i128 @test_vldrq_p128(i128* %ptr) #0 {
+// CHECK-LABEL: define{{.*}} i128 @test_vldrq_p128(i128* %ptr) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i128* %ptr to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i128*
// CHECK: [[TMP2:%.*]] = load i128, i128* [[TMP1]]
}
-// CHECK-LABEL: define void @test_ld_st_p128(i128* %ptr) #0 {
+// CHECK-LABEL: define{{.*}} void @test_ld_st_p128(i128* %ptr) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i128* %ptr to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i128*
// CHECK: [[TMP2:%.*]] = load i128, i128* [[TMP1]]
}
-// CHECK-LABEL: define i128 @test_vmull_p64(i64 %a, i64 %b) #0 {
+// CHECK-LABEL: define{{.*}} i128 @test_vmull_p64(i64 %a, i64 %b) #0 {
// CHECK: [[VMULL_P64_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.pmull64(i64 %a, i64 %b) #3
// CHECK: [[VMULL_P641_I:%.*]] = bitcast <16 x i8> [[VMULL_P64_I]] to i128
// CHECK: ret i128 [[VMULL_P641_I]]
return vmull_p64(a, b);
}
-// CHECK-LABEL: define i128 @test_vmull_high_p64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} i128 @test_vmull_high_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[SHUFFLE_I_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> <i32 1>
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> [[SHUFFLE_I_I]] to i64
// CHECK: [[SHUFFLE_I7_I:%.*]] = shufflevector <2 x i64> %b, <2 x i64> %b, <1 x i32> <i32 1>
return vmull_high_p64(a, b);
}
-// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s8(<16 x i8> %a) #1 {
+// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_s8(<16 x i8> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <16 x i8> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_s8(int8x16_t a) {
return vreinterpretq_p128_s8(a);
}
-// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s16(<8 x i16> %a) #1 {
+// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_s16(<8 x i16> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_s16(int16x8_t a) {
return vreinterpretq_p128_s16(a);
}
-// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s32(<4 x i32> %a) #1 {
+// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_s32(<4 x i32> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_s32(int32x4_t a) {
return vreinterpretq_p128_s32(a);
}
-// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s64(<2 x i64> %a) #1 {
+// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_s64(<2 x i64> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_s64(int64x2_t a) {
return vreinterpretq_p128_s64(a);
}
-// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u8(<16 x i8> %a) #1 {
+// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_u8(<16 x i8> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <16 x i8> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_u8(uint8x16_t a) {
return vreinterpretq_p128_u8(a);
}
-// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u16(<8 x i16> %a) #1 {
+// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_u16(<8 x i16> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_u16(uint16x8_t a) {
return vreinterpretq_p128_u16(a);
}
-// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u32(<4 x i32> %a) #1 {
+// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_u32(<4 x i32> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_u32(uint32x4_t a) {
return vreinterpretq_p128_u32(a);
}
-// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u64(<2 x i64> %a) #1 {
+// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_u64(<2 x i64> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_u64(uint64x2_t a) {
return vreinterpretq_p128_u64(a);
}
-// CHECK-LABEL: define i128 @test_vreinterpretq_p128_f32(<4 x float> %a) #1 {
+// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_f32(<4 x float> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_f32(float32x4_t a) {
return vreinterpretq_p128_f32(a);
}
-// CHECK-LABEL: define i128 @test_vreinterpretq_p128_f64(<2 x double> %a) #1 {
+// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_f64(<2 x double> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_f64(float64x2_t a) {
return vreinterpretq_p128_f64(a);
}
-// CHECK-LABEL: define i128 @test_vreinterpretq_p128_p8(<16 x i8> %a) #1 {
+// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_p8(<16 x i8> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <16 x i8> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_p8(poly8x16_t a) {
return vreinterpretq_p128_p8(a);
}
-// CHECK-LABEL: define i128 @test_vreinterpretq_p128_p16(<8 x i16> %a) #1 {
+// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_p16(<8 x i16> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_p16(poly16x8_t a) {
return vreinterpretq_p128_p16(a);
}
-// CHECK-LABEL: define i128 @test_vreinterpretq_p128_p64(<2 x i64> %a) #1 {
+// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_p64(<2 x i64> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_p64(poly64x2_t a) {
return vreinterpretq_p128_p64(a);
}
-// CHECK-LABEL: define <16 x i8> @test_vreinterpretq_s8_p128(i128 %a) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vreinterpretq_s8_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <16 x i8>
// CHECK: ret <16 x i8> [[TMP0]]
int8x16_t test_vreinterpretq_s8_p128(poly128_t a) {
return vreinterpretq_s8_p128(a);
}
-// CHECK-LABEL: define <8 x i16> @test_vreinterpretq_s16_p128(i128 %a) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vreinterpretq_s16_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <8 x i16>
// CHECK: ret <8 x i16> [[TMP0]]
int16x8_t test_vreinterpretq_s16_p128(poly128_t a) {
return vreinterpretq_s16_p128(a);
}
-// CHECK-LABEL: define <4 x i32> @test_vreinterpretq_s32_p128(i128 %a) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vreinterpretq_s32_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <4 x i32>
// CHECK: ret <4 x i32> [[TMP0]]
int32x4_t test_vreinterpretq_s32_p128(poly128_t a) {
return vreinterpretq_s32_p128(a);
}
-// CHECK-LABEL: define <2 x i64> @test_vreinterpretq_s64_p128(i128 %a) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vreinterpretq_s64_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x i64>
// CHECK: ret <2 x i64> [[TMP0]]
int64x2_t test_vreinterpretq_s64_p128(poly128_t a) {
return vreinterpretq_s64_p128(a);
}
-// CHECK-LABEL: define <16 x i8> @test_vreinterpretq_u8_p128(i128 %a) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vreinterpretq_u8_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <16 x i8>
// CHECK: ret <16 x i8> [[TMP0]]
uint8x16_t test_vreinterpretq_u8_p128(poly128_t a) {
return vreinterpretq_u8_p128(a);
}
-// CHECK-LABEL: define <8 x i16> @test_vreinterpretq_u16_p128(i128 %a) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vreinterpretq_u16_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <8 x i16>
// CHECK: ret <8 x i16> [[TMP0]]
uint16x8_t test_vreinterpretq_u16_p128(poly128_t a) {
return vreinterpretq_u16_p128(a);
}
-// CHECK-LABEL: define <4 x i32> @test_vreinterpretq_u32_p128(i128 %a) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vreinterpretq_u32_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <4 x i32>
// CHECK: ret <4 x i32> [[TMP0]]
uint32x4_t test_vreinterpretq_u32_p128(poly128_t a) {
return vreinterpretq_u32_p128(a);
}
-// CHECK-LABEL: define <2 x i64> @test_vreinterpretq_u64_p128(i128 %a) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vreinterpretq_u64_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x i64>
// CHECK: ret <2 x i64> [[TMP0]]
uint64x2_t test_vreinterpretq_u64_p128(poly128_t a) {
return vreinterpretq_u64_p128(a);
}
-// CHECK-LABEL: define <4 x float> @test_vreinterpretq_f32_p128(i128 %a) #1 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vreinterpretq_f32_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <4 x float>
// CHECK: ret <4 x float> [[TMP0]]
float32x4_t test_vreinterpretq_f32_p128(poly128_t a) {
return vreinterpretq_f32_p128(a);
}
-// CHECK-LABEL: define <2 x double> @test_vreinterpretq_f64_p128(i128 %a) #1 {
+// CHECK-LABEL: define{{.*}} <2 x double> @test_vreinterpretq_f64_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x double>
// CHECK: ret <2 x double> [[TMP0]]
float64x2_t test_vreinterpretq_f64_p128(poly128_t a) {
return vreinterpretq_f64_p128(a);
}
-// CHECK-LABEL: define <16 x i8> @test_vreinterpretq_p8_p128(i128 %a) #1 {
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vreinterpretq_p8_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <16 x i8>
// CHECK: ret <16 x i8> [[TMP0]]
poly8x16_t test_vreinterpretq_p8_p128(poly128_t a) {
return vreinterpretq_p8_p128(a);
}
-// CHECK-LABEL: define <8 x i16> @test_vreinterpretq_p16_p128(i128 %a) #1 {
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vreinterpretq_p16_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <8 x i16>
// CHECK: ret <8 x i16> [[TMP0]]
poly16x8_t test_vreinterpretq_p16_p128(poly128_t a) {
return vreinterpretq_p16_p128(a);
}
-// CHECK-LABEL: define <2 x i64> @test_vreinterpretq_p64_p128(i128 %a) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vreinterpretq_p64_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x i64>
// CHECK: ret <2 x i64> [[TMP0]]
poly64x2_t test_vreinterpretq_p64_p128(poly128_t a) {
#include <arm_neon.h>
-// CHECK-LABEL: define <1 x i64> @test_vceq_p64(<1 x i64> %a, <1 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vceq_p64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[CMP_I:%.*]] = icmp eq <1 x i64> %a, %b
// CHECK: [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
// CHECK: ret <1 x i64> [[SEXT_I]]
return vceq_p64(a, b);
}
-// CHECK-LABEL: define <2 x i64> @test_vceqq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vceqq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[CMP_I:%.*]] = icmp eq <2 x i64> %a, %b
// CHECK: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
// CHECK: ret <2 x i64> [[SEXT_I]]
return vceqq_p64(a, b);
}
-// CHECK-LABEL: define <1 x i64> @test_vtst_p64(<1 x i64> %a, <1 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vtst_p64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[TMP4:%.*]] = and <1 x i64> %a, %b
// CHECK: [[TMP5:%.*]] = icmp ne <1 x i64> [[TMP4]], zeroinitializer
// CHECK: [[VTST_I:%.*]] = sext <1 x i1> [[TMP5]] to <1 x i64>
return vtst_p64(a, b);
}
-// CHECK-LABEL: define <2 x i64> @test_vtstq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vtstq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[TMP4:%.*]] = and <2 x i64> %a, %b
// CHECK: [[TMP5:%.*]] = icmp ne <2 x i64> [[TMP4]], zeroinitializer
// CHECK: [[VTST_I:%.*]] = sext <2 x i1> [[TMP5]] to <2 x i64>
return vtstq_p64(a, b);
}
-// CHECK-LABEL: define <1 x i64> @test_vbsl_p64(<1 x i64> %a, <1 x i64> %b, <1 x i64> %c) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vbsl_p64(<1 x i64> %a, <1 x i64> %b, <1 x i64> %c) #0 {
// CHECK: [[VBSL3_I:%.*]] = and <1 x i64> %a, %b
// CHECK: [[TMP3:%.*]] = xor <1 x i64> %a, <i64 -1>
// CHECK: [[VBSL4_I:%.*]] = and <1 x i64> [[TMP3]], %c
return vbsl_p64(a, b, c);
}
-// CHECK-LABEL: define <2 x i64> @test_vbslq_p64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vbslq_p64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) #1 {
// CHECK: [[VBSL3_I:%.*]] = and <2 x i64> %a, %b
// CHECK: [[TMP3:%.*]] = xor <2 x i64> %a, <i64 -1, i64 -1>
// CHECK: [[VBSL4_I:%.*]] = and <2 x i64> [[TMP3]], %c
return vbslq_p64(a, b, c);
}
-// CHECK-LABEL: define i64 @test_vget_lane_p64(<1 x i64> %v) #0 {
+// CHECK-LABEL: define{{.*}} i64 @test_vget_lane_p64(<1 x i64> %v) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %v, i32 0
// CHECK: ret i64 [[VGET_LANE]]
poly64_t test_vget_lane_p64(poly64x1_t v) {
return vget_lane_p64(v, 0);
}
-// CHECK-LABEL: define i64 @test_vgetq_lane_p64(<2 x i64> %v) #1 {
+// CHECK-LABEL: define{{.*}} i64 @test_vgetq_lane_p64(<2 x i64> %v) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %v, i32 1
// CHECK: ret i64 [[VGETQ_LANE]]
poly64_t test_vgetq_lane_p64(poly64x2_t v) {
return vgetq_lane_p64(v, 1);
}
-// CHECK-LABEL: define <1 x i64> @test_vset_lane_p64(i64 %a, <1 x i64> %v) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vset_lane_p64(i64 %a, <1 x i64> %v) #0 {
// CHECK: [[VSET_LANE:%.*]] = insertelement <1 x i64> %v, i64 %a, i32 0
// CHECK: ret <1 x i64> [[VSET_LANE]]
poly64x1_t test_vset_lane_p64(poly64_t a, poly64x1_t v) {
return vset_lane_p64(a, v, 0);
}
-// CHECK-LABEL: define <2 x i64> @test_vsetq_lane_p64(i64 %a, <2 x i64> %v) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vsetq_lane_p64(i64 %a, <2 x i64> %v) #1 {
// CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %v, i64 %a, i32 1
// CHECK: ret <2 x i64> [[VSET_LANE]]
poly64x2_t test_vsetq_lane_p64(poly64_t a, poly64x2_t v) {
return vsetq_lane_p64(a, v, 1);
}
-// CHECK-LABEL: define <1 x i64> @test_vcopy_lane_p64(<1 x i64> %a, <1 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vcopy_lane_p64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %b, i32 0
// CHECK: [[VSET_LANE:%.*]] = insertelement <1 x i64> %a, i64 [[VGET_LANE]], i32 0
// CHECK: ret <1 x i64> [[VSET_LANE]]
}
-// CHECK-LABEL: define <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) #1 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %b, i32 0
// CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %a, i64 [[VGET_LANE]], i32 1
// CHECK: ret <2 x i64> [[VSET_LANE]]
return vcopyq_lane_p64(a, 1, b, 0);
}
-// CHECK-LABEL: define <2 x i64> @test_vcopyq_laneq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vcopyq_laneq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %b, i32 1
// CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %a, i64 [[VGETQ_LANE]], i32 1
// CHECK: ret <2 x i64> [[VSET_LANE]]
return vcopyq_laneq_p64(a, 1, b, 1);
}
-// CHECK-LABEL: define <1 x i64> @test_vcreate_p64(i64 %a) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vcreate_p64(i64 %a) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i64 %a to <1 x i64>
// CHECK: ret <1 x i64> [[TMP0]]
poly64x1_t test_vcreate_p64(uint64_t a) {
return vcreate_p64(a);
}
-// CHECK-LABEL: define <1 x i64> @test_vdup_n_p64(i64 %a) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vdup_n_p64(i64 %a) #0 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <1 x i64> undef, i64 %a, i32 0
// CHECK: ret <1 x i64> [[VECINIT_I]]
poly64x1_t test_vdup_n_p64(poly64_t a) {
return vdup_n_p64(a);
}
-// CHECK-LABEL: define <2 x i64> @test_vdupq_n_p64(i64 %a) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vdupq_n_p64(i64 %a) #1 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 %a, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x i64> [[VECINIT_I]], i64 %a, i32 1
// CHECK: ret <2 x i64> [[VECINIT1_I]]
return vdupq_n_p64(a);
}
-// CHECK-LABEL: define <1 x i64> @test_vmov_n_p64(i64 %a) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vmov_n_p64(i64 %a) #0 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <1 x i64> undef, i64 %a, i32 0
// CHECK: ret <1 x i64> [[VECINIT_I]]
poly64x1_t test_vmov_n_p64(poly64_t a) {
return vmov_n_p64(a);
}
-// CHECK-LABEL: define <2 x i64> @test_vmovq_n_p64(i64 %a) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vmovq_n_p64(i64 %a) #1 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 %a, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x i64> [[VECINIT_I]], i64 %a, i32 1
// CHECK: ret <2 x i64> [[VECINIT1_I]]
return vmovq_n_p64(a);
}
-// CHECK-LABEL: define <1 x i64> @test_vdup_lane_p64(<1 x i64> %vec) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vdup_lane_p64(<1 x i64> %vec) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> [[VEC:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
// CHECK: [[LANE:%.*]] = shufflevector <1 x i64> [[TMP1]], <1 x i64> [[TMP1]], <1 x i32> zeroinitializer
return vdup_lane_p64(vec, 0);
}
-// CHECK-LABEL: define <2 x i64> @test_vdupq_lane_p64(<1 x i64> %vec) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vdupq_lane_p64(<1 x i64> %vec) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> [[VEC:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
// CHECK: [[LANE:%.*]] = shufflevector <1 x i64> [[TMP1]], <1 x i64> [[TMP1]], <2 x i32> zeroinitializer
return vdupq_lane_p64(vec, 0);
}
-// CHECK-LABEL: define <2 x i64> @test_vdupq_laneq_p64(<2 x i64> %vec) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vdupq_laneq_p64(<2 x i64> %vec) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> [[VEC:%.*]] to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
// CHECK: [[LANE:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> [[TMP1]], <2 x i32> <i32 1, i32 1>
return vdupq_laneq_p64(vec, 1);
}
-// CHECK-LABEL: define <2 x i64> @test_vcombine_p64(<1 x i64> %low, <1 x i64> %high) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vcombine_p64(<1 x i64> %low, <1 x i64> %high) #1 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> <i32 0, i32 1>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
poly64x2_t test_vcombine_p64(poly64x1_t low, poly64x1_t high) {
return vcombine_p64(low, high);
}
-// CHECK-LABEL: define <1 x i64> @test_vld1_p64(i64* %ptr) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_p64(i64* %ptr) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <1 x i64>*
// CHECK: [[TMP2:%.*]] = load <1 x i64>, <1 x i64>* [[TMP1]]
return vld1_p64(ptr);
}
-// CHECK-LABEL: define <2 x i64> @test_vld1q_p64(i64* %ptr) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_p64(i64* %ptr) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <2 x i64>*
// CHECK: [[TMP2:%.*]] = load <2 x i64>, <2 x i64>* [[TMP1]]
return vld1q_p64(ptr);
}
-// CHECK-LABEL: define void @test_vst1_p64(i64* %ptr, <1 x i64> %val) #0 {
+// CHECK-LABEL: define{{.*}} void @test_vst1_p64(i64* %ptr, <1 x i64> %val) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8*
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %val to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to <1 x i64>*
return vst1_p64(ptr, val);
}
-// CHECK-LABEL: define void @test_vst1q_p64(i64* %ptr, <2 x i64> %val) #1 {
+// CHECK-LABEL: define{{.*}} void @test_vst1q_p64(i64* %ptr, <2 x i64> %val) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8*
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %val to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to <2 x i64>*
return vst1q_p64(ptr, val);
}
-// CHECK-LABEL: define %struct.poly64x1x2_t @test_vld2_p64(i64* %ptr) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x1x2_t @test_vld2_p64(i64* %ptr) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x2_t, align 8
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x2_t, align 8
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x2_t* [[__RET]] to i8*
return vld2_p64(ptr);
}
-// CHECK-LABEL: define %struct.poly64x2x2_t @test_vld2q_p64(i64* %ptr) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x2x2_t @test_vld2q_p64(i64* %ptr) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x2_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x2_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x2_t* [[__RET]] to i8*
return vld2q_p64(ptr);
}
-// CHECK-LABEL: define %struct.poly64x1x3_t @test_vld3_p64(i64* %ptr) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x1x3_t @test_vld3_p64(i64* %ptr) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x3_t, align 8
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x3_t, align 8
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x3_t* [[__RET]] to i8*
return vld3_p64(ptr);
}
-// CHECK-LABEL: define %struct.poly64x2x3_t @test_vld3q_p64(i64* %ptr) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x2x3_t @test_vld3q_p64(i64* %ptr) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x3_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x3_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x3_t* [[__RET]] to i8*
return vld3q_p64(ptr);
}
-// CHECK-LABEL: define %struct.poly64x1x4_t @test_vld4_p64(i64* %ptr) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x1x4_t @test_vld4_p64(i64* %ptr) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x4_t, align 8
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x4_t, align 8
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x4_t* [[__RET]] to i8*
return vld4_p64(ptr);
}
-// CHECK-LABEL: define %struct.poly64x2x4_t @test_vld4q_p64(i64* %ptr) #2 {
+// CHECK-LABEL: define{{.*}} %struct.poly64x2x4_t @test_vld4q_p64(i64* %ptr) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x4_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x4_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x4_t* [[__RET]] to i8*
return vld4q_p64(ptr);
}
-// CHECK-LABEL: define void @test_vst2_p64(i64* %ptr, [2 x <1 x i64>] %val.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2_p64(i64* %ptr, [2 x <1 x i64>] %val.coerce) #2 {
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x1x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, %struct.poly64x1x2_t* [[VAL]], i32 0, i32 0
return vst2_p64(ptr, val);
}
-// CHECK-LABEL: define void @test_vst2q_p64(i64* %ptr, [2 x <2 x i64>] %val.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst2q_p64(i64* %ptr, [2 x <2 x i64>] %val.coerce) #2 {
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x2x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, %struct.poly64x2x2_t* [[VAL]], i32 0, i32 0
return vst2q_p64(ptr, val);
}
-// CHECK-LABEL: define void @test_vst3_p64(i64* %ptr, [3 x <1 x i64>] %val.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3_p64(i64* %ptr, [3 x <1 x i64>] %val.coerce) #2 {
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x1x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[VAL]], i32 0, i32 0
return vst3_p64(ptr, val);
}
-// CHECK-LABEL: define void @test_vst3q_p64(i64* %ptr, [3 x <2 x i64>] %val.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst3q_p64(i64* %ptr, [3 x <2 x i64>] %val.coerce) #2 {
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x2x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[VAL]], i32 0, i32 0
return vst3q_p64(ptr, val);
}
-// CHECK-LABEL: define void @test_vst4_p64(i64* %ptr, [4 x <1 x i64>] %val.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4_p64(i64* %ptr, [4 x <1 x i64>] %val.coerce) #2 {
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x1x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[VAL]], i32 0, i32 0
return vst4_p64(ptr, val);
}
-// CHECK-LABEL: define void @test_vst4q_p64(i64* %ptr, [4 x <2 x i64>] %val.coerce) #2 {
+// CHECK-LABEL: define{{.*}} void @test_vst4q_p64(i64* %ptr, [4 x <2 x i64>] %val.coerce) #2 {
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x2x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[VAL]], i32 0, i32 0
return vst4q_p64(ptr, val);
}
-// CHECK-LABEL: define <1 x i64> @test_vext_p64(<1 x i64> %a, <1 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vext_p64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
}
-// CHECK-LABEL: define <2 x i64> @test_vextq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vextq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
return vextq_p64(a, b, 1);
}
-// CHECK-LABEL: define <2 x i64> @test_vzip1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vzip1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
poly64x2_t test_vzip1q_p64(poly64x2_t a, poly64x2_t b) {
return vzip1q_p64(a, b);
}
-// CHECK-LABEL: define <2 x i64> @test_vzip2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vzip2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
poly64x2_t test_vzip2q_p64(poly64x2_t a, poly64x2_t b) {
return vzip2q_u64(a, b);
}
-// CHECK-LABEL: define <2 x i64> @test_vuzp1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vuzp1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
poly64x2_t test_vuzp1q_p64(poly64x2_t a, poly64x2_t b) {
return vuzp1q_p64(a, b);
}
-// CHECK-LABEL: define <2 x i64> @test_vuzp2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vuzp2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
poly64x2_t test_vuzp2q_p64(poly64x2_t a, poly64x2_t b) {
return vuzp2q_u64(a, b);
}
-// CHECK-LABEL: define <2 x i64> @test_vtrn1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vtrn1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
poly64x2_t test_vtrn1q_p64(poly64x2_t a, poly64x2_t b) {
return vtrn1q_p64(a, b);
}
-// CHECK-LABEL: define <2 x i64> @test_vtrn2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vtrn2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
poly64x2_t test_vtrn2q_p64(poly64x2_t a, poly64x2_t b) {
return vtrn2q_u64(a, b);
}
-// CHECK-LABEL: define <1 x i64> @test_vsri_n_p64(<1 x i64> %a, <1 x i64> %b) #0 {
+// CHECK-LABEL: define{{.*}} <1 x i64> @test_vsri_n_p64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
// CHECK: [[VSRI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
return vsri_n_p64(a, b, 33);
}
-// CHECK-LABEL: define <2 x i64> @test_vsriq_n_p64(<2 x i64> %a, <2 x i64> %b) #1 {
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vsriq_n_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
// CHECK: [[VSRI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
// Page 27, item 1
#if __ARM_FEATURE_SVE_BITS == 256 && __ARM_FEATURE_SVE_VECTOR_OPERATORS
-// CHECK256-LABEL: @x256 = local_unnamed_addr global <4 x i64> <i64 0, i64 1, i64 2, i64 3>, align 16
+// CHECK256-LABEL: @x256 ={{.*}} local_unnamed_addr global <4 x i64> <i64 0, i64 1, i64 2, i64 3>, align 16
typedef svint64_t vec256 __attribute__((arm_sve_vector_bits(256)));
vec256 x256 = {0, 1, 2, 3};
#endif
#if __ARM_FEATURE_SVE_BITS == 512 && __ARM_FEATURE_SVE_VECTOR_OPERATORS
-// CHECK512-LABEL: @x512 = local_unnamed_addr global <8 x i64> <i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0>, align 16
+// CHECK512-LABEL: @x512 ={{.*}} local_unnamed_addr global <8 x i64> <i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0>, align 16
typedef svint64_t vec512 __attribute__((arm_sve_vector_bits(512)));
vec512 x512 = {0, 1, 2, 3, 3 , 2 , 1, 0};
#endif
#if __ARM_FEATURE_SVE_BITS == 1024 && __ARM_FEATURE_SVE_VECTOR_OPERATORS
-// CHECK1024-LABEL: @x1024 = local_unnamed_addr global <16 x i64> <i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0, i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0>, align 16
+// CHECK1024-LABEL: @x1024 ={{.*}} local_unnamed_addr global <16 x i64> <i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0, i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0>, align 16
typedef svint64_t vec1024 __attribute__((arm_sve_vector_bits(1024)));
vec1024 x1024 = {0, 1, 2, 3, 3 , 2 , 1, 0, 0, 1, 2, 3, 3 , 2 , 1, 0};
#endif
#if __ARM_FEATURE_SVE_BITS == 2048 && __ARM_FEATURE_SVE_VECTOR_OPERATORS
-// CHECK2048-LABEL: @x2048 = local_unnamed_addr global <32 x i64> <i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0, i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0, i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0, i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0>, align 16
+// CHECK2048-LABEL: @x2048 ={{.*}} local_unnamed_addr global <32 x i64> <i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0, i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0, i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0, i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0>, align 16
typedef svint64_t vec2048 __attribute__((arm_sve_vector_bits(2048)));
vec2048 x2048 = {0, 1, 2, 3, 3 , 2 , 1, 0, 0, 1, 2, 3, 3 , 2 , 1, 0,
0, 1, 2, 3, 3 , 2 , 1, 0, 0, 1, 2, 3, 3 , 2 , 1, 0};
#if __ARM_FEATURE_SVE_BITS && __ARM_FEATURE_SVE_VECTOR_OPERATORS
#define N __ARM_FEATURE_SVE_BITS
typedef int8_t vec_int8 __attribute__((vector_size(N / 8)));
-// CHECK128-LABEL: define <16 x i8> @f2(<16 x i8> %x)
+// CHECK128-LABEL: define{{.*}} <16 x i8> @f2(<16 x i8> %x)
// CHECK128-NEXT: entry:
// CHECK128-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 31)
// CHECK128-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 16 x i8> @llvm.experimental.vector.insert.nxv16i8.v16i8(<vscale x 16 x i8> undef, <16 x i8> [[X:%.*]], i64 0)
// CHECK128-NEXT: [[CASTFIXEDSVE:%.*]] = call <16 x i8> @llvm.experimental.vector.extract.v16i8.nxv16i8(<vscale x 16 x i8> [[TMP1]], i64 0)
// CHECK128-NEXT: ret <16 x i8> [[CASTFIXEDSVE]]
-// CHECK-LABEL: define void @f2(
+// CHECK-LABEL: define{{.*}} void @f2(
// CHECK-SAME: <[[#div(VBITS,8)]] x i8>* noalias nocapture sret(<[[#div(VBITS,8)]] x i8>) align 16 %agg.result, <[[#div(VBITS,8)]] x i8>* nocapture readonly %0)
// CHECK-NEXT: entry:
// CHECK-NEXT: [[X:%.*]] = load <[[#div(VBITS,8)]] x i8>, <[[#div(VBITS,8)]] x i8>* [[TMP0:%.*]], align 16, [[TBAA6:!tbaa !.*]]
void f3(vec1);
typedef svint8_t vec2 __attribute__((arm_sve_vector_bits(N)));
-// CHECK128-LABEL: define void @g(<vscale x 16 x i8> %x.coerce)
+// CHECK128-LABEL: define{{.*}} void @g(<vscale x 16 x i8> %x.coerce)
// CHECK128-NEXT: entry:
// CHECK128-NEXT: [[X:%.*]] = alloca <16 x i8>, align 16
// CHECK128-NEXT: [[TMP0:%.*]] = bitcast <16 x i8>* [[X]] to <vscale x 16 x i8>*
// CHECK128-NEXT: call void @f3(<16 x i8> [[X1]]) [[ATTR5:#.*]]
// CHECK128-NEXT: ret void
-// CHECK-LABEL: define void @g(<vscale x 16 x i8> %x.coerce)
+// CHECK-LABEL: define{{.*}} void @g(<vscale x 16 x i8> %x.coerce)
// CHECK-NEXT: entry:
// CHECK-NEXT: [[X:%.*]] = alloca <[[#div(VBITS,8)]] x i8>, align 16
// CHECK-NEXT: [[INDIRECT_ARG_TEMP:%.*]] = alloca <[[#div(VBITS,8)]] x i8>, align 16
// Page 27, item 1.
#if __ARM_FEATURE_SVE_BITS && __ARM_FEATURE_SVE_VECTOR_OPERATORS
#define N __ARM_FEATURE_SVE_BITS
-// CHECK-LABEL: define <vscale x 4 x i32> @_Z1f9__SVE_VLSIu11__SVInt32_tLj
+// CHECK-LABEL: define{{.*}} <vscale x 4 x i32> @_Z1f9__SVE_VLSIu11__SVInt32_tLj
// CHECK-SAME: [[#VBITS]]
// CHECK-SAME: EES_(<vscale x 4 x i32> %x.coerce, <vscale x 4 x i32> %y.coerce)
// CHECK-NEXT: entry:
typedef int16_t vec1 __attribute__((vector_size(N / 8)));
void f(vec1);
typedef svint16_t vec2 __attribute__((arm_sve_vector_bits(N)));
-// CHECK-LABEL: define void @_Z1g9__SVE_VLSIu11__SVInt16_tLj
+// CHECK-LABEL: define{{.*}} void @_Z1g9__SVE_VLSIu11__SVInt16_tLj
// CHECK-SAME: [[#VBITS]]
// CHECK-SAME: EE(<vscale x 8 x i16> %x.coerce)
// CHECK-NEXT: entry:
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve \
// RUN: -emit-llvm -o - %s 2>&1 | FileCheck %s -check-prefix=CHECK
-// CHECK: @ptr = global <vscale x 16 x i8>* null, align 8
+// CHECK: @ptr ={{.*}} global <vscale x 16 x i8>* null, align 8
// CHECK: %s8 = alloca <vscale x 16 x i8>, align 16
// CHECK: %s16 = alloca <vscale x 8 x i16>, align 16
// CHECK: %s32 = alloca <vscale x 4 x i32>, align 16
#ifdef __ARM_FEATURE_TME
extern "C" void arm_feature_tme_defined() {}
#endif
-// CHECK: define void @arm_feature_tme_defined()
+// CHECK: define{{.*}} void @arm_feature_tme_defined()
// CHECK: attributes #1 = { nounwind }
va_list the_list;
int simple_int(void) {
-// CHECK-LABEL: define i32 @simple_int
+// CHECK-LABEL: define{{.*}} i32 @simple_int
return va_arg(the_list, int);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
}
__int128 aligned_int(void) {
-// CHECK-LABEL: define i128 @aligned_int
+// CHECK-LABEL: define{{.*}} i128 @aligned_int
return va_arg(the_list, __int128);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
};
struct bigstruct simple_indirect(void) {
-// CHECK-LABEL: define void @simple_indirect
+// CHECK-LABEL: define{{.*}} void @simple_indirect
return va_arg(the_list, struct bigstruct);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
};
struct aligned_bigstruct simple_aligned_indirect(void) {
-// CHECK-LABEL: define void @simple_aligned_indirect
+// CHECK-LABEL: define{{.*}} void @simple_aligned_indirect
return va_arg(the_list, struct aligned_bigstruct);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
}
double simple_double(void) {
-// CHECK-LABEL: define double @simple_double
+// CHECK-LABEL: define{{.*}} double @simple_double
return va_arg(the_list, double);
// CHECK: [[VR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 4)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[VR_OFFS]], 0
};
struct hfa simple_hfa(void) {
-// CHECK-LABEL: define %struct.hfa @simple_hfa
+// CHECK-LABEL: define{{.*}} %struct.hfa @simple_hfa
return va_arg(the_list, struct hfa);
// CHECK: [[VR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 4)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[VR_OFFS]], 0
typedef int underaligned_int __attribute__((packed,aligned(2)));
underaligned_int underaligned_int_test() {
-// CHECK-LABEL: define i32 @underaligned_int_test()
+// CHECK-LABEL: define{{.*}} i32 @underaligned_int_test()
return va_arg(the_list, underaligned_int);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
typedef int overaligned_int __attribute__((aligned(32)));
overaligned_int overaligned_int_test() {
-// CHECK-LABEL: define i32 @overaligned_int_test()
+// CHECK-LABEL: define{{.*}} i32 @overaligned_int_test()
return va_arg(the_list, overaligned_int);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
typedef long long underaligned_long_long __attribute__((packed,aligned(2)));
underaligned_long_long underaligned_long_long_test() {
-// CHECK-LABEL: define i64 @underaligned_long_long_test()
+// CHECK-LABEL: define{{.*}} i64 @underaligned_long_long_test()
return va_arg(the_list, underaligned_long_long);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
typedef long long overaligned_long_long __attribute__((aligned(32)));
overaligned_long_long overaligned_long_long_test() {
-// CHECK-LABEL: define i64 @overaligned_long_long_test()
+// CHECK-LABEL: define{{.*}} i64 @overaligned_long_long_test()
return va_arg(the_list, overaligned_long_long);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
typedef __int128 underaligned_int128 __attribute__((packed,aligned(2)));
underaligned_int128 underaligned_int128_test() {
-// CHECK-LABEL: define i128 @underaligned_int128_test()
+// CHECK-LABEL: define{{.*}} i128 @underaligned_int128_test()
return va_arg(the_list, underaligned_int128);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
typedef __int128 overaligned_int128 __attribute__((aligned(32)));
overaligned_int128 overaligned_int128_test() {
-// CHECK-LABEL: define i128 @overaligned_int128_test()
+// CHECK-LABEL: define{{.*}} i128 @overaligned_int128_test()
return va_arg(the_list, overaligned_int128);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
int val;
} underaligned_int_struct;
underaligned_int_struct underaligned_int_struct_test() {
-// CHECK-LABEL: define i64 @underaligned_int_struct_test()
+// CHECK-LABEL: define{{.*}} i64 @underaligned_int_struct_test()
return va_arg(the_list, underaligned_int_struct);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
int val;
} overaligned_int_struct;
overaligned_int_struct overaligned_int_struct_test() {
-// CHECK-LABEL: define i128 @overaligned_int_struct_test()
+// CHECK-LABEL: define{{.*}} i128 @overaligned_int_struct_test()
return va_arg(the_list, overaligned_int_struct);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
long long val;
} underaligned_long_long_struct;
underaligned_long_long_struct underaligned_long_long_struct_test() {
-// CHECK-LABEL: define i64 @underaligned_long_long_struct_test()
+// CHECK-LABEL: define{{.*}} i64 @underaligned_long_long_struct_test()
return va_arg(the_list, underaligned_long_long_struct);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
long long val;
} overaligned_long_long_struct;
overaligned_long_long_struct overaligned_long_long_struct_test() {
-// CHECK-LABEL: define i128 @overaligned_long_long_struct_test()
+// CHECK-LABEL: define{{.*}} i128 @overaligned_long_long_struct_test()
return va_arg(the_list, overaligned_long_long_struct);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
__int128 val;
} underaligned_int128_struct;
underaligned_int128_struct underaligned_int128_struct_test() {
-// CHECK-LABEL: define [2 x i64] @underaligned_int128_struct_test()
+// CHECK-LABEL: define{{.*}} [2 x i64] @underaligned_int128_struct_test()
return va_arg(the_list, underaligned_int128_struct);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
__int128 val;
} overaligned_int128_struct;
overaligned_int128_struct overaligned_int128_struct_test() {
-// CHECK-LABEL: define void @overaligned_int128_struct_test(%struct.overaligned_int128_struct* noalias sret(%struct.overaligned_int128_struct) align 32 %agg.result)
+// CHECK-LABEL: define{{.*}} void @overaligned_int128_struct_test(%struct.overaligned_int128_struct* noalias sret(%struct.overaligned_int128_struct) align 32 %agg.result)
return va_arg(the_list, overaligned_int128_struct);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
int val __attribute__((packed,aligned(2)));
} underaligned_int_struct_member;
underaligned_int_struct_member underaligned_int_struct_member_test() {
-// CHECK-LABEL: define i64 @underaligned_int_struct_member_test()
+// CHECK-LABEL: define{{.*}} i64 @underaligned_int_struct_member_test()
return va_arg(the_list, underaligned_int_struct_member);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
int val __attribute__((aligned(16)));
} overaligned_int_struct_member;
overaligned_int_struct_member overaligned_int_struct_member_test() {
-// CHECK-LABEL: define i128 @overaligned_int_struct_member_test()
+// CHECK-LABEL: define{{.*}} i128 @overaligned_int_struct_member_test()
return va_arg(the_list, overaligned_int_struct_member);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
long long val __attribute__((packed,aligned(2)));
} underaligned_long_long_struct_member;
underaligned_long_long_struct_member underaligned_long_long_struct_member_test() {
-// CHECK-LABEL: define i64 @underaligned_long_long_struct_member_test()
+// CHECK-LABEL: define{{.*}} i64 @underaligned_long_long_struct_member_test()
return va_arg(the_list, underaligned_long_long_struct_member);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
long long val __attribute__((aligned(16)));
} overaligned_long_long_struct_member;
overaligned_long_long_struct_member overaligned_long_long_struct_member_test() {
-// CHECK-LABEL: define i128 @overaligned_long_long_struct_member_test()
+// CHECK-LABEL: define{{.*}} i128 @overaligned_long_long_struct_member_test()
return va_arg(the_list, overaligned_long_long_struct_member);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
__int128 val __attribute__((packed,aligned(2)));
} underaligned_int128_struct_member;
underaligned_int128_struct_member underaligned_int128_struct_member_test() {
-// CHECK-LABEL: define [2 x i64] @underaligned_int128_struct_member_test()
+// CHECK-LABEL: define{{.*}} [2 x i64] @underaligned_int128_struct_member_test()
return va_arg(the_list, underaligned_int128_struct_member);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
__int128 val __attribute__((aligned(32)));
} overaligned_int128_struct_member;
overaligned_int128_struct_member overaligned_int128_struct_member_test() {
-// CHECK-LABEL: define void @overaligned_int128_struct_member_test(%struct.overaligned_int128_struct_member* noalias sret(%struct.overaligned_int128_struct_member) align 32 %agg.result)
+// CHECK-LABEL: define{{.*}} void @overaligned_int128_struct_member_test(%struct.overaligned_int128_struct_member* noalias sret(%struct.overaligned_int128_struct_member) align 32 %agg.result)
return va_arg(the_list, overaligned_int128_struct_member);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
}
void check_start(int n, ...) {
-// CHECK-LABEL: define void @check_start(i32 %n, ...)
+// CHECK-LABEL: define{{.*}} void @check_start(i32 %n, ...)
va_list the_list;
va_start(the_list, n);
void __attribute__((aarch64_vector_pcs)) f(int *); // expected-warning {{'aarch64_vector_pcs' calling convention is not supported for this target}}
-// CHECKC: define void @g(
-// CHECKCXX: define void @_Z1gPi(
+// CHECKC: define{{.*}} void @g(
+// CHECKCXX: define{{.*}} void @_Z1gPi(
void g(int *a) {
// CHECKC: call aarch64_vector_pcs void @f(
// CHECKCXX: declare aarch64_vector_pcs void @_Z1fPi
void __attribute__((aarch64_vector_pcs)) h(int *a){ // expected-warning {{'aarch64_vector_pcs' calling convention is not supported for this target}}
-// CHECKC: define aarch64_vector_pcs void @h(
-// CHECKCXX: define aarch64_vector_pcs void @_Z1hPi(
+// CHECKC: define{{.*}} aarch64_vector_pcs void @h(
+// CHECKCXX: define{{.*}} aarch64_vector_pcs void @_Z1hPi(
f(a);
}
// Test that function declarations in nonzero address spaces without prototype
// are called correctly.
-// CHECK: define void @bar() addrspace(1)
+// CHECK: define{{.*}} void @bar() addrspace(1)
// CHECK: call addrspace(1) void bitcast (void (...) addrspace(1)* @foo to void (i16) addrspace(1)*)(i16 3)
// CHECK: declare void @foo(...) addrspace(1)
void foo();
return a * b;
}
-// CHECK: @multiply = alias i16 (i16, i16), i16 (i16, i16) addrspace(1)* @mul
+// CHECK: @multiply ={{.*}} alias i16 (i16, i16), i16 (i16, i16) addrspace(1)* @mul
int multiply(int x, int y) __attribute__((alias("mul")));
// RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-llvm -o - %s | FileCheck -check-prefix=CHECKGLOBALS %s
int g0;
-// CHECKBASIC-DAG: @g0 = global i32 0
+// CHECKBASIC-DAG: @g0 ={{.*}} global i32 0
// CHECKASM-DAG: .bss
// CHECKASM-DAG: .globl g0
// CHECKASM-DAG: .p2align 2
// CHECKASM-DAG: .long 0
// CHECKASM-DAG: .size g0, 4
__thread int TL_WITH_ALIAS;
-// CHECKBASIC-DAG: @TL_WITH_ALIAS = thread_local global i32 0, align 4
+// CHECKBASIC-DAG: @TL_WITH_ALIAS ={{.*}} thread_local global i32 0, align 4
// CHECKASM-DAG: .globl TL_WITH_ALIAS
// CHECKASM-DAG: .size TL_WITH_ALIAS, 4
static int bar1 = 42;
// PR24379: alias variable expected to have same size as aliasee even when types differ
const int wacom_usb_ids[] = {1, 1, 2, 3, 5, 8, 13, 0};
-// CHECKBASIC-DAG: @wacom_usb_ids = constant [8 x i32] [i32 1, i32 1, i32 2, i32 3, i32 5, i32 8, i32 13, i32 0], align 4
+// CHECKBASIC-DAG: @wacom_usb_ids ={{.*}} constant [8 x i32] [i32 1, i32 1, i32 2, i32 3, i32 5, i32 8, i32 13, i32 0], align 4
// CHECKASM-DAG: .globl wacom_usb_ids
// CHECKASM-DAG: .size wacom_usb_ids, 32
extern const int __mod_usb_device_table __attribute__ ((alias("wacom_usb_ids")));
-// CHECKBASIC-DAG: @__mod_usb_device_table = alias i32, getelementptr inbounds ([8 x i32], [8 x i32]* @wacom_usb_ids, i32 0, i32 0)
+// CHECKBASIC-DAG: @__mod_usb_device_table ={{.*}} alias i32, getelementptr inbounds ([8 x i32], [8 x i32]* @wacom_usb_ids, i32 0, i32 0)
// CHECKASM-DAG: .globl __mod_usb_device_table
// CHECKASM-DAG: .set __mod_usb_device_table, wacom_usb_ids
// CHECKASM-NOT: .size __mod_usb_device_table
extern int g1;
extern int g1 __attribute((alias("g0")));
-// CHECKBASIC-DAG: @g1 = alias i32, i32* @g0
+// CHECKBASIC-DAG: @g1 ={{.*}} alias i32, i32* @g0
// CHECKASM-DAG: .globl g1
// CHECKASM-DAG: .set g1, g0
// CHECKASM-NOT: .size g1
extern __thread int __libc_errno __attribute__ ((alias ("TL_WITH_ALIAS")));
-// CHECKBASIC-DAG: @__libc_errno = thread_local alias i32, i32* @TL_WITH_ALIAS
+// CHECKBASIC-DAG: @__libc_errno ={{.*}} thread_local alias i32, i32* @TL_WITH_ALIAS
// CHECKASM-DAG: .globl __libc_errno
// CHECKASM-DAG: .set __libc_errno, TL_WITH_ALIAS
// CHECKASM-NOT: .size __libc_errno
void f0(void) { }
extern void f1(void);
extern void f1(void) __attribute((alias("f0")));
-// CHECKBASIC-DAG: @f1 = alias void (), void ()* @f0
-// CHECKBASIC-DAG: @test8_foo = weak alias void (...), bitcast (void ()* @test8_bar to void (...)*)
-// CHECKBASIC-DAG: @test8_zed = alias void (...), bitcast (void ()* @test8_bar to void (...)*)
-// CHECKBASIC-DAG: @test9_zed = alias void (), void ()* @test9_bar
-// CHECKBASIC: define void @f0() [[NUW:#[0-9]+]] {
+// CHECKBASIC-DAG: @f1 ={{.*}} alias void (), void ()* @f0
+// CHECKBASIC-DAG: @test8_foo = weak{{.*}} alias void (...), bitcast (void ()* @test8_bar to void (...)*)
+// CHECKBASIC-DAG: @test8_zed ={{.*}} alias void (...), bitcast (void ()* @test8_bar to void (...)*)
+// CHECKBASIC-DAG: @test9_zed ={{.*}} alias void (), void ()* @test9_bar
+// CHECKBASIC: define{{.*}} void @f0() [[NUW:#[0-9]+]] {
// Make sure that aliases cause referenced values to be emitted.
// PR3200
static int inner_weak(int a) { return 0; }
extern __typeof(inner) inner_a __attribute__((alias("inner")));
static __typeof(inner_weak) inner_weak_a __attribute__((weakref, alias("inner_weak")));
-// CHECKCC: @inner_a = alias i32 (i32), i32 (i32)* @inner
+// CHECKCC: @inner_a ={{.*}} alias i32 (i32), i32 (i32)* @inner
// CHECKCC: define internal arm_aapcs_vfpcc i32 @inner(i32 %a) [[NUW:#[0-9]+]] {
int outer(int a) { return inner(a); }
-// CHECKCC: define arm_aapcs_vfpcc i32 @outer(i32 %a) [[NUW]] {
+// CHECKCC: define{{.*}} arm_aapcs_vfpcc i32 @outer(i32 %a) [[NUW]] {
// CHECKCC: call arm_aapcs_vfpcc i32 @inner(i32 %{{.*}})
int outer_weak(int a) { return inner_weak_a(a); }
-// CHECKCC: define arm_aapcs_vfpcc i32 @outer_weak(i32 %a) [[NUW]] {
+// CHECKCC: define{{.*}} arm_aapcs_vfpcc i32 @outer_weak(i32 %a) [[NUW]] {
// CHECKCC: call arm_aapcs_vfpcc i32 @inner_weak(i32 %{{.*}})
// CHECKCC: define internal arm_aapcs_vfpcc i32 @inner_weak(i32 %a) [[NUW]] {
static void test11_foo(void) __attribute__((alias("test11")));
// Test that gnu_inline+alias work.
-// CHECKGLOBALS: @test12_alias = alias void (), void ()* @test12
+// CHECKGLOBALS: @test12_alias ={{.*}} alias void (), void ()* @test12
void test12(void) {}
inline void test12_alias(void) __attribute__((gnu_inline, alias("test12")));
// Test that a non visible (-Wvisibility) type doesn't assert.
-// CHECKGLOBALS: @test13_alias = alias {}, bitcast (void (i32)* @test13 to {}*)
+// CHECKGLOBALS: @test13_alias ={{.*}} alias {}, bitcast (void (i32)* @test13 to {}*)
enum a_type { test13_a };
void test13(enum a_type y) {}
void test13_alias(enum undeclared_type y) __attribute__((alias ("test13")));
// RUN: not %clang -S -mabi=vec-extabi -target powerpc64-unknown-aix %s 2>&1 | FileCheck %s --check-prefix=AIX-ATVER
// Check initialization
-vector int test0 = (vector int)(1); // CHECK: @test0 = global <4 x i32> <i32 1, i32 1, i32 1, i32 1>
-vector float test1 = (vector float)(1.0); // CHECK: @test1 = global <4 x float> <float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}>
+vector int test0 = (vector int)(1); // CHECK: @test0 ={{.*}} global <4 x i32> <i32 1, i32 1, i32 1, i32 1>
+vector float test1 = (vector float)(1.0); // CHECK: @test1 ={{.*}} global <4 x float> <float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}>
-// CHECK: @v1 = global <16 x i8> <i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 2, i8 0, i8 0, i8 0, i8 3, i8 0, i8 0, i8 0, i8 4>
+// CHECK: @v1 ={{.*}} global <16 x i8> <i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 2, i8 0, i8 0, i8 0, i8 3, i8 0, i8 0, i8 0, i8 4>
vector char v1 = (vector char)((vector int)(1, 2, 3, 4));
-// CHECK: @v2 = global <16 x i8> <i8 63, i8 -128, i8 0, i8 0, i8 64, i8 0, i8 0, i8 0, i8 64, i8 64, i8 0, i8 0, i8 64, i8 -128, i8 0, i8 0>
+// CHECK: @v2 ={{.*}} global <16 x i8> <i8 63, i8 -128, i8 0, i8 0, i8 64, i8 0, i8 0, i8 0, i8 64, i8 64, i8 0, i8 0, i8 64, i8 -128, i8 0, i8 0>
vector char v2 = (vector char)((vector float)(1.0f, 2.0f, 3.0f, 4.0f));
-// CHECK: @v3 = global <16 x i8> <i8 0, i8 0, i8 0, i8 97, i8 0, i8 0, i8 0, i8 98, i8 0, i8 0, i8 0, i8 99, i8 0, i8 0, i8 0, i8 100>
+// CHECK: @v3 ={{.*}} global <16 x i8> <i8 0, i8 0, i8 0, i8 97, i8 0, i8 0, i8 0, i8 98, i8 0, i8 0, i8 0, i8 99, i8 0, i8 0, i8 0, i8 100>
vector char v3 = (vector char)((vector int)('a', 'b', 'c', 'd'));
-// CHECK: @v4 = global <4 x i32> <i32 16909060, i32 0, i32 0, i32 0>
+// CHECK: @v4 ={{.*}} global <4 x i32> <i32 16909060, i32 0, i32 0, i32 0>
vector int v4 = (vector char){1, 2, 3, 4};
void test2()
// Basic argument tests for ARC.
-// CHECK: define void @f0(i32 inreg %i, i32 inreg %j, i64 inreg %k)
+// CHECK: define{{.*}} void @f0(i32 inreg %i, i32 inreg %j, i64 inreg %k)
void f0(int i, long j, long long k) {}
typedef struct {
int aa;
int bb;
} s1;
-// CHECK: define void @f1(i32 inreg %i.coerce0, i32 inreg %i.coerce1)
+// CHECK: define{{.*}} void @f1(i32 inreg %i.coerce0, i32 inreg %i.coerce1)
void f1(s1 i) {}
typedef struct {
char aa; char bb; char cc; char dd;
} cs1;
-// CHECK: define void @cf1(i32 inreg %i.coerce)
+// CHECK: define{{.*}} void @cf1(i32 inreg %i.coerce)
void cf1(cs1 i) {}
typedef struct {
int cc;
} s2;
-// CHECK: define void @f2(%struct.s2* noalias sret(%struct.s2) align 4 %agg.result)
+// CHECK: define{{.*}} void @f2(%struct.s2* noalias sret(%struct.s2) align 4 %agg.result)
s2 f2() {
s2 foo;
return foo;
int cc;
int dd;
} s3;
-// CHECK: define void @f3(%struct.s3* noalias sret(%struct.s3) align 4 %agg.result)
+// CHECK: define{{.*}} void @f3(%struct.s3* noalias sret(%struct.s3) align 4 %agg.result)
s3 f3() {
s3 foo;
return foo;
}
-// CHECK: define void @f4(i64 inreg %i)
+// CHECK: define{{.*}} void @f4(i64 inreg %i)
void f4(long long i) {}
-// CHECK: define void @f5(i8 inreg signext %a, i16 inreg signext %b)
+// CHECK: define{{.*}} void @f5(i8 inreg signext %a, i16 inreg signext %b)
void f5(signed char a, short b) {}
-// CHECK: define void @f6(i8 inreg zeroext %a, i16 inreg zeroext %b)
+// CHECK: define{{.*}} void @f6(i8 inreg zeroext %a, i16 inreg zeroext %b)
void f6(unsigned char a, unsigned short b) {}
enum my_enum {
ENUM3,
};
// Enums should be treated as the underlying i32.
-// CHECK: define void @f7(i32 inreg %a)
+// CHECK: define{{.*}} void @f7(i32 inreg %a)
void f7(enum my_enum a) {}
enum my_big_enum {
ENUM4 = 0xFFFFFFFFFFFFFFFF,
};
// Big enums should be treated as the underlying i64.
-// CHECK: define void @f8(i64 inreg %a)
+// CHECK: define{{.*}} void @f8(i64 inreg %a)
void f8(enum my_big_enum a) {}
union simple_union {
char b;
};
// Unions should be passed inreg.
-// CHECK: define void @f9(i32 inreg %s.coerce)
+// CHECK: define{{.*}} void @f9(i32 inreg %s.coerce)
void f9(union simple_union s) {}
typedef struct {
int b8 : 8;
} bitfield1;
// Bitfields should be passed inreg.
-// CHECK: define void @f10(i32 inreg %bf1.coerce)
+// CHECK: define{{.*}} void @f10(i32 inreg %bf1.coerce)
void f10(bitfield1 bf1) {}
-// CHECK: define inreg { float, float } @cplx1(float inreg %r)
+// CHECK: define{{.*}} inreg { float, float } @cplx1(float inreg %r)
_Complex float cplx1(float r) {
return r + 2.0fi;
}
-// CHECK: define inreg { double, double } @cplx2(double inreg %r)
+// CHECK: define{{.*}} inreg { double, double } @cplx2(double inreg %r)
_Complex double cplx2(double r) {
return r + 2.0i;
}
-// CHECK: define inreg { i32, i32 } @cplx3(i32 inreg %r)
+// CHECK: define{{.*}} inreg { i32, i32 } @cplx3(i32 inreg %r)
_Complex int cplx3(int r) {
return r + 2i;
}
-// CHECK: define inreg { i64, i64 } @cplx4(i64 inreg %r)
+// CHECK: define{{.*}} inreg { i64, i64 } @cplx4(i64 inreg %r)
_Complex long long cplx4(long long r) {
return r + 2i;
}
-// CHECK: define inreg { i8, i8 } @cplx6(i8 inreg signext %r)
+// CHECK: define{{.*}} inreg { i8, i8 } @cplx6(i8 inreg signext %r)
_Complex signed char cplx6(signed char r) {
return r + 2i;
}
-// CHECK: define inreg { i16, i16 } @cplx7(i16 inreg signext %r)
+// CHECK: define{{.*}} inreg { i16, i16 } @cplx7(i16 inreg signext %r)
_Complex short cplx7(short r) {
return r + 2i;
}
// Use 16-byte struct 2 times, gets 8 registers.
void st2(s16 a, s16 b) {}
-// CHECK: define void @st2(i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %a.coerce2, i32 inreg %a.coerce3, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3)
+// CHECK: define{{.*}} void @st2(i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %a.coerce2, i32 inreg %a.coerce3, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3)
// Use 8-byte struct 3 times, gets 8 registers, 1 byval struct argument.
void st3(s16 a, s16 b, s16 c) {}
-// CHECK: define void @st3(i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %a.coerce2, i32 inreg %a.coerce3, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)
+// CHECK: define{{.*}} void @st3(i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %a.coerce2, i32 inreg %a.coerce3, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)
// 1 sret + 1 i32 + 2*(i32 coerce) + 4*(i32 coerce) + 1 byval
s16 st4(int x, s8 a, s16 b, s16 c) { return b; }
-// CHECK: define void @st4(%struct.s16* noalias sret(%struct.s16) align 4 %agg.result, i32 inreg %x, i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)
+// CHECK: define{{.*}} void @st4(%struct.s16* noalias sret(%struct.s16) align 4 %agg.result, i32 inreg %x, i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)
// 1 sret + 2*(i32 coerce) + 4*(i32 coerce) + 4*(i32 coerce)
s16 st5(s8 a, s16 b, s16 c) { return b; }
-// CHECK: define void @st5(%struct.s16* noalias sret(%struct.s16) align 4 %agg.result, i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)
+// CHECK: define{{.*}} void @st5(%struct.s16* noalias sret(%struct.s16) align 4 %agg.result, i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)
double bb;
} s1;
-// CHECK: define i32 @f1
+// CHECK: define{{.*}} i32 @f1
// CHECK: ret i32 12
int f1() {
return sizeof(s1);
int aa;
long long bb;
} s2;
-// CHECK: define i32 @f2
+// CHECK: define{{.*}} i32 @f2
// CHECK: ret i32 12
int f2() {
return sizeof(s2);
__bf16 test_ret_bf16(__bf16 v) {
return v;
}
-// CHECK32-HARD: define arm_aapcs_vfpcc bfloat @test_ret_bf16(bfloat returned %v) {{.*}} {
+// CHECK32-HARD: define{{.*}} arm_aapcs_vfpcc bfloat @test_ret_bf16(bfloat returned %v) {{.*}} {
// CHECK32-HARD: ret bfloat %v
-// CHECK32-SOFTFP: define bfloat @test_ret_bf16(bfloat returned %v) {{.*}} {
+// CHECK32-SOFTFP: define{{.*}} bfloat @test_ret_bf16(bfloat returned %v) {{.*}} {
// CHECK32-SOFTFP: ret bfloat %v
-// CHECK64: define bfloat @test_ret_bf16(bfloat returned %v) {{.*}} {
+// CHECK64: define{{.*}} bfloat @test_ret_bf16(bfloat returned %v) {{.*}} {
// CHECK64: ret bfloat %v
bfloat16x4_t test_ret_bf16x4_t(bfloat16x4_t v) {
return v;
}
-// CHECK32-HARD: define arm_aapcs_vfpcc <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} {
+// CHECK32-HARD: define{{.*}} arm_aapcs_vfpcc <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} {
// CHECK32-HARD: ret <4 x bfloat> %v
-// CHECK32-SOFTFP: define <2 x i32> @test_ret_bf16x4_t(<2 x i32> [[V0:.*]]) {{.*}} {
+// CHECK32-SOFTFP: define{{.*}} <2 x i32> @test_ret_bf16x4_t(<2 x i32> [[V0:.*]]) {{.*}} {
// CHECK32-SOFTFP: ret <2 x i32> %v
-// CHECK64: define <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} {
+// CHECK64: define{{.*}} <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} {
// CHECK64: ret <4 x bfloat> %v
// DARWIN-APCS: call void @g
// DARWIN-AAPCS-LABEL: define{{.*}} arm_aapcscc void @f()
// DARWIN-AAPCS: call arm_aapcscc void @g
-// LINUX-APCS-LABEL: define arm_apcscc void @f()
+// LINUX-APCS-LABEL: define{{.*}} arm_apcscc void @f()
// LINUX-APCS: call arm_apcscc void @g
-// LINUX-AAPCS-LABEL: define void @f()
+// LINUX-AAPCS-LABEL: define{{.*}} void @f()
// LINUX-AAPCS: call void @g
-// BAREMETAL-AAPCS_VFP-LABEL: define void @f()
+// BAREMETAL-AAPCS_VFP-LABEL: define{{.*}} void @f()
// BAREMETAL-AAPCS_VFP: call void @g
// BAREMETAL-AAPCS_VFP: declare void @g()
void g(void);
{
}
-// CHECK: define void @f1(void ()* nocapture %fptr) {{[^#]*}}#0 {
+// CHECK: define{{.*}} void @f1(void ()* nocapture %fptr) {{[^#]*}}#0 {
// CHECK: call void %fptr() #2
-// CHECK: define void @f2(void ()* nocapture %fptr) {{[^#]*}}#0 {
+// CHECK: define{{.*}} void @f2(void ()* nocapture %fptr) {{[^#]*}}#0 {
// CHECK: call void %fptr() #2
-// CHECK: define void @f3() {{[^#]*}}#1 {
-// CHECK: define void @f4() {{[^#]*}}#1 {
+// CHECK: define{{.*}} void @f3() {{[^#]*}}#1 {
+// CHECK: define{{.*}} void @f4() {{[^#]*}}#1 {
// CHECK-NOSE-NOT: cmse_nonsecure_entry
// CHECK-NOSE-NOT: cmse_nonsecure_call
// other runtime functions such as the _Complex helper routines are not covered.
float fadd(float a, float b) { return a + b; }
-// CHECK-LABEL: define float @fadd(float %a, float %b)
+// CHECK-LABEL: define{{.*}} float @fadd(float %a, float %b)
// CHECK-NOT: __aeabi_fadd
// CHECK: %add = fadd float {{.*}}, {{.*}}
float fdiv(float a, float b) { return a / b; }
-// CHECK-LABEL: define float @fdiv(float %a, float %b)
+// CHECK-LABEL: define{{.*}} float @fdiv(float %a, float %b)
// CHECK-NOT: __aeabi_fdiv
// CHECK: %div = fdiv float {{.*}}, {{.*}}
float fmul(float a, float b) { return a * b; }
-// CHECK-LABEL: define float @fmul(float %a, float %b)
+// CHECK-LABEL: define{{.*}} float @fmul(float %a, float %b)
// CHECK-NOT: __aeabi_fmul
// CHECK: %mul = fmul float {{.*}}, {{.*}}
float fsub(float a, float b) { return a - b; }
-// CHECK-LABEL: define float @fsub(float %a, float %b)
+// CHECK-LABEL: define{{.*}} float @fsub(float %a, float %b)
// CHECK-NOT: __aeabi_fsub
// CHECK: %sub = fsub float {{.*}}, {{.*}}
int fcmpeq(float a, float b) { return a == b; }
-// CHECK-LABEL: define i32 @fcmpeq(float %a, float %b)
+// CHECK-LABEL: define{{.*}} i32 @fcmpeq(float %a, float %b)
// CHECK-NOT: __aeabi_fcmpeq
// CHECK: %cmp = fcmp oeq float {{.*}}, {{.*}}
int fcmplt(float a, float b) { return a < b; }
-// CHECK-LABEL: define i32 @fcmplt(float %a, float %b)
+// CHECK-LABEL: define{{.*}} i32 @fcmplt(float %a, float %b)
// CHECK-NOT: __aeabi_fcmplt
// CHECK: %cmp = fcmp olt float {{.*}}, {{.*}}
int fcmple(float a, float b) { return a <= b; }
-// CHECK-LABEL: define i32 @fcmple(float %a, float %b)
+// CHECK-LABEL: define{{.*}} i32 @fcmple(float %a, float %b)
// CHECK-NOT: __aeabi_fcmple
// CHECK: %cmp = fcmp ole float {{.*}}, {{.*}}
int fcmpge(float a, float b) { return a >= b; }
-// CHECK-LABEL: define i32 @fcmpge(float %a, float %b)
+// CHECK-LABEL: define{{.*}} i32 @fcmpge(float %a, float %b)
// CHECK-NOT: __aeabi_fcmpge
// CHECK: %cmp = fcmp oge float {{.*}}, {{.*}}
int fcmpgt(float a, float b) { return a > b; }
-// CHECK-LABEL: define i32 @fcmpgt(float %a, float %b)
+// CHECK-LABEL: define{{.*}} i32 @fcmpgt(float %a, float %b)
// CHECK-NOT: __aeabi_fcmpgt
// CHECK: %cmp = fcmp ogt float {{.*}}, {{.*}}
int fcmpun(float a, float b) { return __builtin_isunordered(a, b); }
-// CHECK-LABEL: define i32 @fcmpun(float %a, float %b)
+// CHECK-LABEL: define{{.*}} i32 @fcmpun(float %a, float %b)
// CHECK-NOT: __aeabi_fcmpun
// CHECK: %cmp = fcmp uno float {{.*}}, {{.*}}
double dadd(double a, double b) { return a + b; }
-// CHECK-LABEL: define double @dadd(double %a, double %b)
+// CHECK-LABEL: define{{.*}} double @dadd(double %a, double %b)
// CHECK-NOT: __aeabi_dadd
// CHECK: %add = fadd double {{.*}}, {{.*}}
double ddiv(double a, double b) { return a / b; }
-// CHECK-LABEL: define double @ddiv(double %a, double %b)
+// CHECK-LABEL: define{{.*}} double @ddiv(double %a, double %b)
// CHECK-NOT: __aeabi_ddiv
// CHECK: %div = fdiv double {{.*}}, {{.*}}
double dmul(double a, double b) { return a * b; }
-// CHECK-LABEL: define double @dmul(double %a, double %b)
+// CHECK-LABEL: define{{.*}} double @dmul(double %a, double %b)
// CHECK-NOT: __aeabi_dmul
// CHECK: %mul = fmul double {{.*}}, {{.*}}
double dsub(double a, double b) { return a - b; }
-// CHECK-LABEL: define double @dsub(double %a, double %b)
+// CHECK-LABEL: define{{.*}} double @dsub(double %a, double %b)
// CHECK-NOT: __aeabi_dsub
// CHECK: %sub = fsub double {{.*}}, {{.*}}
int dcmpeq(double a, double b) { return a == b; }
-// CHECK-LABEL: define i32 @dcmpeq(double %a, double %b)
+// CHECK-LABEL: define{{.*}} i32 @dcmpeq(double %a, double %b)
// CHECK-NOT: __aeabi_dcmpeq
// CHECK: %cmp = fcmp oeq double {{.*}}, {{.*}}
int dcmplt(double a, double b) { return a < b; }
-// CHECK-LABEL: define i32 @dcmplt(double %a, double %b)
+// CHECK-LABEL: define{{.*}} i32 @dcmplt(double %a, double %b)
// CHECK-NOT: __aeabi_dcmplt
// CHECK: %cmp = fcmp olt double {{.*}}, {{.*}}
int dcmple(double a, double b) { return a <= b; }
-// CHECK-LABEL: define i32 @dcmple(double %a, double %b)
+// CHECK-LABEL: define{{.*}} i32 @dcmple(double %a, double %b)
// CHECK-NOT: __aeabi_dcmple
// CHECK: %cmp = fcmp ole double {{.*}}, {{.*}}
int dcmpge(double a, double b) { return a >= b; }
-// CHECK-LABEL: define i32 @dcmpge(double %a, double %b)
+// CHECK-LABEL: define{{.*}} i32 @dcmpge(double %a, double %b)
// CHECK-NOT: __aeabi_dcmpge
// CHECK: %cmp = fcmp oge double {{.*}}, {{.*}}
int dcmpgt(double a, double b) { return a > b; }
-// CHECK-LABEL: define i32 @dcmpgt(double %a, double %b)
+// CHECK-LABEL: define{{.*}} i32 @dcmpgt(double %a, double %b)
// CHECK-NOT: __aeabi_dcmpgt
// CHECK: %cmp = fcmp ogt double {{.*}}, {{.*}}
int dcmpun(double a, double b) { return __builtin_isunordered(a, b); }
-// CHECK-LABEL: define i32 @dcmpun(double %a, double %b)
+// CHECK-LABEL: define{{.*}} i32 @dcmpun(double %a, double %b)
// CHECK-NOT: __aeabi_dcmpun
// CHECK: %cmp = fcmp uno double {{.*}}, {{.*}}
int d2iz(double a) { return (int)a; }
-// CHECK-LABEL: define i32 @d2iz(double %a)
+// CHECK-LABEL: define{{.*}} i32 @d2iz(double %a)
// CHECK-NOT: __aeabi_d2iz
// CHECK: %conv = fptosi double {{.*}} to i32
unsigned int d2uiz(double a) { return (unsigned int)a; }
-// CHECK-LABEL: define i32 @d2uiz(double %a)
+// CHECK-LABEL: define{{.*}} i32 @d2uiz(double %a)
// CHECK-NOT: __aeabi_d2uiz
// CHECK: %conv = fptoui double {{.*}} to i32
long long d2lz(double a) { return (long long)a; }
-// CHECK-LABEL: define i64 @d2lz(double %a)
+// CHECK-LABEL: define{{.*}} i64 @d2lz(double %a)
// CHECK-NOT: __aeabi_d2lz
// CHECK: %conv = fptosi double {{.*}} to i64
unsigned long long d2ulz(double a) { return (unsigned long long)a; }
-// CHECK-LABEL: define i64 @d2ulz(double %a)
+// CHECK-LABEL: define{{.*}} i64 @d2ulz(double %a)
// CHECK-NOT: __aeabi_d2ulz
// CHECK: %conv = fptoui double {{.*}} to i64
int f2iz(float a) { return (int)a; }
-// CHECK-LABEL: define i32 @f2iz(float %a)
+// CHECK-LABEL: define{{.*}} i32 @f2iz(float %a)
// CHECK-NOT: __aeabi_f2iz
// CHECK: %conv = fptosi float {{.*}} to i32
unsigned int f2uiz(float a) { return (unsigned int)a; }
-// CHECK-LABEL: define i32 @f2uiz(float %a)
+// CHECK-LABEL: define{{.*}} i32 @f2uiz(float %a)
// CHECK-NOT: __aeabi_f2uiz
// CHECK: %conv = fptoui float {{.*}} to i32
long long f2lz(float a) { return (long long)a; }
-// CHECK-LABEL: define i64 @f2lz(float %a)
+// CHECK-LABEL: define{{.*}} i64 @f2lz(float %a)
// CHECK-NOT: __aeabi_f2lz
// CHECK: %conv = fptosi float {{.*}} to i64
unsigned long long f2ulz(float a) { return (unsigned long long)a; }
-// CHECK-LABEL: define i64 @f2ulz(float %a)
+// CHECK-LABEL: define{{.*}} i64 @f2ulz(float %a)
// CHECK-NOT: __aeabi_f2ulz
// CHECK: %conv = fptoui float {{.*}} to i64
float d2f(double a) { return (float)a; }
-// CHECK-LABEL: define float @d2f(double %a)
+// CHECK-LABEL: define{{.*}} float @d2f(double %a)
// CHECK-NOT: __aeabi_d2f
// CHECK: %conv = fptrunc double {{.*}} to float
double f2d(float a) { return (double)a; }
-// CHECK-LABEL: define double @f2d(float %a)
+// CHECK-LABEL: define{{.*}} double @f2d(float %a)
// CHECK-NOT: __aeabi_f2d
// CHECK: %conv = fpext float {{.*}} to double
double i2d(int a) { return (double)a; }
-// CHECK-LABEL: define double @i2d(i32 %a)
+// CHECK-LABEL: define{{.*}} double @i2d(i32 %a)
// CHECK-NOT: __aeabi_i2d
// CHECK: %conv = sitofp i32 {{.*}} to double
double ui2d(unsigned int a) { return (double)a; }
-// CHECK-LABEL: define double @ui2d(i32 %a)
+// CHECK-LABEL: define{{.*}} double @ui2d(i32 %a)
// CHECK-NOT: __aeabi_ui2d
// CHECK: %conv = uitofp i32 {{.*}} to double
double l2d(long long a) { return (double)a; }
-// CHECK-LABEL: define double @l2d(i64 %a)
+// CHECK-LABEL: define{{.*}} double @l2d(i64 %a)
// CHECK-NOT: __aeabi_l2d
// CHECK: %conv = sitofp i64 {{.*}} to double
double ul2d(unsigned long long a) { return (unsigned long long)a; }
-// CHECK-LABEL: define double @ul2d(i64 %a)
+// CHECK-LABEL: define{{.*}} double @ul2d(i64 %a)
// CHECK-NOT: __aeabi_ul2d
// CHECK: %conv = uitofp i64 {{.*}} to double
float i2f(int a) { return (int)a; }
-// CHECK-LABEL: define float @i2f(i32 %a)
+// CHECK-LABEL: define{{.*}} float @i2f(i32 %a)
// CHECK-NOT: __aeabi_i2f
// CHECK: %conv = sitofp i32 {{.*}} to float
float ui2f(unsigned int a) { return (unsigned int)a; }
-// CHECK-LABEL: define float @ui2f(i32 %a)
+// CHECK-LABEL: define{{.*}} float @ui2f(i32 %a)
// CHECK-NOT: __aeabi_ui2f
// CHECK: %conv = uitofp i32 {{.*}} to float
float l2f(long long a) { return (long long)a; }
-// CHECK-LABEL: define float @l2f(i64 %a)
+// CHECK-LABEL: define{{.*}} float @l2f(i64 %a)
// CHECK-NOT: __aeabi_l2f
// CHECK: %conv = sitofp i64 {{.*}} to float
float ul2f(unsigned long long a) { return (unsigned long long)a; }
-// CHECK-LABEL: define float @ul2f(i64 %a)
+// CHECK-LABEL: define{{.*}} float @ul2f(i64 %a)
// CHECK-NOT: __aeabi_ul2f
// CHECK: %conv = uitofp i64 {{.*}} to float
__fp16 g;
void t1(__fp16 a) { g = a; }
-// SOFT: define void @t1(half [[PARAM:%.*]])
-// HARD: define arm_aapcs_vfpcc void @t1(half [[PARAM:%.*]])
-// NATIVE: define void @t1(half [[PARAM:%.*]])
+// SOFT: define{{.*}} void @t1(half [[PARAM:%.*]])
+// HARD: define{{.*}} arm_aapcs_vfpcc void @t1(half [[PARAM:%.*]])
+// NATIVE: define{{.*}} void @t1(half [[PARAM:%.*]])
// CHECK: store half [[PARAM]], half* @g
__fp16 t2() { return g; }
-// SOFT: define half @t2()
-// HARD: define arm_aapcs_vfpcc half @t2()
-// NATIVE: define half @t2()
+// SOFT: define{{.*}} half @t2()
+// HARD: define{{.*}} arm_aapcs_vfpcc half @t2()
+// NATIVE: define{{.*}} half @t2()
// CHECK: [[LOAD:%.*]] = load half, half* @g
// CHECK: ret half [[LOAD]]
_Float16 h;
void t3(_Float16 a) { h = a; }
-// SOFT: define void @t3(half [[PARAM:%.*]])
-// HARD: define arm_aapcs_vfpcc void @t3(half [[PARAM:%.*]])
-// NATIVE: define void @t3(half [[PARAM:%.*]])
+// SOFT: define{{.*}} void @t3(half [[PARAM:%.*]])
+// HARD: define{{.*}} arm_aapcs_vfpcc void @t3(half [[PARAM:%.*]])
+// NATIVE: define{{.*}} void @t3(half [[PARAM:%.*]])
// CHECK: store half [[PARAM]], half* @h
_Float16 t4() { return h; }
-// SOFT: define half @t4()
-// HARD: define arm_aapcs_vfpcc half @t4()
-// NATIVE: define half @t4()
+// SOFT: define{{.*}} half @t4()
+// HARD: define{{.*}} arm_aapcs_vfpcc half @t4()
+// NATIVE: define{{.*}} half @t4()
// CHECK: [[LOAD:%.*]] = load half, half* @h
// CHECK: ret half [[LOAD]]
struct_of_double_and_long_double test_struct_of_double_and_long_double(void) {
return g_dld;
}
-// CHECK: define arm_aapcs_vfpcc %struct.struct_of_double_and_long_double @test_struct_of_double_and_long_double()
+// CHECK: define{{.*}} arm_aapcs_vfpcc %struct.struct_of_double_and_long_double @test_struct_of_double_and_long_double()
// FIXME: Tests necessary:
// - Vectors
#include <arm_neon.h>
-// CHECK-LABEL: define <2 x float> @test_vrnda_f32(<2 x float> %a)
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vrnda_f32(<2 x float> %a)
// CHECK-A32: [[VRNDA_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrinta.v2f32(<2 x float> %a)
// CHECK-A64: [[VRNDA_V1_I:%.*]] = call <2 x float> @llvm.round.v2f32(<2 x float> %a)
// CHECK: ret <2 x float> [[VRNDA_V1_I]]
return vrnda_f32(a);
}
-// CHECK-LABEL: define <4 x float> @test_vrndaq_f32(<4 x float> %a)
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vrndaq_f32(<4 x float> %a)
// CHECK-A32: [[VRNDAQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrinta.v4f32(<4 x float> %a)
// CHECK-A64: [[VRNDAQ_V1_I:%.*]] = call <4 x float> @llvm.round.v4f32(<4 x float> %a)
// CHECK: ret <4 x float> [[VRNDAQ_V1_I]]
return vrndaq_f32(a);
}
-// CHECK-LABEL: define <2 x float> @test_vrndm_f32(<2 x float> %a)
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vrndm_f32(<2 x float> %a)
// CHECK-A32: [[VRNDM_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintm.v2f32(<2 x float> %a)
// CHECK-A64: [[VRNDM_V1_I:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> %a)
// CHECK: ret <2 x float> [[VRNDM_V1_I]]
return vrndm_f32(a);
}
-// CHECK-LABEL: define <4 x float> @test_vrndmq_f32(<4 x float> %a)
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vrndmq_f32(<4 x float> %a)
// CHECK-A32: [[VRNDMQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintm.v4f32(<4 x float> %a)
// CHECK-A64: [[VRNDMQ_V1_I:%.*]] = call <4 x float> @llvm.floor.v4f32(<4 x float> %a)
// CHECK: ret <4 x float> [[VRNDMQ_V1_I]]
return vrndmq_f32(a);
}
-// CHECK-LABEL: define <2 x float> @test_vrndn_f32(<2 x float> %a)
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vrndn_f32(<2 x float> %a)
// CHECK-A32: [[VRNDN_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintn.v2f32(<2 x float> %a)
// CHECK-A64: [[VRNDN_V1_I:%.*]] = call <2 x float> @llvm.aarch64.neon.frintn.v2f32(<2 x float> %a)
// CHECK: ret <2 x float> [[VRNDN_V1_I]]
return vrndn_f32(a);
}
-// CHECK-LABEL: define <4 x float> @test_vrndnq_f32(<4 x float> %a)
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vrndnq_f32(<4 x float> %a)
// CHECK-A32: [[VRNDNQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintn.v4f32(<4 x float> %a)
// CHECK-A64: [[VRNDNQ_V1_I:%.*]] = call <4 x float> @llvm.aarch64.neon.frintn.v4f32(<4 x float> %a)
// CHECK: ret <4 x float> [[VRNDNQ_V1_I]]
return vrndnq_f32(a);
}
-// CHECK-LABEL: define <2 x float> @test_vrndp_f32(<2 x float> %a)
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vrndp_f32(<2 x float> %a)
// CHECK-A32: [[VRNDP_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintp.v2f32(<2 x float> %a)
// CHECK-A64: [[VRNDP_V1_I:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> %a)
// CHECK: ret <2 x float> [[VRNDP_V1_I]]
return vrndp_f32(a);
}
-// CHECK-LABEL: define <4 x float> @test_vrndpq_f32(<4 x float> %a)
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vrndpq_f32(<4 x float> %a)
// CHECK-A32: [[VRNDPQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintp.v4f32(<4 x float> %a)
// CHECK-A64: [[VRNDPQ_V1_I:%.*]] = call <4 x float> @llvm.ceil.v4f32(<4 x float> %a)
// CHECK: ret <4 x float> [[VRNDPQ_V1_I]]
return vrndpq_f32(a);
}
-// CHECK-LABEL: define <2 x float> @test_vrndx_f32(<2 x float> %a)
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vrndx_f32(<2 x float> %a)
// CHECK-A32: [[VRNDX_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintx.v2f32(<2 x float> %a)
// CHECK-A64: [[VRNDX_V1_I:%.*]] = call <2 x float> @llvm.rint.v2f32(<2 x float> %a)
// CHECK: ret <2 x float> [[VRNDX_V1_I]]
return vrndx_f32(a);
}
-// CHECK-LABEL: define <4 x float> @test_vrndxq_f32(<4 x float> %a)
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vrndxq_f32(<4 x float> %a)
// CHECK-A32: [[VRNDXQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintx.v4f32(<4 x float> %a)
// CHECK-A64: [[VRNDXQ_V1_I:%.*]] = call <4 x float> @llvm.rint.v4f32(<4 x float> %a)
// CHECK: ret <4 x float> [[VRNDXQ_V1_I]]
return vrndxq_f32(a);
}
-// CHECK-LABEL: define <2 x float> @test_vrnd_f32(<2 x float> %a)
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vrnd_f32(<2 x float> %a)
// CHECK-A32: [[VRND_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintz.v2f32(<2 x float> %a)
// CHECK-A64: [[VRND_V1_I:%.*]] = call <2 x float> @llvm.trunc.v2f32(<2 x float> %a)
// CHECK: ret <2 x float> [[VRND_V1_I]]
return vrnd_f32(a);
}
-// CHECK-LABEL: define <4 x float> @test_vrndq_f32(<4 x float> %a)
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vrndq_f32(<4 x float> %a)
// CHECK-A32: [[VRNDQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintz.v4f32(<4 x float> %a)
// CHECK-A64: [[VRNDQ_V1_I:%.*]] = call <4 x float> @llvm.trunc.v4f32(<4 x float> %a)
// CHECK: ret <4 x float> [[VRNDQ_V1_I]]
return vrndq_f32(a);
}
-// CHECK-LABEL: define float @test_vrndns_f32(float %a)
+// CHECK-LABEL: define{{.*}} float @test_vrndns_f32(float %a)
// CHECK-A32: [[VRNDN_I:%.*]] = call float @llvm.arm.neon.vrintn.f32(float %a)
// CHECK-A64: [[VRNDN_I:%.*]] = call float @llvm.aarch64.neon.frintn.f32(float %a)
// CHECK: ret float [[VRNDN_I]]
return vrndns_f32(a);
}
-// CHECK-LABEL: define <2 x float> @test_vrndi_f32(<2 x float> %a)
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vrndi_f32(<2 x float> %a)
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
// CHECK: [[VRNDI1_I:%.*]] = call <2 x float> @llvm.nearbyint.v2f32(<2 x float> %a)
// CHECK: ret <2 x float> [[VRNDI1_I]]
return vrndi_f32(a);
}
-// CHECK-LABEL: define <4 x float> @test_vrndiq_f32(<4 x float> %a)
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vrndiq_f32(<4 x float> %a)
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
// CHECK: [[VRNDI1_I:%.*]] = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %a)
// CHECK: ret <4 x float> [[VRNDI1_I]]
#include <arm_neon.h>
uint32x2_t test_vdot_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
-// CHECK-LABEL: define <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.arm.neon.udot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: ret <2 x i32> [[RESULT]]
return vdot_u32(a, b, c);
}
uint32x4_t test_vdotq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) {
-// CHECK-LABEL: define <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.arm.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: ret <4 x i32> [[RESULT]]
return vdotq_u32(a, b, c);
}
int32x2_t test_vdot_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
-// CHECK-LABEL: define <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.arm.neon.sdot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: ret <2 x i32> [[RESULT]]
return vdot_s32(a, b, c);
}
int32x4_t test_vdotq_s32(int32x4_t a, int8x16_t b, int8x16_t c) {
-// CHECK-LABEL: define <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.arm.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: ret <4 x i32> [[RESULT]]
return vdotq_s32(a, b, c);
}
uint32x2_t test_vdot_lane_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
-// CHECK-LABEL: define <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> <i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
}
uint32x4_t test_vdotq_lane_u32(uint32x4_t a, uint8x16_t b, uint8x8_t c) {
-// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
}
int32x2_t test_vdot_lane_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
-// CHECK-LABEL: define <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> <i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
}
int32x4_t test_vdotq_lane_s32(int32x4_t a, int8x16_t b, int8x8_t c) {
-// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
#include <arm_neon.h>
-// CHECK-LABEL: define <2 x float> @test_fma_order(<2 x float> %accum, <2 x float> %lhs, <2 x float> %rhs) #0 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_fma_order(<2 x float> %accum, <2 x float> %lhs, <2 x float> %rhs) #0 {
// CHECK: [[TMP6:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> %lhs, <2 x float> %rhs, <2 x float> %accum) #3
// CHECK: ret <2 x float> [[TMP6]]
float32x2_t test_fma_order(float32x2_t accum, float32x2_t lhs, float32x2_t rhs) {
return vfma_f32(accum, lhs, rhs);
}
-// CHECK-LABEL: define <4 x float> @test_fmaq_order(<4 x float> %accum, <4 x float> %lhs, <4 x float> %rhs) #1 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_fmaq_order(<4 x float> %accum, <4 x float> %lhs, <4 x float> %rhs) #1 {
// CHECK: [[TMP6:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %lhs, <4 x float> %rhs, <4 x float> %accum) #3
// CHECK: ret <4 x float> [[TMP6]]
float32x4_t test_fmaq_order(float32x4_t accum, float32x4_t lhs, float32x4_t rhs) {
return vfmaq_f32(accum, lhs, rhs);
}
-// CHECK-LABEL: define <2 x float> @test_vfma_n_f32(<2 x float> %a, <2 x float> %b, float %n) #0 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vfma_n_f32(<2 x float> %a, <2 x float> %b, float %n) #0 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %n, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %n, i32 1
// CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8>
return vfma_n_f32(a, b, n);
}
-// CHECK-LABEL: define <4 x float> @test_vfmaq_n_f32(<4 x float> %a, <4 x float> %b, float %n) #1 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vfmaq_n_f32(<4 x float> %a, <4 x float> %b, float %n) #1 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %n, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %n, i32 1
// CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %n, i32 2
#include <arm_neon.h>
-// CHECK-LABEL: define <2 x float> @test_vmaxnm_f32(<2 x float> %a, <2 x float> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vmaxnm_f32(<2 x float> %a, <2 x float> %b) #0 {
// CHECK: [[VMAXNM_V2_I:%.*]] = call <2 x float> @llvm.arm.neon.vmaxnm.v2f32(<2 x float> %a, <2 x float> %b) #3
// CHECK: ret <2 x float> [[VMAXNM_V2_I]]
float32x2_t test_vmaxnm_f32(float32x2_t a, float32x2_t b) {
return vmaxnm_f32(a, b);
}
-// CHECK-LABEL: define <4 x float> @test_vmaxnmq_f32(<4 x float> %a, <4 x float> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vmaxnmq_f32(<4 x float> %a, <4 x float> %b) #1 {
// CHECK: [[VMAXNMQ_V2_I:%.*]] = call <4 x float> @llvm.arm.neon.vmaxnm.v4f32(<4 x float> %a, <4 x float> %b) #3
// CHECK: ret <4 x float> [[VMAXNMQ_V2_I]]
float32x4_t test_vmaxnmq_f32(float32x4_t a, float32x4_t b) {
return vmaxnmq_f32(a, b);
}
-// CHECK-LABEL: define <2 x float> @test_vminnm_f32(<2 x float> %a, <2 x float> %b) #0 {
+// CHECK-LABEL: define{{.*}} <2 x float> @test_vminnm_f32(<2 x float> %a, <2 x float> %b) #0 {
// CHECK: [[VMINNM_V2_I:%.*]] = call <2 x float> @llvm.arm.neon.vminnm.v2f32(<2 x float> %a, <2 x float> %b) #3
// CHECK: ret <2 x float> [[VMINNM_V2_I]]
float32x2_t test_vminnm_f32(float32x2_t a, float32x2_t b) {
return vminnm_f32(a, b);
}
-// CHECK-LABEL: define <4 x float> @test_vminnmq_f32(<4 x float> %a, <4 x float> %b) #1 {
+// CHECK-LABEL: define{{.*}} <4 x float> @test_vminnmq_f32(<4 x float> %a, <4 x float> %b) #1 {
// CHECK: [[VMINNMQ_V2_I:%.*]] = call <4 x float> @llvm.arm.neon.vminnm.v4f32(<4 x float> %a, <4 x float> %b) #3
// CHECK: ret <4 x float> [[VMINNMQ_V2_I]]
float32x4_t test_vminnmq_f32(float32x4_t a, float32x4_t b) {
#include <arm_neon.h>
-// CHECK-LABEL: define <2 x i32> @test_vcvta_s32_f32(<2 x float> %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vcvta_s32_f32(<2 x float> %a) #0 {
// CHECK: [[VCVTA_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float> %a) #3
// CHECK: ret <2 x i32> [[VCVTA_S32_V1_I]]
int32x2_t test_vcvta_s32_f32(float32x2_t a) {
return vcvta_s32_f32(a);
}
-// CHECK-LABEL: define <2 x i32> @test_vcvta_u32_f32(<2 x float> %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vcvta_u32_f32(<2 x float> %a) #0 {
// CHECK: [[VCVTA_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtau.v2i32.v2f32(<2 x float> %a) #3
// CHECK: ret <2 x i32> [[VCVTA_U32_V1_I]]
uint32x2_t test_vcvta_u32_f32(float32x2_t a) {
return vcvta_u32_f32(a);
}
-// CHECK-LABEL: define <4 x i32> @test_vcvtaq_s32_f32(<4 x float> %a) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcvtaq_s32_f32(<4 x float> %a) #1 {
// CHECK: [[VCVTAQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtas.v4i32.v4f32(<4 x float> %a) #3
// CHECK: ret <4 x i32> [[VCVTAQ_S32_V1_I]]
int32x4_t test_vcvtaq_s32_f32(float32x4_t a) {
return vcvtaq_s32_f32(a);
}
-// CHECK-LABEL: define <4 x i32> @test_vcvtaq_u32_f32(<4 x float> %a) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcvtaq_u32_f32(<4 x float> %a) #1 {
// CHECK: [[VCVTAQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtau.v4i32.v4f32(<4 x float> %a) #3
// CHECK: ret <4 x i32> [[VCVTAQ_U32_V1_I]]
uint32x4_t test_vcvtaq_u32_f32(float32x4_t a) {
return vcvtaq_u32_f32(a);
}
-// CHECK-LABEL: define <2 x i32> @test_vcvtn_s32_f32(<2 x float> %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vcvtn_s32_f32(<2 x float> %a) #0 {
// CHECK: [[VCVTN_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float> %a) #3
// CHECK: ret <2 x i32> [[VCVTN_S32_V1_I]]
int32x2_t test_vcvtn_s32_f32(float32x2_t a) {
return vcvtn_s32_f32(a);
}
-// CHECK-LABEL: define <2 x i32> @test_vcvtn_u32_f32(<2 x float> %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vcvtn_u32_f32(<2 x float> %a) #0 {
// CHECK: [[VCVTN_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtnu.v2i32.v2f32(<2 x float> %a) #3
// CHECK: ret <2 x i32> [[VCVTN_U32_V1_I]]
uint32x2_t test_vcvtn_u32_f32(float32x2_t a) {
return vcvtn_u32_f32(a);
}
-// CHECK-LABEL: define <4 x i32> @test_vcvtnq_s32_f32(<4 x float> %a) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcvtnq_s32_f32(<4 x float> %a) #1 {
// CHECK: [[VCVTNQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtns.v4i32.v4f32(<4 x float> %a) #3
// CHECK: ret <4 x i32> [[VCVTNQ_S32_V1_I]]
int32x4_t test_vcvtnq_s32_f32(float32x4_t a) {
return vcvtnq_s32_f32(a);
}
-// CHECK-LABEL: define <4 x i32> @test_vcvtnq_u32_f32(<4 x float> %a) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcvtnq_u32_f32(<4 x float> %a) #1 {
// CHECK: [[VCVTNQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtnu.v4i32.v4f32(<4 x float> %a) #3
// CHECK: ret <4 x i32> [[VCVTNQ_U32_V1_I]]
uint32x4_t test_vcvtnq_u32_f32(float32x4_t a) {
return vcvtnq_u32_f32(a);
}
-// CHECK-LABEL: define <2 x i32> @test_vcvtp_s32_f32(<2 x float> %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vcvtp_s32_f32(<2 x float> %a) #0 {
// CHECK: [[VCVTP_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtps.v2i32.v2f32(<2 x float> %a) #3
// CHECK: ret <2 x i32> [[VCVTP_S32_V1_I]]
int32x2_t test_vcvtp_s32_f32(float32x2_t a) {
return vcvtp_s32_f32(a);
}
-// CHECK-LABEL: define <2 x i32> @test_vcvtp_u32_f32(<2 x float> %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vcvtp_u32_f32(<2 x float> %a) #0 {
// CHECK: [[VCVTP_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtpu.v2i32.v2f32(<2 x float> %a) #3
// CHECK: ret <2 x i32> [[VCVTP_U32_V1_I]]
uint32x2_t test_vcvtp_u32_f32(float32x2_t a) {
return vcvtp_u32_f32(a);
}
-// CHECK-LABEL: define <4 x i32> @test_vcvtpq_s32_f32(<4 x float> %a) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcvtpq_s32_f32(<4 x float> %a) #1 {
// CHECK: [[VCVTPQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtps.v4i32.v4f32(<4 x float> %a) #3
// CHECK: ret <4 x i32> [[VCVTPQ_S32_V1_I]]
int32x4_t test_vcvtpq_s32_f32(float32x4_t a) {
return vcvtpq_s32_f32(a);
}
-// CHECK-LABEL: define <4 x i32> @test_vcvtpq_u32_f32(<4 x float> %a) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcvtpq_u32_f32(<4 x float> %a) #1 {
// CHECK: [[VCVTPQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtpu.v4i32.v4f32(<4 x float> %a) #3
// CHECK: ret <4 x i32> [[VCVTPQ_U32_V1_I]]
uint32x4_t test_vcvtpq_u32_f32(float32x4_t a) {
return vcvtpq_u32_f32(a);
}
-// CHECK-LABEL: define <2 x i32> @test_vcvtm_s32_f32(<2 x float> %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vcvtm_s32_f32(<2 x float> %a) #0 {
// CHECK: [[VCVTM_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtms.v2i32.v2f32(<2 x float> %a) #3
// CHECK: ret <2 x i32> [[VCVTM_S32_V1_I]]
int32x2_t test_vcvtm_s32_f32(float32x2_t a) {
return vcvtm_s32_f32(a);
}
-// CHECK-LABEL: define <2 x i32> @test_vcvtm_u32_f32(<2 x float> %a) #0 {
+// CHECK-LABEL: define{{.*}} <2 x i32> @test_vcvtm_u32_f32(<2 x float> %a) #0 {
// CHECK: [[VCVTM_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtmu.v2i32.v2f32(<2 x float> %a) #3
// CHECK: ret <2 x i32> [[VCVTM_U32_V1_I]]
uint32x2_t test_vcvtm_u32_f32(float32x2_t a) {
return vcvtm_u32_f32(a);
}
-// CHECK-LABEL: define <4 x i32> @test_vcvtmq_s32_f32(<4 x float> %a) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcvtmq_s32_f32(<4 x float> %a) #1 {
// CHECK: [[VCVTMQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtms.v4i32.v4f32(<4 x float> %a) #3
// CHECK: ret <4 x i32> [[VCVTMQ_S32_V1_I]]
int32x4_t test_vcvtmq_s32_f32(float32x4_t a) {
return vcvtmq_s32_f32(a);
}
-// CHECK-LABEL: define <4 x i32> @test_vcvtmq_u32_f32(<4 x float> %a) #1 {
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcvtmq_u32_f32(<4 x float> %a) #1 {
// CHECK: [[VCVTMQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtmu.v4i32.v4f32(<4 x float> %a) #3
// CHECK: ret <4 x i32> [[VCVTMQ_U32_V1_I]]
uint32x4_t test_vcvtmq_u32_f32(float32x4_t a) {
aapcs_fn bar;
int foo(aapcs_vfp_fn baz) {
-// CHECK-LABEL: define i32 @foo
+// CHECK-LABEL: define{{.*}} i32 @foo
// CHECK: call arm_aapcscc
// CHECK: call arm_aapcs_vfpcc
return bar() + baz();
va_list the_list;
int simple_int(void) {
-// CHECK-LABEL: define i32 @simple_int
+// CHECK-LABEL: define{{.*}} i32 @simple_int
return va_arg(the_list, int);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 4
};
struct bigstruct simple_struct(void) {
-// CHECK-LABEL: define void @simple_struct(%struct.bigstruct* noalias sret(%struct.bigstruct) align 4 %agg.result)
+// CHECK-LABEL: define{{.*}} void @simple_struct(%struct.bigstruct* noalias sret(%struct.bigstruct) align 4 %agg.result)
return va_arg(the_list, struct bigstruct);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 40
};
struct aligned_bigstruct simple_aligned_struct(void) {
-// CHECK-LABEL: define void @simple_aligned_struct(%struct.aligned_bigstruct* noalias sret(%struct.aligned_bigstruct) align 8 %agg.result)
+// CHECK-LABEL: define{{.*}} void @simple_aligned_struct(%struct.aligned_bigstruct* noalias sret(%struct.aligned_bigstruct) align 8 %agg.result)
return va_arg(the_list, struct aligned_bigstruct);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
}
double simple_double(void) {
-// CHECK-LABEL: define double @simple_double
+// CHECK-LABEL: define{{.*}} double @simple_double
return va_arg(the_list, double);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
};
struct hfa simple_hfa(void) {
-// CHECK-LABEL: define void @simple_hfa(%struct.hfa* noalias sret(%struct.hfa) align 4 %agg.result)
+// CHECK-LABEL: define{{.*}} void @simple_hfa(%struct.hfa* noalias sret(%struct.hfa) align 4 %agg.result)
return va_arg(the_list, struct hfa);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 8
typedef int underaligned_int __attribute__((packed,aligned(2)));
underaligned_int underaligned_int_test() {
-// CHECK-LABEL: define i32 @underaligned_int_test()
+// CHECK-LABEL: define{{.*}} i32 @underaligned_int_test()
return va_arg(the_list, underaligned_int);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 4
typedef int overaligned_int __attribute__((aligned(32)));
overaligned_int overaligned_int_test() {
-// CHECK-LABEL: define i32 @overaligned_int_test()
+// CHECK-LABEL: define{{.*}} i32 @overaligned_int_test()
return va_arg(the_list, overaligned_int);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 4
typedef long long underaligned_long_long __attribute__((packed,aligned(2)));
underaligned_long_long underaligned_long_long_test() {
-// CHECK-LABEL: define i64 @underaligned_long_long_test()
+// CHECK-LABEL: define{{.*}} i64 @underaligned_long_long_test()
return va_arg(the_list, underaligned_long_long);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
typedef long long overaligned_long_long __attribute__((aligned(32)));
overaligned_long_long overaligned_long_long_test() {
-// CHECK-LABEL: define i64 @overaligned_long_long_test()
+// CHECK-LABEL: define{{.*}} i64 @overaligned_long_long_test()
return va_arg(the_list, overaligned_long_long);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
int val;
} underaligned_int_struct;
underaligned_int_struct underaligned_int_struct_test() {
-// CHECK-LABEL: define i32 @underaligned_int_struct_test()
+// CHECK-LABEL: define{{.*}} i32 @underaligned_int_struct_test()
return va_arg(the_list, underaligned_int_struct);
// CHECK: [[RETVAL:%[a-z0-9._]+]] = alloca %struct.underaligned_int_struct, align 2
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
int val;
} overaligned_int_struct;
overaligned_int_struct overaligned_int_struct_test() {
-// CHECK-LABEL: define void @overaligned_int_struct_test(%struct.overaligned_int_struct* noalias sret(%struct.overaligned_int_struct) align 16 %agg.result)
+// CHECK-LABEL: define{{.*}} void @overaligned_int_struct_test(%struct.overaligned_int_struct* noalias sret(%struct.overaligned_int_struct) align 16 %agg.result)
return va_arg(the_list, overaligned_int_struct);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 16
long long val;
} underaligned_long_long_struct;
underaligned_long_long_struct underaligned_long_long_struct_test() {
-// CHECK-LABEL: define void @underaligned_long_long_struct_test(%struct.underaligned_long_long_struct* noalias sret(%struct.underaligned_long_long_struct) align 2 %agg.result)
+// CHECK-LABEL: define{{.*}} void @underaligned_long_long_struct_test(%struct.underaligned_long_long_struct* noalias sret(%struct.underaligned_long_long_struct) align 2 %agg.result)
return va_arg(the_list, underaligned_long_long_struct);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 8
long long val;
} overaligned_long_long_struct;
overaligned_long_long_struct overaligned_long_long_struct_test() {
-// CHECK-LABEL: define void @overaligned_long_long_struct_test(%struct.overaligned_long_long_struct* noalias sret(%struct.overaligned_long_long_struct) align 16 %agg.result)
+// CHECK-LABEL: define{{.*}} void @overaligned_long_long_struct_test(%struct.overaligned_long_long_struct* noalias sret(%struct.overaligned_long_long_struct) align 16 %agg.result)
return va_arg(the_list, overaligned_long_long_struct);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
int val __attribute__((packed,aligned(2)));
} underaligned_int_struct_member;
underaligned_int_struct_member underaligned_int_struct_member_test() {
-// CHECK-LABEL: define i32 @underaligned_int_struct_member_test()
+// CHECK-LABEL: define{{.*}} i32 @underaligned_int_struct_member_test()
return va_arg(the_list, underaligned_int_struct_member);
// CHECK: [[RETVAL:%[a-z0-9._]+]] = alloca %struct.underaligned_int_struct_member, align 2
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
int val __attribute__((aligned(16)));
} overaligned_int_struct_member;
overaligned_int_struct_member overaligned_int_struct_member_test() {
-// CHECK-LABEL: define void @overaligned_int_struct_member_test(%struct.overaligned_int_struct_member* noalias sret(%struct.overaligned_int_struct_member) align 16 %agg.result)
+// CHECK-LABEL: define{{.*}} void @overaligned_int_struct_member_test(%struct.overaligned_int_struct_member* noalias sret(%struct.overaligned_int_struct_member) align 16 %agg.result)
return va_arg(the_list, overaligned_int_struct_member);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
long long val __attribute__((packed,aligned(2)));
} underaligned_long_long_struct_member;
underaligned_long_long_struct_member underaligned_long_long_struct_member_test() {
-// CHECK-LABEL: define void @underaligned_long_long_struct_member_test(%struct.underaligned_long_long_struct_member* noalias sret(%struct.underaligned_long_long_struct_member) align 2 %agg.result)
+// CHECK-LABEL: define{{.*}} void @underaligned_long_long_struct_member_test(%struct.underaligned_long_long_struct_member* noalias sret(%struct.underaligned_long_long_struct_member) align 2 %agg.result)
return va_arg(the_list, underaligned_long_long_struct_member);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 8
long long val __attribute__((aligned(16)));
} overaligned_long_long_struct_member;
overaligned_long_long_struct_member overaligned_long_long_struct_member_test() {
-// CHECK-LABEL: define void @overaligned_long_long_struct_member_test(%struct.overaligned_long_long_struct_member* noalias sret(%struct.overaligned_long_long_struct_member) align 16 %agg.result)
+// CHECK-LABEL: define{{.*}} void @overaligned_long_long_struct_member_test(%struct.overaligned_long_long_struct_member* noalias sret(%struct.overaligned_long_long_struct_member) align 16 %agg.result)
return va_arg(the_list, overaligned_long_long_struct_member);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
}
void check_start(int n, ...) {
-// CHECK-LABEL: define void @check_start(i32 %n, ...)
+// CHECK-LABEL: define{{.*}} void @check_start(i32 %n, ...)
va_list the_list;
va_start(the_list, n);
float16x8_t g8;
void st4(float16x4_t a) { g4 = a; }
-// CHECK-SOFT: define void @st4(<2 x i32> %a.coerce)
+// CHECK-SOFT: define{{.*}} void @st4(<2 x i32> %a.coerce)
// CHECK-SOFT: store <2 x i32> %a.coerce, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*)
//
-// CHECK-HARD: define arm_aapcs_vfpcc void @st4(<2 x i32> %a.coerce)
+// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc void @st4(<2 x i32> %a.coerce)
// CHECK-HARD: store <2 x i32> %a.coerce, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*)
//
-// CHECK-FULL: define arm_aapcs_vfpcc void @st4(<4 x half> %a)
+// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc void @st4(<4 x half> %a)
// CHECK-FULL: store <4 x half> %a, <4 x half>* @g4
float16x4_t ld4(void) { return g4; }
-// CHECK-SOFT: define <2 x i32> @ld4()
+// CHECK-SOFT: define{{.*}} <2 x i32> @ld4()
// CHECK-SOFT: %0 = load <2 x i32>, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*)
// CHECK-SOFT: ret <2 x i32> %0
//
-// CHECK-HARD: define arm_aapcs_vfpcc <2 x i32> @ld4()
+// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc <2 x i32> @ld4()
// CHECK-HARD: %0 = load <2 x i32>, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*)
// CHECK-HARD: ret <2 x i32> %0
//
-// CHECK-FULL: define arm_aapcs_vfpcc <4 x half> @ld4()
+// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc <4 x half> @ld4()
// CHECK-FULL: %0 = load <4 x half>, <4 x half>* @g4
// CHECK-FULL: ret <4 x half> %0
void st8(float16x8_t a) { g8 = a; }
-// CHECK-SOFT: define void @st8(<4 x i32> %a.coerce)
+// CHECK-SOFT: define{{.*}} void @st8(<4 x i32> %a.coerce)
// CHECK-SOFT: store <4 x i32> %a.coerce, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*)
//
-// CHECK-HARD: define arm_aapcs_vfpcc void @st8(<4 x i32> %a.coerce)
+// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc void @st8(<4 x i32> %a.coerce)
// CHECK-HARD: store <4 x i32> %a.coerce, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*)
//
-// CHECK-FULL: define arm_aapcs_vfpcc void @st8(<8 x half> %a)
+// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc void @st8(<8 x half> %a)
// CHECK-FULL: store <8 x half> %a, <8 x half>* @g8
float16x8_t ld8(void) { return g8; }
-// CHECK-SOFT: define <4 x i32> @ld8()
+// CHECK-SOFT: define{{.*}} <4 x i32> @ld8()
// CHECK-SOFT: %0 = load <4 x i32>, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*)
// CHECK-SOFT: ret <4 x i32> %0
//
-// CHECK-HARD: define arm_aapcs_vfpcc <4 x i32> @ld8()
+// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc <4 x i32> @ld8()
// CHECK-HARD: %0 = load <4 x i32>, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*)
// CHECK-HARD: ret <4 x i32> %0
//
-// CHECK-FULL: define arm_aapcs_vfpcc <8 x half> @ld8()
+// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc <8 x half> @ld8()
// CHECK-FULL: %0 = load <8 x half>, <8 x half>* @g8
// CHECK-FULL: ret <8 x half> %0
void test_hfa(hfa_t a) {}
-// CHECK-SOFT: define void @test_hfa([2 x i64] %a.coerce)
-// CHECK-HARD: define arm_aapcs_vfpcc void @test_hfa([2 x <2 x i32>] %a.coerce)
-// CHECK-FULL: define arm_aapcs_vfpcc void @test_hfa(%struct.hfa_t %a.coerce)
+// CHECK-SOFT: define{{.*}} void @test_hfa([2 x i64] %a.coerce)
+// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc void @test_hfa([2 x <2 x i32>] %a.coerce)
+// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc void @test_hfa(%struct.hfa_t %a.coerce)
hfa_t ghfa;
hfa_t test_ret_hfa(void) { return ghfa; }
-// CHECK-SOFT: define void @test_ret_hfa(%struct.hfa_t* noalias nocapture sret(%struct.hfa_t) align 8 %agg.result)
-// CHECK-HARD: define arm_aapcs_vfpcc [2 x <2 x i32>] @test_ret_hfa()
-// CHECK-FULL: define arm_aapcs_vfpcc %struct.hfa_t @test_ret_hfa()
+// CHECK-SOFT: define{{.*}} void @test_ret_hfa(%struct.hfa_t* noalias nocapture sret(%struct.hfa_t) align 8 %agg.result)
+// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc [2 x <2 x i32>] @test_ret_hfa()
+// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc %struct.hfa_t @test_ret_hfa()
B1 M[1];
};
-// CHECK-SOFT: define void @_Z2f12S1(%struct.S1* noalias nocapture sret(%struct.S1) align 8 %agg.result, [2 x i64] %s1.coerce)
-// CHECK-HARD: define arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f12S1([2 x <2 x i32>] returned %s1.coerce)
-// CHECK-FULL: define arm_aapcs_vfpcc %struct.S1 @_Z2f12S1(%struct.S1 returned %s1.coerce)
+// CHECK-SOFT: define{{.*}} void @_Z2f12S1(%struct.S1* noalias nocapture sret(%struct.S1) align 8 %agg.result, [2 x i64] %s1.coerce)
+// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f12S1([2 x <2 x i32>] returned %s1.coerce)
+// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc %struct.S1 @_Z2f12S1(%struct.S1 returned %s1.coerce)
struct S1 f1(struct S1 s1) { return s1; }
-// CHECK-SOFT: define void @_Z2f22S2(%struct.S2* noalias nocapture sret(%struct.S2) align 8 %agg.result, [4 x i32] %s2.coerce)
-// CHECK-HARD: define arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f22S2([2 x <2 x i32>] returned %s2.coerce)
-// CHECK-FULL: define arm_aapcs_vfpcc %struct.S2 @_Z2f22S2(%struct.S2 returned %s2.coerce)
+// CHECK-SOFT: define{{.*}} void @_Z2f22S2(%struct.S2* noalias nocapture sret(%struct.S2) align 8 %agg.result, [4 x i32] %s2.coerce)
+// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f22S2([2 x <2 x i32>] returned %s2.coerce)
+// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc %struct.S2 @_Z2f22S2(%struct.S2 returned %s2.coerce)
struct S2 f2(struct S2 s2) { return s2; }
-// CHECK-SOFT: define void @_Z2f32S3(%struct.S3* noalias nocapture sret(%struct.S3) align 8 %agg.result, [2 x i64] %s3.coerce)
-// CHECK-HARD: define arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f32S3([2 x <2 x i32>] returned %s3.coerce)
-// CHECK-FULL: define arm_aapcs_vfpcc %struct.S3 @_Z2f32S3(%struct.S3 returned %s3.coerce)
+// CHECK-SOFT: define{{.*}} void @_Z2f32S3(%struct.S3* noalias nocapture sret(%struct.S3) align 8 %agg.result, [2 x i64] %s3.coerce)
+// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f32S3([2 x <2 x i32>] returned %s3.coerce)
+// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc %struct.S3 @_Z2f32S3(%struct.S3 returned %s3.coerce)
struct S3 f3(struct S3 s3) { return s3; }
-// CHECK-SOFT: define void @_Z2f42S4(%struct.S4* noalias nocapture sret(%struct.S4) align 8 %agg.result, [2 x i64] %s4.coerce)
-// CHECK-HARD: define arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f42S4([2 x <2 x i32>] returned %s4.coerce)
-// CHECK-FULL: define arm_aapcs_vfpcc %struct.S4 @_Z2f42S4(%struct.S4 returned %s4.coerce)
+// CHECK-SOFT: define{{.*}} void @_Z2f42S4(%struct.S4* noalias nocapture sret(%struct.S4) align 8 %agg.result, [2 x i64] %s4.coerce)
+// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f42S4([2 x <2 x i32>] returned %s4.coerce)
+// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc %struct.S4 @_Z2f42S4(%struct.S4 returned %s4.coerce)
struct S4 f4(struct S4 s4) { return s4; }
-// CHECK-SOFT: define void @_Z2f52S5(%struct.S5* noalias nocapture sret(%struct.S5) align 8 %agg.result, [2 x i64] %s5.coerce)
-// CHECK-HARD: define arm_aapcs_vfpcc %struct.S5 @_Z2f52S5(%struct.S5 returned %s5.coerce)
-// CHECK-FULL: define arm_aapcs_vfpcc %struct.S5 @_Z2f52S5(%struct.S5 returned %s5.coerce)
+// CHECK-SOFT: define{{.*}} void @_Z2f52S5(%struct.S5* noalias nocapture sret(%struct.S5) align 8 %agg.result, [2 x i64] %s5.coerce)
+// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc %struct.S5 @_Z2f52S5(%struct.S5 returned %s5.coerce)
+// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc %struct.S5 @_Z2f52S5(%struct.S5 returned %s5.coerce)
struct S5 f5(struct S5 s5) { return s5; }
// It's the job of the argument *consumer* to perform the required sign & zero
// extensions under AAPCS. There shouldn't be
-// CHECK: define i8 @test5(i8 %a, i16 %b)
+// CHECK: define{{.*}} i8 @test5(i8 %a, i16 %b)
unsigned char test5(unsigned char a, signed short b) {
}
// __fp16 can be used as a function argument or return type (ACLE 2.0)
-// CHECK: define half @test_half(half %{{.*}})
+// CHECK: define{{.*}} half @test_half(half %{{.*}})
__fp16 test_half(__fp16 A) { }
// __fp16 is a base type for homogeneous floating-point aggregates for AArch64 (but not 32-bit ARM).
-// CHECK: define %struct.HFA_half @test_half_hfa([4 x half] %{{.*}})
+// CHECK: define{{.*}} %struct.HFA_half @test_half_hfa([4 x half] %{{.*}})
struct HFA_half { __fp16 a[4]; };
struct HFA_half test_half_hfa(struct HFA_half A) { }
#include <stddef.h>
#include <arm_acle.h>
-// CHECK-LABEL: define i32* @create_tag1
+// CHECK-LABEL: define{{.*}} i32* @create_tag1
int *create_tag1(int *a, unsigned b) {
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
// CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64
return __arm_mte_create_random_tag(a,b);
}
-// CHECK-LABEL: define i16* @create_tag2
+// CHECK-LABEL: define{{.*}} i16* @create_tag2
short *create_tag2(short *a, unsigned b) {
// CHECK: [[T0:%[0-9]+]] = bitcast i16* %a to i8*
// CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64
return __arm_mte_create_random_tag(a,b);
}
-// CHECK-LABEL: define i8* @create_tag3
+// CHECK-LABEL: define{{.*}} i8* @create_tag3
char *create_tag3(char *a, unsigned b) {
// CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64
// CHECK: [[T2:%[0-9]+]] = tail call i8* @llvm.aarch64.irg(i8* %a, i64 [[T1]])
return __arm_mte_create_random_tag(a,b);
}
-// CHECK-LABEL: define i8* @increment_tag1
+// CHECK-LABEL: define{{.*}} i8* @increment_tag1
char *increment_tag1(char *a) {
// CHECK: call i8* @llvm.aarch64.addg(i8* %a, i64 3)
return __arm_mte_increment_tag(a,3);
}
-// CHECK-LABEL: define i16* @increment_tag2
+// CHECK-LABEL: define{{.*}} i16* @increment_tag2
short *increment_tag2(short *a) {
// CHECK: [[T0:%[0-9]+]] = bitcast i16* %a to i8*
// CHECK: [[T1:%[0-9]+]] = tail call i8* @llvm.aarch64.addg(i8* [[T0]], i64 3)
return __arm_mte_increment_tag(a,3);
}
-// CHECK-LABEL: define i32 @exclude_tag
+// CHECK-LABEL: define{{.*}} i32 @exclude_tag
unsigned exclude_tag(int *a, unsigned m) {
// CHECK: [[T0:%[0-9]+]] = zext i32 %m to i64
// CHECK: [[T1:%[0-9]+]] = bitcast i32* %a to i8*
return __arm_mte_exclude_tag(a, m);
}
-// CHECK-LABEL: define i32* @get_tag1
+// CHECK-LABEL: define{{.*}} i32* @get_tag1
int *get_tag1(int *a) {
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
// CHECK: [[T1:%[0-9]+]] = tail call i8* @llvm.aarch64.ldg(i8* [[T0]], i8* [[T0]])
return __arm_mte_get_tag(a);
}
-// CHECK-LABEL: define i16* @get_tag2
+// CHECK-LABEL: define{{.*}} i16* @get_tag2
short *get_tag2(short *a) {
// CHECK: [[T0:%[0-9]+]] = bitcast i16* %a to i8*
// CHECK: [[T1:%[0-9]+]] = tail call i8* @llvm.aarch64.ldg(i8* [[T0]], i8* [[T0]])
return __arm_mte_get_tag(a);
}
-// CHECK-LABEL: define void @set_tag1
+// CHECK-LABEL: define{{.*}} void @set_tag1
void set_tag1(int *a) {
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
// CHECK: tail call void @llvm.aarch64.stg(i8* [[T0]], i8* [[T0]])
__arm_mte_set_tag(a);
}
-// CHECK-LABEL: define i64 @subtract_pointers
+// CHECK-LABEL: define{{.*}} i64 @subtract_pointers
ptrdiff_t subtract_pointers(int *a, int *b) {
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
// CHECK: [[T1:%[0-9]+]] = bitcast i32* %b to i8*
return __arm_mte_ptrdiff(a, b);
}
-// CHECK-LABEL: define i64 @subtract_pointers_null_1
+// CHECK-LABEL: define{{.*}} i64 @subtract_pointers_null_1
ptrdiff_t subtract_pointers_null_1(int *a) {
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
// CHECK: [[T1:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(i8* [[T0]], i8* null)
return __arm_mte_ptrdiff(a, NULL);
}
-// CHECK-LABEL: define i64 @subtract_pointers_null_2
+// CHECK-LABEL: define{{.*}} i64 @subtract_pointers_null_2
ptrdiff_t subtract_pointers_null_2(int *a) {
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
// CHECK: [[T1:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(i8* null, i8* [[T0]])
}
// Check arithmetic promotion on return type
-// CHECK-LABEL: define i32 @subtract_pointers4
+// CHECK-LABEL: define{{.*}} i32 @subtract_pointers4
int subtract_pointers4(void* a, void *b) {
// CHECK: [[T0:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(i8* %a, i8* %b)
// CHECK-NEXT: %cmp = icmp slt i64 [[T0]], 1
};
};
-// CHECK: define arm_aapcs_vfpcc %struct.Vec2 @_Z7getVec2v()
+// CHECK: define{{.*}} arm_aapcs_vfpcc %struct.Vec2 @_Z7getVec2v()
// CHECK: ret %struct.Vec2
Vec2 getVec2() {
Vec2 out;
// KASAN: @joydev_ids{{.*}} global [1 x {{.*}}i64 1234 }], align 16
// Check the aliases exist:
-// CHECK: @__global_alias = alias
-// CHECK: @global_alias_2 = alias
-// CHECK: @__global_alias_2_alias = alias
-// CHECK: @__mod_joydev_ids_device_table = alias
+// CHECK: @__global_alias ={{.*}} alias
+// CHECK: @global_alias_2 ={{.*}} alias
+// CHECK: @__global_alias_2_alias ={{.*}} alias
+// CHECK: @__mod_joydev_ids_device_table ={{.*}} alias
// CHECK-LABEL: define internal void @asan.module_ctor
// ASAN: call void @__asan_register_globals({{.*}}, i{{32|64}} 4)
// RUN: %clang_cc1 -triple i386-pc-linux-gnu -O0 -emit-llvm %s -o - | FileCheck %s
int test1(int cond) {
- // CHECK-LABEL: define i32 @test1(
+ // CHECK-LABEL: define{{.*}} i32 @test1(
// CHECK: callbr void asm sideeffect
// CHECK: to label %asm.fallthrough [label %label_true, label %loop]
// CHECK-LABEL: asm.fallthrough:
}
int test2(int cond) {
- // CHECK-LABEL: define i32 @test2(
+ // CHECK-LABEL: define{{.*}} i32 @test2(
// CHECK: callbr i32 asm sideeffect
// CHECK: to label %asm.fallthrough [label %label_true, label %loop]
// CHECK-LABEL: asm.fallthrough:
}
int test3(int out1, int out2) {
- // CHECK-LABEL: define i32 @test3(
+ // CHECK-LABEL: define{{.*}} i32 @test3(
// CHECK: callbr { i32, i32 } asm sideeffect
// CHECK: to label %asm.fallthrough [label %label_true, label %loop]
// CHECK-LABEL: asm.fallthrough:
}
int test4(int out1, int out2) {
- // CHECK-LABEL: define i32 @test4(
+ // CHECK-LABEL: define{{.*}} i32 @test4(
// CHECK: callbr { i32, i32 } asm sideeffect "jne ${3:l}", "={si},={di},r,X,X,0,1
// CHECK: to label %asm.fallthrough [label %label_true, label %loop]
// CHECK-LABEL: asm.fallthrough:
}
int test5(int addr, int size, int limit) {
- // CHECK-LABEL: define i32 @test5(
+ // CHECK-LABEL: define{{.*}} i32 @test5(
// CHECK: callbr i32 asm "add $1,$0 ; jc ${3:l} ; cmp $2,$0 ; ja ${3:l} ; ", "=r,imr,imr,X,0
// CHECK: to label %asm.fallthrough [label %t_err]
// CHECK-LABEL: asm.fallthrough:
}
int test6(int out1) {
- // CHECK-LABEL: define i32 @test6(
+ // CHECK-LABEL: define{{.*}} i32 @test6(
// CHECK: callbr i32 asm sideeffect "testl $0, $0; testl $1, $1; jne ${2:l}", "={si},r,X,X,0,{{.*}} i8* blockaddress(@test6, %label_true), i8* blockaddress(@test6, %landing)
// CHECK: to label %asm.fallthrough [label %label_true, label %landing]
// CHECK-LABEL: asm.fallthrough:
// Check that we don't generate unnecessary reloads.
//
-// CHECK-LABEL: define void @f0()
+// CHECK-LABEL: define{{.*}} void @f0()
// CHECK: [[x_0:%.*]] = alloca i32, align 4
// CHECK-NEXT: [[y_0:%.*]] = alloca i32, align 4
// CHECK-NEXT: store i32 1, i32* [[x_0]]
// This used to test that we generate reloads for volatile access,
// but that does not appear to be correct behavior for C.
//
-// CHECK-LABEL: define void @f1()
+// CHECK-LABEL: define{{.*}} void @f1()
// CHECK: [[x_1:%.*]] = alloca i32, align 4
// CHECK-NEXT: [[y_1:%.*]] = alloca i32, align 4
// CHECK-NEXT: store volatile i32 1, i32* [[x_1]]
// ARM: call{{.*}} void @__atomic_load(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
// ARM: call{{.*}} void @__atomic_store(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
-// PPC32-LABEL: define void @test1
+// PPC32-LABEL: define{{.*}} void @test1
// PPC32: = load atomic i8, i8* @c1 seq_cst
// PPC32: store atomic i8 {{.*}}, i8* @c1 seq_cst
// PPC32: = load atomic i16, i16* @s1 seq_cst
// PPC32: call void @__atomic_load(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
// PPC32: call void @__atomic_store(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
-// PPC64-LABEL: define void @test1
+// PPC64-LABEL: define{{.*}} void @test1
// PPC64: = load atomic i8, i8* @c1 seq_cst
// PPC64: store atomic i8 {{.*}}, i8* @c1 seq_cst
// PPC64: = load atomic i16, i16* @s1 seq_cst
// PPC64: call void @__atomic_load(i64 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
// PPC64: call void @__atomic_store(i64 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
-// MIPS32-LABEL: define void @test1
+// MIPS32-LABEL: define{{.*}} void @test1
// MIPS32: = load atomic i8, i8* @c1 seq_cst
// MIPS32: store atomic i8 {{.*}}, i8* @c1 seq_cst
// MIPS32: = load atomic i16, i16* @s1 seq_cst
// MIPS32: call void @__atomic_load(i32 signext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
// MIPS32: call void @__atomic_store(i32 signext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
-// MIPS64-LABEL: define void @test1
+// MIPS64-LABEL: define{{.*}} void @test1
// MIPS64: = load atomic i8, i8* @c1 seq_cst
// MIPS64: store atomic i8 {{.*}}, i8* @c1 seq_cst
// MIPS64: = load atomic i16, i16* @s1 seq_cst
// MIPS64: call void @__atomic_load(i64 zeroext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0)
// MIPS64: call void @__atomic_store(i64 zeroext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
-// SPARC-LABEL: define void @test1
+// SPARC-LABEL: define{{.*}} void @test1
// SPARC: = load atomic i8, i8* @c1 seq_cst
// SPARC: store atomic i8 {{.*}}, i8* @c1 seq_cst
// SPARC: = load atomic i16, i16* @s1 seq_cst
//===----------------------------------------------------------------------===//
// Global variables
//===----------------------------------------------------------------------===//
-// CHECK-128: @global_i8 = global <16 x i8> zeroinitializer, align 16
-// CHECK-128-NEXT: @global_i16 = global <8 x i16> zeroinitializer, align 16
-// CHECK-128-NEXT: @global_i32 = global <4 x i32> zeroinitializer, align 16
-// CHECK-128-NEXT: @global_i64 = global <2 x i64> zeroinitializer, align 16
-// CHECK-128-NEXT: @global_u8 = global <16 x i8> zeroinitializer, align 16
-// CHECK-128-NEXT: @global_u16 = global <8 x i16> zeroinitializer, align 16
-// CHECK-128-NEXT: @global_u32 = global <4 x i32> zeroinitializer, align 16
-// CHECK-128-NEXT: @global_u64 = global <2 x i64> zeroinitializer, align 16
-// CHECK-128-NEXT: @global_f16 = global <8 x half> zeroinitializer, align 16
-// CHECK-128-NEXT: @global_f32 = global <4 x float> zeroinitializer, align 16
-// CHECK-128-NEXT: @global_f64 = global <2 x double> zeroinitializer, align 16
-// CHECK-128-NEXT: @global_bf16 = global <8 x bfloat> zeroinitializer, align 16
-// CHECK-128-NEXT: @global_bool = global <2 x i8> zeroinitializer, align 2
-
-// CHECK-256: @global_i8 = global <32 x i8> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_i16 = global <16 x i16> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_i32 = global <8 x i32> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_i64 = global <4 x i64> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_u8 = global <32 x i8> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_u16 = global <16 x i16> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_u32 = global <8 x i32> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_u64 = global <4 x i64> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_f16 = global <16 x half> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_f32 = global <8 x float> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_f64 = global <4 x double> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_bf16 = global <16 x bfloat> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_bool = global <4 x i8> zeroinitializer, align 2
-
-// CHECK-512: @global_i8 = global <64 x i8> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_i16 = global <32 x i16> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_i32 = global <16 x i32> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_i64 = global <8 x i64> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_u8 = global <64 x i8> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_u16 = global <32 x i16> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_u32 = global <16 x i32> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_u64 = global <8 x i64> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_f16 = global <32 x half> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_f32 = global <16 x float> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_f64 = global <8 x double> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_bf16 = global <32 x bfloat> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_bool = global <8 x i8> zeroinitializer, align 2
-
-// CHECK-1024: @global_i8 = global <128 x i8> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_i16 = global <64 x i16> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_i32 = global <32 x i32> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_i64 = global <16 x i64> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_u8 = global <128 x i8> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_u16 = global <64 x i16> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_u32 = global <32 x i32> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_u64 = global <16 x i64> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_f16 = global <64 x half> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_f32 = global <32 x float> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_f64 = global <16 x double> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_bf16 = global <64 x bfloat> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_bool = global <16 x i8> zeroinitializer, align 2
-
-// CHECK-2048: @global_i8 = global <256 x i8> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_i16 = global <128 x i16> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_i32 = global <64 x i32> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_i64 = global <32 x i64> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_u8 = global <256 x i8> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_u16 = global <128 x i16> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_u32 = global <64 x i32> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_u64 = global <32 x i64> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_f16 = global <128 x half> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_f32 = global <64 x float> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_f64 = global <32 x double> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_bf16 = global <128 x bfloat> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_bool = global <32 x i8> zeroinitializer, align 2
+// CHECK-128: @global_i8 ={{.*}} global <16 x i8> zeroinitializer, align 16
+// CHECK-128-NEXT: @global_i16 ={{.*}} global <8 x i16> zeroinitializer, align 16
+// CHECK-128-NEXT: @global_i32 ={{.*}} global <4 x i32> zeroinitializer, align 16
+// CHECK-128-NEXT: @global_i64 ={{.*}} global <2 x i64> zeroinitializer, align 16
+// CHECK-128-NEXT: @global_u8 ={{.*}} global <16 x i8> zeroinitializer, align 16
+// CHECK-128-NEXT: @global_u16 ={{.*}} global <8 x i16> zeroinitializer, align 16
+// CHECK-128-NEXT: @global_u32 ={{.*}} global <4 x i32> zeroinitializer, align 16
+// CHECK-128-NEXT: @global_u64 ={{.*}} global <2 x i64> zeroinitializer, align 16
+// CHECK-128-NEXT: @global_f16 ={{.*}} global <8 x half> zeroinitializer, align 16
+// CHECK-128-NEXT: @global_f32 ={{.*}} global <4 x float> zeroinitializer, align 16
+// CHECK-128-NEXT: @global_f64 ={{.*}} global <2 x double> zeroinitializer, align 16
+// CHECK-128-NEXT: @global_bf16 ={{.*}} global <8 x bfloat> zeroinitializer, align 16
+// CHECK-128-NEXT: @global_bool ={{.*}} global <2 x i8> zeroinitializer, align 2
+
+// CHECK-256: @global_i8 ={{.*}} global <32 x i8> zeroinitializer, align 16
+// CHECK-NEXT-256: @global_i16 ={{.*}} global <16 x i16> zeroinitializer, align 16
+// CHECK-NEXT-256: @global_i32 ={{.*}} global <8 x i32> zeroinitializer, align 16
+// CHECK-NEXT-256: @global_i64 ={{.*}} global <4 x i64> zeroinitializer, align 16
+// CHECK-NEXT-256: @global_u8 ={{.*}} global <32 x i8> zeroinitializer, align 16
+// CHECK-NEXT-256: @global_u16 ={{.*}} global <16 x i16> zeroinitializer, align 16
+// CHECK-NEXT-256: @global_u32 ={{.*}} global <8 x i32> zeroinitializer, align 16
+// CHECK-NEXT-256: @global_u64 ={{.*}} global <4 x i64> zeroinitializer, align 16
+// CHECK-NEXT-256: @global_f16 ={{.*}} global <16 x half> zeroinitializer, align 16
+// CHECK-NEXT-256: @global_f32 ={{.*}} global <8 x float> zeroinitializer, align 16
+// CHECK-NEXT-256: @global_f64 ={{.*}} global <4 x double> zeroinitializer, align 16
+// CHECK-NEXT-256: @global_bf16 ={{.*}} global <16 x bfloat> zeroinitializer, align 16
+// CHECK-NEXT-256: @global_bool ={{.*}} global <4 x i8> zeroinitializer, align 2
+
+// CHECK-512: @global_i8 ={{.*}} global <64 x i8> zeroinitializer, align 16
+// CHECK-NEXT-512: @global_i16 ={{.*}} global <32 x i16> zeroinitializer, align 16
+// CHECK-NEXT-512: @global_i32 ={{.*}} global <16 x i32> zeroinitializer, align 16
+// CHECK-NEXT-512: @global_i64 ={{.*}} global <8 x i64> zeroinitializer, align 16
+// CHECK-NEXT-512: @global_u8 ={{.*}} global <64 x i8> zeroinitializer, align 16
+// CHECK-NEXT-512: @global_u16 ={{.*}} global <32 x i16> zeroinitializer, align 16
+// CHECK-NEXT-512: @global_u32 ={{.*}} global <16 x i32> zeroinitializer, align 16
+// CHECK-NEXT-512: @global_u64 ={{.*}} global <8 x i64> zeroinitializer, align 16
+// CHECK-NEXT-512: @global_f16 ={{.*}} global <32 x half> zeroinitializer, align 16
+// CHECK-NEXT-512: @global_f32 ={{.*}} global <16 x float> zeroinitializer, align 16
+// CHECK-NEXT-512: @global_f64 ={{.*}} global <8 x double> zeroinitializer, align 16
+// CHECK-NEXT-512: @global_bf16 ={{.*}} global <32 x bfloat> zeroinitializer, align 16
+// CHECK-NEXT-512: @global_bool ={{.*}} global <8 x i8> zeroinitializer, align 2
+
+// CHECK-1024: @global_i8 ={{.*}} global <128 x i8> zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_i16 ={{.*}} global <64 x i16> zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_i32 ={{.*}} global <32 x i32> zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_i64 ={{.*}} global <16 x i64> zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_u8 ={{.*}} global <128 x i8> zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_u16 ={{.*}} global <64 x i16> zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_u32 ={{.*}} global <32 x i32> zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_u64 ={{.*}} global <16 x i64> zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_f16 ={{.*}} global <64 x half> zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_f32 ={{.*}} global <32 x float> zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_f64 ={{.*}} global <16 x double> zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_bf16 ={{.*}} global <64 x bfloat> zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_bool ={{.*}} global <16 x i8> zeroinitializer, align 2
+
+// CHECK-2048: @global_i8 ={{.*}} global <256 x i8> zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_i16 ={{.*}} global <128 x i16> zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_i32 ={{.*}} global <64 x i32> zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_i64 ={{.*}} global <32 x i64> zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_u8 ={{.*}} global <256 x i8> zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_u16 ={{.*}} global <128 x i16> zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_u32 ={{.*}} global <64 x i32> zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_u64 ={{.*}} global <32 x i64> zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_f16 ={{.*}} global <128 x half> zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_f32 ={{.*}} global <64 x float> zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_f64 ={{.*}} global <32 x double> zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_bf16 ={{.*}} global <128 x bfloat> zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_bool ={{.*}} global <32 x i8> zeroinitializer, align 2
//===----------------------------------------------------------------------===//
// Global arrays
//===----------------------------------------------------------------------===//
-// CHECK-128: @global_arr_i8 = global [3 x <16 x i8>] zeroinitializer, align 16
-// CHECK-128-NEXT: @global_arr_i16 = global [3 x <8 x i16>] zeroinitializer, align 16
-// CHECK-128-NEXT: @global_arr_i32 = global [3 x <4 x i32>] zeroinitializer, align 16
-// CHECK-128-NEXT: @global_arr_i64 = global [3 x <2 x i64>] zeroinitializer, align 16
-// CHECK-128-NEXT: @global_arr_u8 = global [3 x <16 x i8>] zeroinitializer, align 16
-// CHECK-128-NEXT: @global_arr_u16 = global [3 x <8 x i16>] zeroinitializer, align 16
-// CHECK-128-NEXT: @global_arr_u32 = global [3 x <4 x i32>] zeroinitializer, align 16
-// CHECK-128-NEXT: @global_arr_u64 = global [3 x <2 x i64>] zeroinitializer, align 16
-// CHECK-128-NEXT: @global_arr_f16 = global [3 x <8 x half>] zeroinitializer, align 16
-// CHECK-128-NEXT: @global_arr_f32 = global [3 x <4 x float>] zeroinitializer, align 16
-// CHECK-128-NEXT: @global_arr_f64 = global [3 x <2 x double>] zeroinitializer, align 16
-// CHECK-128-NEXT: @global_arr_bf16 = global [3 x <8 x bfloat>] zeroinitializer, align 16
-// CHECK-128-NEXT: @global_arr_bool = global [3 x <2 x i8>] zeroinitializer, align 2
-
-// CHECK-256: @global_arr_i8 = global [3 x <32 x i8>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_i16 = global [3 x <16 x i16>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_i32 = global [3 x <8 x i32>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_i64 = global [3 x <4 x i64>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_u8 = global [3 x <32 x i8>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_u16 = global [3 x <16 x i16>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_u32 = global [3 x <8 x i32>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_u64 = global [3 x <4 x i64>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_f16 = global [3 x <16 x half>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_f32 = global [3 x <8 x float>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_f64 = global [3 x <4 x double>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_bf16 = global [3 x <16 x bfloat>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_bool = global [3 x <4 x i8>] zeroinitializer, align 2
-
-// CHECK-512: @global_arr_i8 = global [3 x <64 x i8>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_i16 = global [3 x <32 x i16>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_i32 = global [3 x <16 x i32>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_i64 = global [3 x <8 x i64>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_u8 = global [3 x <64 x i8>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_u16 = global [3 x <32 x i16>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_u32 = global [3 x <16 x i32>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_u64 = global [3 x <8 x i64>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_f16 = global [3 x <32 x half>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_f32 = global [3 x <16 x float>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_f64 = global [3 x <8 x double>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_bf16 = global [3 x <32 x bfloat>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_bool = global [3 x <8 x i8>] zeroinitializer, align 2
-
-// CHECK-1024: @global_arr_i8 = global [3 x <128 x i8>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_i16 = global [3 x <64 x i16>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_i32 = global [3 x <32 x i32>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_i64 = global [3 x <16 x i64>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_u8 = global [3 x <128 x i8>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_u16 = global [3 x <64 x i16>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_u32 = global [3 x <32 x i32>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_u64 = global [3 x <16 x i64>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_f16 = global [3 x <64 x half>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_f32 = global [3 x <32 x float>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_f64 = global [3 x <16 x double>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_bf16 = global [3 x <64 x bfloat>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_bool = global [3 x <16 x i8>] zeroinitializer, align 2
-
-// CHECK-2048: @global_arr_i8 = global [3 x <256 x i8>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_i16 = global [3 x <128 x i16>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_i32 = global [3 x <64 x i32>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_i64 = global [3 x <32 x i64>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_u8 = global [3 x <256 x i8>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_u16 = global [3 x <128 x i16>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_u32 = global [3 x <64 x i32>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_u64 = global [3 x <32 x i64>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_f16 = global [3 x <128 x half>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_f32 = global [3 x <64 x float>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_f64 = global [3 x <32 x double>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_bf16 = global [3 x <128 x bfloat>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_bool = global [3 x <32 x i8>] zeroinitializer, align 2
+// CHECK-128: @global_arr_i8 ={{.*}} global [3 x <16 x i8>] zeroinitializer, align 16
+// CHECK-128-NEXT: @global_arr_i16 ={{.*}} global [3 x <8 x i16>] zeroinitializer, align 16
+// CHECK-128-NEXT: @global_arr_i32 ={{.*}} global [3 x <4 x i32>] zeroinitializer, align 16
+// CHECK-128-NEXT: @global_arr_i64 ={{.*}} global [3 x <2 x i64>] zeroinitializer, align 16
+// CHECK-128-NEXT: @global_arr_u8 ={{.*}} global [3 x <16 x i8>] zeroinitializer, align 16
+// CHECK-128-NEXT: @global_arr_u16 ={{.*}} global [3 x <8 x i16>] zeroinitializer, align 16
+// CHECK-128-NEXT: @global_arr_u32 ={{.*}} global [3 x <4 x i32>] zeroinitializer, align 16
+// CHECK-128-NEXT: @global_arr_u64 ={{.*}} global [3 x <2 x i64>] zeroinitializer, align 16
+// CHECK-128-NEXT: @global_arr_f16 ={{.*}} global [3 x <8 x half>] zeroinitializer, align 16
+// CHECK-128-NEXT: @global_arr_f32 ={{.*}} global [3 x <4 x float>] zeroinitializer, align 16
+// CHECK-128-NEXT: @global_arr_f64 ={{.*}} global [3 x <2 x double>] zeroinitializer, align 16
+// CHECK-128-NEXT: @global_arr_bf16 ={{.*}} global [3 x <8 x bfloat>] zeroinitializer, align 16
+// CHECK-128-NEXT: @global_arr_bool ={{.*}} global [3 x <2 x i8>] zeroinitializer, align 2
+
+// CHECK-256: @global_arr_i8 ={{.*}} global [3 x <32 x i8>] zeroinitializer, align 16
+// CHECK-NEXT-256: @global_arr_i16 ={{.*}} global [3 x <16 x i16>] zeroinitializer, align 16
+// CHECK-NEXT-256: @global_arr_i32 ={{.*}} global [3 x <8 x i32>] zeroinitializer, align 16
+// CHECK-NEXT-256: @global_arr_i64 ={{.*}} global [3 x <4 x i64>] zeroinitializer, align 16
+// CHECK-NEXT-256: @global_arr_u8 ={{.*}} global [3 x <32 x i8>] zeroinitializer, align 16
+// CHECK-NEXT-256: @global_arr_u16 ={{.*}} global [3 x <16 x i16>] zeroinitializer, align 16
+// CHECK-NEXT-256: @global_arr_u32 ={{.*}} global [3 x <8 x i32>] zeroinitializer, align 16
+// CHECK-NEXT-256: @global_arr_u64 ={{.*}} global [3 x <4 x i64>] zeroinitializer, align 16
+// CHECK-NEXT-256: @global_arr_f16 ={{.*}} global [3 x <16 x half>] zeroinitializer, align 16
+// CHECK-NEXT-256: @global_arr_f32 ={{.*}} global [3 x <8 x float>] zeroinitializer, align 16
+// CHECK-NEXT-256: @global_arr_f64 ={{.*}} global [3 x <4 x double>] zeroinitializer, align 16
+// CHECK-NEXT-256: @global_arr_bf16 ={{.*}} global [3 x <16 x bfloat>] zeroinitializer, align 16
+// CHECK-NEXT-256: @global_arr_bool ={{.*}} global [3 x <4 x i8>] zeroinitializer, align 2
+
+// CHECK-512: @global_arr_i8 ={{.*}} global [3 x <64 x i8>] zeroinitializer, align 16
+// CHECK-NEXT-512: @global_arr_i16 ={{.*}} global [3 x <32 x i16>] zeroinitializer, align 16
+// CHECK-NEXT-512: @global_arr_i32 ={{.*}} global [3 x <16 x i32>] zeroinitializer, align 16
+// CHECK-NEXT-512: @global_arr_i64 ={{.*}} global [3 x <8 x i64>] zeroinitializer, align 16
+// CHECK-NEXT-512: @global_arr_u8 ={{.*}} global [3 x <64 x i8>] zeroinitializer, align 16
+// CHECK-NEXT-512: @global_arr_u16 ={{.*}} global [3 x <32 x i16>] zeroinitializer, align 16
+// CHECK-NEXT-512: @global_arr_u32 ={{.*}} global [3 x <16 x i32>] zeroinitializer, align 16
+// CHECK-NEXT-512: @global_arr_u64 ={{.*}} global [3 x <8 x i64>] zeroinitializer, align 16
+// CHECK-NEXT-512: @global_arr_f16 ={{.*}} global [3 x <32 x half>] zeroinitializer, align 16
+// CHECK-NEXT-512: @global_arr_f32 ={{.*}} global [3 x <16 x float>] zeroinitializer, align 16
+// CHECK-NEXT-512: @global_arr_f64 ={{.*}} global [3 x <8 x double>] zeroinitializer, align 16
+// CHECK-NEXT-512: @global_arr_bf16 ={{.*}} global [3 x <32 x bfloat>] zeroinitializer, align 16
+// CHECK-NEXT-512: @global_arr_bool ={{.*}} global [3 x <8 x i8>] zeroinitializer, align 2
+
+// CHECK-1024: @global_arr_i8 ={{.*}} global [3 x <128 x i8>] zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_arr_i16 ={{.*}} global [3 x <64 x i16>] zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_arr_i32 ={{.*}} global [3 x <32 x i32>] zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_arr_i64 ={{.*}} global [3 x <16 x i64>] zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_arr_u8 ={{.*}} global [3 x <128 x i8>] zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_arr_u16 ={{.*}} global [3 x <64 x i16>] zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_arr_u32 ={{.*}} global [3 x <32 x i32>] zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_arr_u64 ={{.*}} global [3 x <16 x i64>] zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_arr_f16 ={{.*}} global [3 x <64 x half>] zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_arr_f32 ={{.*}} global [3 x <32 x float>] zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_arr_f64 ={{.*}} global [3 x <16 x double>] zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_arr_bf16 ={{.*}} global [3 x <64 x bfloat>] zeroinitializer, align 16
+// CHECK-NEXT-1024: @global_arr_bool ={{.*}} global [3 x <16 x i8>] zeroinitializer, align 2
+
+// CHECK-2048: @global_arr_i8 ={{.*}} global [3 x <256 x i8>] zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_arr_i16 ={{.*}} global [3 x <128 x i16>] zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_arr_i32 ={{.*}} global [3 x <64 x i32>] zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_arr_i64 ={{.*}} global [3 x <32 x i64>] zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_arr_u8 ={{.*}} global [3 x <256 x i8>] zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_arr_u16 ={{.*}} global [3 x <128 x i16>] zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_arr_u32 ={{.*}} global [3 x <64 x i32>] zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_arr_u64 ={{.*}} global [3 x <32 x i64>] zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_arr_f16 ={{.*}} global [3 x <128 x half>] zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_arr_f32 ={{.*}} global [3 x <64 x float>] zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_arr_f64 ={{.*}} global [3 x <32 x double>] zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_arr_bf16 ={{.*}} global [3 x <128 x bfloat>] zeroinitializer, align 16
+// CHECK-NEXT-2048: @global_arr_bool ={{.*}} global [3 x <32 x i8>] zeroinitializer, align 2
//===----------------------------------------------------------------------===//
// Local variables
ATTR(cpu_specific(ivybridge))
void SingleVersion(void){}
-// LINUX: define void @SingleVersion.S() #[[S:[0-9]+]]
+// LINUX: define{{.*}} void @SingleVersion.S() #[[S:[0-9]+]]
// WINDOWS: define dso_local void @SingleVersion.S() #[[S:[0-9]+]]
ATTR(cpu_specific(ivybridge))
void NotCalled(void){}
-// LINUX: define void @NotCalled.S() #[[S]]
+// LINUX: define{{.*}} void @NotCalled.S() #[[S]]
// WINDOWS: define dso_local void @NotCalled.S() #[[S:[0-9]+]]
// Done before any of the implementations. Also has an undecorated forward
ATTR(cpu_specific(atom))
int DispatchFirst(void) {return 0;}
-// LINUX: define i32 @DispatchFirst.O
+// LINUX: define{{.*}} i32 @DispatchFirst.O
// LINUX: ret i32 0
// WINDOWS: define dso_local i32 @DispatchFirst.O()
ATTR(cpu_specific(pentium))
int DispatchFirst(void) {return 1;}
-// LINUX: define i32 @DispatchFirst.B
+// LINUX: define{{.*}} i32 @DispatchFirst.B
// LINUX: ret i32 1
// WINDOWS: define dso_local i32 @DispatchFirst.B
// RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm -Oz -o - %s | FileCheck %s
-// CHECK: define void @f() local_unnamed_addr [[ATTRS:#[0-9]+]] {
+// CHECK: define{{.*}} void @f() local_unnamed_addr [[ATTRS:#[0-9]+]] {
void f() __attribute__((leaf));
void f()
// RUN: %clang_cc1 -triple=x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s
-// CHECK: @tentative_attr_first = global i32 undef
+// CHECK: @tentative_attr_first ={{.*}} global i32 undef
int tentative_attr_first __attribute__((loader_uninitialized));
int tentative_attr_first;
-// CHECK: @tentative_attr_second = global i32 undef
+// CHECK: @tentative_attr_second ={{.*}} global i32 undef
int tentative_attr_second;
int tentative_attr_second __attribute__((loader_uninitialized));
-// CHECK: @array = global [16 x float] undef
+// CHECK: @array ={{.*}} global [16 x float] undef
float array[16] __attribute__((loader_uninitialized));
typedef struct
float y;
} s;
-// CHECK: @i = global %struct.s undef
+// CHECK: @i ={{.*}} global %struct.s undef
s i __attribute__((loader_uninitialized));
// CHECK: @private_extern_ok = hidden global i32 undef
// CHECK: @llvm.used
// CHECK-SAME: @foo
-// CHECK: define msp430_intrcc void @foo() #0
+// CHECK: define{{.*}} msp430_intrcc void @foo() #0
// CHECK: attributes #0
// CHECK-SAME: noinline
// CHECK-SAME: "interrupt"="1"
// CHECK-DAG: declare void @_ZN1AC2Ev{{.*}} #[[ATTR2]]
// CHECK-DAG: declare void @_ZN1AD1Ev{{.*}} #[[ATTR3:[0-9]+]]
// CHECK-DAG: declare void @_ZN1AD2Ev{{.*}} #[[ATTR3]]
-// CHECK-DAG: define i32 @_Z1gi(i32 %i) #[[ATTR4:[0-9]+]] {
+// CHECK-DAG: define{{.*}} i32 @_Z1gi(i32 %i) #[[ATTR4:[0-9]+]] {
// CHECK-DAG: attributes #[[ATTR0]] = {{{.*}}nomerge{{.*}}}
// CHECK-DAG: attributes #[[ATTR1]] = {{{.*}}nomerge{{.*}}}
}
// LINUX: @foo.ifunc = weak_odr ifunc i32 (i32), i32 (i32)* ()* @foo.resolver
-// LINUX: define i32 @foo.sse4.2(
+// LINUX: define{{.*}} i32 @foo.sse4.2(
// LINUX: ret i32 0
-// LINUX: define i32 @foo.arch_ivybridge(
+// LINUX: define{{.*}} i32 @foo.arch_ivybridge(
// LINUX: ret i32 1
-// LINUX: define i32 @foo(
+// LINUX: define{{.*}} i32 @foo(
// LINUX: ret i32 2
// WINDOWS: define dso_local i32 @foo.sse4.2(
// WINDOWS: define dso_local i32 @foo(
// WINDOWS: ret i32 2
-// LINUX: define i32 @bar()
+// LINUX: define{{.*}} i32 @bar()
// LINUX: call void @func(i32 (i32)* @foo.ifunc)
// LINUX: store i32 (i32)* @foo.ifunc
// LINUX: store i32 (i32)* @foo.ifunc
}
// LINUX: @foo.ifunc = weak_odr ifunc i32 (i32, ...), i32 (i32, ...)* ()* @foo.resolver
-// LINUX: define i32 @foo.sse4.2(i32 %i, ...)
+// LINUX: define{{.*}} i32 @foo.sse4.2(i32 %i, ...)
// LINUX: ret i32 0
-// LINUX: define i32 @foo.arch_ivybridge(i32 %i, ...)
+// LINUX: define{{.*}} i32 @foo.arch_ivybridge(i32 %i, ...)
// LINUX: ret i32 1
-// LINUX: define i32 @foo(i32 %i, ...)
+// LINUX: define{{.*}} i32 @foo(i32 %i, ...)
// LINUX: ret i32 2
-// LINUX: define i32 @bar()
+// LINUX: define{{.*}} i32 @bar()
// LINUX: call i32 (i32, ...) @foo.ifunc(i32 1, i32 97, double
// LINUX: call i32 (i32, ...) @foo.ifunc(i32 2, double 2.2{{[0-9Ee+]+}}, i8* getelementptr inbounds
// LINUX: @fwd_decl_default.ifunc = weak_odr ifunc i32 (), i32 ()* ()* @fwd_decl_default.resolver
// LINUX: @fwd_decl_avx.ifunc = weak_odr ifunc i32 (), i32 ()* ()* @fwd_decl_avx.resolver
-// LINUX: define i32 @foo.sse4.2()
+// LINUX: define{{.*}} i32 @foo.sse4.2()
// LINUX: ret i32 0
-// LINUX: define i32 @foo.arch_ivybridge()
+// LINUX: define{{.*}} i32 @foo.arch_ivybridge()
// LINUX: ret i32 1
-// LINUX: define i32 @foo.arch_goldmont()
+// LINUX: define{{.*}} i32 @foo.arch_goldmont()
// LINUX: ret i32 3
-// LINUX: define i32 @foo.arch_goldmont-plus()
+// LINUX: define{{.*}} i32 @foo.arch_goldmont-plus()
// LINUX: ret i32 4
-// LINUX: define i32 @foo.arch_tremont()
+// LINUX: define{{.*}} i32 @foo.arch_tremont()
// LINUX: ret i32 5
-// LINUX: define i32 @foo.arch_icelake-client()
+// LINUX: define{{.*}} i32 @foo.arch_icelake-client()
// LINUX: ret i32 6
-// LINUX: define i32 @foo.arch_icelake-server()
+// LINUX: define{{.*}} i32 @foo.arch_icelake-server()
// LINUX: ret i32 7
-// LINUX: define i32 @foo.arch_cooperlake()
+// LINUX: define{{.*}} i32 @foo.arch_cooperlake()
// LINUX: ret i32 8
-// LINUX: define i32 @foo.arch_tigerlake()
+// LINUX: define{{.*}} i32 @foo.arch_tigerlake()
// LINUX: ret i32 9
-// LINUX: define i32 @foo.arch_sapphirerapids()
+// LINUX: define{{.*}} i32 @foo.arch_sapphirerapids()
// LINUX: ret i32 10
-// LINUX: define i32 @foo.arch_alderlake()
+// LINUX: define{{.*}} i32 @foo.arch_alderlake()
// LINUX: ret i32 11
-// LINUX: define i32 @foo()
+// LINUX: define{{.*}} i32 @foo()
// LINUX: ret i32 2
-// LINUX: define i32 @bar()
+// LINUX: define{{.*}} i32 @bar()
// LINUX: call i32 @foo.ifunc()
// WINDOWS: define dso_local i32 @foo.sse4.2()
// WINDOWS: call i32 @foo.sse4.2
// WINDOWS: call i32 @foo
-// LINUX: define i32 @bar2()
+// LINUX: define{{.*}} i32 @bar2()
// LINUX: call i32 @foo_inline.ifunc()
// WINDOWS: define dso_local i32 @bar2()
// WINDOWS: call i32 @foo_inline.sse4.2
// WINDOWS: call i32 @foo_inline
-// LINUX: define void @bar3()
+// LINUX: define{{.*}} void @bar3()
// LINUX: call void @foo_decls.ifunc()
// WINDOWS: define dso_local void @bar3()
// WINDOWS: call void @foo_decls.sse4.2
// WINDOWS: call void @foo_decls
-// LINUX: define void @bar4()
+// LINUX: define{{.*}} void @bar4()
// LINUX: call void @foo_multi.ifunc(i32 1, double 5.{{[0+e]*}})
// WINDOWS: define dso_local void @bar4()
// WINDOWS: call void @foo_multi(i32 %0, double %1)
// WINDOWS-NEXT: ret void
-// LINUX: define i32 @fwd_decl_default()
+// LINUX: define{{.*}} i32 @fwd_decl_default()
// LINUX: ret i32 2
-// LINUX: define i32 @fwd_decl_avx.avx()
+// LINUX: define{{.*}} i32 @fwd_decl_avx.avx()
// LINUX: ret i32 2
-// LINUX: define i32 @fwd_decl_avx()
+// LINUX: define{{.*}} i32 @fwd_decl_avx()
// LINUX: ret i32 2
// WINDOWS: define dso_local i32 @fwd_decl_default()
// WINDOWS: define dso_local i32 @fwd_decl_avx()
// WINDOWS: ret i32 2
-// LINUX: define void @bar5()
+// LINUX: define{{.*}} void @bar5()
// LINUX: call i32 @fwd_decl_default.ifunc()
// LINUX: call i32 @fwd_decl_avx.ifunc()
// WINDOWS: call i32 @fwd_decl_avx.avx
// WINDOWS: call i32 @fwd_decl_avx
-// LINUX: define i32 @changed_to_mv.avx()
-// LINUX: define i32 @changed_to_mv.fma4()
+// LINUX: define{{.*}} i32 @changed_to_mv.avx()
+// LINUX: define{{.*}} i32 @changed_to_mv.fma4()
// WINDOWS: define dso_local i32 @changed_to_mv.avx()
// WINDOWS: define dso_local i32 @changed_to_mv.fma4()
test1_g();
}
-// CHECK-LABEL: define void @test2_f()
+// CHECK-LABEL: define{{.*}} void @test2_f()
void test2_f(void) {}
static void test2_g(void) __attribute__((weakref("test2_f")));
void test2_h(void) {
test3_g();
}
-// CHECK-LABEL: define void @test4_f()
+// CHECK-LABEL: define{{.*}} void @test4_f()
void test4_f(void);
static void test4_g(void) __attribute__((weakref("test4_f")));
void test4_h(void) {
return test1_g;
}
-// CHECK: @test2_f = global i32 0, align 4
+// CHECK: @test2_f ={{.*}} global i32 0, align 4
int test2_f;
static int test2_g __attribute__((weakref("test2_f")));
int test2_h(void) {
return test3_g;
}
-// CHECK: @test4_f = global i32 0, align 4
+// CHECK: @test4_f ={{.*}} global i32 0, align 4
extern int test4_f;
static int test4_g __attribute__((weakref("test4_f")));
int test4_h(void) {
__attribute__((interrupt)) void foo7(int *a, uword b) {}
__attribute__((interrupt)) void foo8(int *a) {}
// X86_64_LINUX: @llvm.used = appending global [2 x i8*] [i8* bitcast (void (i32*, i64)* @foo7 to i8*), i8* bitcast (void (i32*)* @foo8 to i8*)], section "llvm.metadata"
-// X86_64_LINUX: define x86_intrcc void @foo7(i32* byval(i32) %{{.+}}, i64 %{{.+}})
-// X86_64_LINUX: define x86_intrcc void @foo8(i32* byval(i32) %{{.+}})
+// X86_64_LINUX: define{{.*}} x86_intrcc void @foo7(i32* byval(i32) %{{.+}}, i64 %{{.+}})
+// X86_64_LINUX: define{{.*}} x86_intrcc void @foo8(i32* byval(i32) %{{.+}})
// X86_64_LINUX: "disable-tail-calls"="true"
// X86_64_LINUX-NOT: "disable-tail-calls"="false"
// X86_LINUX: @llvm.used = appending global [2 x i8*] [i8* bitcast (void (i32*, i32)* @foo7 to i8*), i8* bitcast (void (i32*)* @foo8 to i8*)], section "llvm.metadata"
-// X86_LINUX: define x86_intrcc void @foo7(i32* byval(i32) %{{.+}}, i32 %{{.+}})
-// X86_LINUX: define x86_intrcc void @foo8(i32* byval(i32) %{{.+}})
+// X86_LINUX: define{{.*}} x86_intrcc void @foo7(i32* byval(i32) %{{.+}}, i32 %{{.+}})
+// X86_LINUX: define{{.*}} x86_intrcc void @foo8(i32* byval(i32) %{{.+}})
// X86_LINUX: "disable-tail-calls"="true"
// X86_LINUX-NOT: "disable-tail-calls"="false"
// X86_64_WIN: @llvm.used = appending global [2 x i8*] [i8* bitcast (void (i32*, i64)* @foo7 to i8*), i8* bitcast (void (i32*)* @foo8 to i8*)], section "llvm.metadata"
// RUN: %clang_cc1 -emit-llvm -fcf-protection=branch -triple i386-linux-gnu -o %t %s
// RUN: FileCheck --input-file=%t %s
-// CHECK: @t5 = weak global i32 2
+// CHECK: @t5 = weak{{.*}} global i32 2
int t5 __attribute__((weak)) = 2;
-// CHECK: @t13 = global %struct.s0 zeroinitializer, section "SECT"
+// CHECK: @t13 ={{.*}} global %struct.s0 zeroinitializer, section "SECT"
struct s0 { int x; };
struct s0 t13 __attribute__((section("SECT"))) = { 0 };
static int x __attribute__((section("SECT"))) = 0;
}
-// CHECK: @t18 = global i32 1, align 4
+// CHECK: @t18 ={{.*}} global i32 1, align 4
extern int t18 __attribute__((weak_import));
int t18 = 1;
// CHECK: @t6 = protected global i32 0
int t6 __attribute__((visibility("protected")));
-// CHECK: @t12 = global i32 0, section "SECT"
+// CHECK: @t12 ={{.*}} global i32 0, section "SECT"
int t12 __attribute__((section("SECT")));
-// CHECK: @t9 = weak alias void (...), bitcast (void ()* @__t8 to void (...)*)
+// CHECK: @t9 = weak{{.*}} alias void (...), bitcast (void ()* @__t8 to void (...)*)
void __t8() {}
void t9() __attribute__((weak, alias("__t8")));
return t15() + t16;
}
-// CHECK: define void @t1() [[NR:#[0-9]+]] {
+// CHECK: define{{.*}} void @t1() [[NR:#[0-9]+]] {
void t1() __attribute__((noreturn));
void t1() { while (1) {} }
-// CHECK: define void @t2() [[NUW:#[0-9]+]] {
+// CHECK: define{{.*}} void @t2() [[NUW:#[0-9]+]] {
void t2() __attribute__((nothrow));
void t2() {}
-// CHECK: define weak void @t3() [[NUW]] {
+// CHECK: define weak{{.*}} void @t3() [[NUW]] {
void t3() __attribute__((weak));
void t3() {}
void t4() __attribute__((visibility("hidden")));
void t4() {}
-// CHECK: define void @t7() [[NR]] {
+// CHECK: define{{.*}} void @t7() [[NR]] {
void t7() __attribute__((noreturn, nothrow));
void t7() { while (1) {} }
-// CHECK: define void @t72() [[COLDDEF:#[0-9]+]] {
+// CHECK: define{{.*}} void @t72() [[COLDDEF:#[0-9]+]] {
void t71(void) __attribute__((cold));
void t72() __attribute__((cold));
void t72() { t71(); }
// CHECK: call void @t71() [[COLDSITE:#[0-9]+]]
// CHECK: declare void @t71() [[COLDDECL:#[0-9]+]]
-// CHECK: define void @t82() [[HOTDEF:#[0-9]+]] {
+// CHECK: define{{.*}} void @t82() [[HOTDEF:#[0-9]+]] {
void t81(void) __attribute__((hot));
void t82() __attribute__((hot));
void t82() { t81(); }
// CHECK: call void @t81() [[HOTSITE:#[0-9]+]]
// CHECK: declare void @t81() [[HOTDECL:#[0-9]+]]
-// CHECK: define void @t10() [[NUW]] section "xSECT" {
+// CHECK: define{{.*}} void @t10() [[NUW]] section "xSECT" {
void t10(void) __attribute__((section("xSECT")));
void t10(void) {}
-// CHECK: define void @t11() [[NUW]] section "xSECT" {
+// CHECK: define{{.*}} void @t11() [[NUW]] section "xSECT" {
void __attribute__((section("xSECT"))) t11(void) {}
-// CHECK: define i32 @t19() [[NUW]] {
+// CHECK: define{{.*}} i32 @t19() [[NUW]] {
extern int t19(void) __attribute__((weak_import));
int t19(void) {
// RUN: %clang_cc1 -emit-llvm -fcf-protection=branch -triple i386-linux-gnu -o %t %s
return 10;
}
-// CHECK:define void @t20() [[NUW]] {
+// CHECK:define{{.*}} void @t20() [[NUW]] {
// CHECK: call void @abort()
// CHECK-NEXT: unreachable
void t20(void) {
void __attribute__((section(".foo"))) t22(void);
void __attribute__((section(".bar"))) t22(void) {}
-// CHECK: define void @t22() [[NUW]] section ".bar"
+// CHECK: define{{.*}} void @t22() [[NUW]] section ".bar"
-// CHECK: define void @t23() [[NOCF_CHECK_FUNC:#[0-9]+]]
+// CHECK: define{{.*}} void @t23() [[NOCF_CHECK_FUNC:#[0-9]+]]
void __attribute__((nocf_check)) t23(void) {}
// CHECK: call void %{{[a-z0-9]+}}() [[NOCF_CHECK_CALL:#[0-9]+]]
return __builtin_bitreverse8(data);
}
-// CHECK: define zeroext i8 @bitrev8
+// CHECK: define{{.*}} zeroext i8 @bitrev8
// CHECK: i8 @llvm.bitreverse.i8(i8
unsigned int bitrev16(unsigned int data) {
return __builtin_bitreverse16(data);
}
-// CHECK: define i16 @bitrev16
+// CHECK: define{{.*}} i16 @bitrev16
// CHECK: i16 @llvm.bitreverse.i16(i16
unsigned long bitrev32(unsigned long data) {
return __builtin_bitreverse32(data);
}
-// CHECK: define i32 @bitrev32
+// CHECK: define{{.*}} i32 @bitrev32
// CHECK: i32 @llvm.bitreverse.i32(i32
unsigned long long bitrev64(unsigned long long data) {
return __builtin_bitreverse64(data);
}
-// CHECK: define i64 @bitrev64
+// CHECK: define{{.*}} i64 @bitrev64
// CHECK: i64 @llvm.bitreverse.i64(i64
unsigned char rotleft8(unsigned char x, unsigned char y) {
return __builtin_rotateleft8(x, y);
}
-// CHECK: define zeroext i8 @rotleft8
+// CHECK: define{{.*}} zeroext i8 @rotleft8
// CHECK: i8 @llvm.fshl.i8(i8
unsigned int rotleft16(unsigned int x, unsigned int y) {
return __builtin_rotateleft16(x, y);
}
-// CHECK: define i16 @rotleft16
+// CHECK: define{{.*}} i16 @rotleft16
// CHECK: i16 @llvm.fshl.i16(i16
unsigned long rotleft32(unsigned long x, unsigned long y) {
return __builtin_rotateleft32(x, y);
}
-// CHECK: define i32 @rotleft32
+// CHECK: define{{.*}} i32 @rotleft32
// CHECK: i32 @llvm.fshl.i32(i32
unsigned long long rotleft64(unsigned long long x, unsigned long long y) {
return __builtin_rotateleft64(x, y);
}
-// CHECK: define i64 @rotleft64
+// CHECK: define{{.*}} i64 @rotleft64
// CHECK: i64 @llvm.fshl.i64(i64
unsigned char rotright8(unsigned char x, unsigned char y) {
return __builtin_rotateright8(x, y);
}
-// CHECK: define zeroext i8 @rotright8
+// CHECK: define{{.*}} zeroext i8 @rotright8
// CHECK: i8 @llvm.fshr.i8(i8
unsigned int rotright16(unsigned int x, unsigned int y) {
return __builtin_rotateright16(x, y);
}
-// CHECK: define i16 @rotright16
+// CHECK: define{{.*}} i16 @rotright16
// CHECK: i16 @llvm.fshr.i16(i16
unsigned long rotright32(unsigned long x, unsigned long y) {
return __builtin_rotateright32(x, y);
}
-// CHECK: define i32 @rotright32
+// CHECK: define{{.*}} i32 @rotright32
// CHECK: i32 @llvm.fshr.i32(i32
unsigned long long rotright64(unsigned long long x, unsigned long long y) {
return __builtin_rotateright64(x, y);
}
-// CHECK: define i64 @rotright64
+// CHECK: define{{.*}} i64 @rotright64
// CHECK: i64 @llvm.fshr.i64(i64
unsigned int byteswap16(unsigned int x) {
return __builtin_bswap16(x);
}
-// CHECK: define i16 @byteswap16
+// CHECK: define{{.*}} i16 @byteswap16
// CHECK: i16 @llvm.bswap.i16(i16
unsigned long byteswap32(unsigned long x) {
return __builtin_bswap32(x);
}
-// CHECK: define i32 @byteswap32
+// CHECK: define{{.*}} i32 @byteswap32
// CHECK: i32 @llvm.bswap.i32(i32
unsigned long long byteswap64(unsigned long long x) {
return __builtin_bswap64(x);
}
-// CHECK: define i64 @byteswap64
+// CHECK: define{{.*}} i64 @byteswap64
// CHECK: i64 @llvm.bswap.i64(i64
// RUN: %clang_cc1 -triple avr-unknown-unknown -emit-llvm %s -o - | FileCheck %s
-// CHECK: define void @foo(){{.*}}#0
+// CHECK: define{{.*}} void @foo(){{.*}}#0
__attribute__((interrupt)) void foo(void) { }
// CHECK: attributes #0 = {{{.*interrupt.*}}}
// RUN: %clang_cc1 -triple avr-unknown-unknown -emit-llvm %s -o - | FileCheck %s
-// CHECK: define void @foo(){{.*}}#0
+// CHECK: define{{.*}} void @foo(){{.*}}#0
__attribute__((signal)) void foo(void) { }
// CHECK: attributes #0 = {{{.*signal.*}}}
return (a0->f0 += 1);
}
-// CHECK-OPT-LABEL: define i64 @test_0()
+// CHECK-OPT-LABEL: define{{.*}} i64 @test_0()
// CHECK-OPT: ret i64 1
// CHECK-OPT: }
unsigned long long test_0() {
return (a0->f1 += 1234);
}
-// CHECK-OPT-LABEL: define i64 @test_1()
+// CHECK-OPT-LABEL: define{{.*}} i64 @test_1()
// CHECK-OPT: ret i64 210
// CHECK-OPT: }
unsigned long long test_1() {
return (a0->f0 += 1234);
}
-// CHECK-OPT-LABEL: define i64 @test_2()
+// CHECK-OPT-LABEL: define{{.*}} i64 @test_2()
// CHECK-OPT: ret i64 2
// CHECK-OPT: }
unsigned long long test_2() {
return (a0->f0 += 1234);
}
-// CHECK-OPT-LABEL: define i64 @test_3()
+// CHECK-OPT-LABEL: define{{.*}} i64 @test_3()
// CHECK-OPT: ret i64 -559039940
// CHECK-OPT: }
unsigned long long test_3() {
return (a0->f0 += 1234) ^ (a0->f1 += 5678);
}
-// CHECK-OPT-LABEL: define i64 @test_4()
+// CHECK-OPT-LABEL: define{{.*}} i64 @test_4()
// CHECK-OPT: ret i64 4860
// CHECK-OPT: }
unsigned long long test_4() {
return (a0->f0 += 0xF) ^ (a0->f1 += 0xF) ^ (a0->f2 += 0xF);
}
-// CHECK-OPT-LABEL: define i64 @test_5()
+// CHECK-OPT-LABEL: define{{.*}} i64 @test_5()
// CHECK-OPT: ret i64 2
// CHECK-OPT: }
unsigned long long test_5() {
return (a0->f0 += 0xF);
}
-// CHECK-OPT-LABEL: define zeroext i1 @test_6()
+// CHECK-OPT-LABEL: define{{.*}} zeroext i1 @test_6()
// CHECK-OPT: ret i1 true
// CHECK-OPT: }
_Bool test_6() {
return (a0->f0 += 0xFD) ^ (a0->f2 += 0xFD) ^ (a0->f3 += 0xFD);
}
-// CHECK-OPT-LABEL: define i32 @test_8()
+// CHECK-OPT-LABEL: define{{.*}} i32 @test_8()
// CHECK-OPT: ret i32 -3
// CHECK-OPT: }
unsigned test_8() {
// The bool can fill in between the header and the long long.
// Add the appropriate amount of padding between them.
void f4_helper(long long (^)(void));
-// CHECK-LABEL: define void @f4()
+// CHECK-LABEL: define{{.*}} void @f4()
void f4(void) {
_Bool b = 0;
long long ll = 0;
char buffer[32] __attribute((aligned));
};
void f5_helper(void (^)(struct F5 *));
-// CHECK-LABEL: define void @f5()
+// CHECK-LABEL: define{{.*}} void @f5()
void f5(void) {
struct F5 value;
// CHECK: alloca <{ i8*, i32, i32, i8*, {{%.*}}*, [12 x i8], [[F5:%.*]] }>, align 16
__block int i;
(^ { i = x; })();
}
-// CHECK-LABEL: define void @testConstCaptureInCopyAndDestroyHelpers(
+// CHECK-LABEL: define{{.*}} void @testConstCaptureInCopyAndDestroyHelpers(
// CHECK: %[[BLOCK_DESCRIPTOR:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8* }>, <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8* }>* %{{.*}}, i32 0, i32 4
// CHECK: store %[[STRUCT_BLOCK_DESCRIPTOR]]* bitcast ({ i32, i32, i8*, i8*, i8*, i8* }* @[[BLOCK_DESCRIPTOR_TMP21]] to %[[STRUCT_BLOCK_DESCRIPTOR]]*), %[[STRUCT_BLOCK_DESCRIPTOR]]** %[[BLOCK_DESCRIPTOR]], align 4
// All of these should uses the memory representation of _Bool
// CHECK-LABEL: %struct.teststruct1 = type { i8, i8 }
-// CHECK-LABEL: @test1 = global %struct.teststruct1
+// CHECK-LABEL: @test1 ={{.*}} global %struct.teststruct1
struct teststruct1 {_Bool a, b;} test1;
-// CHECK-LABEL: @test2 = global i8* null
+// CHECK-LABEL: @test2 ={{.*}} global i8* null
_Bool* test2;
-// CHECK-LABEL: @test3 = global [10 x i8]
+// CHECK-LABEL: @test3 ={{.*}} global [10 x i8]
_Bool test3[10];
-// CHECK-LABEL: @test4 = global [0 x i8]* null
+// CHECK-LABEL: @test4 ={{.*}} global [0 x i8]* null
_Bool (*test4)[];
-// CHECK-LABEL: define void @f(i32 %x)
+// CHECK-LABEL: define{{.*}} void @f(i32 %x)
void f(int x) {
// CHECK: alloca i8, align 1
_Bool test5;
// RUN: %clang_cc1 -triple x86_64-pc-linux -emit-llvm < %s | FileCheck %s
// Check that the type of this global isn't i1
-// CHECK: @test = global i8 1
+// CHECK: @test ={{.*}} global i8 1
_Bool test = &test;
// RUN: %clang_cc1 -triple powerpc-unknown-linux-gnu -emit-llvm -o - %s -O2 -disable-llvm-passes | FileCheck %s
int boolsize = sizeof(_Bool);
-// CHECK: boolsize = global i32 1, align 4
+// CHECK: boolsize ={{.*}} global i32 1, align 4
void f(_Bool *x, _Bool *y) {
*x = *y;
}
-// CHECK-LABEL: define void @f(
+// CHECK-LABEL: define{{.*}} void @f(
// CHECK: [[FROMMEM:%.*]] = load i8, i8* %
// CHECK: [[BOOLVAL:%.*]] = trunc i8 [[FROMMEM]] to i1
// CHECK: [[TOMEM:%.*]] = zext i1 [[BOOLVAL]] to i8
/// Check that constant initializers work and are correct
_Bool aligned_true = __builtin_is_aligned(1024, 512);
-// CHECK: @aligned_true = global i8 1, align 1
+// CHECK: @aligned_true ={{.*}} global i8 1, align 1
_Bool aligned_false = __builtin_is_aligned(123, 512);
-// CHECK: @aligned_false = global i8 0, align 1
+// CHECK: @aligned_false ={{.*}} global i8 0, align 1
int down_1 = __builtin_align_down(1023, 32);
-// CHECK: @down_1 = global i32 992, align 4
+// CHECK: @down_1 ={{.*}} global i32 992, align 4
int down_2 = __builtin_align_down(256, 32);
-// CHECK: @down_2 = global i32 256, align 4
+// CHECK: @down_2 ={{.*}} global i32 256, align 4
int up_1 = __builtin_align_up(1023, 32);
-// CHECK: @up_1 = global i32 1024, align 4
+// CHECK: @up_1 ={{.*}} global i32 1024, align 4
int up_2 = __builtin_align_up(256, 32);
-// CHECK: @up_2 = global i32 256, align 4
+// CHECK: @up_2 ={{.*}} global i32 256, align 4
/// Capture the IR type here to use in the remaining FileCheck captures:
// CHECK-VOID_PTR-LABEL: define {{[^@]+}}@get_type() #0
// RUN: %clang_cc1 -triple x86_64-linux -w -S -o - -emit-llvm -DT=__float128 %s | FileCheck %s --check-prefixes=CHECK,CHECK-FP128
// FIXME: If we start to support _Complex __fp16 or _Complex _Float16, add tests for them too.
-// CHECK-FLOAT: @global = global { [[T:float]], [[T]] } { [[T]] 1.0{{.*}}, [[T]] 2.0{{.*}} }
-// CHECK-DOUBLE: @global = global { [[T:double]], [[T]] } { [[T]] 1.0{{.*}}, [[T]] 2.0{{.*}} }
-// CHECK-FP80: @global = global { [[T:x86_fp80]], [[T]] } { [[T]] 0xK3FFF8000000000000000, [[T]] 0xK40008000000000000000 }
-// CHECK-FP128: @global = global { [[T:fp128]], [[T]] } { [[T]] 0xL00000000000000003FFF000000000000, [[T]] 0xL00000000000000004000000000000000 }
+// CHECK-FLOAT: @global ={{.*}} global { [[T:float]], [[T]] } { [[T]] 1.0{{.*}}, [[T]] 2.0{{.*}} }
+// CHECK-DOUBLE: @global ={{.*}} global { [[T:double]], [[T]] } { [[T]] 1.0{{.*}}, [[T]] 2.0{{.*}} }
+// CHECK-FP80: @global ={{.*}} global { [[T:x86_fp80]], [[T]] } { [[T]] 0xK3FFF8000000000000000, [[T]] 0xK40008000000000000000 }
+// CHECK-FP128: @global ={{.*}} global { [[T:fp128]], [[T]] } { [[T]] 0xL00000000000000003FFF000000000000, [[T]] 0xL00000000000000004000000000000000 }
_Complex T global = __builtin_complex(1.0, 2.0);
// CHECK-LABEL: @test
}
int test4() {
- // CHECK: define i32 @test4
+ // CHECK: define{{.*}} i32 @test4
// CHECK: ret i32 0
return __builtin_constant_p(test4_i(test3_c));
}
}
int test15_f();
-// CHECK-LABEL: define void @test15
+// CHECK-LABEL: define{{.*}} void @test15
// CHECK-NOT: call {{.*}}test15_f
void test15() {
int a, b;
// If optimizations are on, generate the correct expect and preserve other necessary operations.
int expect_taken(int x) {
-// ALL-LABEL: define i32 @expect_taken
+// ALL-LABEL: define{{.*}} i32 @expect_taken
// O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 1)
// O0-NOT: @llvm.expect
int expect_not_taken(int x) {
-// ALL-LABEL: define i32 @expect_not_taken
+// ALL-LABEL: define{{.*}} i32 @expect_not_taken
// O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 0)
// O0-NOT: @llvm.expect
void foo();
void expect_value_side_effects() {
-// ALL-LABEL: define void @expect_value_side_effects()
+// ALL-LABEL: define{{.*}} void @expect_value_side_effects()
// ALL: [[CALL:%.*]] = call i32 @y
// O1: [[SEXT:%.*]] = sext i32 [[CALL]] to i64
// O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 [[SEXT]])
long bar();
int main() {
-// ALL-LABEL: define i32 @main()
+// ALL-LABEL: define{{.*}} i32 @main()
// ALL: call void @isigprocmask()
// ALL: [[CALL:%.*]] = call i64 (...) @bar()
// O1: call i64 @llvm.expect.i64(i64 0, i64 [[CALL]])
int switch_cond(int x) {
-// ALL-LABEL: define i32 @switch_cond
+// ALL-LABEL: define{{.*}} i32 @switch_cond
// O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 5)
// O0-NOT: @llvm.expect
}
int variable_expected(int stuff) {
-// ALL-LABEL: define i32 @variable_expected(
+// ALL-LABEL: define{{.*}} i32 @variable_expected(
// O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 {{%.*}})
// O0-NOT: @llvm.expect
};
extern "C" int f() {
-// CHECK: define i32 @f()
+// CHECK: define{{.*}} i32 @f()
// CHECK-NOT: call void @_ZN1AD1Ev
// CHECK: ret i32 0
return __noop(A());
extern "C" int g() {
return __noop;
-// CHECK: define i32 @g()
+// CHECK: define{{.*}} i32 @g()
// CHECK: ret i32 0
}
extern "C" int h() {
return (__noop);
-// CHECK: define i32 @h()
+// CHECK: define{{.*}} i32 @h()
// CHECK: ret i32 0
}
extern "C" int i() {
return __noop + 1;
-// CHECK: define i32 @i()
+// CHECK: define{{.*}} i32 @i()
// CHECK: ret i32 1
}
void foo();
void branch(int x) {
-// CHECK-LABEL: define void @branch(
+// CHECK-LABEL: define{{.*}} void @branch(
// CHECK-NOT: builtin_unpredictable
// CHECK: !unpredictable [[METADATA:.+]]
}
void ldc(const void *i) {
- // CHECK: define void @ldc(i8* %i)
+ // CHECK: define{{.*}} void @ldc(i8* %i)
// CHECK: call void @llvm.arm.ldc(i32 1, i32 2, i8* %i)
// CHECK-NEXT: ret void
__builtin_arm_ldc(1, 2, i);
}
void ldcl(const void *i) {
- // CHECK: define void @ldcl(i8* %i)
+ // CHECK: define{{.*}} void @ldcl(i8* %i)
// CHECK: call void @llvm.arm.ldcl(i32 1, i32 2, i8* %i)
// CHECK-NEXT: ret void
__builtin_arm_ldcl(1, 2, i);
}
void ldc2(const void *i) {
- // CHECK: define void @ldc2(i8* %i)
+ // CHECK: define{{.*}} void @ldc2(i8* %i)
// CHECK: call void @llvm.arm.ldc2(i32 1, i32 2, i8* %i)
// CHECK-NEXT: ret void
__builtin_arm_ldc2(1, 2, i);
}
void ldc2l(const void *i) {
- // CHECK: define void @ldc2l(i8* %i)
+ // CHECK: define{{.*}} void @ldc2l(i8* %i)
// CHECK: call void @llvm.arm.ldc2l(i32 1, i32 2, i8* %i)
// CHECK-NEXT: ret void
__builtin_arm_ldc2l(1, 2, i);
}
void stc(void *i) {
- // CHECK: define void @stc(i8* %i)
+ // CHECK: define{{.*}} void @stc(i8* %i)
// CHECK: call void @llvm.arm.stc(i32 1, i32 2, i8* %i)
// CHECK-NEXT: ret void
__builtin_arm_stc(1, 2, i);
}
void stcl(void *i) {
- // CHECK: define void @stcl(i8* %i)
+ // CHECK: define{{.*}} void @stcl(i8* %i)
// CHECK: call void @llvm.arm.stcl(i32 1, i32 2, i8* %i)
// CHECK-NEXT: ret void
__builtin_arm_stcl(1, 2, i);
}
void stc2(void *i) {
- // CHECK: define void @stc2(i8* %i)
+ // CHECK: define{{.*}} void @stc2(i8* %i)
// CHECK: call void @llvm.arm.stc2(i32 1, i32 2, i8* %i)
// CHECK-NEXT: ret void
__builtin_arm_stc2(1, 2, i);
}
void stc2l(void *i) {
- // CHECK: define void @stc2l(i8* %i)
+ // CHECK: define{{.*}} void @stc2l(i8* %i)
// CHECK: call void @llvm.arm.stc2l(i32 1, i32 2, i8* %i)
// CHECK-NEXT: ret void
__builtin_arm_stc2l(1, 2, i);
}
void cdp() {
- // CHECK: define void @cdp()
+ // CHECK: define{{.*}} void @cdp()
// CHECK: call void @llvm.arm.cdp(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6)
// CHECK-NEXT: ret void
__builtin_arm_cdp(1, 2, 3, 4, 5, 6);
}
void cdp2() {
- // CHECK: define void @cdp2()
+ // CHECK: define{{.*}} void @cdp2()
// CHECK: call void @llvm.arm.cdp2(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6)
// CHECK-NEXT: ret void
__builtin_arm_cdp2(1, 2, 3, 4, 5, 6);
}
unsigned mrc() {
- // CHECK: define i32 @mrc()
+ // CHECK: define{{.*}} i32 @mrc()
// CHECK: [[R:%.*]] = call i32 @llvm.arm.mrc(i32 15, i32 0, i32 13, i32 0, i32 3)
// CHECK-NEXT: ret i32 [[R]]
return __builtin_arm_mrc(15, 0, 13, 0, 3);
}
unsigned mrc2() {
- // CHECK: define i32 @mrc2()
+ // CHECK: define{{.*}} i32 @mrc2()
// CHECK: [[R:%.*]] = call i32 @llvm.arm.mrc2(i32 15, i32 0, i32 13, i32 0, i32 3)
// CHECK-NEXT: ret i32 [[R]]
return __builtin_arm_mrc2(15, 0, 13, 0, 3);
}
void mcr(unsigned a) {
- // CHECK: define void @mcr(i32 [[A:%.*]])
+ // CHECK: define{{.*}} void @mcr(i32 [[A:%.*]])
// CHECK: call void @llvm.arm.mcr(i32 15, i32 0, i32 [[A]], i32 13, i32 0, i32 3)
__builtin_arm_mcr(15, 0, a, 13, 0, 3);
}
void mcr2(unsigned a) {
- // CHECK: define void @mcr2(i32 [[A:%.*]])
+ // CHECK: define{{.*}} void @mcr2(i32 [[A:%.*]])
// CHECK: call void @llvm.arm.mcr2(i32 15, i32 0, i32 [[A]], i32 13, i32 0, i32 3)
__builtin_arm_mcr2(15, 0, a, 13, 0, 3);
}
void mcrr(uint64_t a) {
- // CHECK: define void @mcrr(i64 %{{.*}})
+ // CHECK: define{{.*}} void @mcrr(i64 %{{.*}})
// CHECK: call void @llvm.arm.mcrr(i32 15, i32 0, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0)
__builtin_arm_mcrr(15, 0, a, 0);
}
void mcrr2(uint64_t a) {
- // CHECK: define void @mcrr2(i64 %{{.*}})
+ // CHECK: define{{.*}} void @mcrr2(i64 %{{.*}})
// CHECK: call void @llvm.arm.mcrr2(i32 15, i32 0, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0)
__builtin_arm_mcrr2(15, 0, a, 0);
}
uint64_t mrrc() {
- // CHECK: define i64 @mrrc()
+ // CHECK: define{{.*}} i64 @mrrc()
// CHECK: call { i32, i32 } @llvm.arm.mrrc(i32 15, i32 0, i32 0)
return __builtin_arm_mrrc(15, 0, 0);
}
uint64_t mrrc2() {
- // CHECK: define i64 @mrrc2()
+ // CHECK: define{{.*}} i64 @mrrc2()
// CHECK: call { i32, i32 } @llvm.arm.mrrc2(i32 15, i32 0, i32 0)
return __builtin_arm_mrrc2(15, 0, 0);
}
// REQUIRES: x86-registered-target
// RUN: %clang_cc1 -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s
-// CHECK-LABEL: define void @test_memcpy_inline_0(i8* %dst, i8* %src)
+// CHECK-LABEL: define{{.*}} void @test_memcpy_inline_0(i8* %dst, i8* %src)
void test_memcpy_inline_0(void *dst, const void *src) {
// CHECK: call void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 0, i1 false)
__builtin_memcpy_inline(dst, src, 0);
}
-// CHECK-LABEL: define void @test_memcpy_inline_1(i8* %dst, i8* %src)
+// CHECK-LABEL: define{{.*}} void @test_memcpy_inline_1(i8* %dst, i8* %src)
void test_memcpy_inline_1(void *dst, const void *src) {
// CHECK: call void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 1, i1 false)
__builtin_memcpy_inline(dst, src, 1);
}
-// CHECK-LABEL: define void @test_memcpy_inline_4(i8* %dst, i8* %src)
+// CHECK-LABEL: define{{.*}} void @test_memcpy_inline_4(i8* %dst, i8* %src)
void test_memcpy_inline_4(void *dst, const void *src) {
// CHECK: call void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 4, i1 false)
__builtin_memcpy_inline(dst, src, 4);
}
-// CHECK-LABEL: define void @test_memcpy_inline_aligned_buffers(i64* %dst, i64* %src)
+// CHECK-LABEL: define{{.*}} void @test_memcpy_inline_aligned_buffers(i64* %dst, i64* %src)
void test_memcpy_inline_aligned_buffers(unsigned long long *dst, const unsigned long long *src) {
// CHECK: call void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* align 8 %2, i8* align 8 %3, i64 4, i1 false)
__builtin_memcpy_inline(dst, src, 4);
int res_ui;
int res_f;
-// CHECK-LABEL: define void @test1
+// CHECK-LABEL: define{{.*}} void @test1
void test1() {
/* vec_abs */
}
-// CHECK-LABEL: define void @test2
+// CHECK-LABEL: define{{.*}} void @test2
void test2() {
/* vec_avg */
res_vsc = vec_avg(vsc, vsc);
// CHECK-LE: @llvm.ppc.altivec.vcmpgefp
}
-// CHECK-LABEL: define void @test5
+// CHECK-LABEL: define{{.*}} void @test5
void test5() {
/* vec_cmpgt */
// CHECK-LE: @llvm.ppc.altivec.vcmpgefp
}
-// CHECK-LABEL: define void @test6
+// CHECK-LABEL: define{{.*}} void @test6
void test6() {
/* vec_cmplt */
res_vbc = vec_cmplt(vsc, vsc);
}
/* ------------------------------ Relational Operators ------------------------------ */
-// CHECK-LABEL: define void @test7
+// CHECK-LABEL: define{{.*}} void @test7
void test7() {
vector signed char vsc1 = (vector signed char)(-1);
vector signed char vsc2 = (vector signed char)(-2);
/* ------------------------------ optional ---------------------------------- */
void test8() {
-// CHECK-LABEL: define void @test8
-// CHECK-LE-LABEL: define void @test8
+// CHECK-LABEL: define{{.*}} void @test8
+// CHECK-LE-LABEL: define{{.*}} void @test8
res_vbc = vec_reve(vbc);
// CHECK: shufflevector <16 x i8> %{{[0-9]+}}, <16 x i8> %{{[0-9]+}}, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
// CHECK-LE: shufflevector <16 x i8> %{{[0-9]+}}, <16 x i8> %{{[0-9]+}}, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
/* ------------------------------ vec_xl ------------------------------------ */
void test9() {
- // CHECK-LABEL: define void @test9
- // CHECK-LE-LABEL: define void @test9
+ // CHECK-LABEL: define{{.*}} void @test9
+ // CHECK-LE-LABEL: define{{.*}} void @test9
res_vsc = vec_xl(param_sll, param_sc_ld);
// CHECK: load <16 x i8>, <16 x i8>* %{{[0-9]+}}, align 1
// CHECK-LE: load <16 x i8>, <16 x i8>* %{{[0-9]+}}, align 1
/* ------------------------------ vec_xst ----------------------------------- */
void test10() {
- // CHECK-LABEL: define void @test10
- // CHECK-LE-LABEL: define void @test10
+ // CHECK-LABEL: define{{.*}} void @test10
+ // CHECK-LE-LABEL: define{{.*}} void @test10
vec_xst(vsc, param_sll, ¶m_sc);
// CHECK: store <16 x i8> %{{[0-9]+}}, <16 x i8>* %{{[0-9]+}}, align 1
// CHECK-LE: store <16 x i8> %{{[0-9]+}}, <16 x i8>* %{{[0-9]+}}, align 1
/* ----------------------------- vec_xl_be ---------------------------------- */
void test11() {
- // CHECK-LABEL: define void @test11
- // CHECK-LE-LABEL: define void @test11
+ // CHECK-LABEL: define{{.*}} void @test11
+ // CHECK-LE-LABEL: define{{.*}} void @test11
res_vsc = vec_xl_be(param_sll, param_sc_ld);
// CHECK: load <16 x i8>, <16 x i8>* %{{[0-9]+}}, align 1
// CHECK-LE: call <2 x double> @llvm.ppc.vsx.lxvd2x.be(i8* %{{[0-9]+}})
/* ----------------------------- vec_xst_be --------------------------------- */
void test12() {
- // CHECK-LABEL: define void @test12
- // CHECK-LE-LABEL: define void @test12
+ // CHECK-LABEL: define{{.*}} void @test12
+ // CHECK-LE-LABEL: define{{.*}} void @test12
vec_xst_be(vsc, param_sll, ¶m_sc);
// CHECK: store <16 x i8> %{{[0-9]+}}, <16 x i8>* %{{[0-9]+}}, align 1
// CHECK-LE: shufflevector <16 x i8> %{{[0-9]+}}, <16 x i8> %{{[0-9]+}}, <16 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8>
#define D_INIT2 { 0x7172737475767778, \
0x797A7B7C7D7E7F70 };
-// CHECK-LABEL: define <16 x i8> @test_vpmsumb
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vpmsumb
vector unsigned char test_vpmsumb(void)
{
vector unsigned char a = B_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vpmsumb
}
-// CHECK-LABEL: define <8 x i16> @test_vpmsumh
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vpmsumh
vector unsigned short test_vpmsumh(void)
{
vector unsigned short a = H_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vpmsumh
}
-// CHECK-LABEL: define <4 x i32> @test_vpmsumw
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vpmsumw
vector unsigned int test_vpmsumw(void)
{
vector unsigned int a = W_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vpmsumw
}
-// CHECK-LABEL: define <2 x i64> @test_vpmsumd
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vpmsumd
vector unsigned long long test_vpmsumd(void)
{
vector unsigned long long a = D_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vpmsumd
}
-// CHECK-LABEL: define <2 x i64> @test_vsbox
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vsbox
vector unsigned long long test_vsbox(void)
{
vector unsigned long long a = D_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vsbox
}
-// CHECK-LABEL: define <16 x i8> @test_vpermxorb
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vpermxorb
vector unsigned char test_vpermxorb(void)
{
vector unsigned char a = B_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vpermxor
}
-// CHECK-LABEL: define <8 x i16> @test_vpermxorh
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vpermxorh
vector unsigned short test_vpermxorh(void)
{
vector unsigned short a = H_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vpermxor
}
-// CHECK-LABEL: define <4 x i32> @test_vpermxorw
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vpermxorw
vector unsigned int test_vpermxorw(void)
{
vector unsigned int a = W_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vpermxor
}
-// CHECK-LABEL: define <2 x i64> @test_vpermxord
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vpermxord
vector unsigned long long test_vpermxord(void)
{
vector unsigned long long a = D_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vpermxor
}
-// CHECK-LABEL: define <2 x i64> @test_vcipher
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vcipher
vector unsigned long long test_vcipher(void)
{
vector unsigned long long a = D_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vcipher
}
-// CHECK-LABEL: define <2 x i64> @test_vcipherlast
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vcipherlast
vector unsigned long long test_vcipherlast(void)
{
vector unsigned long long a = D_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vncipher
}
-// CHECK-LABEL: define <2 x i64> @test_vncipherlast
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vncipherlast
vector unsigned long long test_vncipherlast(void)
{
vector unsigned long long a = D_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vncipherlast
}
-// CHECK-LABEL: define <4 x i32> @test_vshasigmaw
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vshasigmaw
vector unsigned int test_vshasigmaw(void)
{
vector unsigned int a = W_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vshasigmaw
}
-// CHECK-LABEL: define <2 x i64> @test_vshasigmad
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vshasigmad
vector unsigned long long test_vshasigmad(void)
{
vector unsigned long long a = D_INIT2
// Test cases for the builtins the way they are exposed to
// users through altivec.h
-// CHECK-LABEL: define <16 x i8> @test_vpmsumb_e
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vpmsumb_e
vector unsigned char test_vpmsumb_e(void)
{
vector unsigned char a = B_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vpmsumb
}
-// CHECK-LABEL: define <8 x i16> @test_vpmsumh_e
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vpmsumh_e
vector unsigned short test_vpmsumh_e(void)
{
vector unsigned short a = H_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vpmsumh
}
-// CHECK-LABEL: define <4 x i32> @test_vpmsumw_e
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vpmsumw_e
vector unsigned int test_vpmsumw_e(void)
{
vector unsigned int a = W_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vpmsumw
}
-// CHECK-LABEL: define <2 x i64> @test_vpmsumd_e
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vpmsumd_e
vector unsigned long long test_vpmsumd_e(void)
{
vector unsigned long long a = D_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vpmsumd
}
-// CHECK-LABEL: define <2 x i64> @test_vsbox_e
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vsbox_e
vector unsigned long long test_vsbox_e(void)
{
vector unsigned long long a = D_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vsbox
}
-// CHECK-LABEL: define <16 x i8> @test_vpermxorb_e
+// CHECK-LABEL: define{{.*}} <16 x i8> @test_vpermxorb_e
vector unsigned char test_vpermxorb_e(void)
{
vector unsigned char a = B_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vpermxor
}
-// CHECK-LABEL: define <8 x i16> @test_vpermxorh_e
+// CHECK-LABEL: define{{.*}} <8 x i16> @test_vpermxorh_e
vector unsigned short test_vpermxorh_e(void)
{
vector unsigned short a = H_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vpermxor
}
-// CHECK-LABEL: define <4 x i32> @test_vpermxorw_e
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vpermxorw_e
vector unsigned int test_vpermxorw_e(void)
{
vector unsigned int a = W_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vpermxor
}
-// CHECK-LABEL: define <2 x i64> @test_vpermxord_e
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vpermxord_e
vector unsigned long long test_vpermxord_e(void)
{
vector unsigned long long a = D_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vpermxor
}
-// CHECK-LABEL: define <2 x i64> @test_vcipher_e
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vcipher_e
vector unsigned long long test_vcipher_e(void)
{
vector unsigned long long a = D_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vcipher
}
-// CHECK-LABEL: define <2 x i64> @test_vcipherlast_e
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vcipherlast_e
vector unsigned long long test_vcipherlast_e(void)
{
vector unsigned long long a = D_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vcipherlast
}
-// CHECK-LABEL: define <2 x i64> @test_vncipher_e
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vncipher_e
vector unsigned long long test_vncipher_e(void)
{
vector unsigned long long a = D_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vncipher
}
-// CHECK-LABEL: define <2 x i64> @test_vncipherlast_e
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vncipherlast_e
vector unsigned long long test_vncipherlast_e(void)
{
vector unsigned long long a = D_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vncipherlast
}
-// CHECK-LABEL: define <4 x i32> @test_vshasigmaw_e
+// CHECK-LABEL: define{{.*}} <4 x i32> @test_vshasigmaw_e
vector unsigned int test_vshasigmaw_e(void)
{
vector unsigned int a = W_INIT1
// CHECK: @llvm.ppc.altivec.crypto.vshasigmaw
}
-// CHECK-LABEL: define <2 x i64> @test_vshasigmad_e
+// CHECK-LABEL: define{{.*}} <2 x i64> @test_vshasigmad_e
vector unsigned long long test_vshasigmad_e(void)
{
vector unsigned long long a = D_INIT2
// RUN: %clang_cc1 -target-feature +altivec -target-feature +htm -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
void test1(long int *r, int code, long int *a, long int *b) {
-// CHECK-LABEL: define void @test1
+// CHECK-LABEL: define{{.*}} void @test1
r[0] = __builtin_tbegin (0);
// CHECK: @llvm.ppc.tbegin
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu pwr8 \
// RUN: -emit-llvm %s -o - | FileCheck %s
-// CHECK-LABEL: define signext i32 @test_divwe
+// CHECK-LABEL: define{{.*}} signext i32 @test_divwe
int test_divwe(void)
{
int a = 74;
// CHECK: @llvm.ppc.divwe
}
-// CHECK-LABEL: define zeroext i32 @test_divweu
+// CHECK-LABEL: define{{.*}} zeroext i32 @test_divweu
unsigned int test_divweu(void)
{
unsigned int a = 74;
// CHECK: @llvm.ppc.divweu
}
-// CHECK-LABEL: define i64 @test_divde
+// CHECK-LABEL: define{{.*}} i64 @test_divde
long long test_divde(void)
{
long long a = 74LL;
// CHECK: @llvm.ppc.divde
}
-// CHECK-LABEL: define i64 @test_divdeu
+// CHECK-LABEL: define{{.*}} i64 @test_divdeu
unsigned long long test_divdeu(void)
{
unsigned long long a = 74ULL;
// CHECK: @llvm.ppc.divdeu
}
-// CHECK-LABEL: define i64 @test_bpermd
+// CHECK-LABEL: define{{.*}} i64 @test_bpermd
long long test_bpermd(void)
{
long long a = 74LL;
vector float res_vf;
vector double res_vd;
-// CHECK-LABEL: define void @test1
+// CHECK-LABEL: define{{.*}} void @test1
void test1() {
/* vec_abs */
vector unsigned __int128 res_vulll;
-// CHECK-LABEL: define void @test1
+// CHECK-LABEL: define{{.*}} void @test1
void test1() {
/* vec_add */
void dummy() { }
void test1() {
-// CHECK-LABEL: define void @test1
-// CHECK-LE-LABEL: define void @test1
+// CHECK-LABEL: define{{.*}} void @test1
+// CHECK-LE-LABEL: define{{.*}} void @test1
res_vf = vec_abs(vf);
// CHECK: call <4 x float> @llvm.fabs.v4f32(<4 x float> %{{[0-9]*}})
res = __builtin_eh_return_data_regno(1); // CHECK: store volatile i32 4
}
-// CHECK-LABEL: define i64 @test_builtin_ppc_get_timebase
+// CHECK-LABEL: define{{.*}} i64 @test_builtin_ppc_get_timebase
long long test_builtin_ppc_get_timebase() {
// CHECK: call i64 @llvm.readcyclecounter()
return __builtin_ppc_get_timebase();
// CHECK-DAG: %struct.elem = type { %struct.ptr }
struct ptr object;
-// CHECK-DAG: @object = global %struct.ptr zeroinitializer
+// CHECK-DAG: @object ={{.*}} global %struct.ptr zeroinitializer
-// CHECK-DAG: @testStructGlobal = global {{.*}} { i16 1, i16 2, i16 3, i16 4 }
-// CHECK-DAG: @testPromotedStructGlobal = global {{.*}} { %{{.*}} { i16 1, i16 2, i16 3 }, [2 x i8] zeroinitializer }
+// CHECK-DAG: @testStructGlobal ={{.*}} global {{.*}} { i16 1, i16 2, i16 3, i16 4 }
+// CHECK-DAG: @testPromotedStructGlobal ={{.*}} global {{.*}} { %{{.*}} { i16 1, i16 2, i16 3 }, [2 x i8] zeroinitializer }
typedef int __attribute__((vector_size(16))) vector;
s &= 42;
}
-// CHECK-LABEL: define arm_aapcscc void @testFloat(float*
+// CHECK-LABEL: define{{.*}} arm_aapcscc void @testFloat(float*
void testFloat(_Atomic(float) *fp) {
// CHECK: [[FP:%.*]] = alloca float*
// CHECK-NEXT: [[X:%.*]] = alloca float
// CHECK-NEXT: ret void
}
-// CHECK: define arm_aapcscc void @testComplexFloat([[CF:{ float, float }]]*
+// CHECK: define{{.*}} arm_aapcscc void @testComplexFloat([[CF:{ float, float }]]*
void testComplexFloat(_Atomic(_Complex float) *fp) {
// CHECK: [[FP:%.*]] = alloca [[CF]]*, align 4
// CHECK-NEXT: [[X:%.*]] = alloca [[CF]], align 8
typedef struct { short x, y, z, w; } S;
_Atomic S testStructGlobal = (S){1, 2, 3, 4};
-// CHECK: define arm_aapcscc void @testStruct([[S:.*]]*
+// CHECK: define{{.*}} arm_aapcscc void @testStruct([[S:.*]]*
void testStruct(_Atomic(S) *fp) {
// CHECK: [[FP:%.*]] = alloca [[S]]*, align 4
// CHECK-NEXT: [[X:%.*]] = alloca [[S]], align 8
typedef struct { short x, y, z; } PS;
_Atomic PS testPromotedStructGlobal = (PS){1, 2, 3};
-// CHECK: define arm_aapcscc void @testPromotedStruct([[APS:.*]]*
+// CHECK: define{{.*}} arm_aapcscc void @testPromotedStruct([[APS:.*]]*
void testPromotedStruct(_Atomic(PS) *fp) {
// CHECK: [[FP:%.*]] = alloca [[APS]]*, align 4
// CHECK-NEXT: [[X:%.*]] = alloca [[APS]], align 8
// CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 13 }, {{.*}}* @[[ALIGNED_CHAR]] }
char **load_from_ac_struct(struct ac_struct *x) {
- // CHECK: define i8** @{{.*}}(%[[STRUCT_AC_STRUCT]]* %[[X:.*]])
+ // CHECK: define{{.*}} i8** @{{.*}}(%[[STRUCT_AC_STRUCT]]* %[[X:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[STRUCT_AC_STRUCT_ADDR:.*]] = alloca %[[STRUCT_AC_STRUCT]]*, align 8
// CHECK-NEXT: store %[[STRUCT_AC_STRUCT]]* %[[X]], %[[STRUCT_AC_STRUCT]]** %[[STRUCT_AC_STRUCT_ADDR]], align 8
// CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 10 }, {{.*}}* @[[CHAR]] }
char **passthrough(__attribute__((align_value(0x80000000))) char **x) {
- // CHECK-NOSANITIZE: define i8** @{{.*}}(i8** align 536870912 %[[X:.*]])
- // CHECK-SANITIZE: define i8** @{{.*}}(i8** %[[X:.*]])
+ // CHECK-NOSANITIZE: define{{.*}} i8** @{{.*}}(i8** align 536870912 %[[X:.*]])
+ // CHECK-SANITIZE: define{{.*}} i8** @{{.*}}(i8** %[[X:.*]])
// CHECK-NEXT: [[entry:.*]]:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8
char **__attribute__((alloc_align(2)))
passthrough(char **x, unsigned long alignment) {
- // CHECK: define i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]])
+ // CHECK: define{{.*}} i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: %[[ALIGNMENT_ADDR:.*]] = alloca i64, align 8
}
char **caller(char **x, unsigned long alignment) {
- // CHECK: define i8** @{{.*}}(i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]])
+ // CHECK: define{{.*}} i8** @{{.*}}(i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: %[[ALIGNMENT_ADDR:.*]] = alloca i64, align 8
char **__attribute__((alloc_align(2)))
passthrough(char **x, unsigned long alignment) {
- // CHECK: define i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]])
+ // CHECK: define{{.*}} i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: %[[ALIGNMENT_ADDR:.*]] = alloca i64, align 8
}
char **caller(char **x) {
- // CHECK: define i8** @{{.*}}(i8** %[[X:.*]])
+ // CHECK: define{{.*}} i8** @{{.*}}(i8** %[[X:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8
// CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 10 }, {{.*}}* @[[CHAR]] }
char **__attribute__((assume_aligned(0x80000000, 42))) passthrough(char **x) {
- // CHECK: define i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]])
+ // CHECK: define{{.*}} i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8
}
char **caller(char **x) {
- // CHECK: define i8** @{{.*}}(i8** %[[X:.*]])
+ // CHECK: define{{.*}} i8** @{{.*}}(i8** %[[X:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8
// CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 10 }, {{.*}}* @[[CHAR]] }
char **__attribute__((assume_aligned(128))) passthrough(char **x) {
- // CHECK: define i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]])
+ // CHECK: define{{.*}} i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8
}
char **caller(char **x) {
- // CHECK: define i8** @{{.*}}(i8** %[[X]])
+ // CHECK: define{{.*}} i8** @{{.*}}(i8** %[[X]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR]] = alloca i8**, align 8
// CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8
// CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 35 }, {{.*}}* @[[CHAR]] }
void *caller(char **x, unsigned long offset) {
- // CHECK: define i8* @{{.*}}(i8** %[[X:.*]], i64 %[[OFFSET:.*]])
+ // CHECK: define{{.*}} i8* @{{.*}}(i8** %[[X:.*]], i64 %[[OFFSET:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8
// CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 35 }, {{.*}}* @[[CHAR]] }
void *caller(char **x) {
- // CHECK: define i8* @{{.*}}(i8** %[[X:.*]])
+ // CHECK: define{{.*}} i8* @{{.*}}(i8** %[[X:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8
// CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 35 }, {{.*}}* @[[CHAR]] }
void *caller(char **x) {
- // CHECK: define i8* @{{.*}}(i8** %[[X:.*]])
+ // CHECK: define{{.*}} i8* @{{.*}}(i8** %[[X:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8
// CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 30 }, {{.*}}* @[[CHAR]] }
void func(char *data) {
- // CHECK: define void @{{.*}}(i8* %[[DATA:.*]])
+ // CHECK: define{{.*}} void @{{.*}}(i8* %[[DATA:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[DATA_ADDR:.*]] = alloca i8*, align 8
// CHECK: store i8* %[[DATA]], i8** %[[DATA_ADDR]], align 8
int x, y;
};
-// CHECK-LABEL: define i64 @{{.*}}get_offset_of_y_naively{{.*}}(
+// CHECK-LABEL: define{{.*}} i64 @{{.*}}get_offset_of_y_naively{{.*}}(
uintptr_t get_offset_of_y_naively() {
// CHECK: [[ENTRY:.*]]:
// CHECK-NEXT: ret i64 ptrtoint (i32* getelementptr (i32, i32* null, i32 1) to i64)
return ((uintptr_t)(&(((struct S *)0)->y)));
}
-// CHECK-LABEL: define i64 @{{.*}}get_offset_of_y_via_builtin{{.*}}(
+// CHECK-LABEL: define{{.*}} i64 @{{.*}}get_offset_of_y_via_builtin{{.*}}(
uintptr_t get_offset_of_y_via_builtin() {
// CHECK: [[ENTRY:.*]]:
// CHECK-NEXT: ret i64 4
#endif
char *add_unsigned(char *base, unsigned long offset) {
- // CHECK: define i8* @add_unsigned(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]])
+ // CHECK: define{{.*}} i8* @add_unsigned(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8
// CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8
#endif
char *var_var(char *base, unsigned long offset) {
- // CHECK: define i8* @var_var(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]])
+ // CHECK: define{{.*}} i8* @var_var(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8
// CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8
}
char *var_zero(char *base) {
- // CHECK: define i8* @var_zero(i8* %[[BASE:.*]])
+ // CHECK: define{{.*}} i8* @var_zero(i8* %[[BASE:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8
// CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8
}
char *var_one(char *base) {
- // CHECK: define i8* @var_one(i8* %[[BASE:.*]])
+ // CHECK: define{{.*}} i8* @var_one(i8* %[[BASE:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8
// CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8
}
char *var_allones(char *base) {
- // CHECK: define i8* @var_allones(i8* %[[BASE:.*]])
+ // CHECK: define{{.*}} i8* @var_allones(i8* %[[BASE:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8
// CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8
//------------------------------------------------------------------------------
char *nullptr_var(unsigned long offset) {
- // CHECK: define i8* @nullptr_var(i64 %[[OFFSET:.*]])
+ // CHECK: define{{.*}} i8* @nullptr_var(i64 %[[OFFSET:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8
// CHECK-NEXT: store i64 %[[OFFSET]], i64* %[[OFFSET_ADDR]], align 8
}
char *nullptr_zero() {
- // CHECK: define i8* @nullptr_zero()
+ // CHECK: define{{.*}} i8* @nullptr_zero()
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-SANITIZE-C-NEXT: br i1 false, label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize
// CHECK-SANITIZE-C: [[HANDLER_POINTER_OVERFLOW]]:
}
char *nullptr_one_BAD() {
- // CHECK: define i8* @nullptr_one_BAD()
+ // CHECK: define{{.*}} i8* @nullptr_one_BAD()
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-SANITIZE-C-NEXT: br i1 false, label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize
// CHECK-SANITIZE-CPP-NEXT: br i1 icmp eq (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* null, i64 1) to i64), i64 0), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize
}
char *nullptr_allones_BAD() {
- // CHECK: define i8* @nullptr_allones_BAD()
+ // CHECK: define{{.*}} i8* @nullptr_allones_BAD()
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-SANITIZE-C-NEXT: br i1 false, label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize
// CHECK-SANITIZE-CPP-NEXT: br i1 icmp eq (i64 mul (i64 ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64), i64 -1), i64 0), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize
//------------------------------------------------------------------------------
char *one_var(unsigned long offset) {
- // CHECK: define i8* @one_var(i64 %[[OFFSET:.*]])
+ // CHECK: define{{.*}} i8* @one_var(i64 %[[OFFSET:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8
// CHECK-NEXT: store i64 %[[OFFSET]], i64* %[[OFFSET_ADDR]], align 8
}
char *one_zero() {
- // CHECK: define i8* @one_zero()
+ // CHECK: define{{.*}} i8* @one_zero()
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-SANITIZE-C-NEXT: br i1 icmp ne (i8* inttoptr (i64 1 to i8*), i8* null), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize
// CHECK-SANITIZE-C: [[HANDLER_POINTER_OVERFLOW]]:
}
char *one_one_OK() {
- // CHECK: define i8* @one_one_OK()
+ // CHECK: define{{.*}} i8* @one_one_OK()
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-SANITIZE-C-NEXT: br i1 and (i1 icmp ne (i8* inttoptr (i64 1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 1 to i8*), i64 1) to i64), i64 1), i64 1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize
// CHECK-SANITIZE-CPP-NEXT: br i1 xor (i1 icmp eq (i8* inttoptr (i64 1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 1 to i8*), i64 1) to i64), i64 1), i64 1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize
}
char *one_allones_BAD() {
- // CHECK: define i8* @one_allones_BAD()
+ // CHECK: define{{.*}} i8* @one_allones_BAD()
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-SANITIZE-C-NEXT: br i1 and (i1 icmp ne (i8* inttoptr (i64 1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 1 to i8*), i64 -1) to i64), i64 1), i64 1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize
// CHECK-SANITIZE-CPP-NEXT: br i1 xor (i1 icmp eq (i8* inttoptr (i64 1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 1 to i8*), i64 -1) to i64), i64 1), i64 1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize
//------------------------------------------------------------------------------
char *allones_var(unsigned long offset) {
- // CHECK: define i8* @allones_var(i64 %[[OFFSET:.*]])
+ // CHECK: define{{.*}} i8* @allones_var(i64 %[[OFFSET:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8
// CHECK-NEXT: store i64 %[[OFFSET]], i64* %[[OFFSET_ADDR]], align 8
}
char *allones_zero_OK() {
- // CHECK: define i8* @allones_zero_OK()
+ // CHECK: define{{.*}} i8* @allones_zero_OK()
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-SANITIZE-C-NEXT: br i1 icmp ne (i8* inttoptr (i64 -1 to i8*), i8* null), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize
// CHECK-SANITIZE-C: [[HANDLER_POINTER_OVERFLOW]]:
}
char *allones_one_BAD() {
- // CHECK: define i8* @allones_one_BAD()
+ // CHECK: define{{.*}} i8* @allones_one_BAD()
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-SANITIZE-C-NEXT: br i1 and (i1 icmp ne (i8* inttoptr (i64 -1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 -1 to i8*), i64 1) to i64), i64 -1), i64 -1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize
// CHECK-SANITIZE-CPP-NEXT: br i1 xor (i1 icmp eq (i8* inttoptr (i64 -1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 -1 to i8*), i64 1) to i64), i64 -1), i64 -1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize
}
char *allones_allones_OK() {
- // CHECK: define i8* @allones_allones_OK()
+ // CHECK: define{{.*}} i8* @allones_allones_OK()
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-SANITIZE-C-NEXT: br i1 and (i1 icmp ne (i8* inttoptr (i64 -1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 -1 to i8*), i64 -1) to i64), i64 -1), i64 -1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize
// CHECK-SANITIZE-CPP-NEXT: br i1 xor (i1 icmp eq (i8* inttoptr (i64 -1 to i8*), i8* null), i1 icmp ne (i64 add (i64 sub (i64 ptrtoint (i8* getelementptr inbounds (i8, i8* inttoptr (i64 -1 to i8*), i64 -1) to i64), i64 -1), i64 -1), i64 0)), label %[[CONT:.*]], label %[[HANDLER_POINTER_OVERFLOW:[^,]+]],{{.*}} !nosanitize
#endif
char *volatile_ptr(char *volatile base, unsigned long offset) {
- // CHECK: define i8* @volatile_ptr(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]])
+ // CHECK: define{{.*}} i8* @volatile_ptr(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8
// CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8
#endif
char *add_unsigned(char *base, unsigned long offset) {
- // CHECK: define i8* @add_unsigned(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]])
+ // CHECK: define{{.*}} i8* @add_unsigned(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8
// CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8
}
char *sub_unsigned(char *base, unsigned long offset) {
- // CHECK: define i8* @sub_unsigned(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]])
+ // CHECK: define{{.*}} i8* @sub_unsigned(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8
// CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8
}
char *add_signed(char *base, signed long offset) {
- // CHECK: define i8* @add_signed(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]])
+ // CHECK: define{{.*}} i8* @add_signed(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8
// CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8
}
char *sub_signed(char *base, signed long offset) {
- // CHECK: define i8* @sub_signed(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]])
+ // CHECK: define{{.*}} i8* @sub_signed(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8
// CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8
}
char *postinc(char *base) {
- // CHECK: define i8* @postinc(i8* %[[BASE:.*]])
+ // CHECK: define{{.*}} i8* @postinc(i8* %[[BASE:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8
// CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8
}
char *postdec(char *base) {
- // CHECK: define i8* @postdec(i8* %[[BASE:.*]])
+ // CHECK: define{{.*}} i8* @postdec(i8* %[[BASE:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8
// CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8
}
char *preinc(char *base) {
- // CHECK: define i8* @preinc(i8* %[[BASE:.*]])
+ // CHECK: define{{.*}} i8* @preinc(i8* %[[BASE:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8
// CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8
}
char *predec(char *base) {
- // CHECK: define i8* @predec(i8* %[[BASE:.*]])
+ // CHECK: define{{.*}} i8* @predec(i8* %[[BASE:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8
// CHECK-NEXT: store i8* %[[BASE]], i8** %[[BASE_ADDR]], align 8
void ext(void);
-// CHECK: define void @f({{.*}} [[ATTR1:#[0-9]+]]
+// CHECK: define{{.*}} void @f({{.*}} [[ATTR1:#[0-9]+]]
void f() {
ext();
}
// NOCANON: declare !type {{.*}} @ext()
// CANON: declare void @ext()
-// CHECK: define void @g({{.*}} [[ATTR2:#[0-9]+]]
+// CHECK: define{{.*}} void @g({{.*}} [[ATTR2:#[0-9]+]]
__attribute__((cfi_canonical_jump_table)) void g() {}
// CHECK: [[ATTR1]] = {
// RUN: -fsanitize=cfi-icall -fsanitize-cfi-cross-dso \
// RUN: -emit-llvm -o - %s | FileCheck %s
-// CHECK: define void @f() {{.*}} !type !{{.*}} !type !{{.*}}
+// CHECK: define{{.*}} void @f() {{.*}} !type !{{.*}} !type !{{.*}}
void f(void);
void (*pf)(void) = f;
void f(void) { }
// Test that const char* is generalized to const void* and that const char** is
// generalized to void*
-// CHECK: define i32** @f({{.*}} !type [[TYPE:![0-9]+]] !type [[TYPE_GENERALIZED:![0-9]+]]
+// CHECK: define{{.*}} i32** @f({{.*}} !type [[TYPE:![0-9]+]] !type [[TYPE_GENERALIZED:![0-9]+]]
int** f(const char *a, const char **b) {
return (int**)0;
}
// CHECK-CF-IN-CF-DECL: @__CFConstantStringClassReference = external global [0 x i32]
-// CHECK-CF-IN-CF-DEFN: @__CFConstantStringClassReference = global [32 x i64] zeroinitializer, align 16
-// CHECK-CF: @__CFConstantStringClassReference = global [1 x i64] zeroinitializer, align 8
+// CHECK-CF-IN-CF-DEFN: @__CFConstantStringClassReference ={{.*}} global [32 x i64] zeroinitializer, align 16
+// CHECK-CF: @__CFConstantStringClassReference ={{.*}} global [1 x i64] zeroinitializer, align 8
// CHECK-CF-EXTERN: @__CFConstantStringClassReference = external global [0 x i32]
// CHECK-CF-EXTERN: @.str = private unnamed_addr constant [7 x i8] c"string\00", section ".rodata", align 1
static int int_zvar;
#pragma clang section bss=""
-// CHECK: @ext_const = constant i32 1, section ".ext_const_attr", align 4{{$}}
+// CHECK: @ext_const ={{.*}} constant i32 1, section ".ext_const_attr", align 4{{$}}
// CHECK: @int_const = internal constant i32 1, section ".int_const_attr", align 4{{$}}
-// CHECK: @ext_var = global i32 1, section ".ext_var_attr", align 4{{$}}
+// CHECK: @ext_var ={{.*}} global i32 1, section ".ext_var_attr", align 4{{$}}
// CHECK: @int_var = internal global i32 1, section ".int_var_attr", align 4{{$}}
-// CHECK: @ext_zvar = global i32 0, section ".ext_zvar_attr", align 4{{$}}
+// CHECK: @ext_zvar ={{.*}} global i32 0, section ".ext_zvar_attr", align 4{{$}}
// CHECK: @int_zvar = internal global i32 0, section ".int_zvar_attr", align 4{{$}}
-// CHECK: define void @ext_fun() #0 section ".ext_fun_attr"
-// CHECK: define void @ext_fun2() #0 section ".ext_fun2_attr"
+// CHECK: define{{.*}} void @ext_fun() #0 section ".ext_fun_attr"
+// CHECK: define{{.*}} void @ext_fun2() #0 section ".ext_fun2_attr"
// CHECK: define internal void @int_fun() #0 section ".int_fun_attr"
// CHECK: define internal void @int_fun2() #0 section ".int_fun2_attr"
//
// There is no exception to handle here, lifetime.end is not a destructor,
// so there is no need have cleanup dest slot related code
-// CHECK-LABEL: define i32 @test
+// CHECK-LABEL: define{{.*}} i32 @test
int test() {
int x = 3;
int *volatile p = &x;
// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -o - %s | FileCheck %s
-// CHECK: @g1 = global [2 x i8*] [i8* getelementptr (i8, i8* getelementptr inbounds ([0 x %struct.anon], [0 x %struct.anon]* @g0, i32 0, i32 0, i32 0), i64 -2), i8* getelementptr (i8, i8* getelementptr inbounds ([0 x %struct.anon], [0 x %struct.anon]* @g0, i32 0, i32 0, i32 0), i64 -46)], align 16
-// CHECK: @g2 = global [2 x i8*] [i8* getelementptr (i8, i8* getelementptr inbounds ([0 x %struct.anon], [0 x %struct.anon]* @g0, i32 0, i32 0, i32 0), i64 -2), i8* getelementptr (i8, i8* getelementptr inbounds ([0 x %struct.anon], [0 x %struct.anon]* @g0, i32 0, i32 0, i32 0), i64 -46)], align 16
+// CHECK: @g1 ={{.*}} global [2 x i8*] [i8* getelementptr (i8, i8* getelementptr inbounds ([0 x %struct.anon], [0 x %struct.anon]* @g0, i32 0, i32 0, i32 0), i64 -2), i8* getelementptr (i8, i8* getelementptr inbounds ([0 x %struct.anon], [0 x %struct.anon]* @g0, i32 0, i32 0, i32 0), i64 -46)], align 16
+// CHECK: @g2 ={{.*}} global [2 x i8*] [i8* getelementptr (i8, i8* getelementptr inbounds ([0 x %struct.anon], [0 x %struct.anon]* @g0, i32 0, i32 0, i32 0), i64 -2), i8* getelementptr (i8, i8* getelementptr inbounds ([0 x %struct.anon], [0 x %struct.anon]* @g0, i32 0, i32 0, i32 0), i64 -46)], align 16
extern struct { unsigned char a, b; } g0[];
void *g1[] = {g0 + -1, g0 + -23 };
// Brace-enclosed string array initializers
char a[] = { "asdf" };
-// CHECK: @a = global [5 x i8] c"asdf\00"
+// CHECK: @a ={{.*}} global [5 x i8] c"asdf\00"
char a2[2][5] = { "asdf" };
-// CHECK: @a2 = global [2 x [5 x i8]] {{\[}}[5 x i8] c"asdf\00", [5 x i8] zeroinitializer]
+// CHECK: @a2 ={{.*}} global [2 x [5 x i8]] {{\[}}[5 x i8] c"asdf\00", [5 x i8] zeroinitializer]
// Double-implicit-conversions of array/functions (not legal C, but
// clang accepts it for gcc compat).
int g0 = (int)(&(((union s2 *) 0)->f0.f0) - 0);
-// CHECK: @g1x = global { double, double } { double 1.000000e+00{{[0]*}}, double 0.000000e+00{{[0]*}} }
+// CHECK: @g1x ={{.*}} global { double, double } { double 1.000000e+00{{[0]*}}, double 0.000000e+00{{[0]*}} }
_Complex double g1x = 1.0f;
-// CHECK: @g1y = global { double, double } { double 0.000000e+00{{[0]*}}, double 1.000000e+00{{[0]*}} }
+// CHECK: @g1y ={{.*}} global { double, double } { double 0.000000e+00{{[0]*}}, double 1.000000e+00{{[0]*}} }
_Complex double g1y = 1.0fi;
-// CHECK: @g1 = global { i8, i8 } { i8 1, i8 10 }
+// CHECK: @g1 ={{.*}} global { i8, i8 } { i8 1, i8 10 }
_Complex char g1 = (char) 1 + (char) 10 * 1i;
-// CHECK: @g2 = global { i32, i32 } { i32 1, i32 10 }
+// CHECK: @g2 ={{.*}} global { i32, i32 } { i32 1, i32 10 }
_Complex int g2 = 1 + 10i;
-// CHECK: @g3 = global { float, float } { float 1.000000e+00{{[0]*}}, float 1.000000e+0{{[0]*}}1 }
+// CHECK: @g3 ={{.*}} global { float, float } { float 1.000000e+00{{[0]*}}, float 1.000000e+0{{[0]*}}1 }
_Complex float g3 = 1.0 + 10.0i;
-// CHECK: @g4 = global { double, double } { double 1.000000e+00{{[0]*}}, double 1.000000e+0{{[0]*}}1 }
+// CHECK: @g4 ={{.*}} global { double, double } { double 1.000000e+00{{[0]*}}, double 1.000000e+0{{[0]*}}1 }
_Complex double g4 = 1.0 + 10.0i;
-// CHECK: @g5 = global { i32, i32 } zeroinitializer
+// CHECK: @g5 ={{.*}} global { i32, i32 } zeroinitializer
_Complex int g5 = (2 + 3i) == (5 + 7i);
-// CHECK: @g6 = global { double, double } { double -1.100000e+0{{[0]*}}1, double 2.900000e+0{{[0]*}}1 }
+// CHECK: @g6 ={{.*}} global { double, double } { double -1.100000e+0{{[0]*}}1, double 2.900000e+0{{[0]*}}1 }
_Complex double g6 = (2.0 + 3.0i) * (5.0 + 7.0i);
-// CHECK: @g7 = global i32 1
+// CHECK: @g7 ={{.*}} global i32 1
int g7 = (2 + 3i) * (5 + 7i) == (-11 + 29i);
-// CHECK: @g8 = global i32 1
+// CHECK: @g8 ={{.*}} global i32 1
int g8 = (2.0 + 3.0i) * (5.0 + 7.0i) == (-11.0 + 29.0i);
-// CHECK: @g9 = global i32 0
+// CHECK: @g9 ={{.*}} global i32 0
int g9 = (2 + 3i) * (5 + 7i) != (-11 + 29i);
-// CHECK: @g10 = global i32 0
+// CHECK: @g10 ={{.*}} global i32 0
int g10 = (2.0 + 3.0i) * (5.0 + 7.0i) != (-11.0 + 29.0i);
// PR5108
-// CHECK: @gv1 = global %struct.anon <{ i32 0, i8 7 }>, align 1
+// CHECK: @gv1 ={{.*}} global %struct.anon <{ i32 0, i8 7 }>, align 1
struct {
unsigned long a;
unsigned long b:3;
} __attribute__((__packed__)) gv1 = { .a = 0x0, .b = 7, };
// PR5118
-// CHECK: @gv2 = global %struct.anon.0 <{ i8 1, i8* null }>, align 1
+// CHECK: @gv2 ={{.*}} global %struct.anon.0 <{ i8 1, i8* null }>, align 1
struct {
unsigned char a;
char *b;
return l0;
}
-// CHECK: @g12 = global i32 ptrtoint (i8* @g12_tmp to i32)
+// CHECK: @g12 ={{.*}} global i32 ptrtoint (i8* @g12_tmp to i32)
static char g12_tmp;
long g12 = (long) &g12_tmp;
-// CHECK: @g13 = global [1 x %struct.g13_s0] [%struct.g13_s0 { i32 ptrtoint (i8* @g12_tmp to i32) }]
+// CHECK: @g13 ={{.*}} global [1 x %struct.g13_s0] [%struct.g13_s0 { i32 ptrtoint (i8* @g12_tmp to i32) }]
struct g13_s0 {
long a;
};
{ (long) &g12_tmp }
};
-// CHECK: @g14 = global i8* inttoptr (i32 100 to i8*)
+// CHECK: @g14 ={{.*}} global i8* inttoptr (i32 100 to i8*)
void *g14 = (void*) 100;
-// CHECK: @g15 = global i32 -1
+// CHECK: @g15 ={{.*}} global i32 -1
int g15 = (int) (char) ((void*) 0 + 255);
-// CHECK: @g16 = global i64 4294967295
+// CHECK: @g16 ={{.*}} global i64 4294967295
long long g16 = (long long) ((void*) 0xFFFFFFFF);
-// CHECK: @g17 = global i32* @g15
+// CHECK: @g17 ={{.*}} global i32* @g15
int *g17 = (int *) ((long) &g15);
// CHECK: @g18.p = internal global [1 x i32*] [i32* @g19]
const int AA = 5;
-// CHECK-LABEL: define i32 @f1
+// CHECK-LABEL: define{{.*}} i32 @f1
int f1(enum {AA,BB} E) {
// CHECK: ret i32 1
return BB;
}
-// CHECK-LABEL: define i32 @f2
+// CHECK-LABEL: define{{.*}} i32 @f2
int f2(enum {AA=7,BB} E) {
// CHECK: ret i32 7
return AA;
// RUN: %clang_cc1 -triple amdgcn---amdgiz -emit-llvm < %s | FileCheck -check-prefixes=CHECK %s
-// CHECK-DAG: @foo = addrspace(1) global i32 0
+// CHECK-DAG: @foo ={{.*}} addrspace(1) global i32 0
int foo;
-// CHECK-DAG: @ban = addrspace(1) global [10 x i32] zeroinitializer
+// CHECK-DAG: @ban ={{.*}} addrspace(1) global [10 x i32] zeroinitializer
int ban[10];
-// CHECK-DAG: @A = addrspace(1) global i32* null
-// CHECK-DAG: @B = addrspace(1) global i32* null
+// CHECK-DAG: @A ={{.*}} addrspace(1) global i32* null
+// CHECK-DAG: @B ={{.*}} addrspace(1) global i32* null
int *A;
int *B;
-// CHECK-LABEL: define i32 @test1()
+// CHECK-LABEL: define{{.*}} i32 @test1()
// CHECK: load i32, i32* addrspacecast{{[^@]+}} @foo
int test1() { return foo; }
-// CHECK-LABEL: define i32 @test2(i32 %i)
+// CHECK-LABEL: define{{.*}} i32 @test2(i32 %i)
// CHECK: %[[addr:.*]] = getelementptr
// CHECK: load i32, i32* %[[addr]]
// CHECK-NEXT: ret i32
int test2(int i) { return ban[i]; }
-// CHECK-LABEL: define void @test3()
+// CHECK-LABEL: define{{.*}} void @test3()
// CHECK: load i32*, i32** addrspacecast{{.*}} @B
// CHECK: load i32, i32*
// CHECK: load i32*, i32** addrspacecast{{.*}} @A
*A = *B;
}
-// CHECK-LABEL: define void @test4(i32* %a)
+// CHECK-LABEL: define{{.*}} void @test4(i32* %a)
// CHECK: %[[alloca:.*]] = alloca i32*, align 8, addrspace(5)
-// CHECK: %[[a_addr:.*]] = addrspacecast{{.*}} %[[alloca]] to i32**
+// CHECK: %[[a_addr:.*]] ={{.*}} addrspacecast{{.*}} %[[alloca]] to i32**
// CHECK: store i32* %a, i32** %[[a_addr]]
// CHECK: %[[r0:.*]] = load i32*, i32** %[[a_addr]]
// CHECK: %[[arrayidx:.*]] = getelementptr inbounds i32, i32* %[[r0]]
// RUN: %clang_cc1 -triple x86_64-unknown-linux -default-function-attr foo=bar -emit-llvm %s -o - | FileCheck %s
-// CHECK: define void @foo() #[[X:[0-9]+]]
+// CHECK: define{{.*}} void @foo() #[[X:[0-9]+]]
void foo() {}
// CHECK: attributes #[[X]] = {{.*}} "foo"="bar"
int b;
};
-// CHECK: @u = global %union.anon zeroinitializer
+// CHECK: @u ={{.*}} global %union.anon zeroinitializer
union { int i; float f; } u = { };
-// CHECK: @u2 = global { i32, [4 x i8] } { i32 0, [4 x i8] undef }
+// CHECK: @u2 ={{.*}} global { i32, [4 x i8] } { i32 0, [4 x i8] undef }
union { int i; double f; } u2 = { };
-// CHECK: @u3 = global %union.anon.1 zeroinitializer
+// CHECK: @u3 ={{.*}} global %union.anon.1 zeroinitializer
union { double f; int i; } u3 = { };
-// CHECK: @b = global [2 x i32] [i32 0, i32 22]
+// CHECK: @b ={{.*}} global [2 x i32] [i32 0, i32 22]
int b[2] = {
[1] = 22
};
struct ds ds1 = { { .a = 1 } };
struct ds ds2 = { { .b = 1 } };
struct ds ds3 = { .a = 0 };
-// CHECK: @ds4 = global %struct.ds { %struct.anon.3 { %struct.anon zeroinitializer, i16 0, %struct.anon.2 { i16 1 } } }
+// CHECK: @ds4 ={{.*}} global %struct.ds { %struct.anon.3 { %struct.anon zeroinitializer, i16 0, %struct.anon.2 { i16 1 } } }
struct ds ds4 = { .c = 1 };
struct ds ds5 = { { { .a = 0 } }, .b = 1 };
struct ds ds6 = { { .a = 0, .b = 1 } };
-// CHECK: @ds7 = global %struct.ds { %struct.anon.3 { %struct.anon { i16 2 }, i16 3, %struct.anon.2 zeroinitializer } }
+// CHECK: @ds7 ={{.*}} global %struct.ds { %struct.anon.3 { %struct.anon { i16 2 }, i16 3, %struct.anon.2 zeroinitializer } }
struct ds ds7 = {
{ {
.a = 1
[1].b[1] = 4
};
-// CHECK: @lab = global { [4 x i8], i32 } { [4 x i8] undef, i32 123 }
+// CHECK: @lab ={{.*}} global { [4 x i8], i32 } { [4 x i8] undef, i32 123 }
struct leading_anon_bitfield { int : 32; int n; } lab = { .n = 123 };
// rdar://45691981
struct Base B;
};
struct Derived D = {{}, .B.A = 42};
-// CHECK: @D = global %struct.Derived { %struct.Base { %struct.anon.4 { i32 42 } } }, align 4
+// CHECK: @D ={{.*}} global %struct.Derived { %struct.Base { %struct.anon.4 { i32 42 } } }, align 4
void test1(int argc, char **argv)
{
// Export const variable.
// CHECK-MSVC: @x = dso_local dllexport constant i32 3, align 4
-// CHECK-LNX: @x = constant i32 3, align 4
+// CHECK-LNX: @x ={{.*}} constant i32 3, align 4
// CHECK-MSVC: @z = dso_local constant i32 4, align 4
-// CHECK-LNX: @z = constant i32 4, align 4
+// CHECK-LNX: @z ={{.*}} constant i32 4, align 4
// CHECK-MSVC: @y = dso_local dllexport constant i32 0, align 4
-// CHECK-LNX: @y = constant i32 0, align 4
+// CHECK-LNX: @y ={{.*}} constant i32 0, align 4
__declspec(dllexport) int const x = 3;
__declspec(dllexport) const int y;
// SHARED-DAG: @bar = external global i32
// SHARED-DAG: @weak_bar = extern_weak global i32
// SHARED-DAG: declare void @foo()
-// SHARED-DAG: @baz = global i32 42
-// SHARED-DAG: define i32* @zed()
+// SHARED-DAG: @baz ={{.*}} global i32 42
+// SHARED-DAG: define{{.*}} i32* @zed()
// SHARED-DAG: @thread_var = external thread_local global i32
-// SHARED-DAG: @local_thread_var = thread_local global i32 42
+// SHARED-DAG: @local_thread_var ={{.*}} thread_local global i32 42
int baz = 42;
__attribute__((dllimport)) extern int import_var;
void foo(int m) __attribute__((overloadable, enable_if(m > 0, "")));
void foo(int m) __attribute__((overloadable));
-// CHECK-LABEL: define void @test1
+// CHECK-LABEL: define{{.*}} void @test1
void test1() {
// CHECK: store void (i32)* @_Z3fooi
void (*p)(int) = foo;
void bar(int m) __attribute__((overloadable, enable_if(m > 0, "")));
void bar(int m) __attribute__((overloadable, enable_if(1, "")));
-// CHECK-LABEL: define void @test2
+// CHECK-LABEL: define{{.*}} void @test2
void test2() {
// CHECK: store void (i32)* @_Z3barUa9enable_ifIXLi1EEEi
void (*p)(int) = bar;
void baz(int m) __attribute__((overloadable, enable_if(1, "")));
void baz(int m) __attribute__((overloadable));
-// CHECK-LABEL: define void @test3
+// CHECK-LABEL: define{{.*}} void @test3
void test3() {
// CHECK: store void (i32)* @_Z3bazUa9enable_ifIXLi1EEEi
void (*p)(int) = baz;
void qux(int m) __attribute__((overloadable, enable_if(1, ""),
enable_if(TRUEFACTS, "")));
void qux(int m) __attribute__((overloadable, enable_if(1, "")));
-// CHECK-LABEL: define void @test4
+// CHECK-LABEL: define{{.*}} void @test4
void test4() {
// CHECK: store void (i32)* @_Z3quxUa9enable_ifIXLi1EEXLi1EEEi
void (*p)(int) = qux;
// There was a bug where, when enable_if was present, overload resolution
// wouldn't pay attention to lower-priority attributes.
// (N.B. `foo` with pass_object_size should always be preferred)
-// CHECK-LABEL: define void @test5
+// CHECK-LABEL: define{{.*}} void @test5
void test5() {
int foo(char *i) __attribute__((enable_if(1, ""), overloadable));
int foo(char *i __attribute__((pass_object_size(0))))
namespace A {
enum E { Zero, One };
E a(int x) { return static_cast<E>(x); }
-// CHECK-LABEL: define i32 @_ZN6dr23381A1aEi
+// CHECK-LABEL: define{{.*}} i32 @_ZN6dr23381A1aEi
// CHECK: ret i32 %0
E b(int x) { return (E)x; }
-// CHECK-LABEL: define i32 @_ZN6dr23381A1bEi
+// CHECK-LABEL: define{{.*}} i32 @_ZN6dr23381A1bEi
// CHECK: ret i32 %0
} // namespace A
namespace B {
enum E : bool { Zero, One };
E a(int x) { return static_cast<E>(x); }
-// CHECK-LABEL: define zeroext i1 @_ZN6dr23381B1aEi
+// CHECK-LABEL: define{{.*}} zeroext i1 @_ZN6dr23381B1aEi
// CHECK: ret i1 %tobool
E b(int x) { return (E)x; }
-// CHECK-LABEL: define zeroext i1 @_ZN6dr23381B1bEi
+// CHECK-LABEL: define{{.*}} zeroext i1 @_ZN6dr23381B1bEi
// CHECK: ret i1 %tobool
} // namespace B
namespace C {
enum class E { Zero, One };
E a(int x) { return static_cast<E>(x); }
-// CHECK-LABEL: define i32 @_ZN6dr23381C1aEi
+// CHECK-LABEL: define{{.*}} i32 @_ZN6dr23381C1aEi
// CHECK: ret i32 %0
E b(int x) { return (E)x; }
-// CHECK-LABEL: define i32 @_ZN6dr23381C1bEi
+// CHECK-LABEL: define{{.*}} i32 @_ZN6dr23381C1bEi
// CHECK: ret i32 %0
} // namespace C
namespace D {
enum class E : bool { Zero, One };
E a(int x) { return static_cast<E>(x); }
-// CHECK-LABEL: define zeroext i1 @_ZN6dr23381D1aEi
+// CHECK-LABEL: define{{.*}} zeroext i1 @_ZN6dr23381D1aEi
// CHECK: ret i1 %tobool
E b(int x) { return (E)x; }
-// CHECK-LABEL: define zeroext i1 @_ZN6dr23381D1bEi
+// CHECK-LABEL: define{{.*}} zeroext i1 @_ZN6dr23381D1bEi
// CHECK: ret i1 %tobool
} // namespace D
void test1() {
extern void test1_helper(void (^)(int));
- // CHECK: define arm_aapcscc void @test1() [[STRICTFP0:#[0-9]+]] personality i8* bitcast (i32 (...)* @__gcc_personality_sj0 to i8*)
+ // CHECK: define{{.*}} arm_aapcscc void @test1() [[STRICTFP0:#[0-9]+]] personality i8* bitcast (i32 (...)* @__gcc_personality_sj0 to i8*)
__block int x = 10;
void test2_helper();
void test2() {
- // CHECK: define arm_aapcscc void @test2() [[STRICTFP0]] personality i8* bitcast (i32 (...)* @__gcc_personality_sj0 to i8*) {
+ // CHECK: define{{.*}} arm_aapcscc void @test2() [[STRICTFP0]] personality i8* bitcast (i32 (...)* @__gcc_personality_sj0 to i8*) {
__block int x = 10;
^{ (void)x; };
}
// rdar://7530813
-// CHECK-LABEL: define i32 @f11
+// CHECK-LABEL: define{{.*}} i32 @f11
int f11(long X) {
int A[100];
return A[X];
int f12() {
// PR3150
- // CHECK-LABEL: define i32 @f12
+ // CHECK-LABEL: define{{.*}} i32 @f12
// CHECK: ret i32 1
return 1||1;
}
// Make sure negate of fp uses -0.0 for proper -0 handling.
double f13(double X) {
- // CHECK-LABEL: define double @f13
+ // CHECK-LABEL: define{{.*}} double @f13
// CHECK: fneg double
return -X;
}
(void) &*a;
}
-// CHECK-LABEL: define void @f15
+// CHECK-LABEL: define{{.*}} void @f15
void f15() {
extern void f15_start(void);
f15_start();
}
// PR8967: this was crashing
-// CHECK-LABEL: define void @f16()
+// CHECK-LABEL: define{{.*}} void @f16()
void f16() {
__extension__({ goto lbl; });
lbl:
}
// PR13704: negative increment in i128 is not preserved.
-// CHECK-LABEL: define void @f17()
+// CHECK-LABEL: define{{.*}} void @f17()
void f17() {
extern void extfunc(__int128);
__int128 x = 2;
void f18() {
(strct)returns_int();
}
-// CHECK-LABEL: define void @f18()
+// CHECK-LABEL: define{{.*}} void @f18()
// CHECK: call i32 @returns_int()
// Ensure the right stmt is returned
int f19() {
return ({ 3;;4;; });
}
-// CHECK-LABEL: define i32 @f19()
+// CHECK-LABEL: define{{.*}} i32 @f19()
// CHECK: [[T:%.*]] = alloca i32
// CHECK: store i32 4, i32* [[T]]
// CHECK: [[L:%.*]] = load i32, i32* [[T]]
// SPARC: define{{.*}} void @ParamPassing(i129* byval(i129) align 8 %{{.+}}, i128* byval(i128) align 8 %{{.+}}, i64 %{{.+}})
// MIPS64: define{{.*}} void @ParamPassing(i129* byval(i129) align 8 %{{.+}}, i128 signext %{{.+}}, i64 signext %{{.+}})
// MIPS: define{{.*}} void @ParamPassing(i129* byval(i129) align 8 %{{.+}}, i128* byval(i128) align 8 %{{.+}}, i64 signext %{{.+}})
-// SPIR64: define spir_func void @ParamPassing(i129* byval(i129) align 8 %{{.+}}, i128* byval(i128) align 8 %{{.+}}, i64 %{{.+}})
-// SPIR: define spir_func void @ParamPassing(i129* byval(i129) align 8 %{{.+}}, i128* byval(i128) align 8 %{{.+}}, i64 %{{.+}})
+// SPIR64: define{{.*}} spir_func void @ParamPassing(i129* byval(i129) align 8 %{{.+}}, i128* byval(i128) align 8 %{{.+}}, i64 %{{.+}})
+// SPIR: define{{.*}} spir_func void @ParamPassing(i129* byval(i129) align 8 %{{.+}}, i128* byval(i128) align 8 %{{.+}}, i64 %{{.+}})
// HEX: define{{.*}} void @ParamPassing(i129* byval(i129) align 8 %{{.+}}, i128* byval(i128) align 8 %{{.+}}, i64 %{{.+}})
// LANAI: define{{.*}} void @ParamPassing(i129* byval(i129) align 4 %{{.+}}, i128* byval(i128) align 4 %{{.+}}, i64 %{{.+}})
// R600: define{{.*}} void @ParamPassing(i129 addrspace(5)* byval(i129) align 8 %{{.+}}, i128 addrspace(5)* byval(i128) align 8 %{{.+}}, i64 %{{.+}})
// SPARC: define{{.*}} void @ParamPassing2(i129* byval(i129) align 8 %{{.+}}, i127* byval(i127) align 8 %{{.+}}, i63 %{{.+}})
// MIPS64: define{{.*}} void @ParamPassing2(i129* byval(i129) align 8 %{{.+}}, i127 signext %{{.+}}, i63 signext %{{.+}})
// MIPS: define{{.*}} void @ParamPassing2(i129* byval(i129) align 8 %{{.+}}, i127* byval(i127) align 8 %{{.+}}, i63 signext %{{.+}})
-// SPIR64: define spir_func void @ParamPassing2(i129* byval(i129) align 8 %{{.+}}, i127* byval(i127) align 8 %{{.+}}, i63 %{{.+}})
-// SPIR: define spir_func void @ParamPassing2(i129* byval(i129) align 8 %{{.+}}, i127* byval(i127) align 8 %{{.+}}, i63 %{{.+}})
+// SPIR64: define{{.*}} spir_func void @ParamPassing2(i129* byval(i129) align 8 %{{.+}}, i127* byval(i127) align 8 %{{.+}}, i63 %{{.+}})
+// SPIR: define{{.*}} spir_func void @ParamPassing2(i129* byval(i129) align 8 %{{.+}}, i127* byval(i127) align 8 %{{.+}}, i63 %{{.+}})
// HEX: define{{.*}} void @ParamPassing2(i129* byval(i129) align 8 %{{.+}}, i127* byval(i127) align 8 %{{.+}}, i63 %{{.+}})
// LANAI: define{{.*}} void @ParamPassing2(i129* byval(i129) align 4 %{{.+}}, i127* byval(i127) align 4 %{{.+}}, i63 %{{.+}})
// R600: define{{.*}} void @ParamPassing2(i129 addrspace(5)* byval(i129) align 8 %{{.+}}, i127 addrspace(5)* byval(i127) align 8 %{{.+}}, i63 %{{.+}})
// SPARC: define{{.*}} void @ParamPassing3(i15 signext %{{.+}}, i31 signext %{{.+}})
// MIPS64: define{{.*}} void @ParamPassing3(i15 signext %{{.+}}, i31 signext %{{.+}})
// MIPS: define{{.*}} void @ParamPassing3(i15 signext %{{.+}}, i31 signext %{{.+}})
-// SPIR64: define spir_func void @ParamPassing3(i15 signext %{{.+}}, i31 signext %{{.+}})
-// SPIR: define spir_func void @ParamPassing3(i15 signext %{{.+}}, i31 signext %{{.+}})
+// SPIR64: define{{.*}} spir_func void @ParamPassing3(i15 signext %{{.+}}, i31 signext %{{.+}})
+// SPIR: define{{.*}} spir_func void @ParamPassing3(i15 signext %{{.+}}, i31 signext %{{.+}})
// HEX: define{{.*}} void @ParamPassing3(i15 signext %{{.+}}, i31 signext %{{.+}})
// LANAI: define{{.*}} void @ParamPassing3(i15 inreg %{{.+}}, i31 inreg %{{.+}})
// R600: define{{.*}} void @ParamPassing3(i15 signext %{{.+}}, i31 signext %{{.+}})
// SPARC: define{{.*}} i63 @ReturnPassing(
// MIPS64: define{{.*}} i63 @ReturnPassing(
// MIPS: define{{.*}} i63 @ReturnPassing(
-// SPIR64: define spir_func i63 @ReturnPassing(
-// SPIR: define spir_func i63 @ReturnPassing(
+// SPIR64: define{{.*}} spir_func i63 @ReturnPassing(
+// SPIR: define{{.*}} spir_func i63 @ReturnPassing(
// HEX: define{{.*}} i63 @ReturnPassing(
// LANAI: define{{.*}} i63 @ReturnPassing(
// R600: define{{.*}} i63 @ReturnPassing(
// SPARC: define{{.*}} i64 @ReturnPassing2(
// MIPS64: define{{.*}} i64 @ReturnPassing2(
// MIPS: define{{.*}} i64 @ReturnPassing2(
-// SPIR64: define spir_func i64 @ReturnPassing2(
-// SPIR: define spir_func i64 @ReturnPassing2(
+// SPIR64: define{{.*}} spir_func i64 @ReturnPassing2(
+// SPIR: define{{.*}} spir_func i64 @ReturnPassing2(
// HEX: define{{.*}} i64 @ReturnPassing2(
// LANAI: define{{.*}} i64 @ReturnPassing2(
// R600: define{{.*}} i64 @ReturnPassing2(
// SPARC: define{{.*}} void @ReturnPassing3(i127* noalias sret
// MIPS64: define{{.*}} i127 @ReturnPassing3(
// MIPS: define{{.*}} void @ReturnPassing3(i127* noalias sret
-// SPIR64: define spir_func void @ReturnPassing3(i127* noalias sret
-// SPIR: define spir_func void @ReturnPassing3(i127* noalias sret
+// SPIR64: define{{.*}} spir_func void @ReturnPassing3(i127* noalias sret
+// SPIR: define{{.*}} spir_func void @ReturnPassing3(i127* noalias sret
// HEX: define{{.*}} void @ReturnPassing3(i127* noalias sret
// LANAI: define{{.*}} void @ReturnPassing3(i127* noalias sret
// R600: define{{.*}} void @ReturnPassing3(i127 addrspace(5)* noalias sret
// SPARC: define{{.*}} void @ReturnPassing4(i128* noalias sret
// MIPS64: define{{.*}} i128 @ReturnPassing4(
// MIPS: define{{.*}} void @ReturnPassing4(i128* noalias sret
-// SPIR64: define spir_func void @ReturnPassing4(i128* noalias sret
-// SPIR: define spir_func void @ReturnPassing4(i128* noalias sret
+// SPIR64: define{{.*}} spir_func void @ReturnPassing4(i128* noalias sret
+// SPIR: define{{.*}} spir_func void @ReturnPassing4(i128* noalias sret
// HEX: define{{.*}} void @ReturnPassing4(i128* noalias sret
// LANAI: define{{.*}} void @ReturnPassing4(i128* noalias sret
// R600: define{{.*}} void @ReturnPassing4(i128 addrspace(5)* noalias sret
// SPARC: define{{.*}} void @ReturnPassing5(i129* noalias sret
// MIPS64: define{{.*}} void @ReturnPassing5(i129* noalias sret
// MIPS: define{{.*}} void @ReturnPassing5(i129* noalias sret
-// SPIR64: define spir_func void @ReturnPassing5(i129* noalias sret
-// SPIR: define spir_func void @ReturnPassing5(i129* noalias sret
+// SPIR64: define{{.*}} spir_func void @ReturnPassing5(i129* noalias sret
+// SPIR: define{{.*}} spir_func void @ReturnPassing5(i129* noalias sret
// HEX: define{{.*}} void @ReturnPassing5(i129* noalias sret
// LANAI: define{{.*}} void @ReturnPassing5(i129* noalias sret
// R600: define{{.*}} void @ReturnPassing5(i129 addrspace(5)* noalias sret
// RUN: %clang_cc1 -triple x86_64-gnu-linux -fsanitize=array-bounds,enum,float-cast-overflow,integer-divide-by-zero,implicit-unsigned-integer-truncation,implicit-signed-integer-truncation,implicit-integer-sign-change,unsigned-integer-overflow,signed-integer-overflow,shift-base,shift-exponent -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s
-// CHECK: define void @_Z6BoundsRA10_KiU7_ExtIntILi15EEi
+// CHECK: define{{.*}} void @_Z6BoundsRA10_KiU7_ExtIntILi15EEi
void Bounds(const int (&Array)[10], _ExtInt(15) Index) {
int I1 = Array[Index];
// CHECK: %[[SEXT:.+]] = sext i15 %{{.+}} to i64
// CHECK: call void @__ubsan_handle_out_of_bounds
}
-// CHECK: define void @_Z4Enumv
+// CHECK: define{{.*}} void @_Z4Enumv
void Enum() {
enum E1 { e1a = 0, e1b = 127 }
e1;
// CHECK: call void @__ubsan_handle_load_invalid_value_abort
}
-// CHECK: define void @_Z13FloatOverflowfd
+// CHECK: define{{.*}} void @_Z13FloatOverflowfd
void FloatOverflow(float f, double d) {
_ExtInt(10) E = f;
// CHECK: fcmp ogt float %{{.+}}, -5.130000e+02
// CHECK: fcmp olt double %{{.+}}, 6.400000e+01
}
-// CHECK: define void @_Z14UIntTruncationU7_ExtIntILi35EEjjy
+// CHECK: define{{.*}} void @_Z14UIntTruncationU7_ExtIntILi35EEjjy
void UIntTruncation(unsigned _ExtInt(35) E, unsigned int i, unsigned long long ll) {
i = E;
// CHECK: call void @__ubsan_handle_implicit_conversion_abort
}
-// CHECK: define void @_Z13IntTruncationU7_ExtIntILi35EEiU7_ExtIntILi42EEjij
+// CHECK: define{{.*}} void @_Z13IntTruncationU7_ExtIntILi35EEiU7_ExtIntILi42EEjij
void IntTruncation(_ExtInt(35) E, unsigned _ExtInt(42) UE, int i, unsigned j) {
j = E;
// CHECK: call void @__ubsan_handle_implicit_conversion_abort
}
-// CHECK: define void @_Z15SignChangeCheckU7_ExtIntILi39EEjU7_ExtIntILi39EEi
+// CHECK: define{{.*}} void @_Z15SignChangeCheckU7_ExtIntILi39EEjU7_ExtIntILi39EEi
void SignChangeCheck(unsigned _ExtInt(39) UE, _ExtInt(39) E) {
UE = E;
// CHECK: %[[LOADEU:.+]] = load i39
// CHECK: call void @__ubsan_handle_implicit_conversion_abort
}
-// CHECK: define void @_Z9DivByZeroU7_ExtIntILi11EEii
+// CHECK: define{{.*}} void @_Z9DivByZeroU7_ExtIntILi11EEii
void DivByZero(_ExtInt(11) E, int i) {
// Also triggers signed integer overflow.
// TODO:
//-fsanitize=shift: (shift-base, shift-exponent) Shift operators where the amount shifted is greater or equal to the promoted bit-width of the left hand side or less than zero, or where the left hand side is negative. For a signed left shift, also checks for signed overflow in C, and for unsigned overflow in C++. You can use -fsanitize=shift-base or -fsanitize=shift-exponent to check only left-hand side or right-hand side of shift operation, respectively.
-// CHECK: define void @_Z6ShiftsU7_ExtIntILi9EEi
+// CHECK: define{{.*}} void @_Z6ShiftsU7_ExtIntILi9EEi
void Shifts(_ExtInt(9) E) {
E >> E;
// CHECK: %[[EADDR:.+]] = alloca i9
// CHECK: call void @__ubsan_handle_shift_out_of_bounds_abort
}
-// CHECK: define void @_Z21SignedIntegerOverflowU7_ExtIntILi93EEiU7_ExtIntILi4EEiU7_ExtIntILi31EEi
+// CHECK: define{{.*}} void @_Z21SignedIntegerOverflowU7_ExtIntILi93EEiU7_ExtIntILi4EEiU7_ExtIntILi31EEi
void SignedIntegerOverflow(_ExtInt(93) BiggestE,
_ExtInt(4) SmallestE,
_ExtInt(31) JustRightE) {
// CHECK: call void @__ubsan_handle_mul_overflow_abort
}
-// CHECK: define void @_Z23UnsignedIntegerOverflowjU7_ExtIntILi23EEjU7_ExtIntILi35EEj
+// CHECK: define{{.*}} void @_Z23UnsignedIntegerOverflowjU7_ExtIntILi23EEjU7_ExtIntILi35EEj
void UnsignedIntegerOverflow(unsigned u,
unsigned _ExtInt(23) SmallE,
unsigned _ExtInt(35) BigE) {
__attribute__((noinline)) void ni(void) {}
__attribute__((flatten))
-// CHECK: define void @g()
+// CHECK: define{{.*}} void @g()
void g(void) {
// CHECK-NOT: call {{.*}} @f
f();
// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm -o - %s | FileCheck %s
struct { int x; int y[]; } a = { 1, 7, 11 };
-// CHECK: @a = global { i32, [2 x i32] } { i32 1, [2 x i32] [i32 7, i32 11] }
+// CHECK: @a ={{.*}} global { i32, [2 x i32] } { i32 1, [2 x i32] [i32 7, i32 11] }
struct { int x; int y[]; } b = { 1, { 13, 15 } };
-// CHECK: @b = global { i32, [2 x i32] } { i32 1, [2 x i32] [i32 13, i32 15] }
+// CHECK: @b ={{.*}} global { i32, [2 x i32] } { i32 1, [2 x i32] [i32 13, i32 15] }
#pragma float_control(pop)
float fff(float x, float y) {
-// CHECK-LABEL: define float @_Z3fffff{{.*}}
+// CHECK-LABEL: define{{.*}} float @_Z3fffff{{.*}}
// CHECK: entry
#pragma float_control(except, on)
float z;
return z;
}
float check_precise(float x, float y) {
- // CHECK-LABEL: define float @_Z13check_preciseff{{.*}}
+ // CHECK-LABEL: define{{.*}} float @_Z13check_preciseff{{.*}}
float z;
{
#pragma float_control(precise, on)
}
float fma_test2(float a, float b, float c) {
-// CHECK-LABEL define float @_Z9fma_test2fff{{.*}}
+// CHECK-LABEL define{{.*}} float @_Z9fma_test2fff{{.*}}
#pragma float_control(precise, off)
float x = a * b + c;
//CHECK: fmuladd
}
float fma_test1(float a, float b, float c) {
-// CHECK-LABEL define float @_Z9fma_test1fff{{.*}}
+// CHECK-LABEL define{{.*}} float @_Z9fma_test1fff{{.*}}
#pragma float_control(precise, on)
float x = a * b + c;
//CHECK: fmuladd
return add(1.0f, 2.0f);
//CHECK: llvm.experimental.constrained.fadd{{.*}}fpexcept.strict
}
-// CHECK-LABEL define float {{.*}}test_OperatorCall{{.*}}
+// CHECK-LABEL define{{.*}} float {{.*}}test_OperatorCall{{.*}}
#if FENV_ON
#pragma STDC FENV_ACCESS ON
return tmp;
}
-// CHECK: define float @_Z12test_defaultfff(float %a, float %b, float %c) [[FAST_ATTRS:#[0-9]+]]
+// CHECK: define{{.*}} float @_Z12test_defaultfff(float %a, float %b, float %c) [[FAST_ATTRS:#[0-9]+]]
// CHECK: fadd fast float {{%.+}}, {{%.+}}
// CHECK: fadd fast float {{%.+}}, {{%.+}}
return tmp;
}
-// CHECK: define float @_Z22test_precise_on_pragmafff(float %a, float %b, float %c) [[PRECISE_ATTRS:#[0-9]+]]
+// CHECK: define{{.*}} float @_Z22test_precise_on_pragmafff(float %a, float %b, float %c) [[PRECISE_ATTRS:#[0-9]+]]
// CHECK: fadd float {{%.+}}, {{%.+}}
// CHECK: fadd fast float {{%.+}}, {{%.+}}
return tmp;
}
-// CHECK: define float @_Z27test_reassociate_off_pragmafff(float %a, float %b, float %c) [[NOREASSOC_ATTRS:#[0-9]+]]
+// CHECK: define{{.*}} float @_Z27test_reassociate_off_pragmafff(float %a, float %b, float %c) [[NOREASSOC_ATTRS:#[0-9]+]]
// CHECK: fadd nnan ninf nsz arcp contract afn float {{%.+}}, {{%.+}}
// CHECK: fadd fast float {{%.+}}, {{%.+}}
// in this test will need to change.
float fp_precise_1(float a, float b, float c) {
-// CHECK-LABEL: define float @_Z12fp_precise_1fff
+// CHECK-LABEL: define{{.*}} float @_Z12fp_precise_1fff
// CHECK: %[[M:.+]] = tail call float @llvm.experimental.constrained.fmul.f32(float {{.*}}, float {{.*}}, metadata {{.*}})
// CHECK: tail call float @llvm.experimental.constrained.fadd.f32(float %[[M]], float %c, metadata {{.*}})
return a * b + c;
// rounding-warning@* {{overriding currently unsupported rounding mode on this target}}
// exception-warning@* {{overriding currently unsupported use of floating point exceptions on this target}}
float fp_precise_1(float a, float b, float c) {
-// CHECK: define float @_Z12fp_precise_1fff
+// CHECK: define{{.*}} float @_Z12fp_precise_1fff
// CHECK: %[[M:.+]] = fmul float{{.*}}
// CHECK: fadd float %[[M]], %c
return a * b + c;
short s0;
void foo(void) {
- // CHECK-LABEL: define void @foo()
+ // CHECK-LABEL: define{{.*}} void @foo()
// Check unary ops
h0 = s0;
}
-// CHECK-LABEL: define void @testTypeDef(
+// CHECK-LABEL: define{{.*}} void @testTypeDef(
// NATIVE-HALF: call <4 x half> @llvm.experimental.constrained.fadd.v4f16(<4 x half> %{{.*}}, <4 x half> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")
// NOTNATIVE: %[[CONV:.*]] = call <4 x float> @llvm.experimental.constrained.fpext.v4f32.v4f16(<4 x half> %{{.*}}, metadata !"fpexcept.strict")
// NOTNATIVE: %[[CONV1:.*]] = call <4 x float> @llvm.experimental.constrained.fpext.v4f32.v4f16(<4 x half> %{{.*}}, metadata !"fpexcept.strict")
short s0;
void foo(void) {
- // CHECK-LABEL: define void @foo()
+ // CHECK-LABEL: define{{.*}} void @foo()
// Check unary ops
h0 = s0;
}
-// CHECK-LABEL: define void @testTypeDef(
+// CHECK-LABEL: define{{.*}} void @testTypeDef(
// CHECK: %[[CONV:.*]] = fpext <4 x half> %{{.*}} to <4 x float>
// CHECK: %[[CONV1:.*]] = fpext <4 x half> %{{.*}} to <4 x float>
// CHECK: %[[ADD:.*]] = fadd <4 x float> %[[CONV]], %[[CONV1]]
// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm -disable-llvm-passes -Os -o - %s | FileCheck %s
// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm -disable-llvm-passes -Os -std=c99 -o - %s | FileCheck %s
// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -disable-llvm-passes -Os -std=c99 -o - %s | FileCheck %s
-// CHECK: define signext i8 @f0(i32 %x) [[NUW:#[0-9]+]]
-// CHECK: define zeroext i8 @f1(i32 %x) [[NUW]]
-// CHECK: define void @f2(i8 signext %x) [[NUW]]
-// CHECK: define void @f3(i8 zeroext %x) [[NUW]]
-// CHECK: define signext i16 @f4(i32 %x) [[NUW]]
-// CHECK: define zeroext i16 @f5(i32 %x) [[NUW]]
-// CHECK: define void @f6(i16 signext %x) [[NUW]]
-// CHECK: define void @f7(i16 zeroext %x) [[NUW]]
+// CHECK: define{{.*}} signext i8 @f0(i32 %x) [[NUW:#[0-9]+]]
+// CHECK: define{{.*}} zeroext i8 @f1(i32 %x) [[NUW]]
+// CHECK: define{{.*}} void @f2(i8 signext %x) [[NUW]]
+// CHECK: define{{.*}} void @f3(i8 zeroext %x) [[NUW]]
+// CHECK: define{{.*}} signext i16 @f4(i32 %x) [[NUW]]
+// CHECK: define{{.*}} zeroext i16 @f5(i32 %x) [[NUW]]
+// CHECK: define{{.*}} void @f6(i16 signext %x) [[NUW]]
+// CHECK: define{{.*}} void @f7(i16 zeroext %x) [[NUW]]
signed char f0(int x) { return x; }
void f7(unsigned short x) { }
-// CHECK-LABEL: define void @f8()
+// CHECK-LABEL: define{{.*}} void @f8()
// CHECK: [[AI:#[0-9]+]]
// CHECK: {
void __attribute__((always_inline)) f8(void) { }
return arg ? 0 : f10_t();
}
-// CHECK: define void @f13() [[NUW_OS_RN:#[0-9]+]]
+// CHECK: define{{.*}} void @f13() [[NUW_OS_RN:#[0-9]+]]
void f13(void) __attribute__((pure)) __attribute__((const));
void f13(void){}
// <rdar://problem/7102668> [irgen] clang isn't setting the optsize bit on functions
-// CHECK-LABEL: define void @f15
+// CHECK-LABEL: define{{.*}} void @f15
// CHECK: [[NUW]]
// CHECK: {
void f15(void) {
}
// PR5254
-// CHECK-LABEL: define void @f16
+// CHECK-LABEL: define{{.*}} void @f16
// CHECK: [[SR:#[0-9]+]]
// CHECK: {
void __attribute__((force_align_arg_pointer)) f16(void) {
}
// PR11038
-// CHECK-LABEL: define void @f18()
+// CHECK-LABEL: define{{.*}} void @f18()
// CHECK: [[RT:#[0-9]+]]
// CHECK: {
// CHECK: call void @f17()
f17();
}
-// CHECK-LABEL: define void @f19()
+// CHECK-LABEL: define{{.*}} void @f19()
// CHECK: {
// CHECK: call i32 @setjmp(i32* null)
// CHECK: [[RT_CALL]]
setjmp(0);
}
-// CHECK-LABEL: define void @f20()
+// CHECK-LABEL: define{{.*}} void @f20()
// CHECK: {
// CHECK: call i32 @_setjmp(i32* null)
// CHECK: [[RT_CALL]]
int a() {return 1;}
void f0() {}
-// CHECK-LABEL: define void @f0()
+// CHECK-LABEL: define{{.*}} void @f0()
void f1();
void f2(void) {
// CHECK: call void @f1()
f1(1, 2, 3);
}
-// CHECK-LABEL: define void @f1()
+// CHECK-LABEL: define{{.*}} void @f1()
void f1() {}
// CHECK: define {{.*}} @f3{{\(\)|\(.*sret.*\)}}
}
void f7(float f, float g) {
f6(f, g);
-// CHECK: define void @f7(float{{.*}}, float{{.*}})
+// CHECK: define{{.*}} void @f7(float{{.*}}, float{{.*}})
// CHECK: call void @f6(float{{.*}}, float{{.*}})
}
void f8_user(void (*callback)(struct Incomplete));
void f8_test() {
f8_user(&f8_callback);
-// CHECK-LABEL: define void @f8_test()
+// CHECK-LABEL: define{{.*}} void @f8_test()
// CHECK: call void @f8_user({{.*}}* bitcast (void ()* @f8_callback to {{.*}}*))
// CHECK: declare void @f8_user({{.*}}*)
// CHECK: declare void @f8_callback()
int a;
int a = 242;
-// CHECK: @a = global i32 242
+// CHECK: @a ={{.*}} global i32 242
// This should get normal weak linkage.
int c __attribute__((weak))= 0;
-// CHECK: @c = weak global i32 0
+// CHECK: @c = weak{{.*}} global i32 0
// Since this is marked const, it should get weak_odr linkage, since all
// PR6766
-// CHECK: @l = global %struct.K { [6 x i32] [i32 102, i32 111, i32 111, i32 0, i32 0, i32 0], i32 1 }
+// CHECK: @l ={{.*}} global %struct.K { [6 x i32] [i32 102, i32 111, i32 111, i32 0, i32 0, i32 0], i32 1 }
typedef __WCHAR_TYPE__ wchar_t;
struct K {
wchar_t L[6];
} l = { { L"foo" }, 1 };
-// CHECK: @yuv_types = global [4 x [6 x i8]] {{\[}}[6 x i8] c"4:0:0\00", [6 x i8] c"4:2:0\00", [6 x i8] c"4:2:2\00", [6 x i8] c"4:4:4\00"]
+// CHECK: @yuv_types ={{.*}} global [4 x [6 x i8]] {{\[}}[6 x i8] c"4:0:0\00", [6 x i8] c"4:2:0\00", [6 x i8] c"4:2:2\00", [6 x i8] c"4:4:4\00"]
char yuv_types[4][6]= {"4:0:0","4:2:0","4:2:2","4:4:4"};
// This shouldn't be emitted as common because it has an explicit section.
// rdar://7119244
-// CHECK: @b = global i32 0, section "foo"
+// CHECK: @b ={{.*}} global i32 0, section "foo"
int b __attribute__((section("foo")));
void fooull(unsigned long long *ull);
void foold(long double *ld);
-// CHECK-LABEL: define void @testdouble()
+// CHECK-LABEL: define{{.*}} void @testdouble()
// CHECK: alloca double, align 4
void testdouble() {
double d = 2.0;
food(&d);
}
-// CHECK-LABEL: define void @testlonglong()
+// CHECK-LABEL: define{{.*}} void @testlonglong()
// CHECK: alloca i64, align 4
void testlonglong() {
long long ll = 2;
fooll(&ll);
}
-// CHECK-LABEL: define void @testunsignedlonglong()
+// CHECK-LABEL: define{{.*}} void @testunsignedlonglong()
// CHECK: alloca i64, align 4
void testunsignedlonglong() {
unsigned long long ull = 2;
fooull(&ull);
}
-// CHECK-LABEL: define void @testlongdouble()
+// CHECK-LABEL: define{{.*}} void @testlongdouble()
// CHECK: alloca double, align 4
void testlongdouble() {
long double ld = 2.0;
void use(void *);
void test_small() {
- // CHECK-LABEL: define void @test_small()
+ // CHECK-LABEL: define{{.*}} void @test_small()
int a[] = {1, 2, 3, 4};
// CHECK: call void @llvm.memcpy.{{.*}}
use(a);
}
void test_small_same() {
- // CHECK-LABEL: define void @test_small_same()
+ // CHECK-LABEL: define{{.*}} void @test_small_same()
char a[] = {'a', 'a', 'a', 'a'};
// CHECK: call void @llvm.memcpy.{{.*}}
use(a);
}
void test_different() {
- // CHECK-LABEL: define void @test_different()
+ // CHECK-LABEL: define{{.*}} void @test_different()
int a[] = {1, 2, 3, 4, 5, 6, 7, 8, 9};
// CHECK: call void @llvm.memcpy.{{.*}}
use(a);
}
void test_all_zeros() {
- // CHECK-LABEL: define void @test_all_zeros()
+ // CHECK-LABEL: define{{.*}} void @test_all_zeros()
int a[16] = {};
// CHECK: call void @llvm.memset.{{.*}}
use(a);
}
void test_all_a() {
- // CHECK-LABEL: define void @test_all_a()
+ // CHECK-LABEL: define{{.*}} void @test_all_a()
char a[] = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa";
// CHECK: call void @llvm.memcpy.{{.*}}
use(a);
}
void test_most_zeros() {
- // CHECK-LABEL: define void @test_most_zeros()
+ // CHECK-LABEL: define{{.*}} void @test_most_zeros()
int a[16] = {0, 0, 1};
// CHECK: call void @llvm.memset.{{.*}}
// CHECK: store i32 1
}
void test_most_a() {
- // CHECK-LABEL: define void @test_most_a()
+ // CHECK-LABEL: define{{.*}} void @test_most_a()
char a[] = "aaaaazaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa";
// CHECK: call void @llvm.memcpy.{{.*}}
use(a);
}
void test_pointers() {
- // CHECK-LABEL: define void @test_pointers()
+ // CHECK-LABEL: define{{.*}} void @test_pointers()
void *a[] = {&use, &use, &use, &use, &use, &use};
// CHECK: call void @llvm.memset.{{.*}}
// CHECK: store i8*
}
// Constants
-// CHECK-DAG: @g3 = constant i32 10
+// CHECK-DAG: @g3 ={{.*}} constant i32 10
// CHECK-DAG: @f4.g4 = internal constant i32 12
const int g3 = 10;
int f4() {
-// CHECK-DAG: @test7 = global{{.*}}{ i32 0, [4 x i8] c"bar\00" }
+// CHECK-DAG: @test7 ={{.*}} global{{.*}}{ i32 0, [4 x i8] c"bar\00" }
// PR8217
struct a7 {
int b;
struct a7 test7 = { .b = 0, .v = "bar" };
-// CHECK-DAG: @huge_array = global {{.*}} <{ i32 1, i32 0, i32 2, i32 0, i32 3, [999999995 x i32] zeroinitializer }>
+// CHECK-DAG: @huge_array ={{.*}} global {{.*}} <{ i32 1, i32 0, i32 2, i32 0, i32 3, [999999995 x i32] zeroinitializer }>
int huge_array[1000000000] = {1, 0, 2, 0, 3, 0, 0, 0};
-// CHECK-DAG: @huge_struct = global {{.*}} { i32 1, <{ i32, [999999999 x i32] }> <{ i32 2, [999999999 x i32] zeroinitializer }> }
+// CHECK-DAG: @huge_struct ={{.*}} global {{.*}} { i32 1, <{ i32, [999999999 x i32] }> <{ i32 2, [999999999 x i32] zeroinitializer }> }
struct Huge {
int a;
int arr[1000 * 1000 * 1000];
} huge_struct = {1, {2, 0, 0, 0}};
-// CHECK-DAG: @large_array_with_zeroes = constant <{ [21 x i8], [979 x i8] }> <{ [21 x i8] c"abc\01\02\03xyzzy\00\00\00\00\00\00\00\00\00q", [979 x i8] zeroinitializer }>
+// CHECK-DAG: @large_array_with_zeroes ={{.*}} constant <{ [21 x i8], [979 x i8] }> <{ [21 x i8] c"abc\01\02\03xyzzy\00\00\00\00\00\00\00\00\00q", [979 x i8] zeroinitializer }>
const char large_array_with_zeroes[1000] = {
'a', 'b', 'c', 1, 2, 3, 'x', 'y', 'z', 'z', 'y', [20] = 'q'
};
char global;
-// CHECK-DAG: @large_array_with_zeroes_2 = global <{ [10 x i8*], [90 x i8*] }> <{ [10 x i8*] [i8* null, i8* null, i8* null, i8* null, i8* null, i8* null, i8* null, i8* null, i8* null, i8* @global], [90 x i8*] zeroinitializer }>
+// CHECK-DAG: @large_array_with_zeroes_2 ={{.*}} global <{ [10 x i8*], [90 x i8*] }> <{ [10 x i8*] [i8* null, i8* null, i8* null, i8* null, i8* null, i8* null, i8* null, i8* null, i8* null, i8* @global], [90 x i8*] zeroinitializer }>
const void *large_array_with_zeroes_2[100] = {
[9] = &global
};
-// CHECK-DAG: @large_array_with_zeroes_3 = global <{ [10 x i8*], [990 x i8*] }> <{ [10 x i8*] [i8* null, i8* null, i8* null, i8* null, i8* null, i8* null, i8* null, i8* null, i8* null, i8* @global], [990 x i8*] zeroinitializer }>
+// CHECK-DAG: @large_array_with_zeroes_3 ={{.*}} global <{ [10 x i8*], [990 x i8*] }> <{ [10 x i8*] [i8* null, i8* null, i8* null, i8* null, i8* null, i8* null, i8* null, i8* null, i8* null, i8* @global], [990 x i8*] zeroinitializer }>
const void *large_array_with_zeroes_3[1000] = {
[9] = &global
};
// RUN: echo "GNU89 tests:"
// RUN: %clang_cc1 %s -triple i386-unknown-unknown -O1 -disable-llvm-passes -emit-llvm -o - -std=gnu89 | FileCheck %s --check-prefix=CHECK1
// RUN: %clang_cc1 %s -triple i386-unknown-unknown -fexperimental-new-pass-manager -O1 -disable-llvm-passes -emit-llvm -o - -std=gnu89 | FileCheck %s --check-prefix=CHECK1
-// CHECK1-LABEL: define i32 @foo()
-// CHECK1-LABEL: define i32 @bar()
-// CHECK1-LABEL: define void @unreferenced1()
+// CHECK1-LABEL: define{{.*}} i32 @foo()
+// CHECK1-LABEL: define{{.*}} i32 @bar()
+// CHECK1-LABEL: define{{.*}} void @unreferenced1()
// CHECK1-NOT: unreferenced2
-// CHECK1-LABEL: define void @gnu_inline()
-// CHECK1-LABEL: define i32 @test1
-// CHECK1-LABEL: define i32 @test2
-// CHECK1-LABEL: define void @test3()
+// CHECK1-LABEL: define{{.*}} void @gnu_inline()
+// CHECK1-LABEL: define{{.*}} i32 @test1
+// CHECK1-LABEL: define{{.*}} i32 @test2
+// CHECK1-LABEL: define{{.*}} void @test3()
// CHECK1-LABEL: define available_externally i32 @test4
// CHECK1-LABEL: define available_externally i32 @test5
-// CHECK1-LABEL: define i32 @test6
-// CHECK1-LABEL: define void @test7
-// CHECK1: define i{{..}} @strlcpy
+// CHECK1-LABEL: define{{.*}} i32 @test6
+// CHECK1-LABEL: define{{.*}} void @test7
+// CHECK1: define{{.*}} i{{..}} @strlcpy
// CHECK1-NOT: test9
-// CHECK1-LABEL: define void @testA
-// CHECK1-LABEL: define void @testB
-// CHECK1-LABEL: define void @testC
+// CHECK1-LABEL: define{{.*}} void @testA
+// CHECK1-LABEL: define{{.*}} void @testB
+// CHECK1-LABEL: define{{.*}} void @testC
// CHECK1-LABEL: define available_externally i32 @ei()
// CHECK1-LABEL: define available_externally void @gnu_ei_inline()
// RUN: echo "C99 tests:"
// RUN: %clang_cc1 %s -triple i386-unknown-unknown -O1 -disable-llvm-passes -emit-llvm -o - -std=gnu99 | FileCheck %s --check-prefix=CHECK2
// RUN: %clang_cc1 %s -triple i386-unknown-unknown -fexperimental-new-pass-manager -O1 -disable-llvm-passes -emit-llvm -o - -std=gnu99 | FileCheck %s --check-prefix=CHECK2
-// CHECK2-LABEL: define i32 @ei()
-// CHECK2-LABEL: define i32 @bar()
+// CHECK2-LABEL: define{{.*}} i32 @ei()
+// CHECK2-LABEL: define{{.*}} i32 @bar()
// CHECK2-NOT: unreferenced1
-// CHECK2-LABEL: define void @unreferenced2()
-// CHECK2-LABEL: define void @gnu_inline()
-// CHECK2-LABEL: define i32 @test1
-// CHECK2-LABEL: define i32 @test2
-// CHECK2-LABEL: define void @test3
+// CHECK2-LABEL: define{{.*}} void @unreferenced2()
+// CHECK2-LABEL: define{{.*}} void @gnu_inline()
+// CHECK2-LABEL: define{{.*}} i32 @test1
+// CHECK2-LABEL: define{{.*}} i32 @test2
+// CHECK2-LABEL: define{{.*}} void @test3
// CHECK2-LABEL: define available_externally i32 @test4
// CHECK2-LABEL: define available_externally i32 @test5
-// CHECK2-LABEL: define i32 @test6
-// CHECK2-LABEL: define void @test7
+// CHECK2-LABEL: define{{.*}} i32 @test6
+// CHECK2-LABEL: define{{.*}} void @test7
// CHECK2: define available_externally i{{..}} @strlcpy
-// CHECK2-LABEL: define void @test9
-// CHECK2-LABEL: define void @testA
-// CHECK2-LABEL: define void @testB
-// CHECK2-LABEL: define void @testC
+// CHECK2-LABEL: define{{.*}} void @test9
+// CHECK2-LABEL: define{{.*}} void @testA
+// CHECK2-LABEL: define{{.*}} void @testB
+// CHECK2-LABEL: define{{.*}} void @testC
// CHECK2-LABEL: define available_externally i32 @foo()
// CHECK2-LABEL: define available_externally void @gnu_ei_inline()
// RUN: echo "C++ tests:"
// RUN: %clang_cc1 -x c++ %s -triple i386-unknown-unknown -O1 -disable-llvm-passes -emit-llvm -o - -std=c++98 | FileCheck %s --check-prefix=CHECK3
// RUN: %clang_cc1 -x c++ %s -triple i386-unknown-unknown -fexperimental-new-pass-manager -O1 -disable-llvm-passes -emit-llvm -o - -std=c++98 | FileCheck %s --check-prefix=CHECK3
-// CHECK3-LABEL: define i32 @_Z3barv()
+// CHECK3-LABEL: define{{.*}} i32 @_Z3barv()
// CHECK3-LABEL: define linkonce_odr i32 @_Z3foov()
// CHECK3-NOT: unreferenced
// CHECK3-LABEL: define available_externally void @_Z10gnu_inlinev()
// Basic argument/attribute tests for Lanai.
-// CHECK: define void @f0(i32 inreg %i, i32 inreg %j, i64 inreg %k)
+// CHECK: define{{.*}} void @f0(i32 inreg %i, i32 inreg %j, i64 inreg %k)
void f0(int i, long j, long long k) {}
typedef struct {
int aa;
int bb;
} s1;
-// CHECK: define void @f1(i32 inreg %i.coerce0, i32 inreg %i.coerce1)
+// CHECK: define{{.*}} void @f1(i32 inreg %i.coerce0, i32 inreg %i.coerce1)
void f1(s1 i) {}
typedef struct {
int cc;
} s2;
-// CHECK: define void @f2(%struct.s2* noalias sret(%struct.s2) align 4 %agg.result)
+// CHECK: define{{.*}} void @f2(%struct.s2* noalias sret(%struct.s2) align 4 %agg.result)
s2 f2() {
s2 foo;
return foo;
int cc;
int dd;
} s3;
-// CHECK: define void @f3(%struct.s3* noalias sret(%struct.s3) align 4 %agg.result)
+// CHECK: define{{.*}} void @f3(%struct.s3* noalias sret(%struct.s3) align 4 %agg.result)
s3 f3() {
s3 foo;
return foo;
}
-// CHECK: define void @f4(i64 inreg %i)
+// CHECK: define{{.*}} void @f4(i64 inreg %i)
void f4(long long i) {}
-// CHECK: define void @f5(i8 inreg %a, i16 inreg %b)
+// CHECK: define{{.*}} void @f5(i8 inreg %a, i16 inreg %b)
void f5(char a, short b) {}
-// CHECK: define void @f6(i8 inreg %a, i16 inreg %b)
+// CHECK: define{{.*}} void @f6(i8 inreg %a, i16 inreg %b)
void f6(unsigned char a, unsigned short b) {}
enum my_enum {
ENUM3,
};
// Enums should be treated as the underlying i32.
-// CHECK: define void @f7(i32 inreg %a)
+// CHECK: define{{.*}} void @f7(i32 inreg %a)
void f7(enum my_enum a) {}
enum my_big_enum {
ENUM4 = 0xFFFFFFFFFFFFFFFF,
};
// Big enums should be treated as the underlying i64.
-// CHECK: define void @f8(i64 inreg %a)
+// CHECK: define{{.*}} void @f8(i64 inreg %a)
void f8(enum my_big_enum a) {}
union simple_union {
char b;
};
// Unions should be passed inreg.
-// CHECK: define void @f9(i32 inreg %s.coerce)
+// CHECK: define{{.*}} void @f9(i32 inreg %s.coerce)
void f9(union simple_union s) {}
typedef struct {
int b8 : 8;
} bitfield1;
// Bitfields should be passed inreg.
-// CHECK: define void @f10(i32 inreg %bf1.coerce)
+// CHECK: define{{.*}} void @f10(i32 inreg %bf1.coerce)
void f10(bitfield1 bf1) {}
// Basic argument/attribute tests for le32/PNaCl
-// CHECK-LABEL: define void @f0(i32 %i, i32 %j, double %k)
+// CHECK-LABEL: define{{.*}} void @f0(i32 %i, i32 %j, double %k)
void f0(int i, long j, double k) {}
typedef struct {
int bb;
} s1;
// Structs should be passed byval and not split up
-// CHECK-LABEL: define void @f1(%struct.s1* byval(%struct.s1) align 4 %i)
+// CHECK-LABEL: define{{.*}} void @f1(%struct.s1* byval(%struct.s1) align 4 %i)
void f1(s1 i) {}
typedef struct {
int cc;
} s2;
// Structs should be returned sret and not simplified by the frontend
-// CHECK-LABEL: define void @f2(%struct.s2* noalias sret(%struct.s2) align 4 %agg.result)
+// CHECK-LABEL: define{{.*}} void @f2(%struct.s2* noalias sret(%struct.s2) align 4 %agg.result)
s2 f2() {
s2 foo;
return foo;
}
-// CHECK-LABEL: define void @f3(i64 %i)
+// CHECK-LABEL: define{{.*}} void @f3(i64 %i)
void f3(long long i) {}
// i8/i16 should be signext, i32 and higher should not
-// CHECK-LABEL: define void @f4(i8 signext %a, i16 signext %b)
+// CHECK-LABEL: define{{.*}} void @f4(i8 signext %a, i16 signext %b)
void f4(char a, short b) {}
-// CHECK-LABEL: define void @f5(i8 zeroext %a, i16 zeroext %b)
+// CHECK-LABEL: define{{.*}} void @f5(i8 zeroext %a, i16 zeroext %b)
void f5(unsigned char a, unsigned short b) {}
ENUM3,
};
// Enums should be treated as the underlying i32
-// CHECK-LABEL: define void @f6(i32 %a)
+// CHECK-LABEL: define{{.*}} void @f6(i32 %a)
void f6(enum my_enum a) {}
union simple_union {
char b;
};
// Unions should be passed as byval structs
-// CHECK-LABEL: define void @f7(%union.simple_union* byval(%union.simple_union) align 4 %s)
+// CHECK-LABEL: define{{.*}} void @f7(%union.simple_union* byval(%union.simple_union) align 4 %s)
void f7(union simple_union s) {}
typedef struct {
int b8 : 8;
} bitfield1;
// Bitfields should be passed as byval structs
-// CHECK-LABEL: define void @f8(%struct.bitfield1* byval(%struct.bitfield1) align 4 %bf1)
+// CHECK-LABEL: define{{.*}} void @f8(%struct.bitfield1* byval(%struct.bitfield1) align 4 %bf1)
void f8(bitfield1 bf1) {}
double pow(double, double);
long double powl(long double, long double);
-// CHECK-LABEL: define void @test_pow
+// CHECK-LABEL: define{{.*}} void @test_pow
void test_pow(float a0, double a1, long double a2) {
// CHECK: call float @powf
float l0 = powf(a0, a0);
int get_int(va_list *args) {
return va_arg(*args, int);
}
-// CHECK: define i32 @get_int
+// CHECK: define{{.*}} i32 @get_int
// CHECK: [[RESULT:%[a-z_0-9]+]] = va_arg {{.*}}, i32{{$}}
// CHECK: store i32 [[RESULT]], i32* [[LOC:%[a-z_0-9]+]]
// CHECK: [[RESULT2:%[a-z_0-9]+]] = load i32, i32* [[LOC]]
void get_struct(va_list *args) {
dest = va_arg(*args, struct Foo);
}
-// CHECK: define void @get_struct
+// CHECK: define{{.*}} void @get_struct
// CHECK: [[RESULT:%[a-z_0-9]+]] = va_arg {{.*}}, %struct.Foo{{$}}
// CHECK: store %struct.Foo [[RESULT]], %struct.Foo* [[LOC:%[a-z_0-9]+]]
// CHECK: [[LOC2:%[a-z_0-9]+]] = bitcast {{.*}} [[LOC]] to i8*
void skip_struct(va_list *args) {
va_arg(*args, struct Foo);
}
-// CHECK: define void @skip_struct
+// CHECK: define{{.*}} void @skip_struct
// CHECK: va_arg {{.*}}, %struct.Foo{{$}}
// RUN: %clang_cc1 -emit-llvm -o - %s -triple i386-unknown-unknown | FileCheck -check-prefix CHECK-NO %s
// RUN: %clang_cc1 -menable-unsafe-fp-math -emit-llvm -o - %s -triple i386-unknown-unknown | FileCheck -check-prefix CHECK-FAST %s
-// CHECK-YES-LABEL: define void @test_sqrt
-// CHECK-NO-LABEL: define void @test_sqrt
-// CHECK-FAST-LABEL: define void @test_sqrt
+// CHECK-YES-LABEL: define{{.*}} void @test_sqrt
+// CHECK-NO-LABEL: define{{.*}} void @test_sqrt
+// CHECK-FAST-LABEL: define{{.*}} void @test_sqrt
void test_sqrt(float a0, double a1, long double a2) {
// CHECK-YES: call float @sqrtf
// CHECK-NO: call float @llvm.sqrt.f32(float
// CHECK-FAST: declare double @llvm.sqrt.f64(double)
// CHECK-FAST: declare x86_fp80 @llvm.sqrt.f80(x86_fp80)
-// CHECK-YES-LABEL: define void @test_pow
-// CHECK-NO-LABEL: define void @test_pow
+// CHECK-YES-LABEL: define{{.*}} void @test_pow
+// CHECK-NO-LABEL: define{{.*}} void @test_pow
void test_pow(float a0, double a1, long double a2) {
// CHECK-YES: call float @powf
// CHECK-NO: call float @llvm.pow.f32
// CHECK-NO: declare double @llvm.pow.f64(double, double) [[NUW_RNI]]
// CHECK-NO: declare x86_fp80 @llvm.pow.f80(x86_fp80, x86_fp80) [[NUW_RNI]]
-// CHECK-YES-LABEL: define void @test_fma
-// CHECK-NO-LABEL: define void @test_fma
+// CHECK-YES-LABEL: define{{.*}} void @test_fma
+// CHECK-NO-LABEL: define{{.*}} void @test_fma
void test_fma(float a0, double a1, long double a2) {
// CHECK-YES: call float @fmaf
// CHECK-NO: call float @llvm.fma.f32
extern int x;
-// CHECK-LABEL: define i32 @f
+// CHECK-LABEL: define{{.*}} i32 @f
int f() {
int *p = &x;
// CHECK: ret i32 %{{.*}}, !dbg [[DI:![0-9]*]]
extern int f(int);
extern int g(int);
-// CHECK-LABEL: define i32 @test
+// CHECK-LABEL: define{{.*}} i32 @test
int test(int a, int b) {
int res;
int f2(void) { return 43; }
#else
-// CHECK-NO-BC-LABEL: define i32 @g
+// CHECK-NO-BC-LABEL: define{{.*}} i32 @g
// CHECK-NO-BC: ret i32 42
int g(void) {
return f();
}
-// CHECK-NO-BC-LABEL: define i32 @f
-// CHECK-NO-BC2-LABEL: define i32 @f2
+// CHECK-NO-BC-LABEL: define{{.*}} i32 @f
+// CHECK-NO-BC2-LABEL: define{{.*}} i32 @f2
#endif
void __attribute__((far)) foo2 (void) {}
-// CHECK: define void @foo2() [[FAR:#[0-9]+]]
+// CHECK: define{{.*}} void @foo2() [[FAR:#[0-9]+]]
void __attribute__((near)) foo3 (void) { foo1(); foo4(); }
-// CHECK: define void @foo3() [[NEAR:#[0-9]+]]
+// CHECK: define{{.*}} void @foo3() [[NEAR:#[0-9]+]]
// CHECK: declare void @foo1() [[LONGDECL:#[0-9]+]]
// CHECK: declare void @foo4() [[SHORTDECL:#[0-9]+]]
// Android's gcc and llvm use fp128 for long double.
// NaCl uses double format for long double, but still has separate overloads.
void test(long, float, double, long double, long double _Complex) { }
-// A64: define void @_Z4testlfdgCg(i64 %0, float %1, double %2, fp128 %3, { fp128, fp128 }*
-// G64: define void @_Z4testlfdeCe(i64 %0, float %1, double %2, x86_fp80 %3, { x86_fp80, x86_fp80 }*
-// P64: define void @_Z4testlfdgCg(i64 %0, float %1, double %2, ppc_fp128 %3, ppc_fp128 {{.*}}, ppc_fp128
-// A32: define void @_Z4testlfdeCe(i32 %0, float %1, double %2, double %3, { double, double }*
-// G32: define void @_Z4testlfdeCe(i32 %0, float %1, double %2, x86_fp80 %3, { x86_fp80, x86_fp80 }*
-// P32: define void @_Z4testlfdgCg(i32 %0, float %1, double %2, ppc_fp128 %3, { ppc_fp128, ppc_fp128 }*
-// N64: define void @_Z4testlfdeCe(i32 %0, float %1, double %2, double %3, double {{.*}}, double
+// A64: define{{.*}} void @_Z4testlfdgCg(i64 %0, float %1, double %2, fp128 %3, { fp128, fp128 }*
+// G64: define{{.*}} void @_Z4testlfdeCe(i64 %0, float %1, double %2, x86_fp80 %3, { x86_fp80, x86_fp80 }*
+// P64: define{{.*}} void @_Z4testlfdgCg(i64 %0, float %1, double %2, ppc_fp128 %3, ppc_fp128 {{.*}}, ppc_fp128
+// A32: define{{.*}} void @_Z4testlfdeCe(i32 %0, float %1, double %2, double %3, { double, double }*
+// G32: define{{.*}} void @_Z4testlfdeCe(i32 %0, float %1, double %2, x86_fp80 %3, { x86_fp80, x86_fp80 }*
+// P32: define{{.*}} void @_Z4testlfdgCg(i32 %0, float %1, double %2, ppc_fp128 %3, { ppc_fp128, ppc_fp128 }*
+// N64: define{{.*}} void @_Z4testlfdeCe(i32 %0, float %1, double %2, double %3, double {{.*}}, double
int checksize[sizeof(long double) == 8 ? 1 : -1];
int checkalign[__alignof(long double) == 8 ? 1 : -1];
-// CHECK-LABEL: define void @s1(double %a)
+// CHECK-LABEL: define{{.*}} void @s1(double %a)
void s1(long double a) {}
struct st_ld {
int checksize3[sizeof(double) == 8 ? 1 : -1];
int checkalign3[__alignof(double) == 8 ? 1 : -1];
-// CHECK-LABEL: define void @s2(double %a)
+// CHECK-LABEL: define{{.*}} void @s2(double %a)
void s2(double a) {}
struct st_d {
int checksize5[sizeof(long long) == 8 ? 1 : -1];
int checkalign5[__alignof(long long) == 8 ? 1 : -1];
-// CHECK-LABEL: define void @s3(i64 %a)
+// CHECK-LABEL: define{{.*}} void @s3(i64 %a)
void s3(long long a) {}
struct st_ll {
unsigned S1_align = __alignof(struct S1);
unsigned S1_size = sizeof(struct S1);
-// CHECK: @S1_align = global i32 1, align 4
-// CHECK: @S1_size = global i32 1, align 4
+// CHECK: @S1_align ={{.*}} global i32 1, align 4
+// CHECK: @S1_size ={{.*}} global i32 1, align 4
unsigned S1_c_offset = (unsigned) &((struct S1*) 0)->c;
-// CHECK: @S1_c_offset = global i32 0, align 4
+// CHECK: @S1_c_offset ={{.*}} global i32 0, align 4
struct S2{
char c;
unsigned S2_align = __alignof(struct S2);
unsigned S2_size = sizeof(struct S2);
-// CHECK: @S2_align = global i32 4, align 4
-// CHECK: @S2_size = global i32 8, align 4
+// CHECK: @S2_align ={{.*}} global i32 4, align 4
+// CHECK: @S2_size ={{.*}} global i32 8, align 4
unsigned S2_c_offset = (unsigned) &((struct S2*) 0)->c;
unsigned S2_d_offset = (unsigned) &((struct S2*) 0)->d;
unsigned S2_s_offset = (unsigned) &((struct S2*) 0)->s;
unsigned S2_n_offset = (unsigned) &((struct S2*) 0)->n;
-// CHECK: @S2_c_offset = global i32 0, align 4
-// CHECK: @S2_d_offset = global i32 1, align 4
-// CHECK: @S2_s_offset = global i32 2, align 4
-// CHECK: @S2_n_offset = global i32 4, align 4
+// CHECK: @S2_c_offset ={{.*}} global i32 0, align 4
+// CHECK: @S2_d_offset ={{.*}} global i32 1, align 4
+// CHECK: @S2_s_offset ={{.*}} global i32 2, align 4
+// CHECK: @S2_n_offset ={{.*}} global i32 4, align 4
struct S3 {
char c;
unsigned S3_align = __alignof(struct S3);
unsigned S3_size = sizeof(struct S3);
-// CHECK: @S3_align = global i32 2, align 4
-// CHECK: @S3_size = global i32 4, align 4
+// CHECK: @S3_align ={{.*}} global i32 2, align 4
+// CHECK: @S3_size ={{.*}} global i32 4, align 4
unsigned S3_c_offset = (unsigned) &((struct S3*) 0)->c;
unsigned S3_s_offset = (unsigned) &((struct S3*) 0)->s;
-// CHECK: @S3_c_offset = global i32 0, align 4
-// CHECK: @S3_s_offset = global i32 2, align 4
+// CHECK: @S3_c_offset ={{.*}} global i32 0, align 4
+// CHECK: @S3_s_offset ={{.*}} global i32 2, align 4
struct S4 {
char c;
unsigned S4_align = __alignof(struct S4);
unsigned S4_size = sizeof(struct S4);
-// CHECK-ON: @S4_align = global i32 8, align 4
-// CHECK-ON: @S4_size = global i32 24, align 4
-// CHECK-OFF: @S4_align = global i32 4, align 4
-// CHECK-OFF: @S4_size = global i32 16, align 4
+// CHECK-ON: @S4_align ={{.*}} global i32 8, align 4
+// CHECK-ON: @S4_size ={{.*}} global i32 24, align 4
+// CHECK-OFF: @S4_align ={{.*}} global i32 4, align 4
+// CHECK-OFF: @S4_size ={{.*}} global i32 16, align 4
unsigned S4_c_offset = (unsigned) &((struct S4*) 0)->c;
unsigned S4_d_offset = (unsigned) &((struct S4*) 0)->d;
unsigned S4_s_offset = (unsigned) &((struct S4*) 0)->s;
-// CHECK: @S4_c_offset = global i32 0, align 4
-// CHECK-ON: @S4_d_offset = global i32 8, align 4
-// CHECK-ON: @S4_s_offset = global i32 16, align 4
-// CHECK-OFF: @S4_d_offset = global i32 4, align 4
-// CHECK-OFF: @S4_s_offset = global i32 12, align 4
+// CHECK: @S4_c_offset ={{.*}} global i32 0, align 4
+// CHECK-ON: @S4_d_offset ={{.*}} global i32 8, align 4
+// CHECK-ON: @S4_s_offset ={{.*}} global i32 16, align 4
+// CHECK-OFF: @S4_d_offset ={{.*}} global i32 4, align 4
+// CHECK-OFF: @S4_s_offset ={{.*}} global i32 12, align 4
union S5 {
char c;
unsigned S5_align = __alignof(union S5);
unsigned S5_size = sizeof(union S5);
-// CHECK: @S5_align = global i32 4, align 4
-// CHECK: @S5_size = global i32 4, align 4
+// CHECK: @S5_align ={{.*}} global i32 4, align 4
+// CHECK: @S5_size ={{.*}} global i32 4, align 4
unsigned S5_c_offset = (unsigned) &((union S5*) 0)->c;
unsigned S5_s_offset = (unsigned) &((union S5*) 0)->s;
unsigned S5_j_offset = (unsigned) &((union S5*) 0)->j;
-// CHECK: @S5_c_offset = global i32 0, align 4
-// CHECK: @S5_s_offset = global i32 0, align 4
-// CHECK: @S5_j_offset = global i32 0, align 4
+// CHECK: @S5_c_offset ={{.*}} global i32 0, align 4
+// CHECK: @S5_s_offset ={{.*}} global i32 0, align 4
+// CHECK: @S5_j_offset ={{.*}} global i32 0, align 4
union S6 {
char c;
unsigned S6_align = __alignof(union S6);
unsigned S6_size = sizeof(union S6);
-// CHECK-ON: @S6_align = global i32 8, align 4
-// CHECK-ON: @S6_size = global i32 8, align 4
-// CHECK-OFF: @S6_align = global i32 4, align 4
-// CHECK-OFF: @S6_size = global i32 8, align 4
+// CHECK-ON: @S6_align ={{.*}} global i32 8, align 4
+// CHECK-ON: @S6_size ={{.*}} global i32 8, align 4
+// CHECK-OFF: @S6_align ={{.*}} global i32 4, align 4
+// CHECK-OFF: @S6_size ={{.*}} global i32 8, align 4
unsigned S6_c_offset = (unsigned) &((union S6*) 0)->c;
unsigned S6_d_offset = (unsigned) &((union S6*) 0)->d;
-// CHECK: @S6_c_offset = global i32 0, align 4
-// CHECK: @S6_d_offset = global i32 0, align 4
+// CHECK: @S6_c_offset ={{.*}} global i32 0, align 4
+// CHECK: @S6_d_offset ={{.*}} global i32 0, align 4
void __stdcall f1(void) {}
// CHECK: define dso_local x86_stdcallcc void @"\01_f1@0"
// X64: define dso_local void @f1(
-// ELF32: define x86_stdcallcc void @"\01_f1@0"
-// ELF64: define void @f1(
+// ELF32: define{{.*}} x86_stdcallcc void @"\01_f1@0"
+// ELF64: define{{.*}} void @f1(
void __fastcall f2(void) {}
// CHECK: define dso_local x86_fastcallcc void @"\01@f2@0"
// X64: define dso_local void @f2(
-// ELF32: define x86_fastcallcc void @"\01@f2@0"
-// ELF64: define void @f2(
+// ELF32: define{{.*}} x86_fastcallcc void @"\01@f2@0"
+// ELF64: define{{.*}} void @f2(
void __stdcall f3() {}
// CHECK: define dso_local x86_stdcallcc void @"\01_f3@0"
void __vectorcall v1(void) {}
// CHECK: define dso_local x86_vectorcallcc void @"\01v1@@0"(
// X64: define dso_local x86_vectorcallcc void @"\01v1@@0"(
-// ELF32: define x86_vectorcallcc void @"\01v1@@0"(
-// ELF64: define x86_vectorcallcc void @"\01v1@@0"(
+// ELF32: define{{.*}} x86_vectorcallcc void @"\01v1@@0"(
+// ELF64: define{{.*}} x86_vectorcallcc void @"\01v1@@0"(
void __vectorcall v2(char a) {}
// CHECK: define dso_local x86_vectorcallcc void @"\01v2@@4"(
// X64: define dso_local x86_vectorcallcc void @"\01v2@@8"(
-// ELF32: define x86_vectorcallcc void @"\01v2@@4"(
-// ELF64: define x86_vectorcallcc void @"\01v2@@8"(
+// ELF32: define{{.*}} x86_vectorcallcc void @"\01v2@@4"(
+// ELF64: define{{.*}} x86_vectorcallcc void @"\01v2@@8"(
void __vectorcall v3(short a) {}
// CHECK: define dso_local x86_vectorcallcc void @"\01v3@@4"(
struct S1 bar1() { return s1; }
struct S2 bar2() { return s2; }
struct S1 bar3(union U1 u) { return s1; }
-// CHECK: define void @foo1()
-// CHECK: define void @foo2([[UNION2_TYPE]]* noalias sret([[UNION2_TYPE]]) align 4 %{{.+}})
-// CHECK: define i32 @foo3()
-// CHECK: define void @bar1()
-// CHECK: define i32 @bar2()
-// CHECK: define void @bar3()
+// CHECK: define{{.*}} void @foo1()
+// CHECK: define{{.*}} void @foo2([[UNION2_TYPE]]* noalias sret([[UNION2_TYPE]]) align 4 %{{.+}})
+// CHECK: define{{.*}} i32 @foo3()
+// CHECK: define{{.*}} void @bar1()
+// CHECK: define{{.*}} i32 @bar2()
+// CHECK: define{{.*}} void @bar3()
void run() {
union U1 x1 = foo1();
int size = sizeof(x);
// FIXME: the double should have an alignment of 1 on AVR, not 4 or 8.
-// AVR-FP64: @x = global double {{.*}}, align 8
-// AVR-FP64: @size = global i16 8
-// AVR-FP32: @x = global float {{.*}}, align 4
-// AVR-FP32: @size = global i16 4
+// AVR-FP64: @x ={{.*}} global double {{.*}}, align 8
+// AVR-FP64: @size ={{.*}} global i16 8
+// AVR-FP32: @x ={{.*}} global float {{.*}}, align 4
+// AVR-FP32: @size ={{.*}} global i16 4
return __builtin_memcpy(a, b, c);
}
-// CHECK-LABEL: define void @foo
+// CHECK-LABEL: define{{.*}} void @foo
void foo(void *a, const void *b, size_t c) {
// Clang will always _emit_ this as memcpy. LLVM turns it into @llvm.memcpy
// later on if optimizations are enabled.
}
void *memcpy(void *, const void *, unsigned);
-// CHECK-LABEL: define void @_Z1av
+// CHECK-LABEL: define{{.*}} void @_Z1av
void a() { (void)memcpy; }
// CHECK-NOT: nobuiltin
void __attribute__((micromips)) foo (void) {}
-// CHECK: define void @foo() [[MICROMIPS:#[0-9]+]]
+// CHECK: define{{.*}} void @foo() [[MICROMIPS:#[0-9]+]]
void __attribute__((nomicromips)) nofoo (void) {}
-// CHECK: define void @nofoo() [[NOMICROMIPS:#[0-9]+]]
+// CHECK: define{{.*}} void @nofoo() [[NOMICROMIPS:#[0-9]+]]
// CHECK: attributes [[MICROMIPS]] = { noinline nounwind {{.*}} "micromips" {{.*}} }
// CHECK: attributes [[NOMICROMIPS]] = { noinline nounwind {{.*}} "nomicromips" {{.*}} }
void __stdcall f2(void);
void __thiscall f3(void);
void __fastcall f4(void) {
-// CHECK-LABEL: define x86_fastcallcc void @f4()
+// CHECK-LABEL: define{{.*}} x86_fastcallcc void @f4()
f1();
// CHECK: call x86_fastcallcc void @f1()
}
void __stdcall f5(void) {
-// CHECK-LABEL: define x86_stdcallcc void @f5()
+// CHECK-LABEL: define{{.*}} x86_stdcallcc void @f5()
f2();
// CHECK: call x86_stdcallcc void @f2()
}
void __thiscall f6(void) {
-// CHECK-LABEL: define x86_thiscallcc void @f6()
+// CHECK-LABEL: define{{.*}} x86_thiscallcc void @f6()
f3();
// CHECK: call x86_thiscallcc void @f3()
}
void __vectorcall f61(void) {
-// CHECK-LABEL: define x86_vectorcallcc void @f61()
+// CHECK-LABEL: define{{.*}} x86_vectorcallcc void @f61()
f3();
// CHECK: call x86_thiscallcc void @f3()
}
// PR12535
void __fastcall f9(int x, int y) {};
-// WIN: define x86_fastcallcc void @f9({{.*}})
+// WIN: define{{.*}} x86_fastcallcc void @f9({{.*}})
void __fastcall f10(int x, ...) {};
-// WIN: define void @f10({{.*}})
+// WIN: define{{.*}} void @f10({{.*}})
void __stdcall f11(int x, ...) {};
-// WIN: define void @f11({{.*}})
+// WIN: define{{.*}} void @f11({{.*}})
extern void foo2(S0);
-// O32-LABEL: define void @foo1(i32 inreg %a0.coerce0, i32 inreg %a0.coerce1, i32 inreg %a0.coerce2)
-// N64-LABEL: define void @foo1(i64 inreg %a0.coerce0, i32 inreg %a0.coerce1)
+// O32-LABEL: define{{.*}} void @foo1(i32 inreg %a0.coerce0, i32 inreg %a0.coerce1, i32 inreg %a0.coerce2)
+// N64-LABEL: define{{.*}} void @foo1(i64 inreg %a0.coerce0, i32 inreg %a0.coerce1)
void foo1(S0 a0) {
foo2(a0);
void __attribute__ ((interrupt("vector=sw0")))
isr_sw0 (void)
{
- // CHECK: define void @isr_sw0() [[SW0:#[0-9]+]]
+ // CHECK: define{{.*}} void @isr_sw0() [[SW0:#[0-9]+]]
}
void __attribute__ ((interrupt("vector=sw1")))
isr_sw1 (void)
{
- // CHECK: define void @isr_sw1() [[SW1:#[0-9]+]]
+ // CHECK: define{{.*}} void @isr_sw1() [[SW1:#[0-9]+]]
}
void __attribute__ ((interrupt("vector=hw0")))
isr_hw0 (void)
{
- // CHECK: define void @isr_hw0() [[HW0:#[0-9]+]]
+ // CHECK: define{{.*}} void @isr_hw0() [[HW0:#[0-9]+]]
}
void __attribute__ ((interrupt("vector=hw1")))
isr_hw1 (void)
{
- // CHECK: define void @isr_hw1() [[HW1:#[0-9]+]]
+ // CHECK: define{{.*}} void @isr_hw1() [[HW1:#[0-9]+]]
}
void __attribute__ ((interrupt("vector=hw2")))
isr_hw2 (void)
{
- // CHECK: define void @isr_hw2() [[HW2:#[0-9]+]]
+ // CHECK: define{{.*}} void @isr_hw2() [[HW2:#[0-9]+]]
}
void __attribute__ ((interrupt("vector=hw3")))
isr_hw3 (void)
{
- // CHECK: define void @isr_hw3() [[HW3:#[0-9]+]]
+ // CHECK: define{{.*}} void @isr_hw3() [[HW3:#[0-9]+]]
}
void __attribute__ ((interrupt("vector=hw4")))
isr_hw4 (void)
{
- // CHECK: define void @isr_hw4() [[HW4:#[0-9]+]]
+ // CHECK: define{{.*}} void @isr_hw4() [[HW4:#[0-9]+]]
}
void __attribute__ ((interrupt("vector=hw5")))
isr_hw5 (void)
{
- // CHECK: define void @isr_hw5() [[HW5:#[0-9]+]]
+ // CHECK: define{{.*}} void @isr_hw5() [[HW5:#[0-9]+]]
}
void __attribute__ ((interrupt))
isr_eic (void)
{
- // CHECK: define void @isr_eic() [[EIC:#[0-9]+]]
+ // CHECK: define{{.*}} void @isr_eic() [[EIC:#[0-9]+]]
}
// CHECK: attributes [[SW0]] = { {{.*}} "interrupt"="sw0" {{.*}} }
// CHECK: attributes [[SW1]] = { {{.*}} "interrupt"="sw1" {{.*}} }
return foo(&data);
}
-// CHECK-LABEL: define void @bar()
+// CHECK-LABEL: define{{.*}} void @bar()
// CHECK: call void @foo(i8* %{{[0-9]+}})
// CHECK: declare void @foo(i8*)
return v;
}
-// O32-LABEL: define i32 @test_i32(i8*{{.*}} %fmt, ...)
-// N32-LABEL: define signext i32 @test_i32(i8*{{.*}} %fmt, ...)
-// N64-LABEL: define signext i32 @test_i32(i8*{{.*}} %fmt, ...)
+// O32-LABEL: define{{.*}} i32 @test_i32(i8*{{.*}} %fmt, ...)
+// N32-LABEL: define{{.*}} signext i32 @test_i32(i8*{{.*}} %fmt, ...)
+// N64-LABEL: define{{.*}} signext i32 @test_i32(i8*{{.*}} %fmt, ...)
//
// O32: %va = alloca i8*, align [[$PTRALIGN:4]]
// N32: %va = alloca i8*, align [[$PTRALIGN:4]]
return v;
}
-// ALL-LABEL: define i64 @test_i64(i8*{{.*}} %fmt, ...)
+// ALL-LABEL: define{{.*}} i64 @test_i64(i8*{{.*}} %fmt, ...)
//
// ALL: %va = alloca i8*, align [[$PTRALIGN]]
// ALL: [[VA:%.+]] = bitcast i8** %va to i8*
return v;
}
-// ALL-LABEL: define i8* @test_ptr(i8*{{.*}} %fmt, ...)
+// ALL-LABEL: define{{.*}} i8* @test_ptr(i8*{{.*}} %fmt, ...)
//
// ALL: %va = alloca i8*, align [[$PTRALIGN]]
// ALL: [[V:%.*]] = alloca i8*, align [[$PTRALIGN]]
return v[0];
}
-// O32-LABEL: define i32 @test_v4i32(i8*{{.*}} %fmt, ...)
-// N32-LABEL: define signext i32 @test_v4i32(i8*{{.*}} %fmt, ...)
-// N64-LABEL: define signext i32 @test_v4i32(i8*{{.*}} %fmt, ...)
+// O32-LABEL: define{{.*}} i32 @test_v4i32(i8*{{.*}} %fmt, ...)
+// N32-LABEL: define{{.*}} signext i32 @test_v4i32(i8*{{.*}} %fmt, ...)
+// N64-LABEL: define{{.*}} signext i32 @test_v4i32(i8*{{.*}} %fmt, ...)
//
// ALL: %va = alloca i8*, align [[$PTRALIGN]]
// ALL: [[V:%.+]] = alloca <4 x i32>, align 16
typedef float v4sf __attribute__ ((__vector_size__ (16)));
typedef int v4i32 __attribute__ ((__vector_size__ (16)));
-// O32: define void @test_v4sf(i32 inreg %a1.coerce0, i32 inreg %a1.coerce1, i32 inreg %a1.coerce2, i32 inreg %a1.coerce3, i32 signext %a2, i32 %0, i32 inreg %a3.coerce0, i32 inreg %a3.coerce1, i32 inreg %a3.coerce2, i32 inreg %a3.coerce3) local_unnamed_addr [[NUW:#[0-9]+]]
+// O32: define{{.*}} void @test_v4sf(i32 inreg %a1.coerce0, i32 inreg %a1.coerce1, i32 inreg %a1.coerce2, i32 inreg %a1.coerce3, i32 signext %a2, i32 %0, i32 inreg %a3.coerce0, i32 inreg %a3.coerce1, i32 inreg %a3.coerce2, i32 inreg %a3.coerce3) local_unnamed_addr [[NUW:#[0-9]+]]
// O32: declare i32 @test_v4sf_2(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 signext, i32, i32 inreg, i32 inreg, i32 inreg, i32 inreg)
-// N64: define void @test_v4sf(i64 inreg %a1.coerce0, i64 inreg %a1.coerce1, i32 signext %a2, i64 %0, i64 inreg %a3.coerce0, i64 inreg %a3.coerce1) local_unnamed_addr [[NUW:#[0-9]+]]
+// N64: define{{.*}} void @test_v4sf(i64 inreg %a1.coerce0, i64 inreg %a1.coerce1, i32 signext %a2, i64 %0, i64 inreg %a3.coerce0, i64 inreg %a3.coerce1) local_unnamed_addr [[NUW:#[0-9]+]]
// N64: declare signext i32 @test_v4sf_2(i64 inreg, i64 inreg, i32 signext, i64, i64 inreg, i64 inreg)
extern test_v4sf_2(v4sf, int, v4sf);
void test_v4sf(v4sf a1, int a2, v4sf a3) {
test_v4sf_2(a3, a2, a1);
}
-// O32: define void @test_v4i32(i32 inreg %a1.coerce0, i32 inreg %a1.coerce1, i32 inreg %a1.coerce2, i32 inreg %a1.coerce3, i32 signext %a2, i32 %0, i32 inreg %a3.coerce0, i32 inreg %a3.coerce1, i32 inreg %a3.coerce2, i32 inreg %a3.coerce3) local_unnamed_addr [[NUW]]
+// O32: define{{.*}} void @test_v4i32(i32 inreg %a1.coerce0, i32 inreg %a1.coerce1, i32 inreg %a1.coerce2, i32 inreg %a1.coerce3, i32 signext %a2, i32 %0, i32 inreg %a3.coerce0, i32 inreg %a3.coerce1, i32 inreg %a3.coerce2, i32 inreg %a3.coerce3) local_unnamed_addr [[NUW]]
// O32: declare i32 @test_v4i32_2(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 signext, i32, i32 inreg, i32 inreg, i32 inreg, i32 inreg)
-// N64: define void @test_v4i32(i64 inreg %a1.coerce0, i64 inreg %a1.coerce1, i32 signext %a2, i64 %0, i64 inreg %a3.coerce0, i64 inreg %a3.coerce1) local_unnamed_addr [[NUW]]
+// N64: define{{.*}} void @test_v4i32(i64 inreg %a1.coerce0, i64 inreg %a1.coerce1, i32 signext %a2, i64 %0, i64 inreg %a3.coerce0, i64 inreg %a3.coerce1) local_unnamed_addr [[NUW]]
// N64: declare signext i32 @test_v4i32_2(i64 inreg, i64 inreg, i32 signext, i64, i64 inreg, i64 inreg)
extern test_v4i32_2(v4i32, int, v4i32);
void test_v4i32(v4i32 a1, int a2, v4i32 a3) {
// RUN: %clang_cc1 -triple mipsisa64r6-unknown-linux-gnuabi64 -S -emit-llvm -o - %s | FileCheck -check-prefix=N64 %s
// RUN: %clang_cc1 -triple mipsisa64r6el-unknown-linux-gnuabi64 -S -emit-llvm -o - %s | FileCheck -check-prefix=N64 %s
-// O32: define void @fn28(%struct.T2* noalias sret(%struct.T2) align 1 %agg.result, i8 signext %arg0)
-// N32: define void @fn28(i8 signext %arg0)
-// N64: define void @fn28(i8 signext %arg0)
+// O32: define{{.*}} void @fn28(%struct.T2* noalias sret(%struct.T2) align 1 %agg.result, i8 signext %arg0)
+// N32: define{{.*}} void @fn28(i8 signext %arg0)
+// N64: define{{.*}} void @fn28(i8 signext %arg0)
typedef struct T2 { } T2;
T2 T2_retval;
}
-// CHECK: define void @foo() [[MIPS16:#[0-9]+]]
+// CHECK: define{{.*}} void @foo() [[MIPS16:#[0-9]+]]
void __attribute__((nomips16)) nofoo (void) {
}
-// CHECK: define void @nofoo() [[NOMIPS16:#[0-9]+]]
+// CHECK: define{{.*}} void @nofoo() [[NOMIPS16:#[0-9]+]]
// CHECK: attributes [[MIPS16]] = { noinline nounwind {{.*}} "mips16" {{.*}} }
extern D1 gd1;
extern D2 gd2;
-// CHECK: define inreg { i64, i64 } @_Z4foo1v()
+// CHECK: define{{.*}} inreg { i64, i64 } @_Z4foo1v()
D0 foo1(void) {
return gd0;
}
-// CHECK: define inreg { double, float } @_Z4foo2v()
+// CHECK: define{{.*}} inreg { double, float } @_Z4foo2v()
D1 foo2(void) {
return gd1;
}
-// CHECK-LABEL: define void @_Z4foo32D2(i64 inreg %a0.coerce0, double inreg %a0.coerce1)
+// CHECK-LABEL: define{{.*}} void @_Z4foo32D2(i64 inreg %a0.coerce0, double inreg %a0.coerce1)
void foo3(D2 a0) {
gd2 = a0;
}
-// CHECK-LABEL: define void @_Z4foo42D0(i64 inreg %a0.coerce0, i64 inreg %a0.coerce1)
+// CHECK-LABEL: define{{.*}} void @_Z4foo42D0(i64 inreg %a0.coerce0, i64 inreg %a0.coerce1)
void foo4(D0 a0) {
gd0 = a0;
}
// Insert padding to ensure arguments of type S0 are aligned to 16-byte boundaries.
-// N64-LABEL: define void @foo1(i32 signext %a0, i64 %0, double inreg %a1.coerce0, i64 inreg %a1.coerce1, i64 inreg %a1.coerce2, i64 inreg %a1.coerce3, double inreg %a2.coerce0, i64 inreg %a2.coerce1, i64 inreg %a2.coerce2, i64 inreg %a2.coerce3, i32 signext %b, i64 %1, double inreg %a3.coerce0, i64 inreg %a3.coerce1, i64 inreg %a3.coerce2, i64 inreg %a3.coerce3)
+// N64-LABEL: define{{.*}} void @foo1(i32 signext %a0, i64 %0, double inreg %a1.coerce0, i64 inreg %a1.coerce1, i64 inreg %a1.coerce2, i64 inreg %a1.coerce3, double inreg %a2.coerce0, i64 inreg %a2.coerce1, i64 inreg %a2.coerce2, i64 inreg %a2.coerce3, i32 signext %b, i64 %1, double inreg %a3.coerce0, i64 inreg %a3.coerce1, i64 inreg %a3.coerce2, i64 inreg %a3.coerce3)
// N64: tail call void @foo2(i32 signext 1, i32 signext 2, i32 signext %a0, i64 undef, double inreg %a1.coerce0, i64 inreg %a1.coerce1, i64 inreg %a1.coerce2, i64 inreg %a1.coerce3, double inreg %a2.coerce0, i64 inreg %a2.coerce1, i64 inreg %a2.coerce2, i64 inreg %a2.coerce3, i32 signext 3, i64 undef, double inreg %a3.coerce0, i64 inreg %a3.coerce1, i64 inreg %a3.coerce2, i64 inreg %a3.coerce3)
// N64: declare void @foo2(i32 signext, i32 signext, i32 signext, i64, double inreg, i64 inreg, i64 inreg, i64 inreg, double inreg, i64 inreg, i64 inreg, i64 inreg, i32 signext, i64, double inreg, i64 inreg, i64 inreg, i64 inreg)
// Insert padding before long double argument.
//
-// N64-LABEL: define void @foo3(i32 signext %a0, i64 %0, fp128 %a1)
+// N64-LABEL: define{{.*}} void @foo3(i32 signext %a0, i64 %0, fp128 %a1)
// N64: tail call void @foo4(i32 signext 1, i32 signext 2, i32 signext %a0, i64 undef, fp128 %a1)
// N64: declare void @foo4(i32 signext, i32 signext, i32 signext, i64, fp128)
// Insert padding after hidden argument.
//
-// N64-LABEL: define void @foo5(%struct.S0* noalias sret(%struct.S0) align 16 %agg.result, i64 %0, fp128 %a0)
+// N64-LABEL: define{{.*}} void @foo5(%struct.S0* noalias sret(%struct.S0) align 16 %agg.result, i64 %0, fp128 %a0)
// N64: call void @foo6(%struct.S0* sret(%struct.S0) align 16 %agg.result, i32 signext 1, i32 signext 2, i64 undef, fp128 %a0)
// N64: declare void @foo6(%struct.S0* sret(%struct.S0) align 16, i32 signext, i32 signext, i64, fp128)
// Do not insert padding if ABI is O32.
//
-// O32-LABEL: define void @foo7(float %a0, double %a1)
+// O32-LABEL: define{{.*}} void @foo7(float %a0, double %a1)
// O32: declare void @foo8(float, double)
extern void foo8(float, double);
foo8(a0 + 1.0f, a1 + 2.0);
}
-// O32-LABEL: define void @foo9()
+// O32-LABEL: define{{.*}} void @foo9()
// O32: declare void @foo10(i32 signext, i32
typedef struct __attribute__((aligned(16))) {
void baz(int arg);
-// CHECK: define x86_stdcallcc void @foo(i32 %arg) [[NUW:#[0-9]+]]
+// CHECK: define{{.*}} x86_stdcallcc void @foo(i32 %arg) [[NUW:#[0-9]+]]
void foo(int arg) {
// CHECK: call x86_stdcallcc i32 bitcast (i32 (...)* @bar to i32 (i32)*)(
bar(arg);
// CHECK: declare x86_stdcallcc void @baz(i32)
void qux(int arg, ...) { }
-// CHECK: define void @qux(i32 %arg, ...)
+// CHECK: define{{.*}} void @qux(i32 %arg, ...)
void quux(int a1, int a2, int a3) {
qux(a1, a2, a3);
}
-// CHECK-LABEL: define x86_stdcallcc void @quux
+// CHECK-LABEL: define{{.*}} x86_stdcallcc void @quux
// CHECK: call void (i32, ...) @qux
// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
void __attribute__((ms_abi)) f1(void);
void __attribute__((sysv_abi)) f2(void);
void f3(void) {
- // FREEBSD-LABEL: define void @f3()
+ // FREEBSD-LABEL: define{{.*}} void @f3()
// WIN64-LABEL: define dso_local void @f3()
f1();
// FREEBSD: call win64cc void @f1()
// Win64 ABI varargs
void __attribute__((ms_abi)) f4(int a, ...) {
- // FREEBSD-LABEL: define win64cc void @f4
+ // FREEBSD-LABEL: define{{.*}} win64cc void @f4
// WIN64-LABEL: define dso_local void @f4
__builtin_ms_va_list ap;
__builtin_ms_va_start(ap, a);
// Verify that using a Win64 va_list from a System V function works.
void __attribute__((sysv_abi)) f6(__builtin_ms_va_list ap) {
- // FREEBSD-LABEL: define void @f6
+ // FREEBSD-LABEL: define{{.*}} void @f6
// FREEBSD: store i8* %ap, i8** %[[AP:.*]]
// WIN64-LABEL: define dso_local x86_64_sysvcc void @f6
// WIN64: store i8* %ap, i8** %[[AP:.*]]
__attribute__((ms_abi)) struct i128 f7(struct i128 a) {
// WIN64: define dso_local void @f7(%struct.i128* noalias sret(%struct.i128) align 8 %agg.result, %struct.i128* %a)
- // FREEBSD: define win64cc void @f7(%struct.i128* noalias sret(%struct.i128) align 8 %agg.result, %struct.i128* %a)
+ // FREEBSD: define{{.*}} win64cc void @f7(%struct.i128* noalias sret(%struct.i128) align 8 %agg.result, %struct.i128* %a)
return a;
}
void __attribute__((ms_abi)) f1(void);
void f2(void);
void f3(void) {
- // LINUX-LABEL: define void @f3()
+ // LINUX-LABEL: define{{.*}} void @f3()
// WIN64-LABEL: define dso_local void @f3()
f1();
// LINUX: call win64cc void @f1()
// Win64 ABI varargs
void __attribute__((ms_abi)) f4(int a, ...) {
- // LINUX-LABEL: define win64cc void @f4
+ // LINUX-LABEL: define{{.*}} win64cc void @f4
// WIN64-LABEL: define dso_local void @f4
__builtin_ms_va_list ap;
__builtin_ms_va_start(ap, a);
// RUN: %clang_cc1 -triple x86_64-linux-gnu -S -emit-llvm -o - %s | FileCheck %s
// UNSUPPORTED: ppc64be
-// CHECK-LABEL: define void @foo_no_mempcy() #0
+// CHECK-LABEL: define{{.*}} void @foo_no_mempcy() #0
extern "C" void foo_no_mempcy() __attribute__((no_builtin("memcpy"))) {}
-// CHECK-LABEL: define void @foo_no_mempcy_twice() #0
+// CHECK-LABEL: define{{.*}} void @foo_no_mempcy_twice() #0
extern "C" void foo_no_mempcy_twice() __attribute__((no_builtin("memcpy"))) __attribute__((no_builtin("memcpy"))) {}
-// CHECK-LABEL: define void @foo_no_builtins() #1
+// CHECK-LABEL: define{{.*}} void @foo_no_builtins() #1
extern "C" void foo_no_builtins() __attribute__((no_builtin)) {}
-// CHECK-LABEL: define void @foo_no_mempcy_memset() #2
+// CHECK-LABEL: define{{.*}} void @foo_no_mempcy_memset() #2
extern "C" void foo_no_mempcy_memset() __attribute__((no_builtin("memset", "memcpy"))) {}
-// CHECK-LABEL: define void @separate_attrs() #2
+// CHECK-LABEL: define{{.*}} void @separate_attrs() #2
extern "C" void separate_attrs() __attribute__((no_builtin("memset"))) __attribute__((no_builtin("memcpy"))) {}
-// CHECK-LABEL: define void @separate_attrs_ordering() #2
+// CHECK-LABEL: define{{.*}} void @separate_attrs_ordering() #2
extern "C" void separate_attrs_ordering() __attribute__((no_builtin("memcpy"))) __attribute__((no_builtin("memset"))) {}
struct A {
virtual ~B();
};
-// CHECK-LABEL: define void @call_a_foo(%struct.A* %a) #3
+// CHECK-LABEL: define{{.*}} void @call_a_foo(%struct.A* %a) #3
extern "C" void call_a_foo(A *a) {
// CHECK: %call = call i32 %2(%struct.A* {{[^,]*}} %0)
a->foo(); // virtual call is not annotated
}
-// CHECK-LABEL: define void @call_b_foo(%struct.B* %b) #3
+// CHECK-LABEL: define{{.*}} void @call_b_foo(%struct.B* %b) #3
extern "C" void call_b_foo(B *b) {
// CHECK: %call = call i32 %2(%struct.B* {{[^,]*}} %0)
b->foo(); // virtual call is not annotated
}
-// CHECK-LABEL: define void @call_foo_no_mempcy() #3
+// CHECK-LABEL: define{{.*}} void @call_foo_no_mempcy() #3
extern "C" void call_foo_no_mempcy() {
// CHECK: call void @foo_no_mempcy() #7
foo_no_mempcy(); // call gets annotated with "no-builtin-memcpy"
// RUN: | FileCheck %s
// Makes sure there is no !dbg between function attributes and '{'.
-// CHECK-LABEL: define void @foo{{.*}} #{{[0-9]+}} {
+// CHECK-LABEL: define{{.*}} void @foo{{.*}} #{{[0-9]+}} {
// CHECK-NOT: ret {{.*}}!dbg
__attribute__((nodebug)) void foo(int *a) {
*a = 1;
// This was a problem in Sema, but only shows up as noinline missing
// in CodeGen.
-// CHECK: define i32 @_Z15noduplicatedfuni(i32 %a) [[NI:#[0-9]+]]
+// CHECK: define{{.*}} i32 @_Z15noduplicatedfuni(i32 %a) [[NI:#[0-9]+]]
int noduplicatedfun [[clang::noduplicate]] (int a) {
} float4_t;
float4_t my_function(void) {
-// CHECK-LABEL: define %struct.float4_s @my_function
+// CHECK-LABEL: define{{.*}} %struct.float4_s @my_function
float4_t t;
return t;
};
unsigned int z;
};
-// CHECK: @align0 = local_unnamed_addr global i32 1
+// CHECK: @align0 ={{.*}} local_unnamed_addr global i32 1
int align0 = __alignof(struct s0);
-// CHECK: @align1 = local_unnamed_addr global i32 4
+// CHECK: @align1 ={{.*}} local_unnamed_addr global i32 4
int align1 = __alignof(struct s1);
-// CHECK: @align2 = local_unnamed_addr global i32 1
+// CHECK: @align2 ={{.*}} local_unnamed_addr global i32 1
int align2 = __alignof(struct s2);
-// CHECK: @align3 = local_unnamed_addr global i32 1
+// CHECK: @align3 ={{.*}} local_unnamed_addr global i32 1
int align3 = __alignof(struct s3);
-// CHECK: @align0_x = local_unnamed_addr global i32 1
+// CHECK: @align0_x ={{.*}} local_unnamed_addr global i32 1
int align0_x = __alignof(((struct s0*) 0)->x);
//
-// CHECK: @align1_x = local_unnamed_addr global i32 1
+// CHECK: @align1_x ={{.*}} local_unnamed_addr global i32 1
int align1_x = __alignof(((struct s1*) 0)->x);
-// CHECK: @align2_x = local_unnamed_addr global i32 1
+// CHECK: @align2_x ={{.*}} local_unnamed_addr global i32 1
int align2_x = __alignof(((struct s2*) 0)->x);
-// CHECK: @align3_x = local_unnamed_addr global i32 1
+// CHECK: @align3_x ={{.*}} local_unnamed_addr global i32 1
int align3_x = __alignof(((struct s3*) 0)->x);
-// CHECK: @align0_x0 = local_unnamed_addr global i32 4
+// CHECK: @align0_x0 ={{.*}} local_unnamed_addr global i32 4
int align0_x0 = __alignof(((struct s0*) 0)->x[0]);
-// CHECK: @align1_x0 = local_unnamed_addr global i32 4
+// CHECK: @align1_x0 ={{.*}} local_unnamed_addr global i32 4
int align1_x0 = __alignof(((struct s1*) 0)->x[0]);
-// CHECK: @align2_x0 = local_unnamed_addr global i32 4
+// CHECK: @align2_x0 ={{.*}} local_unnamed_addr global i32 4
int align2_x0 = __alignof(((struct s2*) 0)->x[0]);
-// CHECK: @align3_x0 = local_unnamed_addr global i32 4
+// CHECK: @align3_x0 ={{.*}} local_unnamed_addr global i32 4
int align3_x0 = __alignof(((struct s3*) 0)->x[0]);
-// CHECK-LABEL: define i32 @f0_a
+// CHECK-LABEL: define{{.*}} i32 @f0_a
// CHECK: load i32, i32* %{{.*}}, align 1
// CHECK: }
-// CHECK-LABEL: define i32 @f0_b
+// CHECK-LABEL: define{{.*}} i32 @f0_b
// CHECK: load i32, i32* %{{.*}}, align 4
// CHECK: }
int f0_a(struct s0 *a) {
// Note that we are incompatible with GCC on this example.
//
-// CHECK-LABEL: define i32 @f1_a
+// CHECK-LABEL: define{{.*}} i32 @f1_a
// CHECK: load i32, i32* %{{.*}}, align 4
// CHECK: }
-// CHECK-LABEL: define i32 @f1_b
+// CHECK-LABEL: define{{.*}} i32 @f1_b
// CHECK: load i32, i32* %{{.*}}, align 4
// CHECK: }
// Note that we are incompatible with GCC on this example.
//
-// CHECK-LABEL: define i32 @f1_c
+// CHECK-LABEL: define{{.*}} i32 @f1_c
// CHECK: load i32, i32* %{{.*}}, align 4
// CHECK: }
-// CHECK-LABEL: define i32 @f1_d
+// CHECK-LABEL: define{{.*}} i32 @f1_d
// CHECK: load i32, i32* %{{.*}}, align 4
// CHECK: }
int f1_a(struct s1 *a) {
return a->z;
}
-// CHECK-LABEL: define i32 @f2_a
+// CHECK-LABEL: define{{.*}} i32 @f2_a
// CHECK: load i32, i32* %{{.*}}, align 1
// CHECK: }
-// CHECK-LABEL: define i32 @f2_b
+// CHECK-LABEL: define{{.*}} i32 @f2_b
// CHECK: load i32, i32* %{{.*}}, align 4
// CHECK: }
-// CHECK-LABEL: define i32 @f2_c
+// CHECK-LABEL: define{{.*}} i32 @f2_c
// CHECK: load i32, i32* %{{.*}}, align 1
// CHECK: }
-// CHECK-LABEL: define i32 @f2_d
+// CHECK-LABEL: define{{.*}} i32 @f2_d
// CHECK: load i32, i32* %{{.*}}, align 1
// CHECK: }
int f2_a(struct s2 *a) {
return a->z;
}
-// CHECK-LABEL: define i32 @f3_a
+// CHECK-LABEL: define{{.*}} i32 @f3_a
// CHECK: load i32, i32* %{{.*}}, align 1
// CHECK: }
-// CHECK-LABEL: define i32 @f3_b
+// CHECK-LABEL: define{{.*}} i32 @f3_b
// CHECK: load i32, i32* %{{.*}}, align 4
// CHECK: }
-// CHECK-LABEL: define i32 @f3_c
+// CHECK-LABEL: define{{.*}} i32 @f3_c
// CHECK: load i32, i32* %{{.*}}, align 1
// CHECK: }
-// CHECK-LABEL: define i32 @f3_d
+// CHECK-LABEL: define{{.*}} i32 @f3_d
// CHECK: load i32, i32* %{{.*}}, align 1
// CHECK: }
int f3_a(struct s3 *a) {
// Verify we don't claim things are overaligned.
//
-// CHECK-LABEL: define double @f4
+// CHECK-LABEL: define{{.*}} double @f4
// CHECK: load double, double* {{.*}}, align 8
// CHECK: }
extern double g4[5] __attribute__((aligned(16)));
int y __attribute__((packed));
};
-// CHECK-GLOBAL: @s0_align_x = global i32 4
+// CHECK-GLOBAL: @s0_align_x ={{.*}} global i32 4
-// CHECK-GLOBAL: @s0_align_y = global i32 1
+// CHECK-GLOBAL: @s0_align_y ={{.*}} global i32 1
-// CHECK-GLOBAL: @s0_align = global i32 4
+// CHECK-GLOBAL: @s0_align ={{.*}} global i32 4
int s0_align_x = __alignof(((struct s0*)0)->x);
int s0_align_y = __alignof(((struct s0*)0)->y);
int s0_align = __alignof(struct s0);
-// CHECK-FUNCTIONS-LABEL: define i32 @s0_load_x
+// CHECK-FUNCTIONS-LABEL: define{{.*}} i32 @s0_load_x
// CHECK-FUNCTIONS: [[s0_load_x:%.*]] = load i32, i32* {{.*}}, align 4
// CHECK-FUNCTIONS: ret i32 [[s0_load_x]]
int s0_load_x(struct s0 *a) { return a->x; }
// has changed in llvm-gcc recently, previously both x and y would be loaded
// with align 1 (in 2363.1 at least).
//
-// CHECK-FUNCTIONS-LABEL: define i32 @s0_load_y
+// CHECK-FUNCTIONS-LABEL: define{{.*}} i32 @s0_load_y
// CHECK-FUNCTIONS: [[s0_load_y:%.*]] = load i32, i32* {{.*}}, align 4
// CHECK-FUNCTIONS: ret i32 [[s0_load_y]]
int s0_load_y(struct s0 *a) { return a->y; }
-// CHECK-FUNCTIONS-LABEL: define void @s0_copy
+// CHECK-FUNCTIONS-LABEL: define{{.*}} void @s0_copy
// CHECK-FUNCTIONS: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 {{.*}}, i8* align 4 {{.*}}, i64 8, i1 false)
void s0_copy(struct s0 *a, struct s0 *b) { *b = *a; }
int y;
} __attribute__((packed));
-// CHECK-GLOBAL: @s1_align_x = global i32 1
-// CHECK-GLOBAL: @s1_align_y = global i32 1
-// CHECK-GLOBAL: @s1_align = global i32 1
+// CHECK-GLOBAL: @s1_align_x ={{.*}} global i32 1
+// CHECK-GLOBAL: @s1_align_y ={{.*}} global i32 1
+// CHECK-GLOBAL: @s1_align ={{.*}} global i32 1
int s1_align_x = __alignof(((struct s1*)0)->x);
int s1_align_y = __alignof(((struct s1*)0)->y);
int s1_align = __alignof(struct s1);
-// CHECK-FUNCTIONS-LABEL: define i32 @s1_load_x
+// CHECK-FUNCTIONS-LABEL: define{{.*}} i32 @s1_load_x
// CHECK-FUNCTIONS: [[s1_load_x:%.*]] = load i32, i32* {{.*}}, align 1
// CHECK-FUNCTIONS: ret i32 [[s1_load_x]]
int s1_load_x(struct s1 *a) { return a->x; }
-// CHECK-FUNCTIONS-LABEL: define i32 @s1_load_y
+// CHECK-FUNCTIONS-LABEL: define{{.*}} i32 @s1_load_y
// CHECK-FUNCTIONS: [[s1_load_y:%.*]] = load i32, i32* {{.*}}, align 1
// CHECK-FUNCTIONS: ret i32 [[s1_load_y]]
int s1_load_y(struct s1 *a) { return a->y; }
-// CHECK-FUNCTIONS-LABEL: define void @s1_copy
+// CHECK-FUNCTIONS-LABEL: define{{.*}} void @s1_copy
// CHECK-FUNCTIONS: call void @llvm.memcpy.p0i8.p0i8.i64(i8* {{.*}}, i8* {{.*}}, i64 8, i1 false)
void s1_copy(struct s1 *a, struct s1 *b) { *b = *a; }
};
#pragma pack(pop)
-// CHECK-GLOBAL: @s2_align_x = global i32 2
-// CHECK-GLOBAL: @s2_align_y = global i32 2
-// CHECK-GLOBAL: @s2_align = global i32 2
+// CHECK-GLOBAL: @s2_align_x ={{.*}} global i32 2
+// CHECK-GLOBAL: @s2_align_y ={{.*}} global i32 2
+// CHECK-GLOBAL: @s2_align ={{.*}} global i32 2
int s2_align_x = __alignof(((struct s2*)0)->x);
int s2_align_y = __alignof(((struct s2*)0)->y);
int s2_align = __alignof(struct s2);
-// CHECK-FUNCTIONS-LABEL: define i32 @s2_load_x
+// CHECK-FUNCTIONS-LABEL: define{{.*}} i32 @s2_load_x
// CHECK-FUNCTIONS: [[s2_load_y:%.*]] = load i32, i32* {{.*}}, align 2
// CHECK-FUNCTIONS: ret i32 [[s2_load_y]]
int s2_load_x(struct s2 *a) { return a->x; }
-// CHECK-FUNCTIONS-LABEL: define i32 @s2_load_y
+// CHECK-FUNCTIONS-LABEL: define{{.*}} i32 @s2_load_y
// CHECK-FUNCTIONS: [[s2_load_y:%.*]] = load i32, i32* {{.*}}, align 2
// CHECK-FUNCTIONS: ret i32 [[s2_load_y]]
int s2_load_y(struct s2 *a) { return a->y; }
-// CHECK-FUNCTIONS-LABEL: define void @s2_copy
+// CHECK-FUNCTIONS-LABEL: define{{.*}} void @s2_copy
// CHECK-FUNCTIONS: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 2 {{.*}}, i8* align 2 {{.*}}, i64 8, i1 false)
void s2_copy(struct s2 *a, struct s2 *b) { *b = *a; }
short aShort;
int anInt;
};
-// CHECK-GLOBAL: @s3_1 = global i32 1
+// CHECK-GLOBAL: @s3_1 ={{.*}} global i32 1
int s3_1 = __alignof(((struct s3*) 0)->anInt);
-// CHECK-FUNCTIONS-LABEL: define i32 @test3(
+// CHECK-FUNCTIONS-LABEL: define{{.*}} i32 @test3(
int test3(struct s3 *ptr) {
// CHECK-FUNCTIONS: [[PTR:%.*]] = getelementptr inbounds {{%.*}}, {{%.*}}* {{%.*}}, i32 0, i32 1
// CHECK-FUNCTIONS-NEXT: load i32, i32* [[PTR]], align 2
} q;
};
-// CHECK: @l3 = global %struct.P3 { %struct.Q3 { %struct.R1 { i32 1, i32 2, i32 3 }, %struct.R2 { i32 0, i32 10, i32 0 } } }
+// CHECK: @l3 ={{.*}} global %struct.P3 { %struct.Q3 { %struct.R1 { i32 1, i32 2, i32 3 }, %struct.R2 { i32 0, i32 10, i32 0 } } }
struct P3 l3 = {
(struct Q3){ { 1, 2, 3 }, { 4, 5, 6 } },
.q.r2 = { 7, 8, 9 },
};
// A three-pass test
-// CHECK: @l5 = global %struct.P5 { i32 1, %struct.Q5 { i32 6, i32 9, i32 8 }, i32 5 }
+// CHECK: @l5 ={{.*}} global %struct.P5 { i32 1, %struct.Q5 { i32 6, i32 9, i32 8 }, i32 5 }
struct P5 l5 = { 1, { 2, 3, 4 }, 5,
.q = { 6, 7, 8 },
.q.b = 9 };
int f;
};
-// WITH_NOALIAS: define void @take(%struct.Foo* noalias %arg)
-// NO_NOALIAS: define void @take(%struct.Foo* %arg)
+// WITH_NOALIAS: define{{.*}} void @take(%struct.Foo* noalias %arg)
+// NO_NOALIAS: define{{.*}} void @take(%struct.Foo* %arg)
void take(struct Foo arg) {}
// RUN: %clang_cc1 -triple aarch64 -emit-llvm %s -o - | FileCheck %s
// RUN: %clang_cc1 -triple x86_64 -emit-llvm %s -fpatchable-function-entry=1 -o - | FileCheck --check-prefixes=CHECK,OPT %s
-// CHECK: define void @f0() #0
+// CHECK: define{{.*}} void @f0() #0
__attribute__((patchable_function_entry(0))) void f0() {}
-// CHECK: define void @f00() #0
+// CHECK: define{{.*}} void @f00() #0
__attribute__((patchable_function_entry(0, 0))) void f00() {}
-// CHECK: define void @f2() #1
+// CHECK: define{{.*}} void @f2() #1
__attribute__((patchable_function_entry(2))) void f2() {}
-// CHECK: define void @f20() #1
+// CHECK: define{{.*}} void @f20() #1
__attribute__((patchable_function_entry(2, 0))) void f20() {}
-// CHECK: define void @f20decl() #1
+// CHECK: define{{.*}} void @f20decl() #1
__attribute__((patchable_function_entry(2, 0))) void f20decl();
void f20decl() {}
-// CHECK: define void @f44() #2
+// CHECK: define{{.*}} void @f44() #2
__attribute__((patchable_function_entry(4, 4))) void f44() {}
-// CHECK: define void @f52() #3
+// CHECK: define{{.*}} void @f52() #3
__attribute__((patchable_function_entry(5, 2))) void f52() {}
-// OPT: define void @f() #4
+// OPT: define{{.*}} void @f() #4
void f() {}
/// No need to emit "patchable-function-entry"="0"
_Complex float foo1(_Complex float x) {
return x;
-// CHECK-LABEL: define { float, float } @foo1(float %x.{{.*}}, float %x.{{.*}}) #0 {
+// CHECK-LABEL: define{{.*}} { float, float } @foo1(float %x.{{.*}}, float %x.{{.*}}) #0 {
// CHECK: ret { float, float }
-// PPC32LNX-LABEL: define void @foo1({ float, float }* noalias sret({ float, float }) align 4 %agg.result, { float, float }* byval({ float, float }) align 4 %x) #0 {
+// PPC32LNX-LABEL: define{{.*}} void @foo1({ float, float }* noalias sret({ float, float }) align 4 %agg.result, { float, float }* byval({ float, float }) align 4 %x) #0 {
// PPC32LNX: [[RETREAL:%.*]] = getelementptr inbounds { float, float }, { float, float }* %agg.result, i32 0, i32 0
// PPC32LNX-NEXT: [[RETIMAG:%.*]] = getelementptr inbounds { float, float }, { float, float }* %agg.result, i32 0, i32 1
// PPC32LNX-NEXT: store float %{{.*}}, float* [[RETREAL]], align 4
_Complex double foo2(_Complex double x) {
return x;
-// CHECK-LABEL: define { double, double } @foo2(double %x.{{.*}}, double %x.{{.*}}) #0 {
+// CHECK-LABEL: define{{.*}} { double, double } @foo2(double %x.{{.*}}, double %x.{{.*}}) #0 {
// CHECK: ret { double, double }
-// PPC32LNX-LABEL: define void @foo2({ double, double }* noalias sret({ double, double }) align 8 %agg.result, { double, double }* byval({ double, double }) align 8 %x) #0 {
+// PPC32LNX-LABEL: define{{.*}} void @foo2({ double, double }* noalias sret({ double, double }) align 8 %agg.result, { double, double }* byval({ double, double }) align 8 %x) #0 {
// PPC32LNX: [[RETREAL:%.*]] = getelementptr inbounds { double, double }, { double, double }* %agg.result, i32 0, i32 0
// PPC32LNX-NEXT: [[RETIMAG:%.*]] = getelementptr inbounds { double, double }, { double, double }* %agg.result, i32 0, i32 1
// PPC32LNX-NEXT: store double %{{.*}}, double* [[RETREAL]], align 8
_Complex long double foo3(_Complex long double x) {
return x;
-// CHECK-NOLDBL128-LABEL: define { double, double } @foo3(double %x.{{.*}}, double %x.{{.*}}) #0 {
+// CHECK-NOLDBL128-LABEL: define{{.*}} { double, double } @foo3(double %x.{{.*}}, double %x.{{.*}}) #0 {
// CHECK-NOLDBL128: ret { double, double }
-// CHECK-LDBL128-LABEL: define { ppc_fp128, ppc_fp128 } @foo3(ppc_fp128 %x.{{.*}}, ppc_fp128 %x.{{.*}}) #0 {
+// CHECK-LDBL128-LABEL: define{{.*}} { ppc_fp128, ppc_fp128 } @foo3(ppc_fp128 %x.{{.*}}, ppc_fp128 %x.{{.*}}) #0 {
// CHECK-LDBL128: ret { ppc_fp128, ppc_fp128 }
-// PPC32LNX-LABEL: define void @foo3({ ppc_fp128, ppc_fp128 }* noalias sret({ ppc_fp128, ppc_fp128 }) align 16 %agg.result, { ppc_fp128, ppc_fp128 }* byval({ ppc_fp128, ppc_fp128 }) align 16 %x) #0 {
+// PPC32LNX-LABEL: define{{.*}} void @foo3({ ppc_fp128, ppc_fp128 }* noalias sret({ ppc_fp128, ppc_fp128 }) align 16 %agg.result, { ppc_fp128, ppc_fp128 }* byval({ ppc_fp128, ppc_fp128 }) align 16 %x) #0 {
// PPC32LNX: [[RETREAL:%.*]] = getelementptr inbounds { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %agg.result, i32 0, i32 0
// PPC32LNX-NEXT: [[RETIMAG:%.*]] = getelementptr inbounds { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %agg.result, i32 0, i32 1
// PPC32LNX-NEXT: store ppc_fp128 %{{.*}}, ppc_fp128* [[RETREAL]], align 16
#include <stdarg.h>
int va_list_size = sizeof(va_list);
-// SVR4-CHECK: va_list_size = global i32 12, align 4
+// SVR4-CHECK: va_list_size ={{.*}} global i32 12, align 4
int long_double_size = sizeof(long double);
-// SVR4-CHECK: long_double_size = global i32 8, align 4
+// SVR4-CHECK: long_double_size ={{.*}} global i32 8, align 4
int double_size = sizeof(double);
-// SVR4-CHECK: double_size = global i32 8, align 4
+// SVR4-CHECK: double_size ={{.*}} global i32 8, align 4
// RUN: -o - %s | FileCheck %s -check-prefix=CHECK-LE
class agg_float_class { float a; };
-// CHECK-BE-LABEL: define void @_Z20pass_agg_float_class15agg_float_class(%class.agg_float_class* noalias sret(%class.agg_float_class) align 4 %{{.*}}, float inreg %{{.*}})
-// CHECK-LE-LABEL: define [1 x float] @_Z20pass_agg_float_class15agg_float_class(float inreg %{{.*}})
+// CHECK-BE-LABEL: define{{.*}} void @_Z20pass_agg_float_class15agg_float_class(%class.agg_float_class* noalias sret(%class.agg_float_class) align 4 %{{.*}}, float inreg %{{.*}})
+// CHECK-LE-LABEL: define{{.*}} [1 x float] @_Z20pass_agg_float_class15agg_float_class(float inreg %{{.*}})
agg_float_class pass_agg_float_class(agg_float_class arg) { return arg; }
class agg_double_class { double a; };
-// CHECK-BE-LABEL: define void @_Z21pass_agg_double_class16agg_double_class(%class.agg_double_class* noalias sret(%class.agg_double_class) align 8 %{{.*}}, double inreg %{{.*}})
-// CHECK-LE-LABEL: define [1 x double] @_Z21pass_agg_double_class16agg_double_class(double inreg %{{.*}})
+// CHECK-BE-LABEL: define{{.*}} void @_Z21pass_agg_double_class16agg_double_class(%class.agg_double_class* noalias sret(%class.agg_double_class) align 8 %{{.*}}, double inreg %{{.*}})
+// CHECK-LE-LABEL: define{{.*}} [1 x double] @_Z21pass_agg_double_class16agg_double_class(double inreg %{{.*}})
agg_double_class pass_agg_double_class(agg_double_class arg) { return arg; }
struct agg_float_cpp { float a; int : 0; };
-// CHECK-BE-LABEL: define void @_Z18pass_agg_float_cpp13agg_float_cpp(%struct.agg_float_cpp* noalias sret(%struct.agg_float_cpp) align 4 %{{.*}}, float inreg %{{.*}})
-// CHECK-LE-LABEL: define [1 x float] @_Z18pass_agg_float_cpp13agg_float_cpp(float inreg %{{.*}})
+// CHECK-BE-LABEL: define{{.*}} void @_Z18pass_agg_float_cpp13agg_float_cpp(%struct.agg_float_cpp* noalias sret(%struct.agg_float_cpp) align 4 %{{.*}}, float inreg %{{.*}})
+// CHECK-LE-LABEL: define{{.*}} [1 x float] @_Z18pass_agg_float_cpp13agg_float_cpp(float inreg %{{.*}})
agg_float_cpp pass_agg_float_cpp(agg_float_cpp arg) { return arg; }
struct empty { };
struct agg_nofloat_empty { float a; empty dummy; };
-// CHECK-BE-LABEL: define void @_Z22pass_agg_nofloat_empty17agg_nofloat_empty(%struct.agg_nofloat_empty* noalias sret(%struct.agg_nofloat_empty) align 4 %{{.*}}, i64 %{{.*}})
-// CHECK-LE-LABEL: define i64 @_Z22pass_agg_nofloat_empty17agg_nofloat_empty(i64 %{{.*}})
+// CHECK-BE-LABEL: define{{.*}} void @_Z22pass_agg_nofloat_empty17agg_nofloat_empty(%struct.agg_nofloat_empty* noalias sret(%struct.agg_nofloat_empty) align 4 %{{.*}}, i64 %{{.*}})
+// CHECK-LE-LABEL: define{{.*}} i64 @_Z22pass_agg_nofloat_empty17agg_nofloat_empty(i64 %{{.*}})
agg_nofloat_empty pass_agg_nofloat_empty(agg_nofloat_empty arg) { return arg; }
struct agg_float_empty { float a; [[no_unique_address]] empty dummy; };
-// CHECK-BE-LABEL: define void @_Z20pass_agg_float_empty15agg_float_empty(%struct.agg_float_empty* noalias sret(%struct.agg_float_empty) align 4 %{{.*}}, float inreg %{{.*}})
-// CHECK-LE-LABEL: define [1 x float] @_Z20pass_agg_float_empty15agg_float_empty(float inreg %{{.*}})
+// CHECK-BE-LABEL: define{{.*}} void @_Z20pass_agg_float_empty15agg_float_empty(%struct.agg_float_empty* noalias sret(%struct.agg_float_empty) align 4 %{{.*}}, float inreg %{{.*}})
+// CHECK-LE-LABEL: define{{.*}} [1 x float] @_Z20pass_agg_float_empty15agg_float_empty(float inreg %{{.*}})
agg_float_empty pass_agg_float_empty(agg_float_empty arg) { return arg; }
struct agg_nofloat_emptyarray { float a; [[no_unique_address]] empty dummy[3]; };
-// CHECK-BE-LABEL: define void @_Z27pass_agg_nofloat_emptyarray22agg_nofloat_emptyarray(%struct.agg_nofloat_emptyarray* noalias sret(%struct.agg_nofloat_emptyarray) align 4 %{{.*}}, i64 %{{.*}})
-// CHECK-LE-LABEL: define i64 @_Z27pass_agg_nofloat_emptyarray22agg_nofloat_emptyarray(i64 %{{.*}})
+// CHECK-BE-LABEL: define{{.*}} void @_Z27pass_agg_nofloat_emptyarray22agg_nofloat_emptyarray(%struct.agg_nofloat_emptyarray* noalias sret(%struct.agg_nofloat_emptyarray) align 4 %{{.*}}, i64 %{{.*}})
+// CHECK-LE-LABEL: define{{.*}} i64 @_Z27pass_agg_nofloat_emptyarray22agg_nofloat_emptyarray(i64 %{{.*}})
agg_nofloat_emptyarray pass_agg_nofloat_emptyarray(agg_nofloat_emptyarray arg) { return arg; }
struct noemptybase { empty dummy; };
struct agg_nofloat_emptybase : noemptybase { float a; };
-// CHECK-BE-LABEL: define void @_Z26pass_agg_nofloat_emptybase21agg_nofloat_emptybase(%struct.agg_nofloat_emptybase* noalias sret(%struct.agg_nofloat_emptybase) align 4 %{{.*}}, i64 %{{.*}})
-// CHECK-LE-LABEL: define i64 @_Z26pass_agg_nofloat_emptybase21agg_nofloat_emptybase(i64 %{{.*}})
+// CHECK-BE-LABEL: define{{.*}} void @_Z26pass_agg_nofloat_emptybase21agg_nofloat_emptybase(%struct.agg_nofloat_emptybase* noalias sret(%struct.agg_nofloat_emptybase) align 4 %{{.*}}, i64 %{{.*}})
+// CHECK-LE-LABEL: define{{.*}} i64 @_Z26pass_agg_nofloat_emptybase21agg_nofloat_emptybase(i64 %{{.*}})
agg_nofloat_emptybase pass_agg_nofloat_emptybase(agg_nofloat_emptybase arg) { return arg; }
struct emptybase { [[no_unique_address]] empty dummy; };
struct agg_float_emptybase : emptybase { float a; };
-// CHECK-BE-LABEL: define void @_Z24pass_agg_float_emptybase19agg_float_emptybase(%struct.agg_float_emptybase* noalias sret(%struct.agg_float_emptybase) align 4 %{{.*}}, float inreg %{{.*}})
-// CHECK-LE-LABEL: define [1 x float] @_Z24pass_agg_float_emptybase19agg_float_emptybase(float inreg %{{.*}})
+// CHECK-BE-LABEL: define{{.*}} void @_Z24pass_agg_float_emptybase19agg_float_emptybase(%struct.agg_float_emptybase* noalias sret(%struct.agg_float_emptybase) align 4 %{{.*}}, float inreg %{{.*}})
+// CHECK-LE-LABEL: define{{.*}} [1 x float] @_Z24pass_agg_float_emptybase19agg_float_emptybase(float inreg %{{.*}})
agg_float_emptybase pass_agg_float_emptybase(agg_float_emptybase arg) { return arg; }
struct noemptybasearray { [[no_unique_address]] empty dummy[3]; };
struct agg_nofloat_emptybasearray : noemptybasearray { float a; };
-// CHECK-BE-LABEL: define void @_Z31pass_agg_nofloat_emptybasearray26agg_nofloat_emptybasearray(%struct.agg_nofloat_emptybasearray* noalias sret(%struct.agg_nofloat_emptybasearray) align 4 %{{.*}}, i64 %{{.*}})
-// CHECK-LE-LABEL: define i64 @_Z31pass_agg_nofloat_emptybasearray26agg_nofloat_emptybasearray(i64 %{{.*}})
+// CHECK-BE-LABEL: define{{.*}} void @_Z31pass_agg_nofloat_emptybasearray26agg_nofloat_emptybasearray(%struct.agg_nofloat_emptybasearray* noalias sret(%struct.agg_nofloat_emptybasearray) align 4 %{{.*}}, i64 %{{.*}})
+// CHECK-LE-LABEL: define{{.*}} i64 @_Z31pass_agg_nofloat_emptybasearray26agg_nofloat_emptybasearray(i64 %{{.*}})
agg_nofloat_emptybasearray pass_agg_nofloat_emptybasearray(agg_nofloat_emptybasearray arg) { return arg; }
// CHECK-BE: call void @_Z24pass_agg_float_emptybase19agg_float_emptybase(%struct.agg_float_emptybase* sret(%struct.agg_float_emptybase) align 4 %{{.*}}, float inreg %{{.*}})
int test(long double x) { return __builtin_signbitl(x); }
-// CHECK-LABEL: define signext i32 @test(ppc_fp128 %x)
+// CHECK-LABEL: define{{.*}} signext i32 @test(ppc_fp128 %x)
// CHECK: bitcast ppc_fp128 %{{.*}} to i128
// CHECK: trunc i128 %{{.*}} to i64
// CHECK: icmp slt i64 %{{.*}}, 0
char c[9];
} Nine;
-// CHECK-AIX-LABEL: define void @ret0(%struct.Zero* noalias sret(%struct.Zero) {{[^,]*}})
-// CHECK-SVR4-LABEL: define void @ret0()
+// CHECK-AIX-LABEL: define{{.*}} void @ret0(%struct.Zero* noalias sret(%struct.Zero) {{[^,]*}})
+// CHECK-SVR4-LABEL: define{{.*}} void @ret0()
Zero ret0(void) { return (Zero){}; }
-// CHECK-AIX-LABEL: define void @ret1(%struct.One* noalias sret(%struct.One) {{[^,]*}})
-// CHECK-SVR4-LABEL: define i8 @ret1()
+// CHECK-AIX-LABEL: define{{.*}} void @ret1(%struct.One* noalias sret(%struct.One) {{[^,]*}})
+// CHECK-SVR4-LABEL: define{{.*}} i8 @ret1()
One ret1(void) { return (One){'a'}; }
-// CHECK-AIX-LABEL: define void @ret2(%struct.Two* noalias sret(%struct.Two) {{[^,]*}})
-// CHECK-SVR4-LABEL: define i16 @ret2()
+// CHECK-AIX-LABEL: define{{.*}} void @ret2(%struct.Two* noalias sret(%struct.Two) {{[^,]*}})
+// CHECK-SVR4-LABEL: define{{.*}} i16 @ret2()
Two ret2(void) { return (Two){123}; }
-// CHECK-AIX-LABEL: define void @ret3(%struct.Three* noalias sret(%struct.Three) {{[^,]*}})
-// CHECK-SVR4-LABEL: define i24 @ret3()
+// CHECK-AIX-LABEL: define{{.*}} void @ret3(%struct.Three* noalias sret(%struct.Three) {{[^,]*}})
+// CHECK-SVR4-LABEL: define{{.*}} i24 @ret3()
Three ret3(void) { return (Three){"abc"}; }
-// CHECK-AIX-LABEL: define void @ret4(%struct.Four* noalias sret(%struct.Four) {{[^,]*}})
-// CHECK-SVR4-LABEL: define i32 @ret4()
+// CHECK-AIX-LABEL: define{{.*}} void @ret4(%struct.Four* noalias sret(%struct.Four) {{[^,]*}})
+// CHECK-SVR4-LABEL: define{{.*}} i32 @ret4()
Four ret4(void) { return (Four){0.4}; }
-// CHECK-AIX-LABEL: define void @ret5(%struct.Five* noalias sret(%struct.Five) {{[^,]*}})
-// CHECK-SVR4-LABEL: define i40 @ret5()
+// CHECK-AIX-LABEL: define{{.*}} void @ret5(%struct.Five* noalias sret(%struct.Five) {{[^,]*}})
+// CHECK-SVR4-LABEL: define{{.*}} i40 @ret5()
Five ret5(void) { return (Five){"abcde"}; }
-// CHECK-AIX-LABEL: define void @ret6(%struct.Six* noalias sret(%struct.Six) {{[^,]*}})
-// CHECK-SVR4-LABEL: define i48 @ret6()
+// CHECK-AIX-LABEL: define{{.*}} void @ret6(%struct.Six* noalias sret(%struct.Six) {{[^,]*}})
+// CHECK-SVR4-LABEL: define{{.*}} i48 @ret6()
Six ret6(void) { return (Six){12, 34, 56}; }
-// CHECK-AIX-LABEL: define void @ret7(%struct.Seven* noalias sret(%struct.Seven) {{[^,]*}})
-// CHECK-SVR4-LABEL: define i56 @ret7()
+// CHECK-AIX-LABEL: define{{.*}} void @ret7(%struct.Seven* noalias sret(%struct.Seven) {{[^,]*}})
+// CHECK-SVR4-LABEL: define{{.*}} i56 @ret7()
Seven ret7(void) { return (Seven){"abcdefg"}; }
-// CHECK-AIX-LABEL: define void @ret8(%struct.Eight* noalias sret(%struct.Eight) {{[^,]*}})
-// CHECK-SVR4-LABEL: define i64 @ret8()
+// CHECK-AIX-LABEL: define{{.*}} void @ret8(%struct.Eight* noalias sret(%struct.Eight) {{[^,]*}})
+// CHECK-SVR4-LABEL: define{{.*}} i64 @ret8()
Eight ret8(void) { return (Eight){123, 'a'}; }
-// CHECK-AIX-LABEL: define void @ret9(%struct.Nine* noalias sret(%struct.Nine) {{[^,]*}})
-// CHECK-SVR4-LABEL: define void @ret9(%struct.Nine* noalias sret(%struct.Nine) {{[^,]*}})
+// CHECK-AIX-LABEL: define{{.*}} void @ret9(%struct.Nine* noalias sret(%struct.Nine) {{[^,]*}})
+// CHECK-SVR4-LABEL: define{{.*}} void @ret9(%struct.Nine* noalias sret(%struct.Nine) {{[^,]*}})
Nine ret9(void) { return (Nine){"abcdefghi"}; }
return __builtin_dwarf_sp_column();
}
-// CHECK-LABEL: define i32 @test()
+// CHECK-LABEL: define{{.*}} i32 @test()
// CHECK: store i8 4, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i32 0, i32 0), align 1
// CHECK-NEXT: store i8 4, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i32 0, i32 1), align 1
// CHECK-NEXT: store i8 4, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i32 0, i32 2), align 1
struct test6 { int x[17]; } __attribute__((aligned (16)));
struct test7 { int x[17]; } __attribute__((aligned (32)));
-// CHECK: define void @test1(i32 signext %x, i64 %y.coerce)
+// CHECK: define{{.*}} void @test1(i32 signext %x, i64 %y.coerce)
void test1 (int x, struct test1 y)
{
}
-// CHECK: define void @test2(i32 signext %x, [1 x i128] %y.coerce)
+// CHECK: define{{.*}} void @test2(i32 signext %x, [1 x i128] %y.coerce)
void test2 (int x, struct test2 y)
{
}
-// CHECK: define void @test3(i32 signext %x, [2 x i128] %y.coerce)
+// CHECK: define{{.*}} void @test3(i32 signext %x, [2 x i128] %y.coerce)
void test3 (int x, struct test3 y)
{
}
-// CHECK: define void @test4(i32 signext %x, [2 x i64] %y.coerce)
+// CHECK: define{{.*}} void @test4(i32 signext %x, [2 x i64] %y.coerce)
void test4 (int x, struct test4 y)
{
}
-// CHECK: define void @test5(i32 signext %x, %struct.test5* byval(%struct.test5) align 8 %y)
+// CHECK: define{{.*}} void @test5(i32 signext %x, %struct.test5* byval(%struct.test5) align 8 %y)
void test5 (int x, struct test5 y)
{
}
-// CHECK: define void @test6(i32 signext %x, %struct.test6* byval(%struct.test6) align 16 %y)
+// CHECK: define{{.*}} void @test6(i32 signext %x, %struct.test6* byval(%struct.test6) align 16 %y)
void test6 (int x, struct test6 y)
{
}
// This case requires run-time realignment of the incoming struct
-// CHECK-LABEL: define void @test7(i32 signext %x, %struct.test7* byval(%struct.test7) align 16 %0)
+// CHECK-LABEL: define{{.*}} void @test7(i32 signext %x, %struct.test7* byval(%struct.test7) align 16 %0)
// CHECK: %y = alloca %struct.test7, align 32
// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64
void test7 (int x, struct test7 y)
{
}
-// CHECK: define void @test1va(%struct.test1* noalias sret(%struct.test1) align 4 %[[AGG_RESULT:.*]], i32 signext %x, ...)
+// CHECK: define{{.*}} void @test1va(%struct.test1* noalias sret(%struct.test1) align 4 %[[AGG_RESULT:.*]], i32 signext %x, ...)
// CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap
// CHECK: %[[NEXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[CUR]], i64 8
// CHECK: store i8* %[[NEXT]], i8** %ap
return y;
}
-// CHECK: define void @test2va(%struct.test2* noalias sret(%struct.test2) align 16 %[[AGG_RESULT:.*]], i32 signext %x, ...)
+// CHECK: define{{.*}} void @test2va(%struct.test2* noalias sret(%struct.test2) align 16 %[[AGG_RESULT:.*]], i32 signext %x, ...)
// CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap
// CHECK: %[[TMP0:[^ ]+]] = ptrtoint i8* %[[CUR]] to i64
// CHECK: %[[TMP1:[^ ]+]] = add i64 %[[TMP0]], 15
return y;
}
-// CHECK: define void @test3va(%struct.test3* noalias sret(%struct.test3) align 32 %[[AGG_RESULT:.*]], i32 signext %x, ...)
+// CHECK: define{{.*}} void @test3va(%struct.test3* noalias sret(%struct.test3) align 32 %[[AGG_RESULT:.*]], i32 signext %x, ...)
// CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap
// CHECK: %[[TMP0:[^ ]+]] = ptrtoint i8* %[[CUR]] to i64
// CHECK: %[[TMP1:[^ ]+]] = add i64 %[[TMP0]], 15
return y;
}
-// CHECK: define void @test4va(%struct.test4* noalias sret(%struct.test4) align 4 %[[AGG_RESULT:.*]], i32 signext %x, ...)
+// CHECK: define{{.*}} void @test4va(%struct.test4* noalias sret(%struct.test4) align 4 %[[AGG_RESULT:.*]], i32 signext %x, ...)
// CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap
// CHECK: %[[NEXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[CUR]], i64 16
// CHECK: store i8* %[[NEXT]], i8** %ap
return y;
}
-// CHECK: define void @testva_longdouble(%struct.test_longdouble* noalias sret(%struct.test_longdouble) align 16 %[[AGG_RESULT:.*]], i32 signext %x, ...)
+// CHECK: define{{.*}} void @testva_longdouble(%struct.test_longdouble* noalias sret(%struct.test_longdouble) align 16 %[[AGG_RESULT:.*]], i32 signext %x, ...)
// CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap
// CHECK: %[[NEXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[CUR]], i64 16
// CHECK: store i8* %[[NEXT]], i8** %ap
return y;
}
-// CHECK: define void @testva_vector(%struct.test_vector* noalias sret(%struct.test_vector) align 16 %[[AGG_RESULT:.*]], i32 signext %x, ...)
+// CHECK: define{{.*}} void @testva_vector(%struct.test_vector* noalias sret(%struct.test_vector) align 16 %[[AGG_RESULT:.*]], i32 signext %x, ...)
// CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap
// CHECK: %[[TMP0:[^ ]+]] = ptrtoint i8* %[[CUR]] to i64
// CHECK: %[[TMP1:[^ ]+]] = add i64 %[[TMP0]], 15
__float128 foo_f128(_Complex __float128 x) {
return crealf128(x);
}
-// CHECK-F128: define fp128 @foo_f128(fp128 {{[%A-Za-z0-9.]+}}, fp128 {{[%A-Za-z0-9.]+}})
+// CHECK-F128: define{{.*}} fp128 @foo_f128(fp128 {{[%A-Za-z0-9.]+}}, fp128 {{[%A-Za-z0-9.]+}})
#endif
float foo_float(_Complex float x) {
return crealf(x);
}
-// CHECK: define float @foo_float(float {{[%A-Za-z0-9.]+}}, float {{[%A-Za-z0-9.]+}}) [[NUW:#[0-9]+]] {
+// CHECK: define{{.*}} float @foo_float(float {{[%A-Za-z0-9.]+}}, float {{[%A-Za-z0-9.]+}}) [[NUW:#[0-9]+]] {
double foo_double(_Complex double x) {
return creal(x);
}
-// CHECK: define double @foo_double(double {{[%A-Za-z0-9.]+}}, double {{[%A-Za-z0-9.]+}}) [[NUW]] {
+// CHECK: define{{.*}} double @foo_double(double {{[%A-Za-z0-9.]+}}, double {{[%A-Za-z0-9.]+}}) [[NUW]] {
long double foo_long_double(_Complex long double x) {
return creall(x);
}
-// CHECK: define ppc_fp128 @foo_long_double(ppc_fp128 {{[%A-Za-z0-9.]+}}, ppc_fp128 {{[%A-Za-z0-9.]+}}) [[NUW]] {
+// CHECK: define{{.*}} ppc_fp128 @foo_long_double(ppc_fp128 {{[%A-Za-z0-9.]+}}, ppc_fp128 {{[%A-Za-z0-9.]+}}) [[NUW]] {
int foo_int(_Complex int x) {
return __real__ x;
}
-// CHECK: define signext i32 @foo_int(i32 {{[%A-Za-z0-9.]+}}, i32 {{[%A-Za-z0-9.]+}}) [[NUW]] {
+// CHECK: define{{.*}} signext i32 @foo_int(i32 {{[%A-Za-z0-9.]+}}, i32 {{[%A-Za-z0-9.]+}}) [[NUW]] {
short foo_short(_Complex short x) {
return __real__ x;
}
-// CHECK: define signext i16 @foo_short(i16 {{[%A-Za-z0-9.]+}}, i16 {{[%A-Za-z0-9.]+}}) [[NUW]] {
+// CHECK: define{{.*}} signext i16 @foo_short(i16 {{[%A-Za-z0-9.]+}}, i16 {{[%A-Za-z0-9.]+}}) [[NUW]] {
signed char foo_char(_Complex signed char x) {
return __real__ x;
}
-// CHECK: define signext i8 @foo_char(i8 {{[%A-Za-z0-9.]+}}, i8 {{[%A-Za-z0-9.]+}}) [[NUW]] {
+// CHECK: define{{.*}} signext i8 @foo_char(i8 {{[%A-Za-z0-9.]+}}, i8 {{[%A-Za-z0-9.]+}}) [[NUW]] {
long foo_long(_Complex long x) {
return __real__ x;
}
-// CHECK: define i64 @foo_long(i64 {{[%A-Za-z0-9.]+}}, i64 {{[%A-Za-z0-9.]+}}) [[NUW]] {
+// CHECK: define{{.*}} i64 @foo_long(i64 {{[%A-Za-z0-9.]+}}, i64 {{[%A-Za-z0-9.]+}}) [[NUW]] {
long long foo_long_long(_Complex long long x) {
return __real__ x;
}
-// CHECK: define i64 @foo_long_long(i64 {{[%A-Za-z0-9.]+}}, i64 {{[%A-Za-z0-9.]+}}) [[NUW]] {
+// CHECK: define{{.*}} i64 @foo_long_long(i64 {{[%A-Za-z0-9.]+}}, i64 {{[%A-Za-z0-9.]+}}) [[NUW]] {
void bar_float(void) {
foo_float(2.0f - 2.5fi);
}
-// CHECK: define void @bar_float() [[NUW]] {
+// CHECK: define{{.*}} void @bar_float() [[NUW]] {
// CHECK: %[[VAR1:[A-Za-z0-9.]+]] = alloca { float, float }, align 4
// CHECK: %[[VAR2:[A-Za-z0-9.]+]] = getelementptr inbounds { float, float }, { float, float }* %[[VAR1]], i32 0, i32 0
// CHECK: %[[VAR3:[A-Za-z0-9.]+]] = getelementptr inbounds { float, float }, { float, float }* %[[VAR1]], i32 0, i32 1
foo_double(2.0 - 2.5i);
}
-// CHECK: define void @bar_double() [[NUW]] {
+// CHECK: define{{.*}} void @bar_double() [[NUW]] {
// CHECK: %[[VAR11:[A-Za-z0-9.]+]] = alloca { double, double }, align 8
// CHECK: %[[VAR12:[A-Za-z0-9.]+]] = getelementptr inbounds { double, double }, { double, double }* %[[VAR11]], i32 0, i32 0
// CHECK: %[[VAR13:[A-Za-z0-9.]+]] = getelementptr inbounds { double, double }, { double, double }* %[[VAR11]], i32 0, i32 1
foo_long_double(2.0L - 2.5Li);
}
-// CHECK: define void @bar_long_double() [[NUW]] {
+// CHECK: define{{.*}} void @bar_long_double() [[NUW]] {
// CHECK: %[[VAR21:[A-Za-z0-9.]+]] = alloca { ppc_fp128, ppc_fp128 }, align 16
// CHECK: %[[VAR22:[A-Za-z0-9.]+]] = getelementptr inbounds { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %[[VAR21]], i32 0, i32 0
// CHECK: %[[VAR23:[A-Za-z0-9.]+]] = getelementptr inbounds { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %[[VAR21]], i32 0, i32 1
foo_int(2 - 3i);
}
-// CHECK: define void @bar_int() [[NUW]] {
+// CHECK: define{{.*}} void @bar_int() [[NUW]] {
// CHECK: %[[VAR31:[A-Za-z0-9.]+]] = alloca { i32, i32 }, align 4
// CHECK: %[[VAR32:[A-Za-z0-9.]+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* %[[VAR31]], i32 0, i32 0
// CHECK: %[[VAR33:[A-Za-z0-9.]+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* %[[VAR31]], i32 0, i32 1
foo_short(2 - 3i);
}
-// CHECK: define void @bar_short() [[NUW]] {
+// CHECK: define{{.*}} void @bar_short() [[NUW]] {
// CHECK: %[[VAR41:[A-Za-z0-9.]+]] = alloca { i16, i16 }, align 2
// CHECK: %[[VAR42:[A-Za-z0-9.]+]] = getelementptr inbounds { i16, i16 }, { i16, i16 }* %[[VAR41]], i32 0, i32 0
// CHECK: %[[VAR43:[A-Za-z0-9.]+]] = getelementptr inbounds { i16, i16 }, { i16, i16 }* %[[VAR41]], i32 0, i32 1
foo_char(2 - 3i);
}
-// CHECK: define void @bar_char() [[NUW]] {
+// CHECK: define{{.*}} void @bar_char() [[NUW]] {
// CHECK: %[[VAR51:[A-Za-z0-9.]+]] = alloca { i8, i8 }, align 1
// CHECK: %[[VAR52:[A-Za-z0-9.]+]] = getelementptr inbounds { i8, i8 }, { i8, i8 }* %[[VAR51]], i32 0, i32 0
// CHECK: %[[VAR53:[A-Za-z0-9.]+]] = getelementptr inbounds { i8, i8 }, { i8, i8 }* %[[VAR51]], i32 0, i32 1
foo_long(2L - 3Li);
}
-// CHECK: define void @bar_long() [[NUW]] {
+// CHECK: define{{.*}} void @bar_long() [[NUW]] {
// CHECK: %[[VAR61:[A-Za-z0-9.]+]] = alloca { i64, i64 }, align 8
// CHECK: %[[VAR62:[A-Za-z0-9.]+]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* %[[VAR61]], i32 0, i32 0
// CHECK: %[[VAR63:[A-Za-z0-9.]+]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* %[[VAR61]], i32 0, i32 1
foo_long_long(2LL - 3LLi);
}
-// CHECK: define void @bar_long_long() [[NUW]] {
+// CHECK: define{{.*}} void @bar_long_long() [[NUW]] {
// CHECK: %[[VAR71:[A-Za-z0-9.]+]] = alloca { i64, i64 }, align 8
// CHECK: %[[VAR72:[A-Za-z0-9.]+]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* %[[VAR71]], i32 0, i32 0
// CHECK: %[[VAR73:[A-Za-z0-9.]+]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* %[[VAR71]], i32 0, i32 1
return x;
}
-// CHECK-F128: define { fp128, fp128 } @foo_f128(fp128 {{[%A-Za-z0-9.]+}}, fp128 {{[%A-Za-z0-9.]+}}) [[NUW:#[0-9]+]] {
+// CHECK-F128: define{{.*}} { fp128, fp128 } @foo_f128(fp128 {{[%A-Za-z0-9.]+}}, fp128 {{[%A-Za-z0-9.]+}}) [[NUW:#[0-9]+]] {
#endif
_Complex float foo_float(_Complex float x) {
return x;
}
-// CHECK: define { float, float } @foo_float(float {{[%A-Za-z0-9.]+}}, float {{[%A-Za-z0-9.]+}}) [[NUW:#[0-9]+]] {
+// CHECK: define{{.*}} { float, float } @foo_float(float {{[%A-Za-z0-9.]+}}, float {{[%A-Za-z0-9.]+}}) [[NUW:#[0-9]+]] {
_Complex double foo_double(_Complex double x) {
return x;
}
-// CHECK: define { double, double } @foo_double(double {{[%A-Za-z0-9.]+}}, double {{[%A-Za-z0-9.]+}}) [[NUW]] {
+// CHECK: define{{.*}} { double, double } @foo_double(double {{[%A-Za-z0-9.]+}}, double {{[%A-Za-z0-9.]+}}) [[NUW]] {
_Complex long double foo_long_double(_Complex long double x) {
return x;
}
-// CHECK: define { ppc_fp128, ppc_fp128 } @foo_long_double(ppc_fp128 {{[%A-Za-z0-9.]+}}, ppc_fp128 {{[%A-Za-z0-9.]+}}) [[NUW]] {
+// CHECK: define{{.*}} { ppc_fp128, ppc_fp128 } @foo_long_double(ppc_fp128 {{[%A-Za-z0-9.]+}}, ppc_fp128 {{[%A-Za-z0-9.]+}}) [[NUW]] {
_Complex int foo_int(_Complex int x) {
return x;
}
-// CHECK: define { i32, i32 } @foo_int(i32 {{[%A-Za-z0-9.]+}}, i32 {{[%A-Za-z0-9.]+}}) [[NUW]] {
+// CHECK: define{{.*}} { i32, i32 } @foo_int(i32 {{[%A-Za-z0-9.]+}}, i32 {{[%A-Za-z0-9.]+}}) [[NUW]] {
_Complex short foo_short(_Complex short x) {
return x;
}
-// CHECK: define { i16, i16 } @foo_short(i16 {{[%A-Za-z0-9.]+}}, i16 {{[%A-Za-z0-9.]+}}) [[NUW]] {
+// CHECK: define{{.*}} { i16, i16 } @foo_short(i16 {{[%A-Za-z0-9.]+}}, i16 {{[%A-Za-z0-9.]+}}) [[NUW]] {
_Complex signed char foo_char(_Complex signed char x) {
return x;
}
-// CHECK: define { i8, i8 } @foo_char(i8 {{[%A-Za-z0-9.]+}}, i8 {{[%A-Za-z0-9.]+}}) [[NUW]] {
+// CHECK: define{{.*}} { i8, i8 } @foo_char(i8 {{[%A-Za-z0-9.]+}}, i8 {{[%A-Za-z0-9.]+}}) [[NUW]] {
_Complex long foo_long(_Complex long x) {
return x;
}
-// CHECK: define { i64, i64 } @foo_long(i64 {{[%A-Za-z0-9.]+}}, i64 {{[%A-Za-z0-9.]+}}) [[NUW]] {
+// CHECK: define{{.*}} { i64, i64 } @foo_long(i64 {{[%A-Za-z0-9.]+}}, i64 {{[%A-Za-z0-9.]+}}) [[NUW]] {
_Complex long long foo_long_long(_Complex long long x) {
return x;
}
-// CHECK: define { i64, i64 } @foo_long_long(i64 {{[%A-Za-z0-9.]+}}, i64 {{[%A-Za-z0-9.]+}}) [[NUW]] {
+// CHECK: define{{.*}} { i64, i64 } @foo_long_long(i64 {{[%A-Za-z0-9.]+}}, i64 {{[%A-Za-z0-9.]+}}) [[NUW]] {
float bar_float(void) {
return crealf(foo_float(2.0f - 2.5fi));
}
-// CHECK: define float @bar_float() [[NUW]] {
+// CHECK: define{{.*}} float @bar_float() [[NUW]] {
// CHECK: [[VAR1:[%A-Za-z0-9.]+]] = call { float, float } @foo_float
// CHECK: extractvalue { float, float } [[VAR1]], 0
// CHECK: extractvalue { float, float } [[VAR1]], 1
return creal(foo_double(2.0 - 2.5i));
}
-// CHECK: define double @bar_double() [[NUW]] {
+// CHECK: define{{.*}} double @bar_double() [[NUW]] {
// CHECK: [[VAR2:[%A-Za-z0-9.]+]] = call { double, double } @foo_double
// CHECK: extractvalue { double, double } [[VAR2]], 0
// CHECK: extractvalue { double, double } [[VAR2]], 1
return creall(foo_long_double(2.0L - 2.5Li));
}
-// CHECK: define ppc_fp128 @bar_long_double() [[NUW]] {
+// CHECK: define{{.*}} ppc_fp128 @bar_long_double() [[NUW]] {
// CHECK: [[VAR3:[%A-Za-z0-9.]+]] = call { ppc_fp128, ppc_fp128 } @foo_long_double
// CHECK: extractvalue { ppc_fp128, ppc_fp128 } [[VAR3]], 0
// CHECK: extractvalue { ppc_fp128, ppc_fp128 } [[VAR3]], 1
return crealf128(foo_f128(2.0Q - 2.5Qi));
}
-// CHECK-F128: define fp128 @bar_f128() [[NUW]] {
+// CHECK-F128: define{{.*}} fp128 @bar_f128() [[NUW]] {
// CHECK-F128: [[VAR3:[%A-Za-z0-9.]+]] = call { fp128, fp128 } @foo_f128
// CHECK-F128: extractvalue { fp128, fp128 } [[VAR3]], 0
// CHECK-F128: extractvalue { fp128, fp128 } [[VAR3]], 1
return __real__(foo_int(2 - 3i));
}
-// CHECK: define signext i32 @bar_int() [[NUW]] {
+// CHECK: define{{.*}} signext i32 @bar_int() [[NUW]] {
// CHECK: [[VAR4:[%A-Za-z0-9.]+]] = call { i32, i32 } @foo_int
// CHECK: extractvalue { i32, i32 } [[VAR4]], 0
// CHECK: extractvalue { i32, i32 } [[VAR4]], 1
return __real__(foo_short(2 - 3i));
}
-// CHECK: define signext i16 @bar_short() [[NUW]] {
+// CHECK: define{{.*}} signext i16 @bar_short() [[NUW]] {
// CHECK: [[VAR5:[%A-Za-z0-9.]+]] = call { i16, i16 } @foo_short
// CHECK: extractvalue { i16, i16 } [[VAR5]], 0
// CHECK: extractvalue { i16, i16 } [[VAR5]], 1
return __real__(foo_char(2 - 3i));
}
-// CHECK: define signext i8 @bar_char() [[NUW]] {
+// CHECK: define{{.*}} signext i8 @bar_char() [[NUW]] {
// CHECK: [[VAR6:[%A-Za-z0-9.]+]] = call { i8, i8 } @foo_char
// CHECK: extractvalue { i8, i8 } [[VAR6]], 0
// CHECK: extractvalue { i8, i8 } [[VAR6]], 1
return __real__(foo_long(2L - 3Li));
}
-// CHECK: define i64 @bar_long() [[NUW]] {
+// CHECK: define{{.*}} i64 @bar_long() [[NUW]] {
// CHECK: [[VAR7:[%A-Za-z0-9.]+]] = call { i64, i64 } @foo_long
// CHECK: extractvalue { i64, i64 } [[VAR7]], 0
// CHECK: extractvalue { i64, i64 } [[VAR7]], 1
return __real__(foo_long_long(2LL - 3LLi));
}
-// CHECK: define i64 @bar_long_long() [[NUW]] {
+// CHECK: define{{.*}} i64 @bar_long_long() [[NUW]] {
// CHECK: [[VAR8:[%A-Za-z0-9.]+]] = call { i64, i64 } @foo_long_long
// CHECK: extractvalue { i64, i64 } [[VAR8]], 0
// CHECK: extractvalue { i64, i64 } [[VAR8]], 1
return __builtin_dwarf_sp_column();
}
-// CHECK-LABEL: define signext i32 @test()
+// CHECK-LABEL: define{{.*}} signext i32 @test()
// CHECK: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 0), align 1
// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 1), align 1
// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 2), align 1
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -emit-llvm -o - %s \
// RUN: -target-abi elfv2 | FileCheck %s --check-prefix=CHECK-ELFv2
-// CHECK-ELFv1: define void @func_fab(%struct.fab* noalias sret(%struct.fab) align 4 %agg.result, i64 %x.coerce)
-// CHECK-ELFv2: define [2 x float] @func_fab([2 x float] %x.coerce)
+// CHECK-ELFv1: define{{.*}} void @func_fab(%struct.fab* noalias sret(%struct.fab) align 4 %agg.result, i64 %x.coerce)
+// CHECK-ELFv2: define{{.*}} [2 x float] @func_fab([2 x float] %x.coerce)
struct fab { float a; float b; };
struct fab func_fab(struct fab x) { return x; }
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s
void f1(int x) { return; }
-// CHECK: define void @f1(i32 signext %x) [[NUW:#[0-9]+]]
+// CHECK: define{{.*}} void @f1(i32 signext %x) [[NUW:#[0-9]+]]
void f2(unsigned int x) { return; }
-// CHECK: define void @f2(i32 zeroext %x) [[NUW]]
+// CHECK: define{{.*}} void @f2(i32 zeroext %x) [[NUW]]
int f3(void) { return 0; }
-// CHECK: define signext i32 @f3() [[NUW]]
+// CHECK: define{{.*}} signext i32 @f3() [[NUW]]
unsigned int f4(void) { return 0; }
-// CHECK: define zeroext i32 @f4() [[NUW]]
+// CHECK: define{{.*}} zeroext i32 @f4() [[NUW]]
// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
_Bool o;
asm("crand %0, %1, %2" : "=wc"(o) : "wc"(b1), "wc"(b2) : );
return o;
-// CHECK-LABEL: define zeroext i1 @test_wc_i1(i1 zeroext %b1, i1 zeroext %b2)
+// CHECK-LABEL: define{{.*}} zeroext i1 @test_wc_i1(i1 zeroext %b1, i1 zeroext %b2)
// CHECK: call i8 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i1 %b1, i1 %b2)
}
long double x = 0;
int size = sizeof(x);
-// FP64: @x = global double {{.*}}, align 8
-// FP64: @size = global i32 8
-// FP128: @x = global fp128 {{.*}}, align 16
-// FP128: @size = global i32 16
-// IBM128: @x = global ppc_fp128 {{.*}}, align 16
-// IBM128: @size = global i32 16
+// FP64: @x ={{.*}} global double {{.*}}, align 8
+// FP64: @size ={{.*}} global i32 8
+// FP128: @x ={{.*}} global fp128 {{.*}}, align 16
+// FP128: @size ={{.*}} global i32 16
+// IBM128: @x ={{.*}} global ppc_fp128 {{.*}}, align 16
+// IBM128: @size ={{.*}} global i32 16
long double foo(long double d) { return d; }
// Test float returns and params.
-// CHECK: define float @func_p1(float %x)
+// CHECK: define{{.*}} float @func_p1(float %x)
float func_p1(float x) { return x; }
-// CHECK: define double @func_p2(double %x)
+// CHECK: define{{.*}} double @func_p2(double %x)
double func_p2(double x) { return x; }
-// CHECK: define ppc_fp128 @func_p3(ppc_fp128 %x)
+// CHECK: define{{.*}} ppc_fp128 @func_p3(ppc_fp128 %x)
long double func_p3(long double x) { return x; }
// Test homogeneous float aggregate passing and returning.
struct f2a2b { float a[2]; float b[2]; };
-// CHECK-LE: define i32 @func_f1(float inreg %x.coerce)
-// CHECK-BE: define void @func_f1(%struct.f1* noalias sret(%struct.f1) align 4 %agg.result, float inreg %x.coerce)
+// CHECK-LE: define{{.*}} i32 @func_f1(float inreg %x.coerce)
+// CHECK-BE: define{{.*}} void @func_f1(%struct.f1* noalias sret(%struct.f1) align 4 %agg.result, float inreg %x.coerce)
struct f1 func_f1(struct f1 x) { return x; }
-// CHECK-LE: define i64 @func_f2(i64 %x.coerce)
-// CHECK-BE: define void @func_f2(%struct.f2* noalias sret(%struct.f2) align 4 %agg.result, i64 %x.coerce)
+// CHECK-LE: define{{.*}} i64 @func_f2(i64 %x.coerce)
+// CHECK-BE: define{{.*}} void @func_f2(%struct.f2* noalias sret(%struct.f2) align 4 %agg.result, i64 %x.coerce)
struct f2 func_f2(struct f2 x) { return x; }
-// CHECK-LE: define { i64, i64 } @func_f3([2 x i64] %x.coerce)
-// CHECK-BE: define void @func_f3(%struct.f3* noalias sret(%struct.f3) align 4 %agg.result, [2 x i64] %x.coerce)
+// CHECK-LE: define{{.*}} { i64, i64 } @func_f3([2 x i64] %x.coerce)
+// CHECK-BE: define{{.*}} void @func_f3(%struct.f3* noalias sret(%struct.f3) align 4 %agg.result, [2 x i64] %x.coerce)
struct f3 func_f3(struct f3 x) { return x; }
-// CHECK-LE: define { i64, i64 } @func_f4([2 x i64] %x.coerce)
-// CHECK-BE: define void @func_f4(%struct.f4* noalias sret(%struct.f4) align 4 %agg.result, [2 x i64] %x.coerce)
+// CHECK-LE: define{{.*}} { i64, i64 } @func_f4([2 x i64] %x.coerce)
+// CHECK-BE: define{{.*}} void @func_f4(%struct.f4* noalias sret(%struct.f4) align 4 %agg.result, [2 x i64] %x.coerce)
struct f4 func_f4(struct f4 x) { return x; }
-// CHECK: define void @func_f5(%struct.f5* noalias sret(%struct.f5) align 4 %agg.result, [3 x i64] %x.coerce)
+// CHECK: define{{.*}} void @func_f5(%struct.f5* noalias sret(%struct.f5) align 4 %agg.result, [3 x i64] %x.coerce)
struct f5 func_f5(struct f5 x) { return x; }
-// CHECK: define void @func_f6(%struct.f6* noalias sret(%struct.f6) align 4 %agg.result, [3 x i64] %x.coerce)
+// CHECK: define{{.*}} void @func_f6(%struct.f6* noalias sret(%struct.f6) align 4 %agg.result, [3 x i64] %x.coerce)
struct f6 func_f6(struct f6 x) { return x; }
-// CHECK: define void @func_f7(%struct.f7* noalias sret(%struct.f7) align 4 %agg.result, [4 x i64] %x.coerce)
+// CHECK: define{{.*}} void @func_f7(%struct.f7* noalias sret(%struct.f7) align 4 %agg.result, [4 x i64] %x.coerce)
struct f7 func_f7(struct f7 x) { return x; }
-// CHECK: define void @func_f8(%struct.f8* noalias sret(%struct.f8) align 4 %agg.result, [4 x i64] %x.coerce)
+// CHECK: define{{.*}} void @func_f8(%struct.f8* noalias sret(%struct.f8) align 4 %agg.result, [4 x i64] %x.coerce)
struct f8 func_f8(struct f8 x) { return x; }
-// CHECK: define void @func_f9(%struct.f9* noalias sret(%struct.f9) align 4 %agg.result, [5 x i64] %x.coerce)
+// CHECK: define{{.*}} void @func_f9(%struct.f9* noalias sret(%struct.f9) align 4 %agg.result, [5 x i64] %x.coerce)
struct f9 func_f9(struct f9 x) { return x; }
-// CHECK-LE: define i64 @func_fab(i64 %x.coerce)
-// CHECK-BE: define void @func_fab(%struct.fab* noalias sret(%struct.fab) align 4 %agg.result, i64 %x.coerce)
+// CHECK-LE: define{{.*}} i64 @func_fab(i64 %x.coerce)
+// CHECK-BE: define{{.*}} void @func_fab(%struct.fab* noalias sret(%struct.fab) align 4 %agg.result, i64 %x.coerce)
struct fab func_fab(struct fab x) { return x; }
-// CHECK-LE: define { i64, i64 } @func_fabc([2 x i64] %x.coerce)
-// CHECK-BE: define void @func_fabc(%struct.fabc* noalias sret(%struct.fabc) align 4 %agg.result, [2 x i64] %x.coerce)
+// CHECK-LE: define{{.*}} { i64, i64 } @func_fabc([2 x i64] %x.coerce)
+// CHECK-BE: define{{.*}} void @func_fabc(%struct.fabc* noalias sret(%struct.fabc) align 4 %agg.result, [2 x i64] %x.coerce)
struct fabc func_fabc(struct fabc x) { return x; }
-// CHECK-LE: define { i64, i64 } @func_f2a2b([2 x i64] %x.coerce)
-// CHECK-BE: define void @func_f2a2b(%struct.f2a2b* noalias sret(%struct.f2a2b) align 4 %agg.result, [2 x i64] %x.coerce)
+// CHECK-LE: define{{.*}} { i64, i64 } @func_f2a2b([2 x i64] %x.coerce)
+// CHECK-BE: define{{.*}} void @func_f2a2b(%struct.f2a2b* noalias sret(%struct.f2a2b) align 4 %agg.result, [2 x i64] %x.coerce)
struct f2a2b func_f2a2b(struct f2a2b x) { return x; }
// CHECK-LABEL: @call_f1
void bar(Sf a, Sd b, SSf d, SSd e) {}
-// CHECK-LABEL: define void @bar
+// CHECK-LABEL: define{{.*}} void @bar
// CHECK: %a = alloca %struct.s1, align 4
// CHECK: %b = alloca %struct.s2, align 8
// CHECK: %d = alloca %struct.s4, align 4
bar(p1, p2, p4, p5);
}
-// CHECK-LABEL: define void @foo
+// CHECK-LABEL: define{{.*}} void @foo
// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr inbounds %struct.s1, %struct.s1* %p1, i32 0, i32 0
// CHECK: %{{[0-9]+}} = load float, float* %{{[a-zA-Z0-9.]+}}, align 4
// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr inbounds %struct.s2, %struct.s2* %p2, i32 0, i32 0
return a.v;
}
-// CHECK-LABEL: define <4 x float> @foo(<4 x float> inreg returned %a.coerce)
+// CHECK-LABEL: define{{.*}} <4 x float> @foo(<4 x float> inreg returned %a.coerce)
// CHECK: ret <4 x float> %a.coerce
struct v16i16 { v16i16 x; };
-// CHECK: define i32 @test_v2i16(i32 %x.coerce)
+// CHECK: define{{.*}} i32 @test_v2i16(i32 %x.coerce)
v2i16 test_v2i16(v2i16 x)
{
return x;
}
-// CHECK: define i64 @test_v3i16(i64 %x.coerce)
+// CHECK: define{{.*}} i64 @test_v3i16(i64 %x.coerce)
v3i16 test_v3i16(v3i16 x)
{
return x;
}
-// CHECK: define i64 @test_v4i16(i64 %x.coerce)
+// CHECK: define{{.*}} i64 @test_v4i16(i64 %x.coerce)
v4i16 test_v4i16(v4i16 x)
{
return x;
}
-// CHECK: define <6 x i16> @test_v6i16(<6 x i16> %x)
+// CHECK: define{{.*}} <6 x i16> @test_v6i16(<6 x i16> %x)
v6i16 test_v6i16(v6i16 x)
{
return x;
}
-// CHECK: define <8 x i16> @test_v8i16(<8 x i16> %x)
+// CHECK: define{{.*}} <8 x i16> @test_v8i16(<8 x i16> %x)
v8i16 test_v8i16(v8i16 x)
{
return x;
}
-// CHECK: define void @test_v16i16(<16 x i16>* noalias sret(<16 x i16>) align 32 %agg.result, <16 x i16>* %0)
+// CHECK: define{{.*}} void @test_v16i16(<16 x i16>* noalias sret(<16 x i16>) align 32 %agg.result, <16 x i16>* %0)
v16i16 test_v16i16(v16i16 x)
{
return x;
}
-// CHECK: define void @test_struct_v16i16(%struct.v16i16* noalias sret(%struct.v16i16) align 32 %agg.result, [2 x i128] %x.coerce)
+// CHECK: define{{.*}} void @test_struct_v16i16(%struct.v16i16* noalias sret(%struct.v16i16) align 32 %agg.result, [2 x i128] %x.coerce)
struct v16i16 test_struct_v16i16(struct v16i16 x)
{
return x;
struct f2a2b { float a[2]; float b[2]; };
-// CHECK: define [1 x float] @func_f1(float inreg %x.coerce)
+// CHECK: define{{.*}} [1 x float] @func_f1(float inreg %x.coerce)
struct f1 func_f1(struct f1 x) { return x; }
-// CHECK: define [2 x float] @func_f2([2 x float] %x.coerce)
+// CHECK: define{{.*}} [2 x float] @func_f2([2 x float] %x.coerce)
struct f2 func_f2(struct f2 x) { return x; }
-// CHECK: define [3 x float] @func_f3([3 x float] %x.coerce)
+// CHECK: define{{.*}} [3 x float] @func_f3([3 x float] %x.coerce)
struct f3 func_f3(struct f3 x) { return x; }
-// CHECK: define [4 x float] @func_f4([4 x float] %x.coerce)
+// CHECK: define{{.*}} [4 x float] @func_f4([4 x float] %x.coerce)
struct f4 func_f4(struct f4 x) { return x; }
-// CHECK: define [5 x float] @func_f5([5 x float] %x.coerce)
+// CHECK: define{{.*}} [5 x float] @func_f5([5 x float] %x.coerce)
struct f5 func_f5(struct f5 x) { return x; }
-// CHECK: define [6 x float] @func_f6([6 x float] %x.coerce)
+// CHECK: define{{.*}} [6 x float] @func_f6([6 x float] %x.coerce)
struct f6 func_f6(struct f6 x) { return x; }
-// CHECK: define [7 x float] @func_f7([7 x float] %x.coerce)
+// CHECK: define{{.*}} [7 x float] @func_f7([7 x float] %x.coerce)
struct f7 func_f7(struct f7 x) { return x; }
-// CHECK: define [8 x float] @func_f8([8 x float] %x.coerce)
+// CHECK: define{{.*}} [8 x float] @func_f8([8 x float] %x.coerce)
struct f8 func_f8(struct f8 x) { return x; }
-// CHECK: define void @func_f9(%struct.f9* noalias sret(%struct.f9) align 4 %agg.result, [5 x i64] %x.coerce)
+// CHECK: define{{.*}} void @func_f9(%struct.f9* noalias sret(%struct.f9) align 4 %agg.result, [5 x i64] %x.coerce)
struct f9 func_f9(struct f9 x) { return x; }
-// CHECK: define [2 x float] @func_fab([2 x float] %x.coerce)
+// CHECK: define{{.*}} [2 x float] @func_fab([2 x float] %x.coerce)
struct fab func_fab(struct fab x) { return x; }
-// CHECK: define [3 x float] @func_fabc([3 x float] %x.coerce)
+// CHECK: define{{.*}} [3 x float] @func_fabc([3 x float] %x.coerce)
struct fabc func_fabc(struct fabc x) { return x; }
-// CHECK: define [4 x float] @func_f2a2b([4 x float] %x.coerce)
+// CHECK: define{{.*}} [4 x float] @func_f2a2b([4 x float] %x.coerce)
struct f2a2b func_f2a2b(struct f2a2b x) { return x; }
// CHECK-LABEL: @call_f1
struct vab { vector int a; vector int b; };
struct vabc { vector int a; vector int b; vector int c; };
-// CHECK: define [1 x <4 x i32>] @func_v1(<4 x i32> inreg %x.coerce)
+// CHECK: define{{.*}} [1 x <4 x i32>] @func_v1(<4 x i32> inreg %x.coerce)
struct v1 func_v1(struct v1 x) { return x; }
-// CHECK: define [2 x <4 x i32>] @func_v2([2 x <4 x i32>] %x.coerce)
+// CHECK: define{{.*}} [2 x <4 x i32>] @func_v2([2 x <4 x i32>] %x.coerce)
struct v2 func_v2(struct v2 x) { return x; }
-// CHECK: define [3 x <4 x i32>] @func_v3([3 x <4 x i32>] %x.coerce)
+// CHECK: define{{.*}} [3 x <4 x i32>] @func_v3([3 x <4 x i32>] %x.coerce)
struct v3 func_v3(struct v3 x) { return x; }
-// CHECK: define [4 x <4 x i32>] @func_v4([4 x <4 x i32>] %x.coerce)
+// CHECK: define{{.*}} [4 x <4 x i32>] @func_v4([4 x <4 x i32>] %x.coerce)
struct v4 func_v4(struct v4 x) { return x; }
-// CHECK: define [5 x <4 x i32>] @func_v5([5 x <4 x i32>] %x.coerce)
+// CHECK: define{{.*}} [5 x <4 x i32>] @func_v5([5 x <4 x i32>] %x.coerce)
struct v5 func_v5(struct v5 x) { return x; }
-// CHECK: define [6 x <4 x i32>] @func_v6([6 x <4 x i32>] %x.coerce)
+// CHECK: define{{.*}} [6 x <4 x i32>] @func_v6([6 x <4 x i32>] %x.coerce)
struct v6 func_v6(struct v6 x) { return x; }
-// CHECK: define [7 x <4 x i32>] @func_v7([7 x <4 x i32>] %x.coerce)
+// CHECK: define{{.*}} [7 x <4 x i32>] @func_v7([7 x <4 x i32>] %x.coerce)
struct v7 func_v7(struct v7 x) { return x; }
-// CHECK: define [8 x <4 x i32>] @func_v8([8 x <4 x i32>] %x.coerce)
+// CHECK: define{{.*}} [8 x <4 x i32>] @func_v8([8 x <4 x i32>] %x.coerce)
struct v8 func_v8(struct v8 x) { return x; }
-// CHECK: define void @func_v9(%struct.v9* noalias sret(%struct.v9) align 16 %agg.result, %struct.v9* byval(%struct.v9) align 16 %x)
+// CHECK: define{{.*}} void @func_v9(%struct.v9* noalias sret(%struct.v9) align 16 %agg.result, %struct.v9* byval(%struct.v9) align 16 %x)
struct v9 func_v9(struct v9 x) { return x; }
-// CHECK: define [2 x <4 x i32>] @func_vab([2 x <4 x i32>] %x.coerce)
+// CHECK: define{{.*}} [2 x <4 x i32>] @func_vab([2 x <4 x i32>] %x.coerce)
struct vab func_vab(struct vab x) { return x; }
-// CHECK: define [3 x <4 x i32>] @func_vabc([3 x <4 x i32>] %x.coerce)
+// CHECK: define{{.*}} [3 x <4 x i32>] @func_vabc([3 x <4 x i32>] %x.coerce)
struct vabc func_vabc(struct vabc x) { return x; }
// CHECK-LABEL: @call_v1
struct v3fab { float3 a; float3 b; };
struct v3fabc { float3 a; float3 b; float3 c; };
-// CHECK: define [1 x <4 x float>] @func_v3f1(<3 x float> inreg %x.coerce)
+// CHECK: define{{.*}} [1 x <4 x float>] @func_v3f1(<3 x float> inreg %x.coerce)
struct v3f1 func_v3f1(struct v3f1 x) { return x; }
-// CHECK: define [2 x <4 x float>] @func_v3f2([2 x <4 x float>] %x.coerce)
+// CHECK: define{{.*}} [2 x <4 x float>] @func_v3f2([2 x <4 x float>] %x.coerce)
struct v3f2 func_v3f2(struct v3f2 x) { return x; }
-// CHECK: define [3 x <4 x float>] @func_v3f3([3 x <4 x float>] %x.coerce)
+// CHECK: define{{.*}} [3 x <4 x float>] @func_v3f3([3 x <4 x float>] %x.coerce)
struct v3f3 func_v3f3(struct v3f3 x) { return x; }
-// CHECK: define [4 x <4 x float>] @func_v3f4([4 x <4 x float>] %x.coerce)
+// CHECK: define{{.*}} [4 x <4 x float>] @func_v3f4([4 x <4 x float>] %x.coerce)
struct v3f4 func_v3f4(struct v3f4 x) { return x; }
-// CHECK: define [5 x <4 x float>] @func_v3f5([5 x <4 x float>] %x.coerce)
+// CHECK: define{{.*}} [5 x <4 x float>] @func_v3f5([5 x <4 x float>] %x.coerce)
struct v3f5 func_v3f5(struct v3f5 x) { return x; }
-// CHECK: define [6 x <4 x float>] @func_v3f6([6 x <4 x float>] %x.coerce)
+// CHECK: define{{.*}} [6 x <4 x float>] @func_v3f6([6 x <4 x float>] %x.coerce)
struct v3f6 func_v3f6(struct v3f6 x) { return x; }
-// CHECK: define [7 x <4 x float>] @func_v3f7([7 x <4 x float>] %x.coerce)
+// CHECK: define{{.*}} [7 x <4 x float>] @func_v3f7([7 x <4 x float>] %x.coerce)
struct v3f7 func_v3f7(struct v3f7 x) { return x; }
-// CHECK: define [8 x <4 x float>] @func_v3f8([8 x <4 x float>] %x.coerce)
+// CHECK: define{{.*}} [8 x <4 x float>] @func_v3f8([8 x <4 x float>] %x.coerce)
struct v3f8 func_v3f8(struct v3f8 x) { return x; }
-// CHECK: define void @func_v3f9(%struct.v3f9* noalias sret(%struct.v3f9) align 16 %agg.result, %struct.v3f9* byval(%struct.v3f9) align 16 %x)
+// CHECK: define{{.*}} void @func_v3f9(%struct.v3f9* noalias sret(%struct.v3f9) align 16 %agg.result, %struct.v3f9* byval(%struct.v3f9) align 16 %x)
struct v3f9 func_v3f9(struct v3f9 x) { return x; }
-// CHECK: define [2 x <4 x float>] @func_v3fab([2 x <4 x float>] %x.coerce)
+// CHECK: define{{.*}} [2 x <4 x float>] @func_v3fab([2 x <4 x float>] %x.coerce)
struct v3fab func_v3fab(struct v3fab x) { return x; }
-// CHECK: define [3 x <4 x float>] @func_v3fabc([3 x <4 x float>] %x.coerce)
+// CHECK: define{{.*}} [3 x <4 x float>] @func_v3fabc([3 x <4 x float>] %x.coerce)
struct v3fabc func_v3fabc(struct v3fabc x) { return x; }
// CHECK-LABEL: @call_v3f1
struct s16 { char c[16]; };
struct s17 { char c[17]; };
-// CHECK: define i8 @ret_s1()
+// CHECK: define{{.*}} i8 @ret_s1()
struct s1 ret_s1() {
return (struct s1) { 17 };
}
-// CHECK: define i16 @ret_s2()
+// CHECK: define{{.*}} i16 @ret_s2()
struct s2 ret_s2() {
return (struct s2) { 17, 18 };
}
-// CHECK: define i24 @ret_s3()
+// CHECK: define{{.*}} i24 @ret_s3()
struct s3 ret_s3() {
return (struct s3) { 17, 18, 19 };
}
-// CHECK: define i32 @ret_s4()
+// CHECK: define{{.*}} i32 @ret_s4()
struct s4 ret_s4() {
return (struct s4) { 17, 18, 19, 20 };
}
-// CHECK: define i40 @ret_s5()
+// CHECK: define{{.*}} i40 @ret_s5()
struct s5 ret_s5() {
return (struct s5) { 17, 18, 19, 20, 21 };
}
-// CHECK: define i48 @ret_s6()
+// CHECK: define{{.*}} i48 @ret_s6()
struct s6 ret_s6() {
return (struct s6) { 17, 18, 19, 20, 21, 22 };
}
-// CHECK: define i56 @ret_s7()
+// CHECK: define{{.*}} i56 @ret_s7()
struct s7 ret_s7() {
return (struct s7) { 17, 18, 19, 20, 21, 22, 23 };
}
-// CHECK: define i64 @ret_s8()
+// CHECK: define{{.*}} i64 @ret_s8()
struct s8 ret_s8() {
return (struct s8) { 17, 18, 19, 20, 21, 22, 23, 24 };
}
-// CHECK: define { i64, i64 } @ret_s9()
+// CHECK: define{{.*}} { i64, i64 } @ret_s9()
struct s9 ret_s9() {
return (struct s9) { 17, 18, 19, 20, 21, 22, 23, 24, 25 };
}
-// CHECK: define { i64, i64 } @ret_s16()
+// CHECK: define{{.*}} { i64, i64 } @ret_s16()
struct s16 ret_s16() {
return (struct s16) { 17, 18, 19, 20, 21, 22, 23, 24,
25, 26, 27, 28, 29, 30, 31, 32 };
}
-// CHECK: define void @ret_s17(%struct.s17*
+// CHECK: define{{.*}} void @ret_s17(%struct.s17*
struct s17 ret_s17() {
return (struct s17) { 17, 18, 19, 20, 21, 22, 23, 24,
25, 26, 27, 28, 29, 30, 31, 32, 33 };
struct fp2a2b { __float128 a[2]; __float128 b[2]; };
-// CHECK: define [1 x fp128] @func_f1(fp128 inreg %x.coerce)
+// CHECK: define{{.*}} [1 x fp128] @func_f1(fp128 inreg %x.coerce)
struct fp1 func_f1(struct fp1 x) { return x; }
-// CHECK: define [2 x fp128] @func_f2([2 x fp128] %x.coerce)
+// CHECK: define{{.*}} [2 x fp128] @func_f2([2 x fp128] %x.coerce)
struct fp2 func_f2(struct fp2 x) { return x; }
-// CHECK: define [3 x fp128] @func_f3([3 x fp128] %x.coerce)
+// CHECK: define{{.*}} [3 x fp128] @func_f3([3 x fp128] %x.coerce)
struct fp3 func_f3(struct fp3 x) { return x; }
-// CHECK: define [4 x fp128] @func_f4([4 x fp128] %x.coerce)
+// CHECK: define{{.*}} [4 x fp128] @func_f4([4 x fp128] %x.coerce)
struct fp4 func_f4(struct fp4 x) { return x; }
-// CHECK: define [5 x fp128] @func_f5([5 x fp128] %x.coerce)
+// CHECK: define{{.*}} [5 x fp128] @func_f5([5 x fp128] %x.coerce)
struct fp5 func_f5(struct fp5 x) { return x; }
-// CHECK: define [6 x fp128] @func_f6([6 x fp128] %x.coerce)
+// CHECK: define{{.*}} [6 x fp128] @func_f6([6 x fp128] %x.coerce)
struct fp6 func_f6(struct fp6 x) { return x; }
-// CHECK: define [7 x fp128] @func_f7([7 x fp128] %x.coerce)
+// CHECK: define{{.*}} [7 x fp128] @func_f7([7 x fp128] %x.coerce)
struct fp7 func_f7(struct fp7 x) { return x; }
-// CHECK: define [8 x fp128] @func_f8([8 x fp128] %x.coerce)
+// CHECK: define{{.*}} [8 x fp128] @func_f8([8 x fp128] %x.coerce)
struct fp8 func_f8(struct fp8 x) { return x; }
-// CHECK: define void @func_f9(%struct.fp9* noalias sret(%struct.fp9) align 16 %agg.result, %struct.fp9* byval(%struct.fp9) align 16 %x)
+// CHECK: define{{.*}} void @func_f9(%struct.fp9* noalias sret(%struct.fp9) align 16 %agg.result, %struct.fp9* byval(%struct.fp9) align 16 %x)
struct fp9 func_f9(struct fp9 x) { return x; }
-// CHECK: define [2 x fp128] @func_fab([2 x fp128] %x.coerce)
+// CHECK: define{{.*}} [2 x fp128] @func_fab([2 x fp128] %x.coerce)
struct fpab func_fab(struct fpab x) { return x; }
-// CHECK: define [3 x fp128] @func_fabc([3 x fp128] %x.coerce)
+// CHECK: define{{.*}} [3 x fp128] @func_fabc([3 x fp128] %x.coerce)
struct fpabc func_fabc(struct fpabc x) { return x; }
-// CHECK: define [4 x fp128] @func_f2a2b([4 x fp128] %x.coerce)
+// CHECK: define{{.*}} [4 x fp128] @func_f2a2b([4 x fp128] %x.coerce)
struct fp2a2b func_f2a2b(struct fp2a2b x) { return x; }
// CHECK-LABEL: @call_fp1
// OMP-TARGET: %[[V3:[0-9a-zA-Z_.]+]] = load ppc_fp128, ppc_fp128* %[[V2]], align 8
// OMP-TARGET: call void @foo_ld(ppc_fp128 %[[V3]])
-// OMP-HOST-LABEL: define void @omp(
+// OMP-HOST-LABEL: define{{.*}} void @omp(
// OMP-HOST: %[[AP1:[0-9a-zA-Z_.]+]] = bitcast i8** %[[AP:[0-9a-zA-Z_.]+]] to i8*
// OMP-HOST: call void @llvm.va_start(i8* %[[AP1]])
// OMP-HOST: %[[CUR:[0-9a-zA-Z_.]+]] = load i8*, i8** %[[AP]], align 8
va_end(ap);
}
-// IEEE-LABEL: define void @f128
+// IEEE-LABEL: define{{.*}} void @f128
// IEEE: %[[AP1:[0-9a-zA-Z_.]+]] = bitcast i8** %[[AP:[0-9a-zA-Z_.]+]] to i8*
// IEEE: call void @llvm.va_start(i8* %[[AP1]])
// IEEE: %[[CUR:[0-9a-zA-Z_.]+]] = load i8*, i8** %[[AP]]
va_end(ap);
}
-// IEEE-LABEL: define void @long_double
+// IEEE-LABEL: define{{.*}} void @long_double
// IEEE: %[[AP1:[0-9a-zA-Z_.]+]] = bitcast i8** %[[AP:[0-9a-zA-Z_.]+]] to i8*
// IEEE: call void @llvm.va_start(i8* %[[AP1]])
// IEEE: %[[CUR:[0-9a-zA-Z_.]+]] = load i8*, i8** %[[AP]]
// IEEE: %[[AP2:[0-9a-zA-Z_.]+]] = bitcast i8** %[[AP]] to i8*
// IEEE: call void @llvm.va_end(i8* %[[AP2]])
-// IBM-LABEL: define void @long_double
+// IBM-LABEL: define{{.*}} void @long_double
// IBM: %[[AP1:[0-9a-zA-Z_.]+]] = bitcast i8** %[[AP:[0-9a-zA-Z_.]+]] to i8*
// IBM: call void @llvm.va_start(i8* %[[AP1]])
// IBM: %[[CUR:[0-9a-zA-Z_.]+]] = load i8*, i8** %[[AP]]
void (__attribute__((regparm(3), stdcall)) *pf) ();
void (__attribute__((regparm(2), stdcall)) foo)(int a) {
}
-// CHECK: @pf = global void (...)* null
-// CHECK: define void @foo(i32 %a)
+// CHECK: @pf ={{.*}} global void (...)* null
+// CHECK: define{{.*}} void @foo(i32 %a)
-// CHECK-OK: @pf = global void (...)* null
-// CHECK-OK: define x86_stdcallcc void @foo(i32 inreg %a)
+// CHECK-OK: @pf ={{.*}} global void (...)* null
+// CHECK-OK: define{{.*}} x86_stdcallcc void @foo(i32 inreg %a)
typedef int v4si __attribute__ ((vector_size (16)));
v4si rep() {
-// X86-LABEL: define <4 x i32> @rep
+// X86-LABEL: define{{.*}} <4 x i32> @rep
// X86: %[[ALLOCA0:.*]] = alloca <4 x i32>, align 16
// X86: %[[ALLOCA1:.*]] = alloca <4 x i32>, align 16
// X86: %[[BITCAST:.*]] = bitcast <4 x i32>* %[[ALLOCA0]] to i128*
// X86: %[[LOAD:.*]] = load <4 x i32>, <4 x i32>* %[[ALLOCA1]], align 16
// X86: ret <4 x i32> %[[LOAD]]
//
-// X64-LABEL: define <4 x i32> @rep
+// X64-LABEL: define{{.*}} <4 x i32> @rep
// X64: %[[ALLOCA:.*]] = alloca <4 x i32>, align 16
// X64: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"()
// X64: %[[LOAD:.*]] = load <4 x i32>, <4 x i32>* %[[ALLOCA]], align 16
memchr("", '.', 0);
}
-// CHECK-LABEL: define void @f()
+// CHECK-LABEL: define{{.*}} void @f()
// CHECK: call void @foo()
// CHECK: call i32 @abs(i32 0)
// CHECK: call i8* @strrchr(
// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm %s -o - -verify | FileCheck %s
-// CHECK: @weakvar = weak global
-// CHECK: @__weakvar_alias = global
-// CHECK: @correct_linkage = weak global
+// CHECK: @weakvar = weak{{.*}} global
+// CHECK: @__weakvar_alias ={{.*}} global
+// CHECK: @correct_linkage = weak{{.*}} global
-// CHECK-DAG: @both = alias void (), void ()* @__both
-// CHECK-DAG: @both2 = alias void (), void ()* @__both2
-// CHECK-DAG: @weakvar_alias = weak alias i32, i32* @__weakvar_alias
-// CHECK-DAG: @foo = weak alias void (), void ()* @__foo
-// CHECK-DAG: @foo2 = weak alias void (), void ()* @__foo2
-// CHECK-DAG: @stutter = weak alias void (), void ()* @__stutter
-// CHECK-DAG: @stutter2 = weak alias void (), void ()* @__stutter2
-// CHECK-DAG: @declfirst = weak alias void (), void ()* @__declfirst
-// CHECK-DAG: @declfirstattr = weak alias void (), void ()* @__declfirstattr
-// CHECK-DAG: @mix2 = weak alias void (), void ()* @__mix2
-// CHECK-DAG: @a1 = weak alias void (), void ()* @__a1
-// CHECK-DAG: @xxx = weak alias void (), void ()* @__xxx
+// CHECK-DAG: @both ={{.*}} alias void (), void ()* @__both
+// CHECK-DAG: @both2 ={{.*}} alias void (), void ()* @__both2
+// CHECK-DAG: @weakvar_alias = weak{{.*}} alias i32, i32* @__weakvar_alias
+// CHECK-DAG: @foo = weak{{.*}} alias void (), void ()* @__foo
+// CHECK-DAG: @foo2 = weak{{.*}} alias void (), void ()* @__foo2
+// CHECK-DAG: @stutter = weak{{.*}} alias void (), void ()* @__stutter
+// CHECK-DAG: @stutter2 = weak{{.*}} alias void (), void ()* @__stutter2
+// CHECK-DAG: @declfirst = weak{{.*}} alias void (), void ()* @__declfirst
+// CHECK-DAG: @declfirstattr = weak{{.*}} alias void (), void ()* @__declfirstattr
+// CHECK-DAG: @mix2 = weak{{.*}} alias void (), void ()* @__mix2
+// CHECK-DAG: @a1 = weak{{.*}} alias void (), void ()* @__a1
+// CHECK-DAG: @xxx = weak{{.*}} alias void (), void ()* @__xxx
-// CHECK-LABEL: define weak void @weakdef()
+// CHECK-LABEL: define weak{{.*}} void @weakdef()
#pragma weak weakvar
#pragma weak foo = __foo
void __foo(void) {}
-// CHECK-LABEL: define void @__foo()
+// CHECK-LABEL: define{{.*}} void @__foo()
void __foo2(void) {}
#pragma weak foo2 = __foo2
-// CHECK-LABEL: define void @__foo2()
+// CHECK-LABEL: define{{.*}} void @__foo2()
///// test errors
#pragma weak stutter = __stutter
#pragma weak stutter = __stutter
void __stutter(void) {}
-// CHECK-LABEL: define void @__stutter()
+// CHECK-LABEL: define{{.*}} void @__stutter()
void __stutter2(void) {}
#pragma weak stutter2 = __stutter2
#pragma weak stutter2 = __stutter2
-// CHECK-LABEL: define void @__stutter2()
+// CHECK-LABEL: define{{.*}} void @__stutter2()
// test decl/pragma weak order
void __declfirst(void);
#pragma weak declfirst = __declfirst
void __declfirst(void) {}
-// CHECK-LABEL: define void @__declfirst()
+// CHECK-LABEL: define{{.*}} void @__declfirst()
void __declfirstattr(void) __attribute((noinline));
#pragma weak declfirstattr = __declfirstattr
void __declfirstattr(void) {}
-// CHECK-LABEL: define void @__declfirstattr()
+// CHECK-LABEL: define{{.*}} void @__declfirstattr()
//// test that other attributes are preserved
void mix(void);
#pragma weak mix
__attribute((weak)) void mix(void) { }
-// CHECK-LABEL: define weak void @mix()
+// CHECK-LABEL: define weak{{.*}} void @mix()
// ensure following __attributes are preserved and that only a single
// alias is generated
void __mix2(void) __attribute((noinline));
void __mix2(void) __attribute((noinline));
void __mix2(void) {}
-// CHECK-LABEL: define void @__mix2()
+// CHECK-LABEL: define{{.*}} void @__mix2()
////////////// test #pragma weak/__attribute combinations
void both(void) __attribute((alias("__both")));
#pragma weak both = __both
void __both(void) {}
-// CHECK-LABEL: define void @__both()
+// CHECK-LABEL: define{{.*}} void @__both()
// if the TARGET is previously declared then whichever aliasing method
// comes first applies and subsequent aliases are discarded.
void both2(void) __attribute((alias("__both2"))); // first, wins
#pragma weak both2 = __both2
void __both2(void) {}
-// CHECK-LABEL: define void @__both2()
+// CHECK-LABEL: define{{.*}} void @__both2()
///////////// ensure that #pragma weak does not alter existing __attributes()
void __a1(void) __attribute((noinline));
#pragma weak a1 = __a1
void __a1(void) {}
-// CHECK: define void @__a1() [[NI:#[0-9]+]]
+// CHECK: define{{.*}} void @__a1() [[NI:#[0-9]+]]
#pragma weak xxx = __xxx
__attribute((pure,noinline,const)) void __xxx(void) { }
void zzz(void){}
#pragma weak yyy
// NOTE: weak doesn't apply, not before or in same TopLevelDec(!)
-// CHECK-LABEL: define void @yyy()
+// CHECK-LABEL: define{{.*}} void @yyy()
int correct_linkage;
}
// CHECK-DAG: @import_int = external dllimport
-// CHECK-DAG: @export_int = dllexport global i32 0
-// CHECK-DAG: define dllexport void @export_implemented_function()
+// CHECK-DAG: @export_int ={{.*}} dllexport global i32 0
+// CHECK-DAG: define{{.*}} dllexport void @export_implemented_function()
// CHECK-DAG: declare dllimport void @import_function(i32)
return foo;
}
extern int foo() { return 1; }
-// CHECK: define i32 @bar()
+// CHECK: define{{.*}} i32 @bar()
// Check that pragma redefine_extname applies to external declarations only.
#pragma redefine_extname foo_static bar_static
void __regcall v1(int a, int b) {}
// Win32: define dso_local x86_regcallcc void @__regcall3__v1(i32 inreg %a, i32 inreg %b)
// Win64: define dso_local x86_regcallcc void @__regcall3__v1(i32 %a, i32 %b)
-// Lin32: define x86_regcallcc void @__regcall3__v1(i32 inreg %a, i32 inreg %b)
-// Lin64: define x86_regcallcc void @__regcall3__v1(i32 %a, i32 %b)
+// Lin32: define{{.*}} x86_regcallcc void @__regcall3__v1(i32 inreg %a, i32 inreg %b)
+// Lin64: define{{.*}} x86_regcallcc void @__regcall3__v1(i32 %a, i32 %b)
void __attribute__((regcall)) v1b(int a, int b) {}
// Win32: define dso_local x86_regcallcc void @__regcall3__v1b(i32 inreg %a, i32 inreg %b)
// Win64: define dso_local x86_regcallcc void @__regcall3__v1b(i32 %a, i32 %b)
-// Lin32: define x86_regcallcc void @__regcall3__v1b(i32 inreg %a, i32 inreg %b)
-// Lin64: define x86_regcallcc void @__regcall3__v1b(i32 %a, i32 %b)
+// Lin32: define{{.*}} x86_regcallcc void @__regcall3__v1b(i32 inreg %a, i32 inreg %b)
+// Lin64: define{{.*}} x86_regcallcc void @__regcall3__v1b(i32 %a, i32 %b)
void __regcall v2(char a, char b) {}
// Win32: define dso_local x86_regcallcc void @__regcall3__v2(i8 inreg signext %a, i8 inreg signext %b)
// Win64: define dso_local x86_regcallcc void @__regcall3__v2(i8 %a, i8 %b)
-// Lin32: define x86_regcallcc void @__regcall3__v2(i8 inreg signext %a, i8 inreg signext %b)
-// Lin64: define x86_regcallcc void @__regcall3__v2(i8 signext %a, i8 signext %b)
+// Lin32: define{{.*}} x86_regcallcc void @__regcall3__v2(i8 inreg signext %a, i8 inreg signext %b)
+// Lin64: define{{.*}} x86_regcallcc void @__regcall3__v2(i8 signext %a, i8 signext %b)
struct Small { int x; };
void __regcall v3(int a, struct Small b, int c) {}
// Win32: define dso_local x86_regcallcc void @__regcall3__v3(i32 inreg %a, i32 %b.0, i32 inreg %c)
// Win64: define dso_local x86_regcallcc void @__regcall3__v3(i32 %a, i32 %b.coerce, i32 %c)
-// Lin32: define x86_regcallcc void @__regcall3__v3(i32 inreg %a, i32 inreg %0, i32 %b.0, i32 inreg %c)
-// Lin64: define x86_regcallcc void @__regcall3__v3(i32 %a, i32 %b.coerce, i32 %c)
+// Lin32: define{{.*}} x86_regcallcc void @__regcall3__v3(i32 inreg %a, i32 inreg %0, i32 %b.0, i32 inreg %c)
+// Lin64: define{{.*}} x86_regcallcc void @__regcall3__v3(i32 %a, i32 %b.coerce, i32 %c)
struct Large { int a[5]; };
void __regcall v4(int a, struct Large b, int c) {}
// Win32: define dso_local x86_regcallcc void @__regcall3__v4(i32 inreg %a, %struct.Large* byval(%struct.Large) align 4 %b, i32 inreg %c)
// Win64: define dso_local x86_regcallcc void @__regcall3__v4(i32 %a, %struct.Large* %b, i32 %c)
-// Lin32: define x86_regcallcc void @__regcall3__v4(i32 inreg %a, %struct.Large* byval(%struct.Large) align 4 %b, i32 %c)
-// Lin64: define x86_regcallcc void @__regcall3__v4(i32 %a, [5 x i32] %b.coerce, i32 %c)
+// Lin32: define{{.*}} x86_regcallcc void @__regcall3__v4(i32 inreg %a, %struct.Large* byval(%struct.Large) align 4 %b, i32 %c)
+// Lin64: define{{.*}} x86_regcallcc void @__regcall3__v4(i32 %a, [5 x i32] %b.coerce, i32 %c)
struct HFA2 { double x, y; };
struct HFA4 { double w, x, y, z; };
void __regcall hfa1(int a, struct HFA4 b, int c) {}
// Win32: define dso_local x86_regcallcc void @__regcall3__hfa1(i32 inreg %a, double %b.0, double %b.1, double %b.2, double %b.3, i32 inreg %c)
// Win64: define dso_local x86_regcallcc void @__regcall3__hfa1(i32 %a, double %b.0, double %b.1, double %b.2, double %b.3, i32 %c)
-// Lin32: define x86_regcallcc void @__regcall3__hfa1(i32 inreg %a, double %b.0, double %b.1, double %b.2, double %b.3, i32 inreg %c)
-// Lin64: define x86_regcallcc void @__regcall3__hfa1(i32 %a, double %b.coerce0, double %b.coerce1, double %b.coerce2, double %b.coerce3, i32 %c)
+// Lin32: define{{.*}} x86_regcallcc void @__regcall3__hfa1(i32 inreg %a, double %b.0, double %b.1, double %b.2, double %b.3, i32 inreg %c)
+// Lin64: define{{.*}} x86_regcallcc void @__regcall3__hfa1(i32 %a, double %b.coerce0, double %b.coerce1, double %b.coerce2, double %b.coerce3, i32 %c)
// HFAs that would require more than six total SSE registers are passed
// indirectly. Additional vector arguments can consume the rest of the SSE
void __regcall hfa2(struct HFA4 a, struct HFA4 b, double c) {}
// Win32: define dso_local x86_regcallcc void @__regcall3__hfa2(double %a.0, double %a.1, double %a.2, double %a.3, double %b.0, double %b.1, double %b.2, double %b.3, double* inreg %0)
// Win64: define dso_local x86_regcallcc void @__regcall3__hfa2(double %a.0, double %a.1, double %a.2, double %a.3, double %b.0, double %b.1, double %b.2, double %b.3, double %c)
-// Lin32: define x86_regcallcc void @__regcall3__hfa2(double %a.0, double %a.1, double %a.2, double %a.3, double %b.0, double %b.1, double %b.2, double %b.3, double* inreg %0)
-// Lin64: define x86_regcallcc void @__regcall3__hfa2(double %a.coerce0, double %a.coerce1, double %a.coerce2, double %a.coerce3, double %b.coerce0, double %b.coerce1, double %b.coerce2, double %b.coerce3, double %c)
+// Lin32: define{{.*}} x86_regcallcc void @__regcall3__hfa2(double %a.0, double %a.1, double %a.2, double %a.3, double %b.0, double %b.1, double %b.2, double %b.3, double* inreg %0)
+// Lin64: define{{.*}} x86_regcallcc void @__regcall3__hfa2(double %a.coerce0, double %a.coerce1, double %a.coerce2, double %a.coerce3, double %b.coerce0, double %b.coerce1, double %b.coerce2, double %b.coerce3, double %c)
// Ensure that we pass builtin types directly while counting them against the
// SSE register usage.
void __regcall hfa3(double a, double b, double c, double d, double e, struct HFA2 f) {}
// Win32: define dso_local x86_regcallcc void @__regcall3__hfa3(double %a, double %b, double %c, double %d, double %e, double %f.0, double %f.1)
// Win64: define dso_local x86_regcallcc void @__regcall3__hfa3(double %a, double %b, double %c, double %d, double %e, double %f.0, double %f.1)
-// Lin32: define x86_regcallcc void @__regcall3__hfa3(double %a, double %b, double %c, double %d, double %e, double %f.0, double %f.1)
-// Lin64: define x86_regcallcc void @__regcall3__hfa3(double %a, double %b, double %c, double %d, double %e, double %f.coerce0, double %f.coerce1)
+// Lin32: define{{.*}} x86_regcallcc void @__regcall3__hfa3(double %a, double %b, double %c, double %d, double %e, double %f.0, double %f.1)
+// Lin64: define{{.*}} x86_regcallcc void @__regcall3__hfa3(double %a, double %b, double %c, double %d, double %e, double %f.coerce0, double %f.coerce1)
// Aggregates with more than four elements are not HFAs and are passed byval(%b.3, double).
// Because they are not classified as homogeneous, they don't get special
void __regcall hfa4(struct HFA5 a) {}
// Win32: define dso_local x86_regcallcc void @__regcall3__hfa4(%struct.HFA5* byval(%struct.HFA5) align 4 %0)
// Win64: define dso_local x86_regcallcc void @__regcall3__hfa4(%struct.HFA5* %a)
-// Lin32: define x86_regcallcc void @__regcall3__hfa4(%struct.HFA5* byval(%struct.HFA5) align 4 %a)
-// Lin64: define x86_regcallcc void @__regcall3__hfa4(double %a.coerce0, double %a.coerce1, double %a.coerce2, double %a.coerce3, double %a.coerce4)
+// Lin32: define{{.*}} x86_regcallcc void @__regcall3__hfa4(%struct.HFA5* byval(%struct.HFA5) align 4 %a)
+// Lin64: define{{.*}} x86_regcallcc void @__regcall3__hfa4(double %a.coerce0, double %a.coerce1, double %a.coerce2, double %a.coerce3, double %a.coerce4)
// Return HFAs of 4 or fewer elements in registers.
static struct HFA2 g_hfa2;
struct HFA2 __regcall hfa5(void) { return g_hfa2; }
// Win32: define dso_local x86_regcallcc %struct.HFA2 @__regcall3__hfa5()
// Win64: define dso_local x86_regcallcc %struct.HFA2 @__regcall3__hfa5()
-// Lin32: define x86_regcallcc %struct.HFA2 @__regcall3__hfa5()
-// Lin64: define x86_regcallcc %struct.HFA2 @__regcall3__hfa5()
+// Lin32: define{{.*}} x86_regcallcc %struct.HFA2 @__regcall3__hfa5()
+// Lin64: define{{.*}} x86_regcallcc %struct.HFA2 @__regcall3__hfa5()
typedef float __attribute__((vector_size(16))) v4f32;
struct HVA2 { v4f32 x, y; };
void __regcall hva1(int a, struct HVA4 b, int c) {}
// Win32: define dso_local x86_regcallcc void @__regcall3__hva1(i32 inreg %a, <4 x float> %b.0, <4 x float> %b.1, <4 x float> %b.2, <4 x float> %b.3, i32 inreg %c)
// Win64: define dso_local x86_regcallcc void @__regcall3__hva1(i32 %a, <4 x float> %b.0, <4 x float> %b.1, <4 x float> %b.2, <4 x float> %b.3, i32 %c)
-// Lin32: define x86_regcallcc void @__regcall3__hva1(i32 inreg %a, <4 x float> %b.0, <4 x float> %b.1, <4 x float> %b.2, <4 x float> %b.3, i32 inreg %c)
-// Lin64: define x86_regcallcc void @__regcall3__hva1(i32 %a, <4 x float> %b.coerce0, <4 x float> %b.coerce1, <4 x float> %b.coerce2, <4 x float> %b.coerce3, i32 %c)
+// Lin32: define{{.*}} x86_regcallcc void @__regcall3__hva1(i32 inreg %a, <4 x float> %b.0, <4 x float> %b.1, <4 x float> %b.2, <4 x float> %b.3, i32 inreg %c)
+// Lin64: define{{.*}} x86_regcallcc void @__regcall3__hva1(i32 %a, <4 x float> %b.coerce0, <4 x float> %b.coerce1, <4 x float> %b.coerce2, <4 x float> %b.coerce3, i32 %c)
void __regcall hva2(struct HVA4 a, struct HVA4 b, v4f32 c) {}
// Win32: define dso_local x86_regcallcc void @__regcall3__hva2(<4 x float> %a.0, <4 x float> %a.1, <4 x float> %a.2, <4 x float> %a.3, <4 x float> %b.0, <4 x float> %b.1, <4 x float> %b.2, <4 x float> %b.3, <4 x float>* inreg %0)
// Win64: define dso_local x86_regcallcc void @__regcall3__hva2(<4 x float> %a.0, <4 x float> %a.1, <4 x float> %a.2, <4 x float> %a.3, <4 x float> %b.0, <4 x float> %b.1, <4 x float> %b.2, <4 x float> %b.3, <4 x float> %c)
-// Lin32: define x86_regcallcc void @__regcall3__hva2(<4 x float> %a.0, <4 x float> %a.1, <4 x float> %a.2, <4 x float> %a.3, <4 x float> %b.0, <4 x float> %b.1, <4 x float> %b.2, <4 x float> %b.3, <4 x float>* inreg %0)
-// Lin64: define x86_regcallcc void @__regcall3__hva2(<4 x float> %a.coerce0, <4 x float> %a.coerce1, <4 x float> %a.coerce2, <4 x float> %a.coerce3, <4 x float> %b.coerce0, <4 x float> %b.coerce1, <4 x float> %b.coerce2, <4 x float> %b.coerce3, <4 x float> %c)
+// Lin32: define{{.*}} x86_regcallcc void @__regcall3__hva2(<4 x float> %a.0, <4 x float> %a.1, <4 x float> %a.2, <4 x float> %a.3, <4 x float> %b.0, <4 x float> %b.1, <4 x float> %b.2, <4 x float> %b.3, <4 x float>* inreg %0)
+// Lin64: define{{.*}} x86_regcallcc void @__regcall3__hva2(<4 x float> %a.coerce0, <4 x float> %a.coerce1, <4 x float> %a.coerce2, <4 x float> %a.coerce3, <4 x float> %b.coerce0, <4 x float> %b.coerce1, <4 x float> %b.coerce2, <4 x float> %b.coerce3, <4 x float> %c)
void __regcall hva3(v4f32 a, v4f32 b, v4f32 c, v4f32 d, v4f32 e, struct HVA2 f) {}
// Win32: define dso_local x86_regcallcc void @__regcall3__hva3(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e, <4 x float> %f.0, <4 x float> %f.1)
// Win64: define dso_local x86_regcallcc void @__regcall3__hva3(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e, <4 x float> %f.0, <4 x float> %f.1)
-// Lin32: define x86_regcallcc void @__regcall3__hva3(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e, <4 x float> %f.0, <4 x float> %f.1)
-// Lin64: define x86_regcallcc void @__regcall3__hva3(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e, <4 x float> %f.coerce0, <4 x float> %f.coerce1)
+// Lin32: define{{.*}} x86_regcallcc void @__regcall3__hva3(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e, <4 x float> %f.0, <4 x float> %f.1)
+// Lin64: define{{.*}} x86_regcallcc void @__regcall3__hva3(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e, <4 x float> %f.coerce0, <4 x float> %f.coerce1)
typedef float __attribute__((ext_vector_type(3))) v3f32;
struct OddSizeHVA { v3f32 x, y; };
void __regcall odd_size_hva(struct OddSizeHVA a) {}
// Win32: define dso_local x86_regcallcc void @__regcall3__odd_size_hva(<3 x float> %a.0, <3 x float> %a.1)
// Win64: define dso_local x86_regcallcc void @__regcall3__odd_size_hva(<3 x float> %a.0, <3 x float> %a.1)
-// Lin32: define x86_regcallcc void @__regcall3__odd_size_hva(<3 x float> %a.0, <3 x float> %a.1)
-// Lin64: define x86_regcallcc void @__regcall3__odd_size_hva(<3 x float> %a.coerce0, <3 x float> %a.coerce1)
+// Lin32: define{{.*}} x86_regcallcc void @__regcall3__odd_size_hva(<3 x float> %a.0, <3 x float> %a.1)
+// Lin64: define{{.*}} x86_regcallcc void @__regcall3__odd_size_hva(<3 x float> %a.coerce0, <3 x float> %a.coerce1)
struct HFA6 { __m128 f[4]; };
struct HFA6 __regcall ret_reg_reused(struct HFA6 a, struct HFA6 b, struct HFA6 c, struct HFA6 d){ struct HFA6 h; return h;}
// Win32: define dso_local x86_regcallcc %struct.HFA6 @__regcall3__ret_reg_reused(<4 x float> %a.0, <4 x float> %a.1, <4 x float> %a.2, <4 x float> %a.3, <4 x float> %b.0, <4 x float> %b.1, <4 x float> %b.2, <4 x float> %b.3, %struct.HFA6* inreg %c, %struct.HFA6* inreg %d)
// Win64: define dso_local x86_regcallcc %struct.HFA6 @__regcall3__ret_reg_reused(<4 x float> %a.0, <4 x float> %a.1, <4 x float> %a.2, <4 x float> %a.3, <4 x float> %b.0, <4 x float> %b.1, <4 x float> %b.2, <4 x float> %b.3, <4 x float> %c.0, <4 x float> %c.1, <4 x float> %c.2, <4 x float> %c.3, <4 x float> %d.0, <4 x float> %d.1, <4 x float> %d.2, <4 x float> %d.3)
-// Lin32: define x86_regcallcc %struct.HFA6 @__regcall3__ret_reg_reused(<4 x float> %a.0, <4 x float> %a.1, <4 x float> %a.2, <4 x float> %a.3, <4 x float> %b.0, <4 x float> %b.1, <4 x float> %b.2, <4 x float> %b.3, %struct.HFA6* inreg %c, %struct.HFA6* inreg %d)
-// Lin64: define x86_regcallcc %struct.HFA6 @__regcall3__ret_reg_reused([4 x <4 x float>] %a.coerce, [4 x <4 x float>] %b.coerce, [4 x <4 x float>] %c.coerce, [4 x <4 x float>] %d.coerce)
+// Lin32: define{{.*}} x86_regcallcc %struct.HFA6 @__regcall3__ret_reg_reused(<4 x float> %a.0, <4 x float> %a.1, <4 x float> %a.2, <4 x float> %a.3, <4 x float> %b.0, <4 x float> %b.1, <4 x float> %b.2, <4 x float> %b.3, %struct.HFA6* inreg %c, %struct.HFA6* inreg %d)
+// Lin64: define{{.*}} x86_regcallcc %struct.HFA6 @__regcall3__ret_reg_reused([4 x <4 x float>] %a.coerce, [4 x <4 x float>] %b.coerce, [4 x <4 x float>] %c.coerce, [4 x <4 x float>] %d.coerce)
// PR7025
void FASTCALL f1(int i, int j, int k);
-// CHECK-LABEL: define void @f1(i32 inreg %i, i32 inreg %j, i32 %k)
+// CHECK-LABEL: define{{.*}} void @f1(i32 inreg %i, i32 inreg %j, i32 %k)
void f1(int i, int j, int k) { }
int
struct empty_float2 { struct {}; float f; float g; };
-// CHECK: define float @_Z14f_empty_float212empty_float2(float %0, float %1)
+// CHECK: define{{.*}} float @_Z14f_empty_float212empty_float2(float %0, float %1)
// CHECK: { [4 x i8], float, float }
float f_empty_float2(empty_float2 a) {
return a.g;
struct empty_double2 { struct {}; double f; double g; };
-// CHECK: define double @_Z15f_empty_double213empty_double2(double %0, double %1)
+// CHECK: define{{.*}} double @_Z15f_empty_double213empty_double2(double %0, double %1)
// CHECK: { [8 x i8], double, double }
double f_empty_double2(empty_double2 a) {
return a.g;
struct empty_float_double { struct {}; float f; double g; };
-// CHECK: define double @_Z20f_empty_float_double18empty_float_double(float %0, double %1)
+// CHECK: define{{.*}} double @_Z20f_empty_float_double18empty_float_double(float %0, double %1)
// CHECK: { [4 x i8], float, double }
double f_empty_float_double(empty_float_double a) {
return a.g;
struct empty_double_float { struct {}; double f; float g; };
-// CHECK: define double @_Z20f_empty_double_float18empty_double_float(double %0, float %1)
+// CHECK: define{{.*}} double @_Z20f_empty_double_float18empty_double_float(double %0, float %1)
// CHECK: { [8 x i8], double, float }
double f_empty_double_float(empty_double_float a) {
return a.g;
struct empty_complex_f { struct {}; float _Complex fc; };
-// CHECK: define float @_Z17f_empty_complex_f15empty_complex_f(float %0, float %1)
+// CHECK: define{{.*}} float @_Z17f_empty_complex_f15empty_complex_f(float %0, float %1)
// CHECK: { [4 x i8], float, float }
float f_empty_complex_f(empty_complex_f a) {
return __imag__ a.fc;
struct empty_complex_d { struct {}; double _Complex fc; };
-// CHECK: define double @_Z17f_empty_complex_d15empty_complex_d(double %0, double %1)
+// CHECK: define{{.*}} double @_Z17f_empty_complex_d15empty_complex_d(double %0, double %1)
// CHECK: { [8 x i8], double, double }
double f_empty_complex_d(empty_complex_d a) {
return __imag__ a.fc;
// i.e. we ignore -mconstructor-aliases when field paddings are added
// because the paddings in InheritsFrom_WithVirtualDtor needs to be unpoisoned
// in the dtor.
-// WITH_CTOR_ALIASES-LABEL: define void @_Z35Create_InheritsFrom_WithVirtualDtor
+// WITH_CTOR_ALIASES-LABEL: define{{.*}} void @_Z35Create_InheritsFrom_WithVirtualDtor
// WITH_CTOR_ALIASES-NOT: call void @_ZN15WithVirtualDtorD2Ev
// WITH_CTOR_ALIASES: call void @_ZN28InheritsFrom_WithVirtualDtorD2Ev
// WITH_CTOR_ALIASES: ret void
ClassWithTrivialCopy s3(*s2);
}
-// CHECK-LABEL: define void @_Z15MakeTrivialCopyP20ClassWithTrivialCopyS0_
+// CHECK-LABEL: define{{.*}} void @_Z15MakeTrivialCopyP20ClassWithTrivialCopyS0_
// CHECK-NOT: memcpy
// CHECK: ret void
// Ensure the align 8 is passed through:
-// CHECK-LABEL: define void @f1()
+// CHECK-LABEL: define{{.*}} void @f1()
// CHECK: call void @f1_helper(%struct.s1* byval(%struct.s1) align 8 @x1)
// Also ensure the declaration of f1_helper includes it
// CHECK: declare void @f1_helper(%struct.s1* byval(%struct.s1) align 8)
// RUN: %clang_cc1 -triple sparc -emit-llvm -o - %s | FileCheck %s
#include <stdarg.h>
-// CHECK-LABEL: define i32 @get_int
+// CHECK-LABEL: define{{.*}} i32 @get_int
// CHECK: [[RESULT:%[a-z_0-9]+]] = va_arg {{.*}}, i32{{$}}
// CHECK: store i32 [[RESULT]], i32* [[LOC:%[a-z_0-9]+]]
// CHECK: [[RESULT2:%[a-z_0-9]+]] = load i32, i32* [[LOC]]
struct Foo dest;
-// CHECK-LABEL: define void @get_struct
+// CHECK-LABEL: define{{.*}} void @get_struct
// CHECK: [[RESULT:%[a-z_0-9]+]] = va_arg {{.*}}, %struct.Foo*{{$}}
// CHECK: [[RESULT2:%[a-z_0-9]+]] = bitcast {{.*}} [[RESULT]] to i8*
// CHECK: call void @llvm.memcpy{{.*}}@dest{{.*}}, i8* align {{[0-9]+}} [[RESULT2]]
enum E enum_dest;
-// CHECK-LABEL: define void @get_enum
+// CHECK-LABEL: define{{.*}} void @get_enum
// CHECK: va_arg i8** {{.*}}, i32
void get_enum(va_list *args) {
enum_dest = va_arg(*args, enum E);
// RUN: %clang_cc1 -triple sparc-unknown-unknown -emit-llvm %s -o - | FileCheck %s
-// CHECK-LABEL: define { float, float } @p({ float, float }* byval({ float, float }) align 4 %a, { float, float }* byval({ float, float }) align 4 %b) #0 {
+// CHECK-LABEL: define{{.*}} { float, float } @p({ float, float }* byval({ float, float }) align 4 %a, { float, float }* byval({ float, float }) align 4 %b) #0 {
float __complex__
p (float __complex__ a, float __complex__ b)
{
}
-// CHECK-LABEL: define { double, double } @q({ double, double }* byval({ double, double }) align 8 %a, { double, double }* byval({ double, double }) align 8 %b) #0 {
+// CHECK-LABEL: define{{.*}} { double, double } @q({ double, double }* byval({ double, double }) align 8 %a, { double, double }* byval({ double, double }) align 8 %b) #0 {
double __complex__
q (double __complex__ a, double __complex__ b)
{
}
-// CHECK-LABEL: define { i64, i64 } @r({ i64, i64 }* byval({ i64, i64 }) align 8 %a, { i64, i64 }* byval({ i64, i64 }) align 8 %b) #0 {
+// CHECK-LABEL: define{{.*}} { i64, i64 } @r({ i64, i64 }* byval({ i64, i64 }) align 8 %a, { i64, i64 }* byval({ i64, i64 }) align 8 %b) #0 {
long long __complex__
r (long long __complex__ a, long long __complex__ b)
{
// RUN: %clang_cc1 -triple sparc-unknown-unknown -emit-llvm %s -o - | FileCheck %s
-// CHECK: define float @fabsf(float %a)
+// CHECK: define{{.*}} float @fabsf(float %a)
// CHECK: %{{.*}} = call float asm sideeffect "fabss $1, $0;", "=e,f"(float %{{.*}})
float fabsf(float a) {
float res;
// RUN: %clang_cc1 -triple sparcv9-unknown-unknown -emit-llvm %s -o - | FileCheck %s
#include <stdarg.h>
-// CHECK-LABEL: define void @f_void()
+// CHECK-LABEL: define{{.*}} void @f_void()
void f_void(void) {}
// Arguments and return values smaller than the word size are extended.
-// CHECK-LABEL: define signext i32 @f_int_1(i32 signext %x)
+// CHECK-LABEL: define{{.*}} signext i32 @f_int_1(i32 signext %x)
int f_int_1(int x) { return x; }
-// CHECK-LABEL: define zeroext i32 @f_int_2(i32 zeroext %x)
+// CHECK-LABEL: define{{.*}} zeroext i32 @f_int_2(i32 zeroext %x)
unsigned f_int_2(unsigned x) { return x; }
-// CHECK-LABEL: define i64 @f_int_3(i64 %x)
+// CHECK-LABEL: define{{.*}} i64 @f_int_3(i64 %x)
long long f_int_3(long long x) { return x; }
-// CHECK-LABEL: define signext i8 @f_int_4(i8 signext %x)
+// CHECK-LABEL: define{{.*}} signext i8 @f_int_4(i8 signext %x)
char f_int_4(char x) { return x; }
-// CHECK-LABEL: define fp128 @f_ld(fp128 %x)
+// CHECK-LABEL: define{{.*}} fp128 @f_ld(fp128 %x)
long double f_ld(long double x) { return x; }
// Small structs are passed in registers.
int *a, *b;
};
-// CHECK-LABEL: define %struct.small @f_small(i32* %x.coerce0, i32* %x.coerce1)
+// CHECK-LABEL: define{{.*}} %struct.small @f_small(i32* %x.coerce0, i32* %x.coerce1)
struct small f_small(struct small x) {
x.a += *x.b;
x.b = 0;
int *c, *d;
};
-// CHECK-LABEL: define %struct.medium @f_medium(%struct.medium* %x)
+// CHECK-LABEL: define{{.*}} %struct.medium @f_medium(%struct.medium* %x)
struct medium f_medium(struct medium x) {
x.a += *x.b;
x.b = 0;
int x;
};
-// CHECK-LABEL: define void @f_large(%struct.large* noalias sret(%struct.large) align 8 %agg.result, %struct.large* %x)
+// CHECK-LABEL: define{{.*}} void @f_large(%struct.large* noalias sret(%struct.large) align 8 %agg.result, %struct.large* %x)
struct large f_large(struct large x) {
x.a += *x.b;
x.b = 0;
int a, b;
};
-// CHECK-LABEL: define i64 @f_reg(i64 %x.coerce)
+// CHECK-LABEL: define{{.*}} i64 @f_reg(i64 %x.coerce)
struct reg f_reg(struct reg x) {
x.a += x.b;
return x;
float b;
};
-// CHECK-LABEL: define inreg %struct.mixed @f_mixed(i32 inreg %x.coerce0, float inreg %x.coerce1)
+// CHECK-LABEL: define{{.*}} inreg %struct.mixed @f_mixed(i32 inreg %x.coerce0, float inreg %x.coerce1)
struct mixed f_mixed(struct mixed x) {
x.a += 1;
return x;
double b;
};
-// CHECK: define { i64, double } @f_mixed2(i64 %x.coerce0, double %x.coerce1)
+// CHECK: define{{.*}} { i64, double } @f_mixed2(i64 %x.coerce0, double %x.coerce1)
// CHECK: store i64 %x.coerce0
// CHECK: store double %x.coerce1
struct mixed2 f_mixed2(struct mixed2 x) {
char a;
};
-// CHECK-LABEL: define i64 @f_tiny(i64 %x.coerce)
+// CHECK-LABEL: define{{.*}} i64 @f_tiny(i64 %x.coerce)
// CHECK: %[[HB:[^ ]+]] = lshr i64 %x.coerce, 56
// CHECK: = trunc i64 %[[HB]] to i8
struct tiny f_tiny(struct tiny x) {
return x;
}
-// CHECK-LABEL: define void @call_tiny()
+// CHECK-LABEL: define{{.*}} void @call_tiny()
// CHECK: %[[XV:[^ ]+]] = zext i8 %{{[^ ]+}} to i64
// CHECK: %[[HB:[^ ]+]] = shl i64 %[[XV]], 56
// CHECK: = call i64 @f_tiny(i64 %[[HB]])
f_tiny(x);
}
-// CHECK-LABEL: define signext i32 @f_variable(i8* %f, ...)
+// CHECK-LABEL: define{{.*}} signext i32 @f_variable(i8* %f, ...)
// CHECK: %ap = alloca i8*
// CHECK: call void @llvm.va_start
//
return __builtin_dwarf_sp_column();
}
-// CHECK-LABEL: define signext i32 @test()
+// CHECK-LABEL: define{{.*}} signext i32 @test()
// CHECK: store i8 8, i8* getelementptr inbounds ([103 x i8], [103 x i8]* @dwarf_reg_size_table, i64 0, i64 0)
// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([103 x i8], [103 x i8]* @dwarf_reg_size_table, i64 0, i64 1)
// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([103 x i8], [103 x i8]* @dwarf_reg_size_table, i64 0, i64 2)
return a - b - 3.0f16;
}
-// CHECK: define spir_func half @_Z4fmulDF16_(half %arg)
+// CHECK: define{{.*}} spir_func half @_Z4fmulDF16_(half %arg)
_Float16 fmul(_Float16 arg) {
_Float16 a = 1.0f16;
const _Float16 b = 2.0f16;
// RUN: %clang_cc1 -triple powerpc64le-linux-gnu -O0 -S -emit-llvm -o- %s -fstack-clash-protection | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64-linux-gnu -O0 -S -emit-llvm -o- %s -fstack-clash-protection | FileCheck %s
-// CHECK: define void @large_stack() #[[A:.*]] {
+// CHECK: define{{.*}} void @large_stack() #[[A:.*]] {
void large_stack() {
volatile int stack[20000], i;
for (i = 0; i < sizeof(stack) / sizeof(int); ++i)
stack[i] = i;
}
-// CHECK: define void @vla({{.*}}) #[[A:.*]] {
+// CHECK: define{{.*}} void @vla({{.*}}) #[[A:.*]] {
void vla(int n) {
volatile int vla[n];
__builtin_memset(&vla[0], 0, 1);
}
-// CHECK: define void @builtin_alloca({{.*}}) #[[A:.*]] {
+// CHECK: define{{.*}} void @builtin_alloca({{.*}}) #[[A:.*]] {
void builtin_alloca(int n) {
volatile void *mem = __builtin_alloca(n);
}
// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm -o - -mstack-alignment=64 %s | FileCheck %s
-// CHECK-LABEL: define void @other()
+// CHECK-LABEL: define{{.*}} void @other()
// CHECK: [[OTHER:#[0-9]+]]
// CHECK: {
void other(void) {}
-// CHECK-LABEL: define i32 @main(
+// CHECK-LABEL: define{{.*}} i32 @main(
// CHECK: [[MAIN:#[0-9]+]]
// CHECK: {
int main(int argc, char **argv) {
void __attribute__((stdcall)) f2(void);
void __attribute__((thiscall)) f3(void);
void __attribute__((fastcall)) f4(void) {
-// CHECK-LABEL: define x86_fastcallcc void @f4()
+// CHECK-LABEL: define{{.*}} x86_fastcallcc void @f4()
f1();
// CHECK: call x86_fastcallcc void @f1()
}
void __attribute__((stdcall)) f5(void) {
-// CHECK-LABEL: define x86_stdcallcc void @f5()
+// CHECK-LABEL: define{{.*}} x86_stdcallcc void @f5()
f2();
// CHECK: call x86_stdcallcc void @f2()
}
void __attribute__((thiscall)) f6(void) {
-// CHECK-LABEL: define x86_thiscallcc void @f6()
+// CHECK-LABEL: define{{.*}} x86_thiscallcc void @f6()
f3();
// CHECK: call x86_thiscallcc void @f3()
}
void __attribute__((fastcall)) foo1(int y);
void bar1(int y) {
- // CHECK-LABEL: define void @bar1
+ // CHECK-LABEL: define{{.*}} void @bar1
// CHECK: call x86_fastcallcc void @foo1(i32 inreg %
foo1(y);
}
};
void __attribute__((fastcall)) foo2(struct S1 y);
void bar2(struct S1 y) {
- // CHECK-LABEL: define void @bar2
+ // CHECK-LABEL: define{{.*}} void @bar2
// CHECK: call x86_fastcallcc void @foo2(i32 inreg undef, i32 %
foo2(y);
}
void __attribute__((fastcall)) foo3(int *y);
void bar3(int *y) {
- // CHECK-LABEL: define void @bar3
+ // CHECK-LABEL: define{{.*}} void @bar3
// CHECK: call x86_fastcallcc void @foo3(i32* inreg %
foo3(y);
}
enum Enum {Eval};
void __attribute__((fastcall)) foo4(enum Enum y);
void bar4(enum Enum y) {
- // CHECK-LABEL: define void @bar4
+ // CHECK-LABEL: define{{.*}} void @bar4
// CHECK: call x86_fastcallcc void @foo4(i32 inreg %
foo4(y);
}
};
void __attribute__((fastcall)) foo5(struct S2 y);
void bar5(struct S2 y) {
- // CHECK-LABEL: define void @bar5
+ // CHECK-LABEL: define{{.*}} void @bar5
// CHECK: call x86_fastcallcc void @foo5(%struct.S2* byval(%struct.S2) align 4 %
foo5(y);
}
void __attribute__((fastcall)) foo6(long long y);
void bar6(long long y) {
- // CHECK-LABEL: define void @bar6
+ // CHECK-LABEL: define{{.*}} void @bar6
// CHECK: call x86_fastcallcc void @foo6(i64 %
foo6(y);
}
void __attribute__((fastcall)) foo7(int a, struct S1 b, int c);
void bar7(int a, struct S1 b, int c) {
- // CHECK-LABEL: define void @bar7
+ // CHECK-LABEL: define{{.*}} void @bar7
// CHECK: call x86_fastcallcc void @foo7(i32 inreg %{{.*}}, i32 %{{.*}}, i32 %{{.*}}
foo7(a, b, c);
}
void __attribute__((fastcall)) foo8(struct S1 a, int b);
void bar8(struct S1 a, int b) {
- // CHECK-LABEL: define void @bar8
+ // CHECK-LABEL: define{{.*}} void @bar8
// CHECK: call x86_fastcallcc void @foo8(i32 inreg undef, i32 %{{.*}}, i32 inreg %
foo8(a, b);
}
void __attribute__((fastcall)) foo9(struct S2 a, int b);
void bar9(struct S2 a, int b) {
- // CHECK-LABEL: define void @bar9
+ // CHECK-LABEL: define{{.*}} void @bar9
// CHECK: call x86_fastcallcc void @foo9(%struct.S2* byval(%struct.S2) align 4 %{{.*}}, i32 %
foo9(a, b);
}
void __attribute__((fastcall)) foo10(float y, int x);
void bar10(float y, int x) {
- // CHECK-LABEL: define void @bar10
+ // CHECK-LABEL: define{{.*}} void @bar10
// CHECK: call x86_fastcallcc void @foo10(float %{{.*}}, i32 inreg %
foo10(y, x);
}
void __attribute__((fastcall)) foo11(double y, int x);
void bar11(double y, int x) {
- // CHECK-LABEL: define void @bar11
+ // CHECK-LABEL: define{{.*}} void @bar11
// CHECK: call x86_fastcallcc void @foo11(double %{{.*}}, i32 inreg %
foo11(y, x);
}
};
void __attribute__((fastcall)) foo12(struct S3 y, int x);
void bar12(struct S3 y, int x) {
- // CHECK-LABEL: define void @bar12
+ // CHECK-LABEL: define{{.*}} void @bar12
// CHECK: call x86_fastcallcc void @foo12(float %{{.*}}, i32 inreg %
foo12(y, x);
}
return j;
}
-// CHECK-LABEL: define i32 @foo4t()
+// CHECK-LABEL: define{{.*}} i32 @foo4t()
// CHECK: ret i32 376
// CHECK: }
int foo4t() {
return foo4(111) + foo4(99) + foo4(222) + foo4(601);
}
-// CHECK-LABEL: define void @foo5()
+// CHECK-LABEL: define{{.*}} void @foo5()
// CHECK-NOT: switch
// CHECK: }
void foo5(){
}
}
-// CHECK-LABEL: define void @foo6()
+// CHECK-LABEL: define{{.*}} void @foo6()
// CHECK-NOT: switch
// CHECK: }
void foo6(){
}
}
-// CHECK-LABEL: define void @foo7()
+// CHECK-LABEL: define{{.*}} void @foo7()
// CHECK-NOT: switch
// CHECK: }
void foo7(){
}
-// CHECK-LABEL: define i32 @f8(
+// CHECK-LABEL: define{{.*}} i32 @f8(
// CHECK: ret i32 3
// CHECK: }
int f8(unsigned x) {
// Ensure that default after a case range is not ignored.
//
-// CHECK-LABEL: define i32 @f9()
+// CHECK-LABEL: define{{.*}} i32 @f9()
// CHECK: ret i32 10
// CHECK: }
static int f9_0(unsigned x) {
// miscompilation of fallthrough from default to a (tested) case
// range.
//
-// CHECK-LABEL: define i32 @f10()
+// CHECK-LABEL: define{{.*}} i32 @f10()
// CHECK: ret i32 10
// CHECK: }
static int f10_0(unsigned x) {
// This generated incorrect code because of poor switch chaining.
//
-// CHECK-LABEL: define i32 @f11(
+// CHECK-LABEL: define{{.*}} i32 @f11(
// CHECK: ret i32 3
// CHECK: }
int f11(int x) {
// This just asserted because of the way case ranges were calculated.
//
-// CHECK-LABEL: define i32 @f12(
+// CHECK-LABEL: define{{.*}} i32 @f12(
// CHECK: ret i32 3
// CHECK: }
int f12(int x) {
// Make sure return is not constant (if empty range is skipped or miscompiled)
//
-// CHECK-LABEL: define i32 @f13(
+// CHECK-LABEL: define{{.*}} i32 @f13(
// CHECK: ret i32 %
// CHECK: }
int f13(unsigned x) {
// CHECK: @d.e = internal thread_local global
// CHECK: @d.f = internal thread_local global
// CHECK: @f.a = internal thread_local(initialexec) global
-// CHECK: @a = thread_local global
-// CHECK: @g = thread_local global
-// CHECK: @h = thread_local(localdynamic) global
-// CHECK: @i = thread_local(initialexec) global
-// CHECK: @j = thread_local(localexec) global
+// CHECK: @a ={{.*}} thread_local global
+// CHECK: @g ={{.*}} thread_local global
+// CHECK: @h ={{.*}} thread_local(localdynamic) global
+// CHECK: @i ={{.*}} thread_local(initialexec) global
+// CHECK: @j ={{.*}} thread_local(localexec) global
// CHECK-NOT: @_ZTW
// CHECK-NOT: @_ZTH
// Note that unlike normal C uninitialized global variables,
// uninitialized TLS variables do NOT have COMMON linkage.
-// CHECK-GD: @z1 = global i32 0
-// CHECK-GD: @z2 = global i32 0
-// CHECK-GD: @x = thread_local global i32 0
+// CHECK-GD: @z1 ={{.*}} global i32 0
+// CHECK-GD: @z2 ={{.*}} global i32 0
+// CHECK-GD: @x ={{.*}} thread_local global i32 0
// CHECK-GD: @_ZZ1fvE1y = internal thread_local global i32 0
-// CHECK-GD: @z = thread_local(initialexec) global i32 0
-// CHECK-GD: @s1 = thread_local global %struct.S zeroinitializer
-// CHECK-GD: @t1 = thread_local global %struct.T zeroinitializer
+// CHECK-GD: @z ={{.*}} thread_local(initialexec) global i32 0
+// CHECK-GD: @s1 ={{.*}} thread_local global %struct.S zeroinitializer
+// CHECK-GD: @t1 ={{.*}} thread_local global %struct.T zeroinitializer
// CHECK-GD: @__tls_guard = internal thread_local global i8 0
-// CHECK-LD: @z1 = global i32 0
-// CHECK-LD: @z2 = global i32 0
-// CHECK-LD: @x = thread_local(localdynamic) global i32 0
+// CHECK-LD: @z1 ={{.*}} global i32 0
+// CHECK-LD: @z2 ={{.*}} global i32 0
+// CHECK-LD: @x ={{.*}} thread_local(localdynamic) global i32 0
// CHECK-LD: @_ZZ1fvE1y = internal thread_local(localdynamic) global i32 0
-// CHECK-LD: @z = thread_local(initialexec) global i32 0
-// CHECK-LD: @s1 = thread_local(localdynamic) global %struct.S zeroinitializer
-// CHECK-LD: @t1 = thread_local(localdynamic) global %struct.T zeroinitializer
+// CHECK-LD: @z ={{.*}} thread_local(initialexec) global i32 0
+// CHECK-LD: @s1 ={{.*}} thread_local(localdynamic) global %struct.S zeroinitializer
+// CHECK-LD: @t1 ={{.*}} thread_local(localdynamic) global %struct.T zeroinitializer
// CHECK-LD: @__tls_guard = internal thread_local(localdynamic) global i8 0
-// CHECK-IE: @z1 = global i32 0
-// CHECK-IE: @z2 = global i32 0
-// CHECK-IE: @x = thread_local(initialexec) global i32 0
+// CHECK-IE: @z1 ={{.*}} global i32 0
+// CHECK-IE: @z2 ={{.*}} global i32 0
+// CHECK-IE: @x ={{.*}} thread_local(initialexec) global i32 0
// CHECK-IE: @_ZZ1fvE1y = internal thread_local(initialexec) global i32 0
-// CHECK-IE: @z = thread_local(initialexec) global i32 0
-// CHECK-IE: @s1 = thread_local(initialexec) global %struct.S zeroinitializer
-// CHECK-IE: @t1 = thread_local(initialexec) global %struct.T zeroinitializer
+// CHECK-IE: @z ={{.*}} thread_local(initialexec) global i32 0
+// CHECK-IE: @s1 ={{.*}} thread_local(initialexec) global %struct.S zeroinitializer
+// CHECK-IE: @t1 ={{.*}} thread_local(initialexec) global %struct.T zeroinitializer
// CHECK-IE: @__tls_guard = internal thread_local(initialexec) global i8 0
-// CHECK-LE: @z1 = global i32 0
-// CHECK-LE: @z2 = global i32 0
-// CHECK-LE: @x = thread_local(localexec) global i32 0
+// CHECK-LE: @z1 ={{.*}} global i32 0
+// CHECK-LE: @z2 ={{.*}} global i32 0
+// CHECK-LE: @x ={{.*}} thread_local(localexec) global i32 0
// CHECK-LE: @_ZZ1fvE1y = internal thread_local(localexec) global i32 0
-// CHECK-LE: @z = thread_local(initialexec) global i32 0
-// CHECK-LE: @s1 = thread_local(localexec) global %struct.S zeroinitializer
-// CHECK-LE: @t1 = thread_local(localexec) global %struct.T zeroinitializer
+// CHECK-LE: @z ={{.*}} thread_local(initialexec) global i32 0
+// CHECK-LE: @s1 ={{.*}} thread_local(localexec) global %struct.S zeroinitializer
+// CHECK-LE: @t1 ={{.*}} thread_local(localexec) global %struct.T zeroinitializer
// CHECK-LE: @__tls_guard = internal thread_local(localexec) global i8 0
float f;
} TU __attribute__((transparent_union));
-// CHECK-LABEL: define void @f0(i32 %tu.coerce)
+// CHECK-LABEL: define{{.*}} void @f0(i32 %tu.coerce)
// CHECK: %tu = alloca %union.TU, align 4
// CHECK: %coerce.dive = getelementptr inbounds %union.TU, %union.TU* %tu, i32 0, i32 0
// CHECK: store i32 %tu.coerce, i32* %coerce.dive, align 4
void f0(TU tu) {}
void f0(int i);
-// CHECK-LABEL: define void @f1(i32 %tu.coerce)
+// CHECK-LABEL: define{{.*}} void @f1(i32 %tu.coerce)
// CHECK: %tu = alloca %union.TU, align 4
// CHECK: %coerce.dive = getelementptr inbounds %union.TU, %union.TU* %tu, i32 0, i32 0
// CHECK: store i32 %tu.coerce, i32* %coerce.dive, align 4
void f1(int i);
void f1(TU tu) {}
-// CHECK-LABEL: define void @f2(i32 %i)
+// CHECK-LABEL: define{{.*}} void @f2(i32 %i)
// CHECK: %i.addr = alloca i32, align 4
// CHECK: store i32 %i, i32* %i.addr, align 4
void f2(TU tu);
void f2(int i) {}
-// CHECK-LABEL: define void @f3(i32 %i)
+// CHECK-LABEL: define{{.*}} void @f3(i32 %i)
// CHECK: %i.addr = alloca i32, align 4
// CHECK: store i32 %i, i32* %i.addr, align 4
void f3(int i) {}
void f3(TU tu);
// Also test functions with parameters specified K&R style.
-// CHECK-LABEL: define void @knrStyle(i32 %tu.coerce)
+// CHECK-LABEL: define{{.*}} void @knrStyle(i32 %tu.coerce)
// CHECK: %tu = alloca %union.TU, align 4
// CHECK: %coerce.dive = getelementptr inbounds %union.TU, %union.TU* %tu, i32 0, i32 0
// CHECK: store i32 %tu.coerce, i32* %coerce.dive, align 4
void f0(transp_t0 obj);
-// CHECK-LABEL: define void @f1_0(i32* %a0)
+// CHECK-LABEL: define{{.*}} void @f1_0(i32* %a0)
// CHECK: call void @f0(i8* %{{.*}})
// CHECK: call void %{{.*}}(i8* %{{[a-z0-9]*}})
// CHECK: }
-// ARM-LABEL: define arm_aapcscc void @f1_0(i32* %a0)
+// ARM-LABEL: define{{.*}} arm_aapcscc void @f1_0(i32* %a0)
// ARM: call arm_aapcscc void @f0(i8* %{{.*}})
// ARM: call arm_aapcscc void %{{.*}}(i8* %{{[a-z0-9]*}})
// ARM: }
void my_longjmp(void) __attribute__((noreturn));
-// CHECK-LABEL: define void @calls_noreturn()
+// CHECK-LABEL: define{{.*}} void @calls_noreturn()
void calls_noreturn() {
my_longjmp();
// CHECK: @__asan_handle_no_return{{.*}} !nosanitize
// RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm -o - %s -fsanitize=function -fno-sanitize-recover=all | FileCheck %s
-// CHECK-LABEL: define void @_Z3funv() #0 prologue <{ i32, i32 }> <{ i32 846595819, i32 trunc (i64 sub (i64 ptrtoint (i8** @0 to i64), i64 ptrtoint (void ()* @_Z3funv to i64)) to i32) }> {
+// CHECK-LABEL: define{{.*}} void @_Z3funv() #0 prologue <{ i32, i32 }> <{ i32 846595819, i32 trunc (i64 sub (i64 ptrtoint (i8** @0 to i64), i64 ptrtoint (void ()* @_Z3funv to i64)) to i32) }> {
void fun() {}
-// CHECK-LABEL: define void @_Z6callerPFvvE(void ()* %f)
+// CHECK-LABEL: define{{.*}} void @_Z6callerPFvvE(void ()* %f)
// CHECK: getelementptr <{ i32, i32 }>, <{ i32, i32 }>* {{.*}}, i32 0, i32 0, !nosanitize
// CHECK: load i32, i32* {{.*}}, align {{.*}}, !nosanitize
// CHECK: icmp eq i32 {{.*}}, 846595819, !nosanitize
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fms-extensions -emit-llvm < %s | FileCheck %s
-// CHECK: @a1 = global i32 1, align 1
+// CHECK: @a1 ={{.*}} global i32 1, align 1
__unaligned int a1 = 1;
-// CHECK: @a2 = global i32 1, align 1
+// CHECK: @a2 ={{.*}} global i32 1, align 1
int __unaligned a2 = 1;
// CHECK: @a3 = {{.*}} align 1
void bar(vect32 p[][2]);
-// CHECK-LABEL: define void @fred
+// CHECK-LABEL: define{{.*}} void @fred
void fred(unsigned Num, int Vec[2], int *Index, int Arr[4][2]) {
vect32 Tmp[4][2];
// Generate tbaa for the load of Index:
unsigned long li, lj, lk;
-// CHECK-LABEL: define void @testlongadd()
+// CHECK-LABEL: define{{.*}} void @testlongadd()
void testlongadd() {
// CHECK: call void @__ubsan_handle_add_overflow_minimal_abort()
li = lj + lk;
}
-// CHECK-LABEL: define void @testlongsub()
+// CHECK-LABEL: define{{.*}} void @testlongsub()
void testlongsub() {
// CHECK: call void @__ubsan_handle_sub_overflow_minimal_abort()
li = lj - lk;
}
-// CHECK-LABEL: define void @testlongmul()
+// CHECK-LABEL: define{{.*}} void @testlongmul()
void testlongmul() {
// CHECK: call void @__ubsan_handle_mul_overflow_minimal_abort()
li = lj * lk;
int opaque();
-// CHECK: define [[INT:i.*]] @test0() [[TF:#[0-9]+]] {
-// CHECK-NOEXC: define [[INT:i.*]] @test0() [[NUW:#[0-9]+]] {
+// CHECK: define{{.*}} [[INT:i.*]] @test0() [[TF:#[0-9]+]] {
+// CHECK-NOEXC: define{{.*}} [[INT:i.*]] @test0() [[NUW:#[0-9]+]] {
int test0(void) {
return opaque();
}
// <rdar://problem/8087431>: locally infer nounwind at -O0
-// CHECK: define [[INT:i.*]] @test1() [[NUW:#[0-9]+]] {
-// CHECK-NOEXC: define [[INT:i.*]] @test1() [[NUW]] {
+// CHECK: define{{.*}} [[INT:i.*]] @test1() [[NUW:#[0-9]+]] {
+// CHECK-NOEXC: define{{.*}} [[INT:i.*]] @test1() [[NUW]] {
int test1(void) {
return 0;
}
// <rdar://problem/8283071>: not for weak functions
-// CHECK: define weak [[INT:i.*]] @test2() [[TF]] {
-// CHECK-NOEXC: define weak [[INT:i.*]] @test2() [[NUW]] {
+// CHECK: define weak{{.*}} [[INT:i.*]] @test2() [[TF]] {
+// CHECK-NOEXC: define weak{{.*}} [[INT:i.*]] @test2() [[NUW]] {
__attribute__((weak)) int test2(void) {
return 0;
}
// WINDOWS: define dso_local void @f(i8* %f)
// WINDOWS: call void (i8*, ...) @v(i8* {{.*}}, i32 1, i32 2, i32 3, i64 0)
// WINDOWS: call void bitcast (void (...)* @kr to void (i8*, i32, i32, i32, i32)*)(i8* {{.*}}, i32 1, i32 2, i32 3, i32 0)
-// LINUX: define void @f(i8* %f)
+// LINUX: define{{.*}} void @f(i8* %f)
// LINUX: call void (i8*, ...) @v(i8* {{.*}}, i32 1, i32 2, i32 3, i32 0)
// LINUX: call void (i8*, i32, i32, i32, i32, ...) bitcast (void (...)* @kr to void (i8*, i32, i32, i32, i32, ...)*)(i8* {{.*}}, i32 1, i32 2, i32 3, i32 0)
// RUN: %clang_cc1 -triple ve-linux-gnu -emit-llvm %s -o - | FileCheck %s
-// CHECK-LABEL: define signext i8 @fun_si8(i8 signext %a, i8 signext %b) #0 {
+// CHECK-LABEL: define{{.*}} signext i8 @fun_si8(i8 signext %a, i8 signext %b) #0 {
char fun_si8(char a, char b) {
return a;
}
-// CHECK-LABEL: define zeroext i8 @fun_zi8(i8 zeroext %a, i8 zeroext %b) #0 {
+// CHECK-LABEL: define{{.*}} zeroext i8 @fun_zi8(i8 zeroext %a, i8 zeroext %b) #0 {
unsigned char fun_zi8(unsigned char a, unsigned char b) {
return a;
}
-// CHECK-LABEL: define signext i16 @fun_si16(i16 signext %a, i16 signext %b) #0 {
+// CHECK-LABEL: define{{.*}} signext i16 @fun_si16(i16 signext %a, i16 signext %b) #0 {
short fun_si16(short a, short b) {
return a;
}
-// CHECK-LABEL: define zeroext i16 @fun_zi16(i16 zeroext %a, i16 zeroext %b) #0 {
+// CHECK-LABEL: define{{.*}} zeroext i16 @fun_zi16(i16 zeroext %a, i16 zeroext %b) #0 {
unsigned short fun_zi16(unsigned short a, unsigned short b) {
return a;
}
-// CHECK-LABEL: define signext i32 @fun_si32(i32 signext %a, i32 signext %b) #0 {
+// CHECK-LABEL: define{{.*}} signext i32 @fun_si32(i32 signext %a, i32 signext %b) #0 {
int fun_si32(int a, int b) {
return a;
}
-// CHECK-LABEL: define zeroext i32 @fun_zi32(i32 zeroext %a, i32 zeroext %b) #0 {
+// CHECK-LABEL: define{{.*}} zeroext i32 @fun_zi32(i32 zeroext %a, i32 zeroext %b) #0 {
unsigned int fun_zi32(unsigned int a, unsigned int b) {
return a;
}
-// CHECK-LABEL: define i64 @fun_si64(i64 %a, i64 %b) #0 {
+// CHECK-LABEL: define{{.*}} i64 @fun_si64(i64 %a, i64 %b) #0 {
long fun_si64(long a, long b) {
return a;
}
-// CHECK-LABEL: define i64 @fun_zi64(i64 %a, i64 %b) #0 {
+// CHECK-LABEL: define{{.*}} i64 @fun_zi64(i64 %a, i64 %b) #0 {
unsigned long fun_zi64(unsigned long a, unsigned long b) {
return a;
}
-// CHECK-LABEL: define i128 @fun_si128(i128 %a, i128 %b) #0 {
+// CHECK-LABEL: define{{.*}} i128 @fun_si128(i128 %a, i128 %b) #0 {
__int128 fun_si128(__int128 a, __int128 b) {
}
-// CHECK-LABEL: define i128 @fun_zi128(i128 %a, i128 %b) #0 {
+// CHECK-LABEL: define{{.*}} i128 @fun_zi128(i128 %a, i128 %b) #0 {
unsigned __int128 fun_zi128(unsigned __int128 a, unsigned __int128 b) {
return a;
}
-// CHECK-LABEL: define float @fun_float(float %a, float %b) #0 {
+// CHECK-LABEL: define{{.*}} float @fun_float(float %a, float %b) #0 {
float fun_float(float a, float b) {
return a;
}
-// CHECK-LABEL: define double @fun_double(double %a, double %b) #0 {
+// CHECK-LABEL: define{{.*}} double @fun_double(double %a, double %b) #0 {
double fun_double(double a, double b) {
return a;
}
-// CHECK-LABEL: define fp128 @fun_quad(fp128 %a, fp128 %b) #0 {
+// CHECK-LABEL: define{{.*}} fp128 @fun_quad(fp128 %a, fp128 %b) #0 {
long double fun_quad(long double a, long double b) {
return a;
}
-// CHECK-LABEL: define { float, float } @fun_fcomplex(float %a.coerce0, float %a.coerce1, float %b.coerce0, float %b.coerce1) #0 {
+// CHECK-LABEL: define{{.*}} { float, float } @fun_fcomplex(float %a.coerce0, float %a.coerce1, float %b.coerce0, float %b.coerce1) #0 {
float __complex__ fun_fcomplex(float __complex__ a, float __complex__ b) {
return a;
}
-// CHECK-LABEL: define { double, double } @fun_dcomplex(double %a.coerce0, double %a.coerce1, double %b.coerce0, double %b.coerce1) #0 {
+// CHECK-LABEL: define{{.*}} { double, double } @fun_dcomplex(double %a.coerce0, double %a.coerce1, double %b.coerce0, double %b.coerce1) #0 {
double __complex__ fun_dcomplex(double __complex__ a, double __complex__ b) {
return a;
}
-// CHECK-LABEL: define { fp128, fp128 } @fun_qcomplex(fp128 %a.coerce0, fp128 %a.coerce1, fp128 %b.coerce0, fp128 %b.coerce1) #0 {
+// CHECK-LABEL: define{{.*}} { fp128, fp128 } @fun_qcomplex(fp128 %a.coerce0, fp128 %a.coerce1, fp128 %b.coerce0, fp128 %b.coerce1) #0 {
long double __complex__ fun_qcomplex(long double __complex__ a, long double __complex__ b) {
return a;
}
// RUN: %clang_cc1 %s -triple i386-unknown-unknown -fvisibility protected -emit-llvm -o - | FileCheck %s -check-prefix=CHECK-PROTECTED
// RUN: %clang_cc1 %s -triple i386-unknown-unknown -fvisibility hidden -emit-llvm -o - | FileCheck %s -check-prefix=CHECK-HIDDEN
-// CHECK-DEFAULT: @g_def = global i32 0
-// CHECK-DEFAULT: @g_com = global i32 0
+// CHECK-DEFAULT: @g_def ={{.*}} global i32 0
+// CHECK-DEFAULT: @g_com ={{.*}} global i32 0
// CHECK-DEFAULT: @g_ext = external global i32
// CHECK-DEFAULT: @g_deferred = internal global
// CHECK-PROTECTED: @g_def = protected global i32 0
// CHECK-PROTECTED: @test4 = hidden global i32 10
// CHECK-HIDDEN: @test4 = hidden global i32 10
-// CHECK-DEFAULT-LABEL: define i32 @f_def()
+// CHECK-DEFAULT-LABEL: define{{.*}} i32 @f_def()
// CHECK-DEFAULT: declare void @f_ext()
// CHECK-DEFAULT-LABEL: define internal void @f_deferred()
// CHECK-PROTECTED-LABEL: define protected i32 @f_def()
}
// PR8457
-// CHECK-DEFAULT-LABEL: define void @test1(
-// CHECK-PROTECTED-LABEL: define void @test1(
-// CHECK-HIDDEN-LABEL: define void @test1(
+// CHECK-DEFAULT-LABEL: define{{.*}} void @test1(
+// CHECK-PROTECTED-LABEL: define{{.*}} void @test1(
+// CHECK-HIDDEN-LABEL: define{{.*}} void @test1(
struct Test1 { int field; };
void __attribute__((visibility("default"))) test1(struct Test1 *v) { }
// rdar://problem/8595231
-// CHECK-DEFAULT-LABEL: define void @test2()
-// CHECK-PROTECTED-LABEL: define void @test2()
-// CHECK-HIDDEN-LABEL: define void @test2()
+// CHECK-DEFAULT-LABEL: define{{.*}} void @test2()
+// CHECK-PROTECTED-LABEL: define{{.*}} void @test2()
+// CHECK-HIDDEN-LABEL: define{{.*}} void @test2()
void test2(void);
void __attribute__((visibility("default"))) test2(void) {}
}
// rdar://8403108
-// CHECK-LABEL: define void @f_8403108
+// CHECK-LABEL: define{{.*}} void @f_8403108
void f_8403108(unsigned x) {
// CHECK: call i8* @llvm.stacksave()
char s1[x];
}
// http://llvm.org/PR8567
-// CHECK-LABEL: define double @test_PR8567
+// CHECK-LABEL: define{{.*}} double @test_PR8567
double test_PR8567(int n, double (*p)[n][5]) {
// CHECK: [[NV:%.*]] = alloca i32, align 4
// CHECK-NEXT: [[PV:%.*]] = alloca [5 x double]*, align 4
}
int test4(unsigned n, char (*p)[n][n+1][6]) {
- // CHECK-LABEL: define i32 @test4(
+ // CHECK-LABEL: define{{.*}} i32 @test4(
// CHECK: [[N:%.*]] = alloca i32, align 4
// CHECK-NEXT: [[P:%.*]] = alloca [6 x i8]*, align 4
// CHECK-NEXT: [[P2:%.*]] = alloca [6 x i8]*, align 4
// rdar://11485774
void test5(void)
{
- // CHECK-LABEL: define void @test5(
+ // CHECK-LABEL: define{{.*}} void @test5(
int a[5], i = 0;
// CHECK: [[A:%.*]] = alloca [5 x i32], align 4
// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
void test6(void)
{
- // CHECK-LABEL: define void @test6(
+ // CHECK-LABEL: define{{.*}} void @test6(
int n = 20, **a, i=0;
// CHECK: [[N:%.*]] = alloca i32, align 4
// CHECK-NEXT: [[A:%.*]] = alloca i32**, align 4
// Follow gcc's behavior for VLAs in parameter lists. PR9559.
void test7(int a[b(0)]) {
- // CHECK-LABEL: define void @test7(
+ // CHECK-LABEL: define{{.*}} void @test7(
// CHECK: call i32 @b(i8* null)
}
// Make sure we emit dereferenceable or nonnull when the static keyword is
// provided.
void test8(int a[static 3]) { }
-// CHECK: define void @test8(i32* align 4 dereferenceable(12) %a)
+// CHECK: define{{.*}} void @test8(i32* align 4 dereferenceable(12) %a)
void test9(int n, int a[static n]) { }
-// NULL-INVALID: define void @test9(i32 %n, i32* nonnull align 4 %a)
-// NULL-VALID: define void @test9(i32 %n, i32* align 4 %a)
+// NULL-INVALID: define{{.*}} void @test9(i32 %n, i32* nonnull align 4 %a)
+// NULL-VALID: define{{.*}} void @test9(i32 %n, i32* align 4 %a)
// Make sure a zero-sized static array extent is still required to be nonnull.
void test10(int a[static 0]) {}
-// NULL-INVALID: define void @test10(i32* nonnull align 4 %a)
-// NULL-VALID: define void @test10(i32* align 4 %a)
+// NULL-INVALID: define{{.*}} void @test10(i32* nonnull align 4 %a)
+// NULL-VALID: define{{.*}} void @test10(i32* align 4 %a)
const int constant = 32;
// CHECK: define {{.*}}pr44406(
volatile _Complex float cf32 __attribute__((aligned(32)));
volatile _Complex double cd32 __attribute__((aligned(32)));
-// CHECK-LABEL: define void @test_cf()
+// CHECK-LABEL: define{{.*}} void @test_cf()
void test_cf() {
// CHECK: load volatile float, float* getelementptr inbounds ({ float, float }, { float, float }* @cf, i32 0, i32 0), align 4
// CHECK-NEXT: load volatile float, float* getelementptr inbounds ({ float, float }, { float, float }* @cf, i32 0, i32 1), align 4
// CHECK-NEXT: ret void
}
-// CHECK-LABEL: define void @test_cd()
+// CHECK-LABEL: define{{.*}} void @test_cd()
void test_cd() {
// CHECK: load volatile double, double* getelementptr inbounds ({ double, double }, { double, double }* @cd, i32 0, i32 0), align 8
// CHECK-NEXT: load volatile double, double* getelementptr inbounds ({ double, double }, { double, double }* @cd, i32 0, i32 1), align 8
// CHECK-NEXT: ret void
}
-// CHECK-LABEL: define void @test_cf32()
+// CHECK-LABEL: define{{.*}} void @test_cf32()
void test_cf32() {
// CHECK: load volatile float, float* getelementptr inbounds ({ float, float }, { float, float }* @cf32, i32 0, i32 0), align 32
// CHECK-NEXT: load volatile float, float* getelementptr inbounds ({ float, float }, { float, float }* @cf32, i32 0, i32 1), align 4
// CHECK-NEXT: ret void
}
-// CHECK-LABEL: define void @test_cd32()
+// CHECK-LABEL: define{{.*}} void @test_cd32()
void test_cd32() {
// CHECK: load volatile double, double* getelementptr inbounds ({ double, double }, { double, double }* @cd32, i32 0, i32 0), align 32
// CHECK-NEXT: load volatile double, double* getelementptr inbounds ({ double, double }, { double, double }* @cd32, i32 0, i32 1), align 8
// CHECK: @cgx = external constant i32, section ".cp.rodata"
extern const int cgx;
int fcgx() { return cgx;}
-// CHECK: @g1 = global i32 0, align 4
+// CHECK: @g1 ={{.*}} global i32 0, align 4
int g1;
-// CHECK: @cg1 = constant i32 0, section ".cp.rodata", align 4
+// CHECK: @cg1 ={{.*}} constant i32 0, section ".cp.rodata", align 4
const int cg1;
#include <stdarg.h>
res = __builtin_eh_return_data_regno(2);
}
-// CHECK-LABEL: define zeroext i8 @testchar()
+// CHECK-LABEL: define{{.*}} zeroext i8 @testchar()
// CHECK: ret i8 -1
char testchar (void) {
return (char)-1;
// CHECK: @cgx = external constant i32
extern const int cgx;
int fcgx() { return cgx;}
-// CHECK: @g1 = global i32 0, align 4
+// CHECK: @g1 ={{.*}} global i32 0, align 4
int g1;
-// CHECK: @cg1 = constant i32 0, align 4
+// CHECK: @cg1 ={{.*}} constant i32 0, align 4
extern const int cg1 = 0;
// Regression test for a bug in lib/CodeGen/CodeGenModule.cpp which called
void baz() {}
-// CHECK: define void @_Z3foov() #[[ALWAYSATTR:[0-9]+]] {
-// CHECK: define void @_Z3barv() #[[NEVERATTR:[0-9]+]] {
-// CHECK: define void @_Z3bazv() #[[ALWAYSATTR:[0-9]+]] {
+// CHECK: define{{.*}} void @_Z3foov() #[[ALWAYSATTR:[0-9]+]] {
+// CHECK: define{{.*}} void @_Z3barv() #[[NEVERATTR:[0-9]+]] {
+// CHECK: define{{.*}} void @_Z3bazv() #[[ALWAYSATTR:[0-9]+]] {
// CHECK: attributes #[[ALWAYSATTR]] = {{.*}} "function-instrument"="xray-always" {{.*}}
// CHECK: attributes #[[NEVERATTR]] = {{.*}} "function-instrument"="xray-never" {{.*}}
[[clang::xray_never_instrument]] void alwaysNever() {}
[[clang::xray_always_instrument]] void neverAlways() {}
-// CHECK: define void @_Z6alwaysv() #[[ALWAYSATTR:[0-9]+]] {
-// CHECK: define void @_Z5neverv() #[[NEVERATTR:[0-9]+]] {
-// CHECK: define void @_Z11alwaysNeverv() #[[NEVERATTR]] {
-// CHECK: define void @_Z11neverAlwaysv() #[[ALWAYSATTR]] {
+// CHECK: define{{.*}} void @_Z6alwaysv() #[[ALWAYSATTR:[0-9]+]] {
+// CHECK: define{{.*}} void @_Z5neverv() #[[NEVERATTR:[0-9]+]] {
+// CHECK: define{{.*}} void @_Z11alwaysNeverv() #[[NEVERATTR]] {
+// CHECK: define{{.*}} void @_Z11neverAlwaysv() #[[ALWAYSATTR]] {
// CHECK: attributes #[[ALWAYSATTR]] = {{.*}} "function-instrument"="xray-always" {{.*}}
// CHECK: attributes #[[NEVERATTR]] = {{.*}} "function-instrument"="xray-never" {{.*}}
// RUN: -triple powerpc64le-unknown-linux-gnu | FileCheck %s
[[clang::xray_always_instrument]] void foo() {
-// CHECK: define void @_Z3foov() #0
+// CHECK: define{{.*}} void @_Z3foov() #0
}
[[clang::xray_never_instrument]] void bar() {
-// CHECK: define void @_Z3barv() #1
+// CHECK: define{{.*}} void @_Z3barv() #1
}
// CHECK-NOT: #0 = {{.*}}"function-instrument"="xray-always"
// RUN: -std=c++11 -triple x86_64-unknown-unknown -emit-llvm -o - %s \
// RUN: | FileCheck --check-prefixes CHECK,NOSKIPENTRY,NOSKIPEXIT %s
-// CHECK: define void @_Z13justAFunctionv() #[[ATTR:[0-9]+]] {
+// CHECK: define{{.*}} void @_Z13justAFunctionv() #[[ATTR:[0-9]+]] {
void justAFunction() {
}
// Make sure that the LLVM attribute for XRay-annotated functions do show up.
[[clang::xray_always_instrument]] void foo() {
-// CHECK: define void @_Z3foov() #0
+// CHECK: define{{.*}} void @_Z3foov() #0
};
[[clang::xray_never_instrument]] void bar() {
-// CHECK: define void @_Z3barv() #1
+// CHECK: define{{.*}} void @_Z3barv() #1
};
// CHECK: #0 = {{.*}}"function-instrument"="xray-always"
void arg1(void*) {}
-// CHECK: define void @_Z3foov() #[[FOO:[0-9]+]] {
-// CHECK: define void {{.*}}arg1{{.*}} #[[ALWAYSARG1:[0-9]+]] {
+// CHECK: define{{.*}} void @_Z3foov() #[[FOO:[0-9]+]] {
+// CHECK: define{{.*}} void {{.*}}arg1{{.*}} #[[ALWAYSARG1:[0-9]+]] {
// CHECK: attributes #[[FOO]] = {{.*}}
// CHECK: attributes #[[ALWAYSARG1]] = {{.*}} "function-instrument"="xray-always" {{.*}} "xray-log-args"="1"
return 2;
}
-// CHECK: define i32 @_Z3foov() #[[THRESHOLD:[0-9]+]] {
-// CHECK: define i32 @_Z3barv() #[[NEVERATTR:[0-9]+]] {
+// CHECK: define{{.*}} i32 @_Z3foov() #[[THRESHOLD:[0-9]+]] {
+// CHECK: define{{.*}} i32 @_Z3barv() #[[NEVERATTR:[0-9]+]] {
// CHECK-DAG: attributes #[[THRESHOLD]] = {{.*}} "xray-instruction-threshold"="1" {{.*}}
// CHECK-DAG: attributes #[[NEVERATTR]] = {{.*}} "function-instrument"="xray-never" {{.*}}
// RUN: -std=c++11 -triple x86_64-unknown-unknown -emit-llvm -o - %s \
// RUN: | FileCheck --check-prefixes CHECK,FUNCTION,NOCUSTOM,NOTYPED %s
-// CHECK: define void @_Z16alwaysInstrumentv() #[[ALWAYSATTR:[0-9]+]] {
+// CHECK: define{{.*}} void @_Z16alwaysInstrumentv() #[[ALWAYSATTR:[0-9]+]] {
[[clang::xray_always_instrument]] void alwaysInstrument() {
static constexpr char kPhase[] = "always";
__xray_customevent(kPhase, 6);
// Make sure that the LLVM attribute for XRay-annotated functions do show up.
[[clang::xray_always_instrument,clang::xray_log_args(1)]] void foo(int a) {
-// CHECK: define void @_Z3fooi(i32 %a) #0
+// CHECK: define{{.*}} void @_Z3fooi(i32 %a) #0
};
[[clang::xray_log_args(1)]] void bar(int a) {
-// CHECK: define void @_Z3bari(i32 %a) #1
+// CHECK: define{{.*}} void @_Z3bari(i32 %a) #1
};
// CHECK: #0 = {{.*}}"function-instrument"="xray-always"{{.*}}"xray-log-args"="1"
void baz() {}
-// CHECK: define void @_Z3foov() #[[NEVERATTR:[0-9]+]] {
-// CHECK: define void @_Z3barv() #[[ALWAYSATTR:[0-9]+]] {
-// CHECK: define void @_Z3bazv() #[[NEVERATTR:[0-9]+]] {
+// CHECK: define{{.*}} void @_Z3foov() #[[NEVERATTR:[0-9]+]] {
+// CHECK: define{{.*}} void @_Z3barv() #[[ALWAYSATTR:[0-9]+]] {
+// CHECK: define{{.*}} void @_Z3bazv() #[[NEVERATTR:[0-9]+]] {
// CHECK: attributes #[[NEVERATTR]] = {{.*}} "function-instrument"="xray-never" {{.*}}
// CHECK: attributes #[[ALWAYSATTR]] = {{.*}} "function-instrument"="xray-always" {{.*}}
#include "Inputs/cuda.h"
-// CHECK: @i = addrspace(1) externally_initialized global
+// CHECK: @i ={{.*}} addrspace(1) externally_initialized global
__device__ int i;
-// CHECK: @j = addrspace(4) externally_initialized global
+// CHECK: @j ={{.*}} addrspace(4) externally_initialized global
__constant__ int j;
-// CHECK: @k = addrspace(3) global
+// CHECK: @k ={{.*}} addrspace(3) global
__shared__ int k;
struct MyStruct {
// CHECK: @_ZZ5func2vE1a = internal addrspace(3) global [256 x float] undef
// CHECK: @_ZZ5func3vE1a = internal addrspace(3) global float undef
// CHECK: @_ZZ5func4vE1a = internal addrspace(3) global float undef
-// CHECK: @b = addrspace(3) global float undef
+// CHECK: @b ={{.*}} addrspace(3) global float undef
__device__ void foo() {
// CHECK: load i32, i32* addrspacecast (i32 addrspace(1)* @i to i32*)
ap->data1 = 1;
ap->data2 = 2;
}
-// CHECK: define void @_Z5func0v()
+// CHECK: define{{.*}} void @_Z5func0v()
// CHECK: store %struct.MyStruct* addrspacecast (%struct.MyStruct addrspace(3)* @_ZZ5func0vE1a to %struct.MyStruct*), %struct.MyStruct** %{{.*}}
__device__ void callee(float *ap) {
__shared__ float a;
callee(&a); // implicit cast from parameters
}
-// CHECK: define void @_Z5func1v()
+// CHECK: define{{.*}} void @_Z5func1v()
// CHECK: call void @_Z6calleePf(float* addrspacecast (float addrspace(3)* @_ZZ5func1vE1a to float*))
__device__ void func2() {
float *ap = &a[128]; // implicit cast from a decayed array
*ap = 1.0f;
}
-// CHECK: define void @_Z5func2v()
+// CHECK: define{{.*}} void @_Z5func2v()
// CHECK: store float* getelementptr inbounds ([256 x float], [256 x float]* addrspacecast ([256 x float] addrspace(3)* @_ZZ5func2vE1a to [256 x float]*), i{{32|64}} 0, i{{32|64}} 128), float** %{{.*}}
__device__ void func3() {
float *ap = reinterpret_cast<float *>(&a); // explicit cast
*ap = 1.0f;
}
-// CHECK: define void @_Z5func3v()
+// CHECK: define{{.*}} void @_Z5func3v()
// CHECK: store float* addrspacecast (float addrspace(3)* @_ZZ5func3vE1a to float*), float** %{{.*}}
__device__ void func4() {
float *ap = (float *)&a; // explicit c-style cast
*ap = 1.0f;
}
-// CHECK: define void @_Z5func4v()
+// CHECK: define{{.*}} void @_Z5func4v()
// CHECK: store float* addrspacecast (float addrspace(3)* @_ZZ5func4vE1a to float*), float** %{{.*}}
__shared__ float b;
__device__ float *func5() {
return &b; // implicit cast from a return value
}
-// CHECK: define float* @_Z5func5v()
+// CHECK: define{{.*}} float* @_Z5func5v()
// CHECK: ret float* addrspacecast (float addrspace(3)* @b to float*)
#include "Inputs/cuda.h"
__device__ void test() {
-// UNSAFE-FP-ATOMICS: define void @_Z4testv() [[ATTR:#[0-9]+]]
+// UNSAFE-FP-ATOMICS: define{{.*}} void @_Z4testv() [[ATTR:#[0-9]+]]
}
// HOST-NOT: %struct.S.coerce
// HOST-NOT: %struct.T.coerce
-// HOST: define void @_Z22__device_stub__kernel1Pi(i32* %x)
-// COMMON-LABEL: define amdgpu_kernel void @_Z7kernel1Pi(i32 addrspace(1)*{{.*}} %x.coerce)
-// CHECK: = addrspacecast [[TYPE:.*]] addrspace(1)* %{{.*}} to [[TYPE]]*
-// CHECK-NOT: = addrspacecast [[TYPE:.*]] addrspace(1)* %{{.*}} to [[TYPE]]*
+// HOST: define{{.*}} void @_Z22__device_stub__kernel1Pi(i32* %x)
+// COMMON-LABEL: define{{.*}} amdgpu_kernel void @_Z7kernel1Pi(i32 addrspace(1)*{{.*}} %x.coerce)
+// CHECK: ={{.*}} addrspacecast [[TYPE:.*]] addrspace(1)* %{{.*}} to [[TYPE]]*
+// CHECK-NOT: ={{.*}} addrspacecast [[TYPE:.*]] addrspace(1)* %{{.*}} to [[TYPE]]*
// OPT: [[VAL:%.*]] = load i32, i32 addrspace(1)* %x.coerce, align 4
// OPT: [[INC:%.*]] = add nsw i32 [[VAL]], 1
// OPT: store i32 [[INC]], i32 addrspace(1)* %x.coerce, align 4
x[0]++;
}
-// HOST: define void @_Z22__device_stub__kernel2Ri(i32* nonnull align 4 dereferenceable(4) %x)
-// COMMON-LABEL: define amdgpu_kernel void @_Z7kernel2Ri(i32 addrspace(1)*{{.*}} nonnull align 4 dereferenceable(4) %x.coerce)
-// CHECK: = addrspacecast [[TYPE:.*]] addrspace(1)* %{{.*}} to [[TYPE]]*
-// CHECK-NOT: = addrspacecast [[TYPE:.*]] addrspace(1)* %{{.*}} to [[TYPE]]*
+// HOST: define{{.*}} void @_Z22__device_stub__kernel2Ri(i32* nonnull align 4 dereferenceable(4) %x)
+// COMMON-LABEL: define{{.*}} amdgpu_kernel void @_Z7kernel2Ri(i32 addrspace(1)*{{.*}} nonnull align 4 dereferenceable(4) %x.coerce)
+// CHECK: ={{.*}} addrspacecast [[TYPE:.*]] addrspace(1)* %{{.*}} to [[TYPE]]*
+// CHECK-NOT: ={{.*}} addrspacecast [[TYPE:.*]] addrspace(1)* %{{.*}} to [[TYPE]]*
// OPT: [[VAL:%.*]] = load i32, i32 addrspace(1)* %x.coerce, align 4
// OPT: [[INC:%.*]] = add nsw i32 [[VAL]], 1
// OPT: store i32 [[INC]], i32 addrspace(1)* %x.coerce, align 4
x++;
}
-// HOST: define void @_Z22__device_stub__kernel3PU3AS2iPU3AS1i(i32 addrspace(2)* %x, i32 addrspace(1)* %y)
-// CHECK-LABEL: define amdgpu_kernel void @_Z7kernel3PU3AS2iPU3AS1i(i32 addrspace(2)*{{.*}} %x, i32 addrspace(1)*{{.*}} %y)
-// CHECK-NOT: = addrspacecast [[TYPE:.*]] addrspace(1)* %{{.*}} to [[TYPE]]*
+// HOST: define{{.*}} void @_Z22__device_stub__kernel3PU3AS2iPU3AS1i(i32 addrspace(2)* %x, i32 addrspace(1)* %y)
+// CHECK-LABEL: define{{.*}} amdgpu_kernel void @_Z7kernel3PU3AS2iPU3AS1i(i32 addrspace(2)*{{.*}} %x, i32 addrspace(1)*{{.*}} %y)
+// CHECK-NOT: ={{.*}} addrspacecast [[TYPE:.*]] addrspace(1)* %{{.*}} to [[TYPE]]*
__global__ void kernel3(__attribute__((address_space(2))) int *x,
__attribute__((address_space(1))) int *y) {
y[0] = x[0];
}
-// COMMON-LABEL: define void @_Z4funcPi(i32*{{.*}} %x)
-// CHECK-NOT: = addrspacecast [[TYPE:.*]] addrspace(1)* %{{.*}} to [[TYPE]]*
+// COMMON-LABEL: define{{.*}} void @_Z4funcPi(i32*{{.*}} %x)
+// CHECK-NOT: ={{.*}} addrspacecast [[TYPE:.*]] addrspace(1)* %{{.*}} to [[TYPE]]*
__device__ void func(int *x) {
x[0]++;
}
// by-val). However, the enhanced address inferring pass should be able to
// assume they are global pointers.
//
-// HOST: define void @_Z22__device_stub__kernel41S(i32* %s.coerce0, float* %s.coerce1)
-// COMMON-LABEL: define amdgpu_kernel void @_Z7kernel41S(%struct.S addrspace(4)*{{.*}} byref(%struct.S) align 8 %0)
+// HOST: define{{.*}} void @_Z22__device_stub__kernel41S(i32* %s.coerce0, float* %s.coerce1)
+// COMMON-LABEL: define{{.*}} amdgpu_kernel void @_Z7kernel41S(%struct.S addrspace(4)*{{.*}} byref(%struct.S) align 8 %0)
// OPT: [[R0:%.*]] = getelementptr inbounds %struct.S, %struct.S addrspace(4)* %0, i64 0, i32 0
// OPT: [[P0:%.*]] = load i32*, i32* addrspace(4)* [[R0]], align 8
-// OPT: [[G0:%.*]] = addrspacecast i32* [[P0]] to i32 addrspace(1)*
+// OPT: [[G0:%.*]] ={{.*}} addrspacecast i32* [[P0]] to i32 addrspace(1)*
// OPT: [[R1:%.*]] = getelementptr inbounds %struct.S, %struct.S addrspace(4)* %0, i64 0, i32 1
// OPT: [[P1:%.*]] = load float*, float* addrspace(4)* [[R1]], align 8
-// OPT: [[G1:%.*]] = addrspacecast float* [[P1]] to float addrspace(1)*
+// OPT: [[G1:%.*]] ={{.*}} addrspacecast float* [[P1]] to float addrspace(1)*
// OPT: [[V0:%.*]] = load i32, i32 addrspace(1)* [[G0]], align 4
// OPT: [[INC:%.*]] = add nsw i32 [[V0]], 1
// OPT: store i32 [[INC]], i32 addrspace(1)* [[G0]], align 4
}
// If a pointer to struct is passed, only the pointer itself is coerced into the global one.
-// HOST: define void @_Z22__device_stub__kernel5P1S(%struct.S* %s)
-// COMMON-LABEL: define amdgpu_kernel void @_Z7kernel5P1S(%struct.S addrspace(1)*{{.*}} %s.coerce)
+// HOST: define{{.*}} void @_Z22__device_stub__kernel5P1S(%struct.S* %s)
+// COMMON-LABEL: define{{.*}} amdgpu_kernel void @_Z7kernel5P1S(%struct.S addrspace(1)*{{.*}} %s.coerce)
__global__ void kernel5(struct S *s) {
s->x[0]++;
s->y[0] += 1.f;
// by-val). However, the enhanced address inferring pass should be able to
// assume they are global pointers.
//
-// HOST: define void @_Z22__device_stub__kernel61T(float* %t.coerce0, float* %t.coerce1)
-// COMMON-LABEL: define amdgpu_kernel void @_Z7kernel61T(%struct.T addrspace(4)*{{.*}} byref(%struct.T) align 8 %0)
+// HOST: define{{.*}} void @_Z22__device_stub__kernel61T(float* %t.coerce0, float* %t.coerce1)
+// COMMON-LABEL: define{{.*}} amdgpu_kernel void @_Z7kernel61T(%struct.T addrspace(4)*{{.*}} byref(%struct.T) align 8 %0)
// OPT: [[R0:%.*]] = getelementptr inbounds %struct.T, %struct.T addrspace(4)* %0, i64 0, i32 0, i64 0
// OPT: [[P0:%.*]] = load float*, float* addrspace(4)* [[R0]], align 8
-// OPT: [[G0:%.*]] = addrspacecast float* [[P0]] to float addrspace(1)*
+// OPT: [[G0:%.*]] ={{.*}} addrspacecast float* [[P0]] to float addrspace(1)*
// OPT: [[R1:%.*]] = getelementptr inbounds %struct.T, %struct.T addrspace(4)* %0, i64 0, i32 0, i64 1
// OPT: [[P1:%.*]] = load float*, float* addrspace(4)* [[R1]], align 8
-// OPT: [[G1:%.*]] = addrspacecast float* [[P1]] to float addrspace(1)*
+// OPT: [[G1:%.*]] ={{.*}} addrspacecast float* [[P1]] to float addrspace(1)*
// OPT: [[V0:%.*]] = load float, float addrspace(1)* [[G0]], align 4
// OPT: [[ADD0:%.*]] = fadd contract float [[V0]], 1.000000e+00
// OPT: store float [[ADD0]], float addrspace(1)* [[G0]], align 4
}
// Check that coerced pointers retain the noalias attribute when qualified with __restrict.
-// HOST: define void @_Z22__device_stub__kernel7Pi(i32* noalias %x)
-// COMMON-LABEL: define amdgpu_kernel void @_Z7kernel7Pi(i32 addrspace(1)* noalias{{.*}} %x.coerce)
+// HOST: define{{.*}} void @_Z22__device_stub__kernel7Pi(i32* noalias %x)
+// COMMON-LABEL: define{{.*}} amdgpu_kernel void @_Z7kernel7Pi(i32 addrspace(1)* noalias{{.*}} %x.coerce)
__global__ void kernel7(int *__restrict x) {
x[0]++;
}
struct SS {
float *x;
};
-// HOST: define void @_Z22__device_stub__kernel82SS(float* %a.coerce)
-// COMMON-LABEL: define amdgpu_kernel void @_Z7kernel82SS(float addrspace(1)*{{.*}} %a.coerce)
-// CHECK: = addrspacecast [[TYPE:.*]] addrspace(1)* %{{.*}} to [[TYPE]]*
-// CHECK-NOT: = addrspacecast [[TYPE:.*]] addrspace(1)* %{{.*}} to [[TYPE]]*
+// HOST: define{{.*}} void @_Z22__device_stub__kernel82SS(float* %a.coerce)
+// COMMON-LABEL: define{{.*}} amdgpu_kernel void @_Z7kernel82SS(float addrspace(1)*{{.*}} %a.coerce)
+// CHECK: ={{.*}} addrspacecast [[TYPE:.*]] addrspace(1)* %{{.*}} to [[TYPE]]*
+// CHECK-NOT: ={{.*}} addrspacecast [[TYPE:.*]] addrspace(1)* %{{.*}} to [[TYPE]]*
// OPT: [[VAL:%.*]] = load float, float addrspace(1)* %a.coerce, align 4
// OPT: [[INC:%.*]] = fadd contract float [[VAL]], 3.000000e+00
// OPT: store float [[INC]], float addrspace(1)* %a.coerce, align 4
#include "Inputs/cuda.h"
__global__ void flat_work_group_size_default() {
-// CHECK: define amdgpu_kernel void @_Z28flat_work_group_size_defaultv() [[FLAT_WORK_GROUP_SIZE_DEFAULT:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @_Z28flat_work_group_size_defaultv() [[FLAT_WORK_GROUP_SIZE_DEFAULT:#[0-9]+]]
}
__attribute__((amdgpu_flat_work_group_size(32, 64))) // expected-no-diagnostics
__global__ void flat_work_group_size_32_64() {
-// CHECK: define amdgpu_kernel void @_Z26flat_work_group_size_32_64v() [[FLAT_WORK_GROUP_SIZE_32_64:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @_Z26flat_work_group_size_32_64v() [[FLAT_WORK_GROUP_SIZE_32_64:#[0-9]+]]
}
__attribute__((amdgpu_waves_per_eu(2))) // expected-no-diagnostics
__global__ void waves_per_eu_2() {
-// CHECK: define amdgpu_kernel void @_Z14waves_per_eu_2v() [[WAVES_PER_EU_2:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @_Z14waves_per_eu_2v() [[WAVES_PER_EU_2:#[0-9]+]]
}
__attribute__((amdgpu_num_sgpr(32))) // expected-no-diagnostics
__global__ void num_sgpr_32() {
-// CHECK: define amdgpu_kernel void @_Z11num_sgpr_32v() [[NUM_SGPR_32:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @_Z11num_sgpr_32v() [[NUM_SGPR_32:#[0-9]+]]
}
__attribute__((amdgpu_num_vgpr(64))) // expected-no-diagnostics
__global__ void num_vgpr_64() {
-// CHECK: define amdgpu_kernel void @_Z11num_vgpr_64v() [[NUM_VGPR_64:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @_Z11num_vgpr_64v() [[NUM_VGPR_64:#[0-9]+]]
}
// Make sure this is silently accepted on other targets.
#include "Inputs/cuda.h"
-// CHECK-DEFAULT: @c = addrspace(4) externally_initialized global
-// CHECK-DEFAULT: @g = addrspace(1) externally_initialized global
+// CHECK-DEFAULT: @c ={{.*}} addrspace(4) externally_initialized global
+// CHECK-DEFAULT: @g ={{.*}} addrspace(1) externally_initialized global
// CHECK-PROTECTED: @c = protected addrspace(4) externally_initialized global
// CHECK-PROTECTED: @g = protected addrspace(1) externally_initialized global
// CHECK-HIDDEN: @c = protected addrspace(4) externally_initialized global
return e;
}
-// CHECK-DEFAULT: define amdgpu_kernel void @_Z3foov()
+// CHECK-DEFAULT: define{{.*}} amdgpu_kernel void @_Z3foov()
// CHECK-PROTECTED: define protected amdgpu_kernel void @_Z3foov()
// CHECK-HIDDEN: define protected amdgpu_kernel void @_Z3foov()
__global__ void foo() {
// DEVICE: Function Attrs:
// DEVICE-SAME: convergent
-// DEVICE-NEXT: define void @_Z3foov
+// DEVICE-NEXT: define{{.*}} void @_Z3foov
__device__ void foo() {}
// HOST: Function Attrs:
// HOST-NOT: convergent
-// HOST-NEXT: define void @_Z3barv
+// HOST-NEXT: define{{.*}} void @_Z3barv
// DEVICE: Function Attrs:
// DEVICE-SAME: convergent
-// DEVICE-NEXT: define void @_Z3barv
+// DEVICE-NEXT: define{{.*}} void @_Z3barv
__host__ __device__ void baz();
__host__ __device__ void bar() {
// DEVICE: call void @_Z3bazv() [[CALL_ATTR:#[0-9]+]]
#include "__clang_cuda_builtin_vars.h"
-// CHECK: define void @_Z6kernelPi(i32* %out)
+// CHECK: define{{.*}} void @_Z6kernelPi(i32* %out)
__attribute__((global))
void kernel(int *out) {
int i = 0;
#include "Inputs/cuda.h"
// NORDC: define internal void @_Z4funcIiEvv()
-// NORDC: define void @_Z6kernelIiEvv()
+// NORDC: define{{.*}} void @_Z6kernelIiEvv()
// RDC: define weak_odr void @_Z4funcIiEvv()
// RDC: define weak_odr void @_Z6kernelIiEvv()
__shared__ int shared_var;
// Make sure host globals don't get internalized...
-// LNX-DAG: @host_var = global i32
+// LNX-DAG: @host_var ={{.*}} global i32
// WIN-DAG: @"?host_var@@3HA" = dso_local global i32
int host_var;
// ... and that extern vars remain external.
// * Make sure our constructor was added to global ctor list.
// LNX: @llvm.global_ctors = appending global {{.*}}@__[[PREFIX]]_module_ctor
// * Alias to global symbol containing the NVModuleID.
-// RDC: @__fatbinwrap[[MODULE_ID]] = alias { i32, i32, i8*, i8* }
+// RDC: @__fatbinwrap[[MODULE_ID]] ={{.*}} alias { i32, i32, i8*, i8* }
// RDC-SAME: { i32, i32, i8*, i8* }* @__[[PREFIX]]_fatbin_wrapper
// Test that we build the correct number of calls to cudaSetupArgument followed
#include "Inputs/cuda-initializers.h"
__device__ int d_v;
-// DEVICE: @d_v = addrspace(1) externally_initialized global i32 0,
+// DEVICE: @d_v ={{.*}} addrspace(1) externally_initialized global i32 0,
// HOST: @d_v = internal global i32 undef,
__shared__ int s_v;
-// DEVICE: @s_v = addrspace(3) global i32 undef,
+// DEVICE: @s_v ={{.*}} addrspace(3) global i32 undef,
// HOST: @s_v = internal global i32 undef,
__constant__ int c_v;
// DEVICE: addrspace(4) externally_initialized global i32 0,
// HOST: @c_v = internal global i32 undef,
__device__ int d_v_i = 1;
-// DEVICE: @d_v_i = addrspace(1) externally_initialized global i32 1,
+// DEVICE: @d_v_i ={{.*}} addrspace(1) externally_initialized global i32 1,
// HOST: @d_v_i = internal global i32 undef,
// For `static` device variables, assume they won't be addressed from the host
// trivial constructor -- allowed
__device__ T d_t;
-// DEVICE: @d_t = addrspace(1) externally_initialized global %struct.T zeroinitializer
+// DEVICE: @d_t ={{.*}} addrspace(1) externally_initialized global %struct.T zeroinitializer
// HOST: @d_t = internal global %struct.T undef,
__shared__ T s_t;
-// DEVICE: @s_t = addrspace(3) global %struct.T undef,
+// DEVICE: @s_t ={{.*}} addrspace(3) global %struct.T undef,
// HOST: @s_t = internal global %struct.T undef,
__constant__ T c_t;
-// DEVICE: @c_t = addrspace(4) externally_initialized global %struct.T zeroinitializer,
+// DEVICE: @c_t ={{.*}} addrspace(4) externally_initialized global %struct.T zeroinitializer,
// HOST: @c_t = internal global %struct.T undef,
__device__ T d_t_i = {2};
-// DEVICE: @d_t_i = addrspace(1) externally_initialized global %struct.T { i32 2 },
+// DEVICE: @d_t_i ={{.*}} addrspace(1) externally_initialized global %struct.T { i32 2 },
// HOST: @d_t_i = internal global %struct.T undef,
__constant__ T c_t_i = {2};
-// DEVICE: @c_t_i = addrspace(4) externally_initialized global %struct.T { i32 2 },
+// DEVICE: @c_t_i ={{.*}} addrspace(4) externally_initialized global %struct.T { i32 2 },
// HOST: @c_t_i = internal global %struct.T undef,
// empty constructor
__device__ EC d_ec;
-// DEVICE: @d_ec = addrspace(1) externally_initialized global %struct.EC zeroinitializer,
+// DEVICE: @d_ec ={{.*}} addrspace(1) externally_initialized global %struct.EC zeroinitializer,
// HOST: @d_ec = internal global %struct.EC undef,
__shared__ EC s_ec;
-// DEVICE: @s_ec = addrspace(3) global %struct.EC undef,
+// DEVICE: @s_ec ={{.*}} addrspace(3) global %struct.EC undef,
// HOST: @s_ec = internal global %struct.EC undef,
__constant__ EC c_ec;
-// DEVICE: @c_ec = addrspace(4) externally_initialized global %struct.EC zeroinitializer,
+// DEVICE: @c_ec ={{.*}} addrspace(4) externally_initialized global %struct.EC zeroinitializer,
// HOST: @c_ec = internal global %struct.EC undef
// empty destructor
__device__ ED d_ed;
-// DEVICE: @d_ed = addrspace(1) externally_initialized global %struct.ED zeroinitializer,
+// DEVICE: @d_ed ={{.*}} addrspace(1) externally_initialized global %struct.ED zeroinitializer,
// HOST: @d_ed = internal global %struct.ED undef,
__shared__ ED s_ed;
-// DEVICE: @s_ed = addrspace(3) global %struct.ED undef,
+// DEVICE: @s_ed ={{.*}} addrspace(3) global %struct.ED undef,
// HOST: @s_ed = internal global %struct.ED undef,
__constant__ ED c_ed;
-// DEVICE: @c_ed = addrspace(4) externally_initialized global %struct.ED zeroinitializer,
+// DEVICE: @c_ed ={{.*}} addrspace(4) externally_initialized global %struct.ED zeroinitializer,
// HOST: @c_ed = internal global %struct.ED undef,
__device__ ECD d_ecd;
-// DEVICE: @d_ecd = addrspace(1) externally_initialized global %struct.ECD zeroinitializer,
+// DEVICE: @d_ecd ={{.*}} addrspace(1) externally_initialized global %struct.ECD zeroinitializer,
// HOST: @d_ecd = internal global %struct.ECD undef,
__shared__ ECD s_ecd;
-// DEVICE: @s_ecd = addrspace(3) global %struct.ECD undef,
+// DEVICE: @s_ecd ={{.*}} addrspace(3) global %struct.ECD undef,
// HOST: @s_ecd = internal global %struct.ECD undef,
__constant__ ECD c_ecd;
-// DEVICE: @c_ecd = addrspace(4) externally_initialized global %struct.ECD zeroinitializer,
+// DEVICE: @c_ecd ={{.*}} addrspace(4) externally_initialized global %struct.ECD zeroinitializer,
// HOST: @c_ecd = internal global %struct.ECD undef,
// empty templated constructor -- allowed with no arguments
__device__ ETC d_etc;
-// DEVICE: @d_etc = addrspace(1) externally_initialized global %struct.ETC zeroinitializer,
+// DEVICE: @d_etc ={{.*}} addrspace(1) externally_initialized global %struct.ETC zeroinitializer,
// HOST: @d_etc = internal global %struct.ETC undef,
__shared__ ETC s_etc;
-// DEVICE: @s_etc = addrspace(3) global %struct.ETC undef,
+// DEVICE: @s_etc ={{.*}} addrspace(3) global %struct.ETC undef,
// HOST: @s_etc = internal global %struct.ETC undef,
__constant__ ETC c_etc;
-// DEVICE: @c_etc = addrspace(4) externally_initialized global %struct.ETC zeroinitializer,
+// DEVICE: @c_etc ={{.*}} addrspace(4) externally_initialized global %struct.ETC zeroinitializer,
// HOST: @c_etc = internal global %struct.ETC undef,
__device__ NCFS d_ncfs;
-// DEVICE: @d_ncfs = addrspace(1) externally_initialized global %struct.NCFS { i32 3 }
+// DEVICE: @d_ncfs ={{.*}} addrspace(1) externally_initialized global %struct.NCFS { i32 3 }
// HOST: @d_ncfs = internal global %struct.NCFS undef,
__constant__ NCFS c_ncfs;
-// DEVICE: @c_ncfs = addrspace(4) externally_initialized global %struct.NCFS { i32 3 }
+// DEVICE: @c_ncfs ={{.*}} addrspace(4) externally_initialized global %struct.NCFS { i32 3 }
// HOST: @c_ncfs = internal global %struct.NCFS undef,
// Regular base class -- allowed
__device__ T_B_T d_t_b_t;
-// DEVICE: @d_t_b_t = addrspace(1) externally_initialized global %struct.T_B_T zeroinitializer,
+// DEVICE: @d_t_b_t ={{.*}} addrspace(1) externally_initialized global %struct.T_B_T zeroinitializer,
// HOST: @d_t_b_t = internal global %struct.T_B_T undef,
__shared__ T_B_T s_t_b_t;
-// DEVICE: @s_t_b_t = addrspace(3) global %struct.T_B_T undef,
+// DEVICE: @s_t_b_t ={{.*}} addrspace(3) global %struct.T_B_T undef,
// HOST: @s_t_b_t = internal global %struct.T_B_T undef,
__constant__ T_B_T c_t_b_t;
-// DEVICE: @c_t_b_t = addrspace(4) externally_initialized global %struct.T_B_T zeroinitializer,
+// DEVICE: @c_t_b_t ={{.*}} addrspace(4) externally_initialized global %struct.T_B_T zeroinitializer,
// HOST: @c_t_b_t = internal global %struct.T_B_T undef,
// Incapsulated object of allowed class -- allowed
__device__ T_F_T d_t_f_t;
-// DEVICE: @d_t_f_t = addrspace(1) externally_initialized global %struct.T_F_T zeroinitializer,
+// DEVICE: @d_t_f_t ={{.*}} addrspace(1) externally_initialized global %struct.T_F_T zeroinitializer,
// HOST: @d_t_f_t = internal global %struct.T_F_T undef,
__shared__ T_F_T s_t_f_t;
-// DEVICE: @s_t_f_t = addrspace(3) global %struct.T_F_T undef,
+// DEVICE: @s_t_f_t ={{.*}} addrspace(3) global %struct.T_F_T undef,
// HOST: @s_t_f_t = internal global %struct.T_F_T undef,
__constant__ T_F_T c_t_f_t;
-// DEVICE: @c_t_f_t = addrspace(4) externally_initialized global %struct.T_F_T zeroinitializer,
+// DEVICE: @c_t_f_t ={{.*}} addrspace(4) externally_initialized global %struct.T_F_T zeroinitializer,
// HOST: @c_t_f_t = internal global %struct.T_F_T undef,
// array of allowed objects -- allowed
__device__ T_FA_T d_t_fa_t;
-// DEVICE: @d_t_fa_t = addrspace(1) externally_initialized global %struct.T_FA_T zeroinitializer,
+// DEVICE: @d_t_fa_t ={{.*}} addrspace(1) externally_initialized global %struct.T_FA_T zeroinitializer,
// HOST: @d_t_fa_t = internal global %struct.T_FA_T undef,
__shared__ T_FA_T s_t_fa_t;
-// DEVICE: @s_t_fa_t = addrspace(3) global %struct.T_FA_T undef,
+// DEVICE: @s_t_fa_t ={{.*}} addrspace(3) global %struct.T_FA_T undef,
// HOST: @s_t_fa_t = internal global %struct.T_FA_T undef,
__constant__ T_FA_T c_t_fa_t;
-// DEVICE: @c_t_fa_t = addrspace(4) externally_initialized global %struct.T_FA_T zeroinitializer,
+// DEVICE: @c_t_fa_t ={{.*}} addrspace(4) externally_initialized global %struct.T_FA_T zeroinitializer,
// HOST: @c_t_fa_t = internal global %struct.T_FA_T undef,
// Calling empty base class initializer is OK
__device__ EC_I_EC d_ec_i_ec;
-// DEVICE: @d_ec_i_ec = addrspace(1) externally_initialized global %struct.EC_I_EC zeroinitializer,
+// DEVICE: @d_ec_i_ec ={{.*}} addrspace(1) externally_initialized global %struct.EC_I_EC zeroinitializer,
// HOST: @d_ec_i_ec = internal global %struct.EC_I_EC undef,
__shared__ EC_I_EC s_ec_i_ec;
-// DEVICE: @s_ec_i_ec = addrspace(3) global %struct.EC_I_EC undef,
+// DEVICE: @s_ec_i_ec ={{.*}} addrspace(3) global %struct.EC_I_EC undef,
// HOST: @s_ec_i_ec = internal global %struct.EC_I_EC undef,
__constant__ EC_I_EC c_ec_i_ec;
-// DEVICE: @c_ec_i_ec = addrspace(4) externally_initialized global %struct.EC_I_EC zeroinitializer,
+// DEVICE: @c_ec_i_ec ={{.*}} addrspace(4) externally_initialized global %struct.EC_I_EC zeroinitializer,
// HOST: @c_ec_i_ec = internal global %struct.EC_I_EC undef,
// DEVICE: @_ZZ2dfvE4s_ec = internal addrspace(3) global %struct.EC undef
// NVPTX: %[[t_b_ned:.*]] = alloca %struct.T_B_NED
// NVPTX: %[[t_f_ned:.*]] = alloca %struct.T_F_NED
// NVPTX: %[[t_fa_ned:.*]] = alloca %struct.T_FA_NED
- // AMDGCN: %[[ec:.*]] = addrspacecast %struct.EC addrspace(5)* %ec to %struct.EC*
- // AMDGCN: %[[ed:.*]] = addrspacecast %struct.ED addrspace(5)* %ed to %struct.ED*
- // AMDGCN: %[[ecd:.*]] = addrspacecast %struct.ECD addrspace(5)* %ecd to %struct.ECD*
- // AMDGCN: %[[etc:.*]] = addrspacecast %struct.ETC addrspace(5)* %etc to %struct.ETC*
- // AMDGCN: %[[uc:.*]] = addrspacecast %struct.UC addrspace(5)* %uc to %struct.UC*
- // AMDGCN: %[[ud:.*]] = addrspacecast %struct.UD addrspace(5)* %ud to %struct.UD*
- // AMDGCN: %[[eci:.*]] = addrspacecast %struct.ECI addrspace(5)* %eci to %struct.ECI*
- // AMDGCN: %[[nec:.*]] = addrspacecast %struct.NEC addrspace(5)* %nec to %struct.NEC*
- // AMDGCN: %[[ned:.*]] = addrspacecast %struct.NED addrspace(5)* %ned to %struct.NED*
- // AMDGCN: %[[ncv:.*]] = addrspacecast %struct.NCV addrspace(5)* %ncv to %struct.NCV*
- // AMDGCN: %[[vd:.*]] = addrspacecast %struct.VD addrspace(5)* %vd to %struct.VD*
- // AMDGCN: %[[ncf:.*]] = addrspacecast %struct.NCF addrspace(5)* %ncf to %struct.NCF*
- // AMDGCN: %[[ncfs:.*]] = addrspacecast %struct.NCFS addrspace(5)* %ncfs to %struct.NCFS*
- // AMDGCN: %[[utc:.*]] = addrspacecast %struct.UTC addrspace(5)* %utc to %struct.UTC*
- // AMDGCN: %[[netc:.*]] = addrspacecast %struct.NETC addrspace(5)* %netc to %struct.NETC*
- // AMDGCN: %[[ec_i_ec:.*]] = addrspacecast %struct.EC_I_EC addrspace(5)* %ec_i_ec to %struct.EC_I_EC*
- // AMDGCN: %[[ec_i_ec1:.*]] = addrspacecast %struct.EC_I_EC1 addrspace(5)* %ec_i_ec1 to %struct.EC_I_EC1*
- // AMDGCN: %[[t_v_t:.*]] = addrspacecast %struct.T_V_T addrspace(5)* %t_v_t to %struct.T_V_T*
- // AMDGCN: %[[t_b_nec:.*]] = addrspacecast %struct.T_B_NEC addrspace(5)* %t_b_nec to %struct.T_B_NEC*
- // AMDGCN: %[[t_f_nec:.*]] = addrspacecast %struct.T_F_NEC addrspace(5)* %t_f_nec to %struct.T_F_NEC*
- // AMDGCN: %[[t_fa_nec:.*]] = addrspacecast %struct.T_FA_NEC addrspace(5)* %t_fa_nec to %struct.T_FA_NEC*
- // AMDGCN: %[[t_b_ned:.*]] = addrspacecast %struct.T_B_NED addrspace(5)* %t_b_ned to %struct.T_B_NED*
- // AMDGCN: %[[t_f_ned:.*]] = addrspacecast %struct.T_F_NED addrspace(5)* %t_f_ned to %struct.T_F_NED*
- // AMDGCN: %[[t_fa_ned:.*]] = addrspacecast %struct.T_FA_NED addrspace(5)* %t_fa_ned to %struct.T_FA_NED*
+ // AMDGCN: %[[ec:.*]] ={{.*}} addrspacecast %struct.EC addrspace(5)* %ec to %struct.EC*
+ // AMDGCN: %[[ed:.*]] ={{.*}} addrspacecast %struct.ED addrspace(5)* %ed to %struct.ED*
+ // AMDGCN: %[[ecd:.*]] ={{.*}} addrspacecast %struct.ECD addrspace(5)* %ecd to %struct.ECD*
+ // AMDGCN: %[[etc:.*]] ={{.*}} addrspacecast %struct.ETC addrspace(5)* %etc to %struct.ETC*
+ // AMDGCN: %[[uc:.*]] ={{.*}} addrspacecast %struct.UC addrspace(5)* %uc to %struct.UC*
+ // AMDGCN: %[[ud:.*]] ={{.*}} addrspacecast %struct.UD addrspace(5)* %ud to %struct.UD*
+ // AMDGCN: %[[eci:.*]] ={{.*}} addrspacecast %struct.ECI addrspace(5)* %eci to %struct.ECI*
+ // AMDGCN: %[[nec:.*]] ={{.*}} addrspacecast %struct.NEC addrspace(5)* %nec to %struct.NEC*
+ // AMDGCN: %[[ned:.*]] ={{.*}} addrspacecast %struct.NED addrspace(5)* %ned to %struct.NED*
+ // AMDGCN: %[[ncv:.*]] ={{.*}} addrspacecast %struct.NCV addrspace(5)* %ncv to %struct.NCV*
+ // AMDGCN: %[[vd:.*]] ={{.*}} addrspacecast %struct.VD addrspace(5)* %vd to %struct.VD*
+ // AMDGCN: %[[ncf:.*]] ={{.*}} addrspacecast %struct.NCF addrspace(5)* %ncf to %struct.NCF*
+ // AMDGCN: %[[ncfs:.*]] ={{.*}} addrspacecast %struct.NCFS addrspace(5)* %ncfs to %struct.NCFS*
+ // AMDGCN: %[[utc:.*]] ={{.*}} addrspacecast %struct.UTC addrspace(5)* %utc to %struct.UTC*
+ // AMDGCN: %[[netc:.*]] ={{.*}} addrspacecast %struct.NETC addrspace(5)* %netc to %struct.NETC*
+ // AMDGCN: %[[ec_i_ec:.*]] ={{.*}} addrspacecast %struct.EC_I_EC addrspace(5)* %ec_i_ec to %struct.EC_I_EC*
+ // AMDGCN: %[[ec_i_ec1:.*]] ={{.*}} addrspacecast %struct.EC_I_EC1 addrspace(5)* %ec_i_ec1 to %struct.EC_I_EC1*
+ // AMDGCN: %[[t_v_t:.*]] ={{.*}} addrspacecast %struct.T_V_T addrspace(5)* %t_v_t to %struct.T_V_T*
+ // AMDGCN: %[[t_b_nec:.*]] ={{.*}} addrspacecast %struct.T_B_NEC addrspace(5)* %t_b_nec to %struct.T_B_NEC*
+ // AMDGCN: %[[t_f_nec:.*]] ={{.*}} addrspacecast %struct.T_F_NEC addrspace(5)* %t_f_nec to %struct.T_F_NEC*
+ // AMDGCN: %[[t_fa_nec:.*]] ={{.*}} addrspacecast %struct.T_FA_NEC addrspace(5)* %t_fa_nec to %struct.T_FA_NEC*
+ // AMDGCN: %[[t_b_ned:.*]] ={{.*}} addrspacecast %struct.T_B_NED addrspace(5)* %t_b_ned to %struct.T_B_NED*
+ // AMDGCN: %[[t_f_ned:.*]] ={{.*}} addrspacecast %struct.T_F_NED addrspace(5)* %t_f_ned to %struct.T_F_NED*
+ // AMDGCN: %[[t_fa_ned:.*]] ={{.*}} addrspacecast %struct.T_FA_NED addrspace(5)* %t_fa_ned to %struct.T_FA_NED*
T t;
// DEVICE-NOT: call
// CHECK-DEVICE-NOT: @_ZTI2HD
void H::method() {}
-//CHECK-HOST: define void @_ZN1H6methodEv
+//CHECK-HOST: define{{.*}} void @_ZN1H6methodEv
void __device__ D::method() {}
-//CHECK-DEVICE: define void @_ZN1D6methodEv
+//CHECK-DEVICE: define{{.*}} void @_ZN1D6methodEv
void __device__ HD::d_method() {}
-// CHECK-DEVICE: define void @_ZN2HD8d_methodEv
-// CHECK-HOST-NOT: define void @_ZN2HD8d_methodEv
+// CHECK-DEVICE: define{{.*}} void @_ZN2HD8d_methodEv
+// CHECK-HOST-NOT: define{{.*}} void @_ZN2HD8d_methodEv
void HD::h_method() {}
-// CHECK-HOST: define void @_ZN2HD8h_methodEv
-// CHECK-DEVICE-NOT: define void @_ZN2HD8h_methodEv
+// CHECK-HOST: define{{.*}} void @_ZN2HD8h_methodEv
+// CHECK-DEVICE-NOT: define{{.*}} void @_ZN2HD8h_methodEv
__host__ __device__ ~s_cd_hd() { x = 32; }
};
-// CHECK-BOTH: define void @_Z7wrapperv
+// CHECK-BOTH: define{{.*}} void @_Z7wrapperv
#if defined(__CUDA_ARCH__)
__device__
#else
// RUN: %clang_cc1 -triple amdgcn -fcuda-is-device -emit-llvm -x hip %s -o - | FileCheck %s
#include "Inputs/cuda.h"
-// CHECK: define amdgpu_kernel void @_ZN1A6kernelEv
+// CHECK: define{{.*}} amdgpu_kernel void @_ZN1A6kernelEv
class A {
public:
static __global__ void kernel(){}
};
-// CHECK: define void @_Z10non_kernelv
+// CHECK: define{{.*}} void @_Z10non_kernelv
__device__ void non_kernel(){}
-// CHECK: define amdgpu_kernel void @_Z6kerneli
+// CHECK: define{{.*}} amdgpu_kernel void @_Z6kerneli
__global__ void kernel(int x) {
non_kernel();
}
-// CHECK: define amdgpu_kernel void @_Z11EmptyKernelIvEvv
+// CHECK: define{{.*}} amdgpu_kernel void @_Z11EmptyKernelIvEvv
template <typename T>
__global__ void EmptyKernel(void) {}
EmptyKernelPtr Empty() { return EmptyKernel<void>; }
};
-// CHECK: define amdgpu_kernel void @_Z15template_kernelI1AEvT_{{.*}} #[[ATTR:[0-9][0-9]*]]
+// CHECK: define{{.*}} amdgpu_kernel void @_Z15template_kernelI1AEvT_{{.*}} #[[ATTR:[0-9][0-9]*]]
template<class T>
__global__ void template_kernel(T x) {}
float *p;
};
-// AMDGCN: define amdgpu_kernel void @_Z6kernel1A(%struct.A addrspace(4)* byref(%struct.A) align 8 %{{.+}})
-// NVPTX: define void @_Z6kernel1A(%struct.A* byval(%struct.A) align 8 %x)
+// AMDGCN: define{{.*}} amdgpu_kernel void @_Z6kernel1A(%struct.A addrspace(4)* byref(%struct.A) align 8 %{{.+}})
+// NVPTX: define{{.*}} void @_Z6kernel1A(%struct.A* byval(%struct.A) align 8 %x)
__global__ void kernel(A x) {
}
class Kernel {
public:
- // AMDGCN: define amdgpu_kernel void @_ZN6Kernel12memberKernelE1A(%struct.A addrspace(4)* byref(%struct.A) align 8 %{{.+}})
- // NVPTX: define void @_ZN6Kernel12memberKernelE1A(%struct.A* byval(%struct.A) align 8 %x)
+ // AMDGCN: define{{.*}} amdgpu_kernel void @_ZN6Kernel12memberKernelE1A(%struct.A addrspace(4)* byref(%struct.A) align 8 %{{.+}})
+ // NVPTX: define{{.*}} void @_ZN6Kernel12memberKernelE1A(%struct.A* byval(%struct.A) align 8 %x)
static __global__ void memberKernel(A x){}
template<typename T> static __global__ void templateMemberKernel(T x) {}
};
void test() {
Kernel K;
- // AMDGCN: define amdgpu_kernel void @_Z14templateKernelI1AEvT_(%struct.A addrspace(4)* byref(%struct.A) align 8 %{{.+}}
- // NVPTX: define void @_Z14templateKernelI1AEvT_(%struct.A* byval(%struct.A) align 8 %x)
+ // AMDGCN: define{{.*}} amdgpu_kernel void @_Z14templateKernelI1AEvT_(%struct.A addrspace(4)* byref(%struct.A) align 8 %{{.+}}
+ // NVPTX: define{{.*}} void @_Z14templateKernelI1AEvT_(%struct.A* byval(%struct.A) align 8 %x)
launch((void*)templateKernel<A>);
- // AMDGCN: define amdgpu_kernel void @_ZN6Kernel20templateMemberKernelI1AEEvT_(%struct.A addrspace(4)* byref(%struct.A) align 8 %{{.+}}
- // NVPTX: define void @_ZN6Kernel20templateMemberKernelI1AEEvT_(%struct.A* byval(%struct.A) align 8 %x)
+ // AMDGCN: define{{.*}} amdgpu_kernel void @_ZN6Kernel20templateMemberKernelI1AEEvT_(%struct.A addrspace(4)* byref(%struct.A) align 8 %{{.+}}
+ // NVPTX: define{{.*}} void @_ZN6Kernel20templateMemberKernelI1AEEvT_(%struct.A* byval(%struct.A) align 8 %x)
launch((void*)Kernel::templateMemberKernel<A>);
}
// DEV: ret {{.*}}!dbg
// Make sure there is no !dbg between function attributes and '{'
-// CHECK: define void @[[CSTUB:__device_stub__ckernel]]{{.*}} #{{[0-9]+}} {
+// CHECK: define{{.*}} void @[[CSTUB:__device_stub__ckernel]]{{.*}} #{{[0-9]+}} {
// CHECK-NOT: call {{.*}}@hipLaunchByPtr{{.*}}!dbg
// CHECK: call {{.*}}@hipLaunchByPtr{{.*}}@[[CSTUB]]
// CHECK-NOT: ret {{.*}}!dbg
// Check functions emitted for test_capture in host compilation.
// Check lambda is not emitted in host compilation.
-// HOST-LABEL: define void @_Z12test_capturev
+// HOST-LABEL: define{{.*}} void @_Z12test_capturev
// HOST: call void @_Z19test_capture_helperIZ12test_capturevEUlvE_EvT_
// HOST-LABEL: define internal void @_Z19test_capture_helperIZ12test_capturevEUlvE_EvT_
// HOST: call void @_Z16__device_stub__gIZ12test_capturevEUlvE_EvT_
// Check functions emitted for test_resolve in host compilation.
// Check host version of template function 'overloaded' is emitted and called
// by the lambda function.
-// HOST-LABEL: define void @_Z12test_resolvev
+// HOST-LABEL: define{{.*}} void @_Z12test_resolvev
// HOST: call void @_Z19test_resolve_helperIZ12test_resolvevEUlvE_EvT_()
// HOST-LABEL: define internal void @_Z19test_resolve_helperIZ12test_resolvevEUlvE_EvT_
// HOST: call void @_Z16__device_stub__gIZ12test_resolvevEUlvE_EvT_
// HOST: @__hipRegisterFunction({{.*}}@[[KERN_CAPTURE]]
// HOST: @__hipRegisterFunction({{.*}}@[[KERN_RESOLVE]]
-// DEV: @a = addrspace(1) externally_initialized global i32 0
+// DEV: @a ={{.*}} addrspace(1) externally_initialized global i32 0
// Check functions emitted for test_capture in device compilation.
// Check lambda is emitted in device compilation and accessing device variable.
-// DEV-LABEL: define amdgpu_kernel void @_Z1gIZ12test_capturevEUlvE_EvT_
+// DEV-LABEL: define{{.*}} amdgpu_kernel void @_Z1gIZ12test_capturevEUlvE_EvT_
// DEV: call void @_ZZ12test_capturevENKUlvE_clEv
// DEV-LABEL: define internal void @_ZZ12test_capturevENKUlvE_clEv
// DEV: store i32 1, i32* addrspacecast (i32 addrspace(1)* @a to i32*)
// Check functions emitted for test_resolve in device compilation.
// Check device version of template function 'overloaded' is emitted and called
// by the lambda function.
-// DEV-LABEL: define amdgpu_kernel void @_Z1gIZ12test_resolvevEUlvE_EvT_
+// DEV-LABEL: define{{.*}} amdgpu_kernel void @_Z1gIZ12test_resolvevEUlvE_EvT_
// DEV: call void @_ZZ12test_resolvevENKUlvE_clEv
// DEV-LABEL: define internal void @_ZZ12test_resolvevENKUlvE_clEv
// DEV: call i32 @_Z10overloadedIiET_v
// RUN: %clang_cc1 -fcuda-is-device -triple nvptx64-nvidia-cuda \
// RUN: -emit-llvm -o - %s | FileCheck %s --check-prefixes=DEVICE,BOTH
-// BOTH-LABEL: define float @logf(float
+// BOTH-LABEL: define{{.*}} float @logf(float
// logf() should be calling itself recursively as we don't have any standard
// library on device side.
extern "C" __device__ double __nv_sin(double x);
extern "C" __device__ double __nv_exp(double x);
-// CHECK-IR-LABEL: define void @_Z26should_not_be_internalizedPf(
+// CHECK-IR-LABEL: define{{.*}} void @_Z26should_not_be_internalizedPf(
// CHECK-PTX-LABEL: .visible .func _Z26should_not_be_internalizedPf(
__device__ void should_not_be_internalized(float *data) {}
// Make sure kernel call has not been internalized.
-// CHECK-IR-LABEL: define void @_Z6kernelPfS_
+// CHECK-IR-LABEL: define{{.*}} void @_Z6kernelPfS_
// CHECK-PTX-LABEL: .visible .entry _Z6kernelPfS_(
__global__ __attribute__((used)) void kernel(float *out, float *in) {
*out = device_mul_or_add(in[0], in[1]);
// Make sure device_mul_or_add() is present in IR, is internal and
// calls __nvvm_reflect().
// CHECK-IR-LABEL: define internal float @_Z17device_mul_or_addff(
-// CHECK-IR-NLD-LABEL: define float @_Z17device_mul_or_addff(
+// CHECK-IR-NLD-LABEL: define{{.*}} float @_Z17device_mul_or_addff(
// CHECK-IR: call i32 @__nvvm_reflect
// CHECK-IR: ret float
__host__ __device__ void f();
-// HOST: define void @_Z7host_fnv() [[HOST_ATTR:#[0-9]+]]
+// HOST: define{{.*}} void @_Z7host_fnv() [[HOST_ATTR:#[0-9]+]]
void host_fn() { f(); }
-// DEVICE: define void @_Z3foov() [[DEVICE_ATTR:#[0-9]+]]
+// DEVICE: define{{.*}} void @_Z3foov() [[DEVICE_ATTR:#[0-9]+]]
__device__ void foo() {
// DEVICE: call void @_Z1fv
f();
}
-// DEVICE: define void @_Z12foo_noexceptv() [[DEVICE_ATTR:#[0-9]+]]
+// DEVICE: define{{.*}} void @_Z12foo_noexceptv() [[DEVICE_ATTR:#[0-9]+]]
__device__ void foo_noexcept() noexcept {
// DEVICE: call void @_Z1fv
f();
}
// This is nounwind only on the device side.
-// CHECK: define void @_Z3foov() [[DEVICE_ATTR:#[0-9]+]]
+// CHECK: define{{.*}} void @_Z3foov() [[DEVICE_ATTR:#[0-9]+]]
__host__ __device__ void bar() { f(); }
-// DEVICE: define void @_Z3bazv() [[DEVICE_ATTR:#[0-9]+]]
+// DEVICE: define{{.*}} void @_Z3bazv() [[DEVICE_ATTR:#[0-9]+]]
__global__ void baz() { f(); }
// DEVICE: attributes [[DEVICE_ATTR]] = {
}
// The kernel and lib function should have the same attributes.
-// CHECK: define void @kernel() [[kattr:#[0-9]+]]
+// CHECK: define{{.*}} void @kernel() [[kattr:#[0-9]+]]
// CHECK: define internal void @lib_fn() [[fattr:#[0-9]+]]
// FIXME: These -NOT checks do not work as intended and do not check on the same
#include "Inputs/cuda.h"
-// CHECK-LABEL: define void @device_function
+// CHECK-LABEL: define{{.*}} void @device_function
extern "C"
__device__ void device_function() {}
-// CHECK-LABEL: define void @global_function
+// CHECK-LABEL: define{{.*}} void @global_function
extern "C"
__global__ void global_function() {
// CHECK: call void @device_function
// Make sure host-instantiated kernels are preserved on device side.
template <typename T> __global__ void templated_kernel(T param) {}
-// CHECK-DAG: define void @_Z16templated_kernelIiEvT_(
+// CHECK-DAG: define{{.*}} void @_Z16templated_kernelIiEvT_(
namespace {
__global__ void anonymous_ns_kernel() {}
-// CHECK-DAG: define void @_ZN12_GLOBAL__N_119anonymous_ns_kernelEv(
+// CHECK-DAG: define{{.*}} void @_ZN12_GLOBAL__N_119anonymous_ns_kernelEv(
}
void host_function() {
// DEV-DAG: @_ZZ6kernelPiPPKiE19local_static_device = internal addrspace(1) constant i32 43
// Check a static device variable referenced by host function is externalized.
-// DEV-DAG: @_ZL1x = addrspace(1) externally_initialized global i32 0
+// DEV-DAG: @_ZL1x ={{.*}} addrspace(1) externally_initialized global i32 0
// HOST-DAG: @_ZL1x = internal global i32 undef
// HOST-DAG: @[[DEVNAMEX:[0-9]+]] = {{.*}}c"_ZL1x\00"
static __device__ int x2;
// Check a static device variable referenced by host device function is externalized.
-// DEV-DAG: @_ZL2x3 = addrspace(1) externally_initialized global i32 0
+// DEV-DAG: @_ZL2x3 ={{.*}} addrspace(1) externally_initialized global i32 0
static __device__ int x3;
// Check a static device variable referenced in file scope is externalized.
-// DEV-DAG: @_ZL2x4 = addrspace(1) externally_initialized global i32 0
+// DEV-DAG: @_ZL2x4 ={{.*}} addrspace(1) externally_initialized global i32 0
static __device__ int x4;
int& x4_ref = x4;
// Check a static device variable in anonymous namespace.
-// DEV-DAG: @_ZN12_GLOBAL__N_12x5E = addrspace(1) externally_initialized global i32 0
+// DEV-DAG: @_ZN12_GLOBAL__N_12x5E ={{.*}} addrspace(1) externally_initialized global i32 0
namespace {
static __device__ int x5;
}
// Check a static constant variable referenced by host is externalized.
-// DEV-DAG: @_ZL1y = addrspace(4) externally_initialized global i32 0
+// DEV-DAG: @_ZL1y ={{.*}} addrspace(4) externally_initialized global i32 0
// HOST-DAG: @_ZL1y = internal global i32 undef
// HOST-DAG: @[[DEVNAMEY:[0-9]+]] = {{.*}}c"_ZL1y\00"
// DEV-DAG: @_ZZ6devfunPPKiE1p = linkonce_odr addrspace(4) constant i32 2, comdat
// Check a static device variable referenced by host function only is externalized.
-// DEV-DAG: @_ZL1w = addrspace(1) externally_initialized global i32 0
+// DEV-DAG: @_ZL1w ={{.*}} addrspace(1) externally_initialized global i32 0
// HOST-DAG: @_ZL1w = internal global i32 undef
// HOST-DAG: @[[DEVNAMEW:[0-9]+]] = {{.*}}c"_ZL1w\00"
};
// On the device side, surface references are represented as `i64` handles.
-// DEVICE: @surf = addrspace(1) global i64 undef, align 4
+// DEVICE: @surf ={{.*}} addrspace(1) global i64 undef, align 4
// On the host side, they remain in the original type.
// HOST: @surf = internal global %struct.surface
// HOST: @0 = private unnamed_addr constant [5 x i8] c"surf\00"
};
// On the device side, texture references are represented as `i64` handles.
-// DEVICE: @tex = addrspace(1) global i64 undef, align 4
-// DEVICE: @norm = addrspace(1) global i64 undef, align 4
+// DEVICE: @tex ={{.*}} addrspace(1) global i64 undef, align 4
+// DEVICE: @norm ={{.*}} addrspace(1) global i64 undef, align 4
// On the host side, they remain in the original type.
// HOST: @tex = internal global %struct.texture
// HOST: @norm = internal global %struct.texture
#include "Inputs/cuda.h"
-// HOST: @ld_host = global x86_fp80 0xK00000000000000000000
+// HOST: @ld_host ={{.*}} global x86_fp80 0xK00000000000000000000
long double ld_host;
-// DEV: @ld_device = addrspace(1) externally_initialized global double 0.000000e+00
+// DEV: @ld_device ={{.*}} addrspace(1) externally_initialized global double 0.000000e+00
__device__ long double ld_device;
int p(void) __attribute__((pure));
int t(void);
-// CHECK: define i32 @_Z1fv() [[TF:#[0-9]+]] {
+// CHECK: define{{.*}} i32 @_Z1fv() [[TF:#[0-9]+]] {
int f(void) {
// CHECK: call i32 @_Z1cv() [[NUW_RN_CALL:#[0-9]+]]
// CHECK: call i32 @_Z1pv() [[NUW_RO_CALL:#[0-9]+]]
A(const char *);
};
-// CHECK: @arr = global [3 x %struct.S] zeroinitializer
+// CHECK: @arr ={{.*}} global [3 x %struct.S] zeroinitializer
// CHECK: @.str = {{.*}}constant [6 x i8] c"hello\00"
// CHECK: @.str.1 = {{.*}}constant [6 x i8] c"world\00"
// CHECK: @.str.2 = {{.*}}constant [8 x i8] c"goodbye\00"
// The VTable for A is emitted here and in a comdat section since it has no key function, and is used in this module when creating an instance of A (in func()).
// CHECK: @_ZTV1A.local = linkonce_odr hidden unnamed_addr constant { [3 x i32] } { [3 x i32] [i32 0, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8* }** @_ZTI1A.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [3 x i32] }, { [3 x i32] }* @_ZTV1A.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.A*)* dso_local_equivalent @_ZN1A3fooEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [3 x i32] }, { [3 x i32] }* @_ZTV1A.local, i32 0, i32 0, i32 2) to i64)) to i32)] }, comdat($_ZTV1A), align 4
-// CHECK: @_ZTV1B = unnamed_addr alias { [3 x i32] }, { [3 x i32] }* @_ZTV1B.local
+// CHECK: @_ZTV1B ={{.*}} unnamed_addr alias { [3 x i32] }, { [3 x i32] }* @_ZTV1B.local
// CHECK: @_ZTV1A = linkonce_odr unnamed_addr alias { [3 x i32] }, { [3 x i32] }* @_ZTV1A.local
-// CHECK: define void @_ZN1B3fooEv(%class.B* {{.*}}%this) unnamed_addr
+// CHECK: define{{.*}} void @_ZN1B3fooEv(%class.B* {{.*}}%this) unnamed_addr
// CHECK-NEXT: entry:
// CHECK-NEXT: ret void
// CHECK-NEXT: }
// CHECK: $_ZTI1A.rtti_proxy = comdat any
// CHECK: @_ZTV1A.local = private unnamed_addr constant { [4 x i32] } { [4 x i32] [i32 0, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8* }** @_ZTI1A.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1A.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.A*)* dso_local_equivalent @_ZN1A3fooEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1A.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.A*)* dso_local_equivalent @_ZN1A3barEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1A.local, i32 0, i32 0, i32 2) to i64)) to i32)] }, align 4
-// @_ZTV1A = unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1A.local
+// @_ZTV1A ={{.*}} unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1A.local
void A::foo() {}
void A_foo(A *a) { a->foo(); }
// CHECK: $_ZTI1B.rtti_proxy = comdat any
// CHECK: @_ZTV1B.local = private unnamed_addr constant { [4 x i32] } { [4 x i32] [i32 0, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i8* }** @_ZTI1B.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1B.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.B*)* dso_local_equivalent @_ZN1B3fooEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1B.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.A*)* dso_local_equivalent @_ZN1A3barEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1B.local, i32 0, i32 0, i32 2) to i64)) to i32)] }, align 4
-// CHECK: @_ZTV1B = unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1B.local
+// CHECK: @_ZTV1B ={{.*}} unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1B.local
// A::bar() is defined outside of the module that defines the vtable for A
-// CHECK: define void @_ZN1A3barEv(%class.A* {{.*}}%this) unnamed_addr
+// CHECK: define{{.*}} void @_ZN1A3barEv(%class.A* {{.*}}%this) unnamed_addr
// CHECK-NEXT: entry:
// CHECK-NEXT: ret void
// CHECK-NEXT: }
-// CHECK: define void @_ZN1B3fooEv(%class.B* {{.*}}%this) unnamed_addr
+// CHECK: define{{.*}} void @_ZN1B3fooEv(%class.B* {{.*}}%this) unnamed_addr
// CHECK-NEXT: entry:
// CHECK-NEXT: ret void
// CHECK-NEXT: }
// - 2nd table containing a thunk to D::foo() and C::barC().
// CHECK: @_ZTV1D.local = private unnamed_addr constant { [5 x i32], [4 x i32] } { [5 x i32] [i32 0, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i32, i32, i8*, i64, i8*, i64 }** @_ZTI1D.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [5 x i32], [4 x i32] }, { [5 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.D*)* dso_local_equivalent @_ZN1D3fooEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [5 x i32], [4 x i32] }, { [5 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.B*)* dso_local_equivalent @_ZN1B4barBEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [5 x i32], [4 x i32] }, { [5 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.D*)* dso_local_equivalent @_ZN1D3bazEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [5 x i32], [4 x i32] }, { [5 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, i32 0, i32 2) to i64)) to i32)], [4 x i32] [i32 -8, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i32, i32, i8*, i64, i8*, i64 }** @_ZTI1D.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [5 x i32], [4 x i32] }, { [5 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, i32 1, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.D*)* dso_local_equivalent @_ZThn8_N1D3fooEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [5 x i32], [4 x i32] }, { [5 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, i32 1, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.C*)* dso_local_equivalent @_ZN1C4barCEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [5 x i32], [4 x i32] }, { [5 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, i32 1, i32 2) to i64)) to i32)] }, align 4
-// @_ZTV1B = unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1B.local
-// @_ZTV1C = unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1C.local
-// @_ZTV1D = unnamed_addr alias { [5 x i32], [4 x i32] }, { [5 x i32], [4 x i32] }* @_ZTV1D.local
+// @_ZTV1B ={{.*}} unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1B.local
+// @_ZTV1C ={{.*}} unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1C.local
+// @_ZTV1D ={{.*}} unnamed_addr alias { [5 x i32], [4 x i32] }, { [5 x i32], [4 x i32] }* @_ZTV1D.local
class A {
public:
// CHECK: @_ZTV1B.local = private unnamed_addr constant { [4 x i32], [4 x i32] } { [4 x i32] [i32 8, i32 0, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i32, i32, i8*, i64 }** @_ZTI1B.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1B.local, i32 0, i32 0, i32 3) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.B*)* dso_local_equivalent @_ZN1B4barBEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1B.local, i32 0, i32 0, i32 3) to i64)) to i32)], [4 x i32] [i32 0, i32 -8, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i32, i32, i8*, i64 }** @_ZTI1B.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1B.local, i32 0, i32 1, i32 3) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.A*)* dso_local_equivalent @_ZN1A3fooEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1B.local, i32 0, i32 1, i32 3) to i64)) to i32)] }, align 4
// VTT for B
-// CHECK: @_ZTT1B = unnamed_addr constant [2 x i8*] [i8* bitcast (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1B.local, i32 0, inrange i32 0, i32 3) to i8*), i8* bitcast (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1B.local, i32 0, inrange i32 1, i32 3) to i8*)], align 8
+// CHECK: @_ZTT1B ={{.*}} unnamed_addr constant [2 x i8*] [i8* bitcast (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1B.local, i32 0, inrange i32 0, i32 3) to i8*), i8* bitcast (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1B.local, i32 0, inrange i32 1, i32 3) to i8*)], align 8
// VTable for C
// CHECK: @_ZTV1C.local = private unnamed_addr constant { [4 x i32], [4 x i32] } { [4 x i32] [i32 8, i32 0, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i32, i32, i8*, i64 }** @_ZTI1C.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1C.local, i32 0, i32 0, i32 3) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.C*)* dso_local_equivalent @_ZN1C4barCEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1C.local, i32 0, i32 0, i32 3) to i64)) to i32)], [4 x i32] [i32 0, i32 -8, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i32, i32, i8*, i64 }** @_ZTI1C.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1C.local, i32 0, i32 1, i32 3) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.A*)* dso_local_equivalent @_ZN1A3fooEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1C.local, i32 0, i32 1, i32 3) to i64)) to i32)] }, align 4
// VTT for C
-// CHECK: @_ZTT1C = unnamed_addr constant [2 x i8*] [i8* bitcast (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1C.local, i32 0, inrange i32 0, i32 3) to i8*), i8* bitcast (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1C.local, i32 0, inrange i32 1, i32 3) to i8*)], align 8
+// CHECK: @_ZTT1C ={{.*}} unnamed_addr constant [2 x i8*] [i8* bitcast (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1C.local, i32 0, inrange i32 0, i32 3) to i8*), i8* bitcast (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1C.local, i32 0, inrange i32 1, i32 3) to i8*)], align 8
// VTable for D
// CHECK: @_ZTV1D.local = private unnamed_addr constant { [5 x i32], [4 x i32], [4 x i32] } { [5 x i32] [i32 16, i32 0, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i32, i32, i8*, i64, i8*, i64 }** @_ZTI1D.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [5 x i32], [4 x i32], [4 x i32] }, { [5 x i32], [4 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, i32 0, i32 3) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.B*)* dso_local_equivalent @_ZN1B4barBEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [5 x i32], [4 x i32], [4 x i32] }, { [5 x i32], [4 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, i32 0, i32 3) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.D*)* dso_local_equivalent @_ZN1D3bazEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [5 x i32], [4 x i32], [4 x i32] }, { [5 x i32], [4 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, i32 0, i32 3) to i64)) to i32)], [4 x i32] [i32 8, i32 -8, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i32, i32, i8*, i64, i8*, i64 }** @_ZTI1D.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [5 x i32], [4 x i32], [4 x i32] }, { [5 x i32], [4 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, i32 1, i32 3) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.C*)* dso_local_equivalent @_ZN1C4barCEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [5 x i32], [4 x i32], [4 x i32] }, { [5 x i32], [4 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, i32 1, i32 3) to i64)) to i32)], [4 x i32] [i32 0, i32 -16, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i32, i32, i8*, i64, i8*, i64 }** @_ZTI1D.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [5 x i32], [4 x i32], [4 x i32] }, { [5 x i32], [4 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, i32 2, i32 3) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.A*)* dso_local_equivalent @_ZN1A3fooEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [5 x i32], [4 x i32], [4 x i32] }, { [5 x i32], [4 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, i32 2, i32 3) to i64)) to i32)] }, align 4
// VTT for D
-// CHECK: @_ZTT1D = unnamed_addr constant [7 x i8*] [i8* bitcast (i32* getelementptr inbounds ({ [5 x i32], [4 x i32], [4 x i32] }, { [5 x i32], [4 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, inrange i32 0, i32 3) to i8*), i8* bitcast (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D0_1B.local, i32 0, inrange i32 0, i32 3) to i8*), i8* bitcast (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D0_1B.local, i32 0, inrange i32 1, i32 3) to i8*), i8* bitcast (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D8_1C.local, i32 0, inrange i32 0, i32 3) to i8*), i8* bitcast (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D8_1C.local, i32 0, inrange i32 1, i32 3) to i8*), i8* bitcast (i32* getelementptr inbounds ({ [5 x i32], [4 x i32], [4 x i32] }, { [5 x i32], [4 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, inrange i32 2, i32 3) to i8*), i8* bitcast (i32* getelementptr inbounds ({ [5 x i32], [4 x i32], [4 x i32] }, { [5 x i32], [4 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, inrange i32 1, i32 3) to i8*)], align 8
+// CHECK: @_ZTT1D ={{.*}} unnamed_addr constant [7 x i8*] [i8* bitcast (i32* getelementptr inbounds ({ [5 x i32], [4 x i32], [4 x i32] }, { [5 x i32], [4 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, inrange i32 0, i32 3) to i8*), i8* bitcast (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D0_1B.local, i32 0, inrange i32 0, i32 3) to i8*), i8* bitcast (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D0_1B.local, i32 0, inrange i32 1, i32 3) to i8*), i8* bitcast (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D8_1C.local, i32 0, inrange i32 0, i32 3) to i8*), i8* bitcast (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D8_1C.local, i32 0, inrange i32 1, i32 3) to i8*), i8* bitcast (i32* getelementptr inbounds ({ [5 x i32], [4 x i32], [4 x i32] }, { [5 x i32], [4 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, inrange i32 2, i32 3) to i8*), i8* bitcast (i32* getelementptr inbounds ({ [5 x i32], [4 x i32], [4 x i32] }, { [5 x i32], [4 x i32], [4 x i32] }* @_ZTV1D.local, i32 0, inrange i32 1, i32 3) to i8*)], align 8
// Construction vtable for B-in-D
// CHECK: @_ZTC1D0_1B.local = private unnamed_addr constant { [4 x i32], [4 x i32] } { [4 x i32] [i32 16, i32 0, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i32, i32, i8*, i64 }** @_ZTI1B.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D0_1B.local, i32 0, i32 0, i32 3) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.B*)* dso_local_equivalent @_ZN1B4barBEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D0_1B.local, i32 0, i32 0, i32 3) to i64)) to i32)], [4 x i32] [i32 0, i32 -16, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i32, i32, i8*, i64 }** @_ZTI1B.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D0_1B.local, i32 0, i32 1, i32 3) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.A*)* dso_local_equivalent @_ZN1A3fooEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D0_1B.local, i32 0, i32 1, i32 3) to i64)) to i32)] }, align 4
// Construction vtable for C-in-D
// CHECK: @_ZTC1D8_1C.local = private unnamed_addr constant { [4 x i32], [4 x i32] } { [4 x i32] [i32 8, i32 0, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i32, i32, i8*, i64 }** @_ZTI1C.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D8_1C.local, i32 0, i32 0, i32 3) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.C*)* dso_local_equivalent @_ZN1C4barCEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D8_1C.local, i32 0, i32 0, i32 3) to i64)) to i32)], [4 x i32] [i32 0, i32 -8, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i32, i32, i8*, i64 }** @_ZTI1C.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D8_1C.local, i32 0, i32 1, i32 3) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.A*)* dso_local_equivalent @_ZN1A3fooEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D8_1C.local, i32 0, i32 1, i32 3) to i64)) to i32)] }, align 4
-// CHECK: @_ZTV1B = unnamed_addr alias { [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1B.local
-// CHECK: @_ZTV1C = unnamed_addr alias { [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1C.local
-// CHECK: @_ZTC1D0_1B = unnamed_addr alias { [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D0_1B.local
-// CHECK: @_ZTC1D8_1C = unnamed_addr alias { [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D8_1C.local
-// CHECK: @_ZTV1D = unnamed_addr alias { [5 x i32], [4 x i32], [4 x i32] }, { [5 x i32], [4 x i32], [4 x i32] }* @_ZTV1D.local
+// CHECK: @_ZTV1B ={{.*}} unnamed_addr alias { [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1B.local
+// CHECK: @_ZTV1C ={{.*}} unnamed_addr alias { [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTV1C.local
+// CHECK: @_ZTC1D0_1B ={{.*}} unnamed_addr alias { [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D0_1B.local
+// CHECK: @_ZTC1D8_1C ={{.*}} unnamed_addr alias { [4 x i32], [4 x i32] }, { [4 x i32], [4 x i32] }* @_ZTC1D8_1C.local
+// CHECK: @_ZTV1D ={{.*}} unnamed_addr alias { [5 x i32], [4 x i32], [4 x i32] }, { [5 x i32], [4 x i32], [4 x i32] }* @_ZTV1D.local
-// CHECK: define void @_Z5D_fooP1D(%class.D* %d) local_unnamed_addr
+// CHECK: define{{.*}} void @_Z5D_fooP1D(%class.D* %d) local_unnamed_addr
// CHECK-NEXT: entry:
// CHECK-NEXT: [[d:%[0-9]+]] = bitcast %class.D* %d to i8**
// CHECK-NEXT: [[vtable:%[a-z0-9]+]] = load i8*, i8** [[d]], align 8
// RUN: %clang_cc1 %s -triple=aarch64-unknown-fuchsia -O3 -S -o - -emit-llvm -fexperimental-relative-c++-abi-vtables | FileCheck %s
-// CHECK: define %class.A* @_Z6upcastP1B(%class.B* readnone %b) local_unnamed_addr
+// CHECK: define{{.*}} %class.A* @_Z6upcastP1B(%class.B* readnone %b) local_unnamed_addr
// CHECK-NEXT: entry:
// CHECK-NEXT: [[a:%[0-9]+]] = getelementptr %class.B, %class.B* %b, i64 0, i32 0
// CHECK-NEXT: ret %class.A* [[a]]
// CHECK-NEXT: }
-// CHECK: define %class.B* @_Z8downcastP1A(%class.A* readonly %a) local_unnamed_addr
+// CHECK: define{{.*}} %class.B* @_Z8downcastP1A(%class.A* readonly %a) local_unnamed_addr
// CHECK-NEXT: entry:
// CHECK-NEXT: [[isnull:%[0-9]+]] = icmp eq %class.A* %a, null
// CHECK-NEXT: br i1 [[isnull]], label %[[dynamic_cast_end:[a-z0-9._]+]], label %[[dynamic_cast_notnull:[a-z0-9._]+]]
// CHECK: declare i8* @__dynamic_cast(i8*, i8*, i8*, i64) local_unnamed_addr
-// CHECK: define %class.B* @_Z8selfcastP1B(%class.B* readnone returned %b) local_unnamed_addr
+// CHECK: define{{.*}} %class.B* @_Z8selfcastP1B(%class.B* readnone returned %b) local_unnamed_addr
// CHECK-NEXT: entry
// CHECK-NEXT: ret %class.B* %b
// CHECK-NEXT: }
-// CHECK: define i8* @_Z9void_castP1B(%class.B* readonly %b) local_unnamed_addr
+// CHECK: define{{.*}} i8* @_Z9void_castP1B(%class.B* readonly %b) local_unnamed_addr
// CHECK-NEXT: entry:
// CHECK-NEXT: [[isnull:%[0-9]+]] = icmp eq %class.B* %b, null
// CHECK-NEXT: br i1 [[isnull]], label %[[dynamic_cast_end:[a-z0-9._]+]], label %[[dynamic_cast_notnull:[a-z0-9._]+]]
// The VTable for B should look similar to the vtable for A but the component for foo() should point to A::foo() and the component for bar() should point to B::bar().
// CHECK: @_ZTV1B.local = private unnamed_addr constant { [4 x i32] } { [4 x i32] [i32 0, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i8* }** @_ZTI1B.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1B.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.A*)* dso_local_equivalent @_ZN1A3fooEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1B.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.B*)* dso_local_equivalent @_ZN1B3barEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1B.local, i32 0, i32 0, i32 2) to i64)) to i32)] }, align 4
-// CHECK: @_ZTV1B = unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1B.local
+// CHECK: @_ZTV1B ={{.*}} unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1B.local
class B : public A {
public:
// The vtable has a key function (A::foo()) so it does not have a comdat
// CHECK: @_ZTV1A.local = private unnamed_addr constant { [4 x i32] } { [4 x i32] [i32 0, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8* }** @_ZTI1A.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1A.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.A*)* dso_local_equivalent @_ZN1A3fooEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1A.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.A*)* dso_local_equivalent @_ZN1A3barEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1A.local, i32 0, i32 0, i32 2) to i64)) to i32)] }, align 4
-// CHECK: @_ZTV1A = unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1A.local
+// CHECK: @_ZTV1A ={{.*}} unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1A.local
class A {
public:
// RUN: %clang_cc1 %s -triple=aarch64-unknown-fuchsia -O3 -S -o - -emit-llvm -fexperimental-relative-c++-abi-vtables | FileCheck %s
-// CHECK: define void @_Z4funcP1AMS_FvvE(%class.A* %a, [2 x i64] %fn.coerce) local_unnamed_addr
+// CHECK: define{{.*}} void @_Z4funcP1AMS_FvvE(%class.A* %a, [2 x i64] %fn.coerce) local_unnamed_addr
// CHECK-NEXT: entry:
// CHECK-NEXT: [[fn_ptr:%.+]] = extractvalue [2 x i64] %fn.coerce, 0
// CHECK-NEXT: [[adjust:%.+]] = extractvalue [2 x i64] %fn.coerce, 1
// Now that we have a class with 2 parents, the offset to top in the second array is non-zero.
// CHECK: @_ZTV1C.local = private unnamed_addr constant { [4 x i32], [3 x i32] } { [4 x i32] [i32 0, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i32, i32, i8*, i64, i8*, i64 }** @_ZTI1C.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [3 x i32] }, { [4 x i32], [3 x i32] }* @_ZTV1C.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.C*)* dso_local_equivalent @_ZN1C3fooEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [3 x i32] }, { [4 x i32], [3 x i32] }* @_ZTV1C.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.C*)* dso_local_equivalent @_ZN1C3barEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [3 x i32] }, { [4 x i32], [3 x i32] }* @_ZTV1C.local, i32 0, i32 0, i32 2) to i64)) to i32)], [3 x i32] [i32 -8, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i32, i32, i8*, i64, i8*, i64 }** @_ZTI1C.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [3 x i32] }, { [4 x i32], [3 x i32] }* @_ZTV1C.local, i32 0, i32 1, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.C*)* dso_local_equivalent @_ZThn8_N1C3barEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32], [3 x i32] }, { [4 x i32], [3 x i32] }* @_ZTV1C.local, i32 0, i32 1, i32 2) to i64)) to i32)] }, align 4
-// CHECK: @_ZTV1C = unnamed_addr alias { [4 x i32], [3 x i32] }, { [4 x i32], [3 x i32] }* @_ZTV1C.local
+// CHECK: @_ZTV1C ={{.*}} unnamed_addr alias { [4 x i32], [3 x i32] }, { [4 x i32], [3 x i32] }* @_ZTV1C.local
-// CHECK: define void @_Z8C_foobarP1C(%class.C* %c) local_unnamed_addr
+// CHECK: define{{.*}} void @_Z8C_foobarP1C(%class.C* %c) local_unnamed_addr
// CHECK-NEXT: entry:
// CHECK-NEXT: [[c:%[0-9]+]] = bitcast %class.C* %c to i8**
// CHECK-NEXT: [[vtable:%[a-z0-9]+]] = load i8*, i8** [[c]], align 8
// RUN: %clang_cc1 %s -triple=aarch64-unknown-fuchsia -S -o - -emit-llvm -fexperimental-relative-c++-abi-vtables -fvisibility hidden | FileCheck %s --check-prefix=HIDDEN-VIS
// DEFAULT-VIS: @_ZTV1A.local = private unnamed_addr constant
-// DEFAULT-VIS: @_ZTV1A = unnamed_addr alias { [3 x i32] }, { [3 x i32] }* @_ZTV1A.local
+// DEFAULT-VIS: @_ZTV1A ={{.*}} unnamed_addr alias { [3 x i32] }, { [3 x i32] }* @_ZTV1A.local
// HIDDEN-VIS-NOT: @_ZTV1A.local
// HIDDEN-VIS: @_ZTV1A = hidden unnamed_addr constant
class A {
// CHECK: @_ZTV1B.local = private unnamed_addr constant { [4 x i32] } { [4 x i32] [i32 0, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i8* }** @_ZTI1B.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1B.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.B*)* dso_local_equivalent @_ZN1B3fooEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1B.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.B*)* dso_local_equivalent @_ZN1B3barEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1B.local, i32 0, i32 0, i32 2) to i64)) to i32)] }, align 4
-// CHECK: @_ZTV1A = unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1A.local
-// CHECK: @_ZTV1B = unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1B.local
+// CHECK: @_ZTV1A ={{.*}} unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1A.local
+// CHECK: @_ZTV1B ={{.*}} unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1B.local
// CHECK-NOT: declare void @__cxa_pure_virtual() unnamed_addr
// CHECK: @_ZTV1B.local = private unnamed_addr constant { [4 x i32] } { [4 x i32] [i32 0, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8*, i8* }** @_ZTI1B.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1B.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.B*)* dso_local_equivalent @_ZN1B3fooEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1B.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.B*)* dso_local_equivalent @_ZN1B3barEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [4 x i32] }, { [4 x i32] }* @_ZTV1B.local, i32 0, i32 0, i32 2) to i64)) to i32)] }, align 4
-// CHECK: @_ZTV1B = unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1B.local
+// CHECK: @_ZTV1B ={{.*}} unnamed_addr alias { [4 x i32] }, { [4 x i32] }* @_ZTV1B.local
class A {
public:
// VTable contains offsets and references to the hidden symbols
// RELATIVE-ABI: @_ZTV1A.local = private unnamed_addr constant { [3 x i32] } { [3 x i32] [i32 0, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8* }** @_ZTI1A.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [3 x i32] }, { [3 x i32] }* @_ZTV1A.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.A*)* dso_local_equivalent @_ZN1A3fooEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [3 x i32] }, { [3 x i32] }* @_ZTV1A.local, i32 0, i32 0, i32 2) to i64)) to i32)] }, align 4
-// RELATIVE-ABI: @_ZTV1A = unnamed_addr alias { [3 x i32] }, { [3 x i32] }* @_ZTV1A.local
-// DEFAULT-ABI: @_ZTV1A = unnamed_addr constant { [3 x i8*] } { [3 x i8*] [i8* null, i8* bitcast ({ i8*, i8* }* @_ZTI1A to i8*), i8* bitcast (void (%class.A*)* @_ZN1A3fooEv to i8*)] }, align 8
+// RELATIVE-ABI: @_ZTV1A ={{.*}} unnamed_addr alias { [3 x i32] }, { [3 x i32] }* @_ZTV1A.local
+// DEFAULT-ABI: @_ZTV1A ={{.*}} unnamed_addr constant { [3 x i8*] } { [3 x i8*] [i8* null, i8* bitcast ({ i8*, i8* }* @_ZTI1A to i8*), i8* bitcast (void (%class.A*)* @_ZN1A3fooEv to i8*)] }, align 8
class A {
public:
// it. The vtable symbol will be exposed through a public alias.
// CHECK: @_ZTV1A.local = private unnamed_addr constant { [3 x i32] } { [3 x i32] [i32 0, i32 trunc (i64 sub (i64 ptrtoint ({ i8*, i8* }** @_ZTI1A.rtti_proxy to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [3 x i32] }, { [3 x i32] }* @_ZTV1A.local, i32 0, i32 0, i32 2) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (void (%class.A*)* dso_local_equivalent @_ZN1A3fooEv to i64), i64 ptrtoint (i32* getelementptr inbounds ({ [3 x i32] }, { [3 x i32] }* @_ZTV1A.local, i32 0, i32 0, i32 2) to i64)) to i32)] }, align 4
// CHECK: @_ZTVN10__cxxabiv117__class_type_infoE = external global i8*
-// CHECK: @_ZTS1A = constant [3 x i8] c"1A\00", align 1
-// CHECK: @_ZTI1A = constant { i8*, i8* } { i8* getelementptr inbounds (i8, i8* bitcast (i8** @_ZTVN10__cxxabiv117__class_type_infoE to i8*), i32 8), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @_ZTS1A, i32 0, i32 0) }, align 8
+// CHECK: @_ZTS1A ={{.*}} constant [3 x i8] c"1A\00", align 1
+// CHECK: @_ZTI1A ={{.*}} constant { i8*, i8* } { i8* getelementptr inbounds (i8, i8* bitcast (i8** @_ZTVN10__cxxabiv117__class_type_infoE to i8*), i32 8), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @_ZTS1A, i32 0, i32 0) }, align 8
// The rtti should be in a comdat
// CHECK: @_ZTI1A.rtti_proxy = hidden unnamed_addr constant { i8*, i8* }* @_ZTI1A, comdat
// CHECK: $_ZTI1B.rtti_proxy = comdat any
// CHECK: @_ZTVN10__cxxabiv117__class_type_infoE = external global i8*
-// CHECK: @_ZTS1A = constant [3 x i8] c"1A\00", align 1
-// CHECK: @_ZTI1A = constant { i8*, i8* } { i8* getelementptr inbounds (i8, i8* bitcast (i8** @_ZTVN10__cxxabiv117__class_type_infoE to i8*), i32 8), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @_ZTS1A, i32 0, i32 0) }, align 8
+// CHECK: @_ZTS1A ={{.*}} constant [3 x i8] c"1A\00", align 1
+// CHECK: @_ZTI1A ={{.*}} constant { i8*, i8* } { i8* getelementptr inbounds (i8, i8* bitcast (i8** @_ZTVN10__cxxabiv117__class_type_infoE to i8*), i32 8), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @_ZTS1A, i32 0, i32 0) }, align 8
// CHECK: @_ZTVN10__cxxabiv120__si_class_type_infoE = external global i8*
-// CHECK: @_ZTS1B = constant [3 x i8] c"1B\00", align 1
-// CHECK: @_ZTI1B = constant { i8*, i8*, i8* } { i8* getelementptr inbounds (i8, i8* bitcast (i8** @_ZTVN10__cxxabiv120__si_class_type_infoE to i8*), i32 8), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @_ZTS1B, i32 0, i32 0), i8* bitcast ({ i8*, i8* }* @_ZTI1A to i8*) }, align 8
+// CHECK: @_ZTS1B ={{.*}} constant [3 x i8] c"1B\00", align 1
+// CHECK: @_ZTI1B ={{.*}} constant { i8*, i8*, i8* } { i8* getelementptr inbounds (i8, i8* bitcast (i8** @_ZTVN10__cxxabiv120__si_class_type_infoE to i8*), i32 8), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @_ZTS1B, i32 0, i32 0), i8* bitcast ({ i8*, i8* }* @_ZTI1A to i8*) }, align 8
// CHECK: @_ZTI1A.rtti_proxy = hidden unnamed_addr constant { i8*, i8* }* @_ZTI1A, comdat
// CHECK: @_ZTI1B.rtti_proxy = hidden unnamed_addr constant { i8*, i8*, i8* }* @_ZTI1B, comdat
// CHECK-NEXT: ret %"class.std::type_info"* bitcast ({ i8*, i8* }* @_ZTI1A to %"class.std::type_info"*)
// CHECK-NEXT: }
-// CHECK: define i8* @_Z7getNamev() local_unnamed_addr
+// CHECK: define{{.*}} i8* @_Z7getNamev() local_unnamed_addr
// CHECK-NEXT: entry:
// CHECK-NEXT: ret i8* getelementptr inbounds ([3 x i8], [3 x i8]* @_ZTS1A, i64 0, i64 0)
// CHECK-NEXT: }
-// CHECK: define i1 @_Z5equalP1A(%class.A* readonly %a) local_unnamed_addr
+// CHECK: define{{.*}} i1 @_Z5equalP1A(%class.A* readonly %a) local_unnamed_addr
// CHECK-NEXT: entry:
// CHECK-NEXT: [[isnull:%[0-9]+]] = icmp eq %class.A* %a, null
// CHECK-NEXT: br i1 [[isnull]], label %[[bad_typeid:[a-z0-9._]+]], label %[[end:[a-z0-9.+]+]]
// RUN: %clang_cc1 %s -triple=aarch64-unknown-fuchsia -O3 -S -o - -emit-llvm -fexperimental-relative-c++-abi-vtables | FileCheck %s
-// CHECK: define void @_Z5A_fooP1A(%class.A* %a) local_unnamed_addr
+// CHECK: define{{.*}} void @_Z5A_fooP1A(%class.A* %a) local_unnamed_addr
// CHECK-NEXT: entry:
// CHECK-NEXT: [[this:%[0-9]+]] = bitcast %class.A* %a to i8**
// CHECK-NEXT: %vtable1 = load i8*, i8** [[this]]
// RUN: %clang_cc1 -triple arm64-none-linux -emit-llvm -w -o - %s | FileCheck -check-prefix=PCS %s
-// PCS: define void @{{.*}}(i8 %a
+// PCS: define{{.*}} void @{{.*}}(i8 %a
struct s0 {};
void f0(s0 a) {}
int TheStores __attribute__((aligned(16)));
};
-// CHECK-LABEL: define void @f0
+// CHECK-LABEL: define{{.*}} void @f0
// CHECK: alloca %struct.s0, align 16
extern "C" void f0() {
(void) s0();
}
-// CHECK-LABEL: define void @f1
+// CHECK-LABEL: define{{.*}} void @f1
// CHECK: alloca %struct.s0, align 16
extern "C" void f1() {
(void) (struct s0) { 0, 0, 0, 0 };
}
-// CHECK-LABEL: define i32 @f2
+// CHECK-LABEL: define{{.*}} i32 @f2
// CHECK: alloca %struct.s1, align 2
struct s1 { short x; short y; };
extern "C" struct s1 f2(int a, struct s1 *x, struct s1 *y) {
// RUN: %clang_cc1 -O0 -triple amdgcn---amdgiz -emit-llvm %s -o - | FileCheck %s
-// CHECK-LABEL: define void @_Z5func1Pi(i32* %x)
+// CHECK-LABEL: define{{.*}} void @_Z5func1Pi(i32* %x)
void func1(int *x) {
// CHECK: %[[x_addr:.*]] = alloca i32*{{.*}}addrspace(5)
// CHECK: %[[r0:.*]] = addrspacecast i32* addrspace(5)* %[[x_addr]] to i32**
*x = 1;
}
-// CHECK-LABEL: define void @_Z5func2v()
+// CHECK-LABEL: define{{.*}} void @_Z5func2v()
void func2(void) {
// CHECK: %lv1 = alloca i32, align 4, addrspace(5)
// CHECK: %[[r0:.*]] = addrspacecast i32 addrspace(5)* %lv1 to i32*
}
};
-// CHECK-LABEL: define void @_Z5func3v
+// CHECK-LABEL: define{{.*}} void @_Z5func3v
void func3() {
// CHECK: %[[a:.*]] = alloca %class.A, align 4, addrspace(5)
// CHECK: %[[r0:.*]] = addrspacecast %class.A addrspace(5)* %[[a]] to %class.A*
A a;
}
-// CHECK-LABEL: define void @_Z5func4i
+// CHECK-LABEL: define{{.*}} void @_Z5func4i
void func4(int x) {
// CHECK: %[[x_addr:.*]] = alloca i32, align 4, addrspace(5)
// CHECK: %[[r0:.*]] = addrspacecast i32 addrspace(5)* %[[x_addr]] to i32*
func1(&x);
}
-// CHECK-LABEL: define void @_Z5func5v
+// CHECK-LABEL: define{{.*}} void @_Z5func5v
void func5() {
return;
int x = 0;
}
-// CHECK-LABEL: define void @_Z5func6v
+// CHECK-LABEL: define{{.*}} void @_Z5func6v
void func6() {
return;
int x;
}
-// CHECK-LABEL: define void @_Z5func7v
+// CHECK-LABEL: define{{.*}} void @_Z5func7v
extern void use(int *);
void func7() {
goto later;
void func_with_ref_arg(A &a);
void func_with_ref_arg(B &b);
-// CHECK-LABEL: define void @_Z22func_with_indirect_arg1A(%class.A addrspace(5)* %a)
+// CHECK-LABEL: define{{.*}} void @_Z22func_with_indirect_arg1A(%class.A addrspace(5)* %a)
// CHECK: %p = alloca %class.A*, align 8, addrspace(5)
// CHECK: %[[r1:.+]] = addrspacecast %class.A* addrspace(5)* %p to %class.A**
// CHECK: %[[r0:.+]] = addrspacecast %class.A addrspace(5)* %a to %class.A*
A *p = &a;
}
-// CHECK-LABEL: define void @_Z22test_indirect_arg_autov()
+// CHECK-LABEL: define{{.*}} void @_Z22test_indirect_arg_autov()
// CHECK: %a = alloca %class.A, align 4, addrspace(5)
// CHECK: %[[r0:.+]] = addrspacecast %class.A addrspace(5)* %a to %class.A*
// CHECK: %agg.tmp = alloca %class.A, align 4, addrspace(5)
func_with_ref_arg(a);
}
-// CHECK: define void @_Z24test_indirect_arg_globalv()
+// CHECK: define{{.*}} void @_Z24test_indirect_arg_globalv()
// CHECK: %agg.tmp = alloca %class.A, align 4, addrspace(5)
// CHECK: %[[r0:.+]] = addrspacecast %class.A addrspace(5)* %agg.tmp to %class.A*
// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64
func_with_ref_arg(g_a);
}
-// CHECK-LABEL: define void @_Z19func_with_byval_arg1B(%class.B addrspace(5)* byval(%class.B) align 4 %b)
+// CHECK-LABEL: define{{.*}} void @_Z19func_with_byval_arg1B(%class.B addrspace(5)* byval(%class.B) align 4 %b)
// CHECK: %p = alloca %class.B*, align 8, addrspace(5)
// CHECK: %[[r1:.+]] = addrspacecast %class.B* addrspace(5)* %p to %class.B**
// CHECK: %[[r0:.+]] = addrspacecast %class.B addrspace(5)* %b to %class.B*
B *p = &b;
}
-// CHECK-LABEL: define void @_Z19test_byval_arg_autov()
+// CHECK-LABEL: define{{.*}} void @_Z19test_byval_arg_autov()
// CHECK: %b = alloca %class.B, align 4, addrspace(5)
// CHECK: %[[r0:.+]] = addrspacecast %class.B addrspace(5)* %b to %class.B*
// CHECK: %agg.tmp = alloca %class.B, align 4, addrspace(5)
func_with_ref_arg(b);
}
-// CHECK-LABEL: define void @_Z21test_byval_arg_globalv()
+// CHECK-LABEL: define{{.*}} void @_Z21test_byval_arg_globalv()
// CHECK: %agg.tmp = alloca %class.B, align 4, addrspace(5)
// CHECK: %[[r0:.+]] = addrspacecast %class.B addrspace(5)* %agg.tmp to %class.B*
// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64
// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -emit-llvm %s -o - | FileCheck %s
// CHECK: @.str = private unnamed_addr addrspace(4) constant [6 x i8] c"g_str\00", align 1
-// CHECK: @g_str = addrspace(1) global i8* addrspacecast (i8 addrspace(4)* getelementptr inbounds ([6 x i8], [6 x i8] addrspace(4)* @.str, i32 0, i32 0) to i8*), align 8
-// CHECK: @g_array = addrspace(1) global [8 x i8] c"g_array\00", align 1
+// CHECK: @g_str ={{.*}} addrspace(1) global i8* addrspacecast (i8 addrspace(4)* getelementptr inbounds ([6 x i8], [6 x i8] addrspace(4)* @.str, i32 0, i32 0) to i8*), align 8
+// CHECK: @g_array ={{.*}} addrspace(1) global [8 x i8] c"g_array\00", align 1
// CHECK: @.str.1 = private unnamed_addr addrspace(4) constant [6 x i8] c"l_str\00", align 1
// CHECK: @__const._Z1fv.l_array = private unnamed_addr addrspace(4) constant [8 x i8] c"l_array\00", align 1
void g(const char* p);
-// CHECK-LABEL: define void @_Z1fv()
+// CHECK-LABEL: define{{.*}} void @_Z1fv()
void f() {
const char* l_str = "l_str";
g(p);
}
-// CHECK-LABEL: define void @_Z1ev
+// CHECK-LABEL: define{{.*}} void @_Z1ev
void e() {
g("string literal");
g("string literal");
extern const A a;
-// CHECK-LABEL: define void @_Z4testv()
+// CHECK-LABEL: define{{.*}} void @_Z4testv()
// CHECK: %i = alloca i32, align 4, addrspace(5)
// CHECK: %[[ii:.*]] = addrspacecast i32 addrspace(5)* %i to i32*
// CHECK: %[[cast:.*]] = bitcast i32 addrspace(5)* %i to i8 addrspace(5)*
// RUN: %clang_cc1 -triple arm64-linux-gnu -emit-llvm -o - %s -target-abi darwinpcs | FileCheck %s --check-prefix=CHECK-DARWIN
void test_extensions(bool a, char b, short c) {}
-// CHECK: define void @_Z15test_extensionsbcs(i1 %a, i8 %b, i16 %c)
-// CHECK-DARWIN: define void @_Z15test_extensionsbcs(i1 zeroext %a, i8 signext %b, i16 signext %c)
+// CHECK: define{{.*}} void @_Z15test_extensionsbcs(i1 %a, i8 %b, i16 %c)
+// CHECK-DARWIN: define{{.*}} void @_Z15test_extensionsbcs(i1 zeroext %a, i8 signext %b, i16 signext %c)
struct Empty {};
void test_empty(Empty e) {}
-// CHECK: define void @_Z10test_empty5Empty(i8
-// CHECK-DARWIN: define void @_Z10test_empty5Empty()
+// CHECK: define{{.*}} void @_Z10test_empty5Empty(i8
+// CHECK-DARWIN: define{{.*}} void @_Z10test_empty5Empty()
struct HFA {
float a[3];
this_unknown_this(void (*callback)(Base *, Base *, Base *));
};
-// CHECK-DAG: define void @_ZN4Base9no_args_1EPFvvE({{[^!]*!callback}} ![[cid0:[0-9]+]]
+// CHECK-DAG: define{{.*}} void @_ZN4Base9no_args_1EPFvvE({{[^!]*!callback}} ![[cid0:[0-9]+]]
__attribute__((callback(1))) void
Base::no_args_1(void (*callback)(void)) {
}
-// CHECK-DAG: define void @_ZN4Base9no_args_2EPFvvES1_({{[^!]*!callback}} ![[cid1:[0-9]+]]
+// CHECK-DAG: define{{.*}} void @_ZN4Base9no_args_2EPFvvES1_({{[^!]*!callback}} ![[cid1:[0-9]+]]
__attribute__((callback(2))) void Base::no_args_2(void (*callback1)(void), void (*callback2)(void)) {
}
-// CHECK-DAG: define void @_ZN4Base9no_args_3EPFvvES1_({{[^!]*!callback}} ![[cid1]]
+// CHECK-DAG: define{{.*}} void @_ZN4Base9no_args_3EPFvvES1_({{[^!]*!callback}} ![[cid1]]
__attribute__((callback(callback2))) void Base::no_args_3(void (*callback1)(void), void (*callback2)(void)) {
}
-// CHECK-DAG: define void @_ZN4Base17this_unknown_thisEPFvPS_S0_S0_E({{[^!]*!callback}} ![[cid2:[0-9]+]]
+// CHECK-DAG: define{{.*}} void @_ZN4Base17this_unknown_thisEPFvPS_S0_S0_E({{[^!]*!callback}} ![[cid2:[0-9]+]]
void Base::this_unknown_this(void (*callback)(Base *, Base *, Base *)) {
}
virtual_1(void (*callback)(void)) override;
};
-// CHECK-DAG: define void @_ZN9Derived_19virtual_1EPFvvE({{[^!]*!callback}} ![[cid0]]
+// CHECK-DAG: define{{.*}} void @_ZN9Derived_19virtual_1EPFvvE({{[^!]*!callback}} ![[cid0]]
void Derived_1::virtual_1(void (*callback)(void)) {}
struct Derived_2 : public Base {
void virtual_1(void (*callback)(void)) override;
};
-// CHECK-DAG: define void @_ZN9Derived_29virtual_1EPFvvE
+// CHECK-DAG: define{{.*}} void @_ZN9Derived_29virtual_1EPFvvE
// CHECK-NOT: !callback
void Derived_2::virtual_1(void (*callback)(void)) {}
extern bool B();
bool f() {
- // CHECK-LABEL: define zeroext i1 @_Z1fv
+ // CHECK-LABEL: define{{.*}} zeroext i1 @_Z1fv
// CHECK: br {{.*}} !prof !7
if (b)
[[likely]] {
}
bool g() {
- // CHECK-LABEL: define zeroext i1 @_Z1gv
+ // CHECK-LABEL: define{{.*}} zeroext i1 @_Z1gv
// CHECK: br {{.*}} !prof !8
if (b)
[[unlikely]] {
}
bool h() {
- // CHECK-LABEL: define zeroext i1 @_Z1hv
+ // CHECK-LABEL: define{{.*}} zeroext i1 @_Z1hv
// CHECK: br {{.*}} !prof !8
if (b)
[[unlikely]] return A();
// RUN: %clang_cc1 -triple=x86_64-linux-gnu -emit-llvm -o - %s | FileCheck %s
-// CHECK: @defn = global i32 undef
+// CHECK: @defn ={{.*}} global i32 undef
int defn [[clang::loader_uninitialized]];
// CHECK: @_ZL11defn_static = internal global i32 undef
float x;
};
-// CHECK: @ut = global %class.trivial undef
+// CHECK: @ut ={{.*}} global %class.trivial undef
trivial ut [[clang::loader_uninitialized]];
-// CHECK: @arr = global [32 x double] undef
+// CHECK: @arr ={{.*}} global [32 x double] undef
double arr[32] __attribute__((loader_uninitialized));
// Defining as arr2[] [[clang..]] raises the error: attribute cannot be applied to types
-// CHECK: @arr2 = global [4 x double] undef
+// CHECK: @arr2 ={{.*}} global [4 x double] undef
double arr2 [[clang::loader_uninitialized]] [4];
template<typename T> struct templ{T * t;};
-// CHECK: @templ_int = global %struct.templ undef
+// CHECK: @templ_int ={{.*}} global %struct.templ undef
templ<int> templ_int [[clang::loader_uninitialized]];
-// CHECK: @templ_trivial = global %struct.templ.0 undef
+// CHECK: @templ_trivial ={{.*}} global %struct.templ.0 undef
templ<trivial> templ_trivial [[clang::loader_uninitialized]];
-// CHECK: @templ_incomplete = global %struct.templ.1 undef
+// CHECK: @templ_incomplete ={{.*}} global %struct.templ.1 undef
struct incomplete;
templ<incomplete> templ_incomplete [[clang::loader_uninitialized]];
// LINUX: @_Z3fooi.ifunc = weak_odr ifunc i32 (i32), i32 (i32)* ()* @_Z3fooi.resolver
// LINUX: @_ZN2ns3fooEi.ifunc = weak_odr ifunc i32 (i32), i32 (i32)* ()* @_ZN2ns3fooEi.resolver
-// LINUX: define i32 @_Z3fooi.sse4.2(i32 %0)
+// LINUX: define{{.*}} i32 @_Z3fooi.sse4.2(i32 %0)
// LINUX: ret i32 0
-// LINUX: define i32 @_Z3fooi.arch_ivybridge(i32 %0)
+// LINUX: define{{.*}} i32 @_Z3fooi.arch_ivybridge(i32 %0)
// LINUX: ret i32 1
-// LINUX: define i32 @_Z3fooi(i32 %0)
+// LINUX: define{{.*}} i32 @_Z3fooi(i32 %0)
// LINUX: ret i32 2
// WINDOWS: define dso_local i32 @"?foo@@YAHH@Z.sse4.2"(i32 %0)
// WINDOWS: define dso_local i32 @"?foo@@YAHH@Z"(i32 %0)
// WINDOWS: ret i32 2
-// LINUX: define i32 @_ZN2ns3fooEi.sse4.2(i32 %0)
+// LINUX: define{{.*}} i32 @_ZN2ns3fooEi.sse4.2(i32 %0)
// LINUX: ret i32 0
-// LINUX: define i32 @_ZN2ns3fooEi.arch_ivybridge(i32 %0)
+// LINUX: define{{.*}} i32 @_ZN2ns3fooEi.arch_ivybridge(i32 %0)
// LINUX: ret i32 1
-// LINUX: define i32 @_ZN2ns3fooEi(i32 %0)
+// LINUX: define{{.*}} i32 @_ZN2ns3fooEi(i32 %0)
// LINUX: ret i32 2
// WINDOWS: define dso_local i32 @"?foo@ns@@YAHH@Z.sse4.2"(i32 %0)
// WINDOWS: define dso_local i32 @"?foo@ns@@YAHH@Z"(i32 %0)
// WINDOWS: ret i32 2
-// LINUX: define i32 @_Z3barv()
+// LINUX: define{{.*}} i32 @_Z3barv()
// LINUX: call i32 @_Z3fooi.ifunc(i32 1)
// LINUX: call i32 @_ZN2ns3fooEi.ifunc(i32 2)
// LINUX: @_Z3fooi.ifunc
// LINUX: @_ZN1S3fooEi.ifunc
-// LINUX: define i32 @_Z3barv()
+// LINUX: define{{.*}} i32 @_Z3barv()
// Store to Free of ifunc
// LINUX: store i32 (i32)* @_Z3fooi.ifunc
// Store to Member of ifunc
// LINUX: @_ZN5templIiE3fooEi.ifunc = weak_odr ifunc i32 (%struct.templ*, i32), i32 (%struct.templ*, i32)* ()* @_ZN5templIiE3fooEi.resolver
// LINUX: @_ZN5templIdE3fooEi.ifunc = weak_odr ifunc i32 (%struct.templ.0*, i32), i32 (%struct.templ.0*, i32)* ()* @_ZN5templIdE3fooEi.resolver
-// LINUX: define i32 @_Z3barv()
+// LINUX: define{{.*}} i32 @_Z3barv()
// LINUX: %s = alloca %struct.S, align 1
// LINUX: %s2 = alloca %struct.S, align 1
// LINUX: %C = alloca %struct.ConvertTo, align 1
// WINDOWS: call i32 @"?foo@S@@QEAAHH@Z.sse4.2"
// WINDOWS: call i32 @"?foo@S@@QEAAHH@Z"
-// LINUX: define i32 @_Z4bar2v()
+// LINUX: define{{.*}} i32 @_Z4bar2v()
// LINUX: call i32 @_ZN2S23fooEi.ifunc
// WINDOWS: define dso_local i32 @"?bar2@@YAHXZ"()
// WINDOWS: call i32 @"?foo@S2@@QEAAHH@Z.sse4.2"
// WINDOWS: call i32 @"?foo@S2@@QEAAHH@Z"
-// LINUX: define i32 @_ZN2S23fooEi.sse4.2(%struct.S2* {{[^,]*}} %this, i32 %0)
-// LINUX: define i32 @_ZN2S23fooEi.arch_ivybridge(%struct.S2* {{[^,]*}} %this, i32 %0)
-// LINUX: define i32 @_ZN2S23fooEi(%struct.S2* {{[^,]*}} %this, i32 %0)
+// LINUX: define{{.*}} i32 @_ZN2S23fooEi.sse4.2(%struct.S2* {{[^,]*}} %this, i32 %0)
+// LINUX: define{{.*}} i32 @_ZN2S23fooEi.arch_ivybridge(%struct.S2* {{[^,]*}} %this, i32 %0)
+// LINUX: define{{.*}} i32 @_ZN2S23fooEi(%struct.S2* {{[^,]*}} %this, i32 %0)
// WINDOWS: define dso_local i32 @"?foo@S2@@QEAAHH@Z.sse4.2"(%struct.S2* {{[^,]*}} %this, i32 %0)
// WINDOWS: define dso_local i32 @"?foo@S2@@QEAAHH@Z.arch_ivybridge"(%struct.S2* {{[^,]*}} %this, i32 %0)
// WINDOWS: define dso_local i32 @"?foo@S2@@QEAAHH@Z"(%struct.S2* {{[^,]*}} %this, i32 %0)
-// LINUX: define i32 @_Z9templ_usev()
+// LINUX: define{{.*}} i32 @_Z9templ_usev()
// LINUX: call i32 @_ZN5templIiE3fooEi.ifunc
// LINUX: call i32 @_ZN5templIdE3fooEi.ifunc
// LINUX: @_ZN1S3fooEi.ifunc = weak_odr ifunc i32 (%struct.S*, i32), i32 (%struct.S*, i32)* ()* @_ZN1S3fooEi.resolver
-// LINUX: define i32 @_ZN1S3fooEi(%struct.S* {{[^,]*}} %this, i32 %0)
+// LINUX: define{{.*}} i32 @_ZN1S3fooEi(%struct.S* {{[^,]*}} %this, i32 %0)
// LINUX: ret i32 2
// WINDOWS: define dso_local i32 @"?foo@S@@QEAAHH@Z"(%struct.S* {{[^,]*}} %this, i32 %0)
// WINDOWS: ret i32 2
-// LINUX: define i32 @_ZN1S3fooEi.sse4.2(%struct.S* {{[^,]*}} %this, i32 %0)
+// LINUX: define{{.*}} i32 @_ZN1S3fooEi.sse4.2(%struct.S* {{[^,]*}} %this, i32 %0)
// LINUX: ret i32 0
// WINDOWS: define dso_local i32 @"?foo@S@@QEAAHH@Z.sse4.2"(%struct.S* {{[^,]*}} %this, i32 %0)
// WINDOWS: ret i32 0
-// LINUX: define i32 @_ZN1S3fooEi.arch_ivybridge(%struct.S* {{[^,]*}} %this, i32 %0)
+// LINUX: define{{.*}} i32 @_ZN1S3fooEi.arch_ivybridge(%struct.S* {{[^,]*}} %this, i32 %0)
// LINUX: ret i32 1
// WINDOWS: define dso_local i32 @"?foo@S@@QEAAHH@Z.arch_ivybridge"(%struct.S* {{[^,]*}} %this, i32 %0)
// WINDOWS: ret i32 1
-// LINUX: define i32 @_Z3barv()
+// LINUX: define{{.*}} i32 @_Z3barv()
// LINUX: %s = alloca %struct.S, align 1
// LINUX: %call = call i32 @_ZN1S3fooEi.ifunc(%struct.S* {{[^,]*}} %s, i32 0)
// LINUX: @_Z12foo_overloadv.ifunc = weak_odr ifunc i32 (), i32 ()* ()* @_Z12foo_overloadv.resolver
// LINUX: @_Z12foo_overloadi.ifunc = weak_odr ifunc i32 (i32), i32 (i32)* ()* @_Z12foo_overloadi.resolver
-// LINUX: define i32 @_Z12foo_overloadi.sse4.2(i32 %0)
+// LINUX: define{{.*}} i32 @_Z12foo_overloadi.sse4.2(i32 %0)
// LINUX: ret i32 0
-// LINUX: define i32 @_Z12foo_overloadi.arch_ivybridge(i32 %0)
+// LINUX: define{{.*}} i32 @_Z12foo_overloadi.arch_ivybridge(i32 %0)
// LINUX: ret i32 1
-// LINUX: define i32 @_Z12foo_overloadi(i32 %0)
+// LINUX: define{{.*}} i32 @_Z12foo_overloadi(i32 %0)
// LINUX: ret i32 2
-// LINUX: define i32 @_Z12foo_overloadv.sse4.2()
+// LINUX: define{{.*}} i32 @_Z12foo_overloadv.sse4.2()
// LINUX: ret i32 0
-// LINUX: define i32 @_Z12foo_overloadv.arch_ivybridge()
+// LINUX: define{{.*}} i32 @_Z12foo_overloadv.arch_ivybridge()
// LINUX: ret i32 1
-// LINUX: define i32 @_Z12foo_overloadv()
+// LINUX: define{{.*}} i32 @_Z12foo_overloadv()
// LINUX: ret i32 2
// WINDOWS: define dso_local i32 @"?foo_overload@@YAHH@Z.sse4.2"(i32 %0)
// WINDOWS: define dso_local i32 @"?foo_overload@@YAHXZ"()
// WINDOWS: ret i32 2
-// LINUX: define i32 @_Z4bar2v()
+// LINUX: define{{.*}} i32 @_Z4bar2v()
// LINUX: call i32 @_Z12foo_overloadv.ifunc()
// LINUX: call i32 @_Z12foo_overloadi.ifunc(i32 1)
static void foo9(int *a) __attribute__((interrupt)) {}
};
// X86_64_LINUX: @llvm.used = appending global [3 x i8*] [i8* bitcast (void (i32*, i64)* @{{.*}}foo7{{.*}} to i8*), i8* bitcast (void (i32*)* @{{.*}}foo8{{.*}} to i8*), i8* bitcast (void (i32*)* @{{.*}}foo9{{.*}} to i8*)], section "llvm.metadata"
-// X86_64_LINUX: define x86_intrcc void @{{.*}}foo7{{.*}}(i32* byval(i32) %{{.+}}, i64 %{{.+}})
-// X86_64_LINUX: define x86_intrcc void @{{.*}}foo8{{.*}}(i32* byval(i32) %{{.+}})
+// X86_64_LINUX: define{{.*}} x86_intrcc void @{{.*}}foo7{{.*}}(i32* byval(i32) %{{.+}}, i64 %{{.+}})
+// X86_64_LINUX: define{{.*}} x86_intrcc void @{{.*}}foo8{{.*}}(i32* byval(i32) %{{.+}})
// X86_64_LINUX: define linkonce_odr x86_intrcc void @{{.*}}foo9{{.*}}(i32* byval(i32) %{{.+}})
// X86_LINUX: @llvm.used = appending global [3 x i8*] [i8* bitcast (void (i32*, i32)* @{{.*}}foo7{{.*}} to i8*), i8* bitcast (void (i32*)* @{{.*}}foo8{{.*}} to i8*), i8* bitcast (void (i32*)* @{{.*}}foo9{{.*}} to i8*)], section "llvm.metadata"
-// X86_LINUX: define x86_intrcc void @{{.*}}foo7{{.*}}(i32* byval(i32) %{{.+}}, i32 %{{.+}})
-// X86_LINUX: define x86_intrcc void @{{.*}}foo8{{.*}}(i32* byval(i32) %{{.+}})
+// X86_LINUX: define{{.*}} x86_intrcc void @{{.*}}foo7{{.*}}(i32* byval(i32) %{{.+}}, i32 %{{.+}})
+// X86_LINUX: define{{.*}} x86_intrcc void @{{.*}}foo8{{.*}}(i32* byval(i32) %{{.+}})
// X86_LINUX: define linkonce_odr x86_intrcc void @{{.*}}foo9{{.*}}(i32* byval(i32) %{{.+}})
// X86_64_WIN: @llvm.used = appending global [3 x i8*] [i8* bitcast (void (i32*, i64)* @{{.*}}foo7{{.*}} to i8*), i8* bitcast (void (i32*)* @{{.*}}foo8{{.*}} to i8*), i8* bitcast (void (i32*)* @{{.*}}foo9{{.*}} to i8*)], section "llvm.metadata"
// X86_64_WIN: define dso_local x86_intrcc void @{{.*}}foo7{{.*}}(i32* byval(i32) %{{.+}}, i64 %{{.+}})
// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm -o - %s | FileCheck %s
-// CHECK: @test2 = alias i32 (), i32 ()* @_Z5test1v
+// CHECK: @test2 ={{.*}} alias i32 (), i32 ()* @_Z5test1v
-// CHECK: define i32 @_Z3foov() [[NUW:#[0-9]+]] align 1024
+// CHECK: define{{.*}} i32 @_Z3foov() [[NUW:#[0-9]+]] align 1024
int foo() __attribute__((aligned(1024)));
int foo() { }
void bar4() __attribute__((aligned(1024)));
} c;
-// CHECK: define void @_ZN1C4bar1Ev(%class.C* {{[^,]*}} %this) unnamed_addr [[NUW]] align 2
+// CHECK: define{{.*}} void @_ZN1C4bar1Ev(%class.C* {{[^,]*}} %this) unnamed_addr [[NUW]] align 2
void C::bar1() { }
-// CHECK: define void @_ZN1C4bar2Ev(%class.C* {{[^,]*}} %this) unnamed_addr [[NUW]] align 2
+// CHECK: define{{.*}} void @_ZN1C4bar2Ev(%class.C* {{[^,]*}} %this) unnamed_addr [[NUW]] align 2
void C::bar2() { }
-// CHECK: define void @_ZN1C4bar3Ev(%class.C* {{[^,]*}} %this) unnamed_addr [[NUW]] align 1024
+// CHECK: define{{.*}} void @_ZN1C4bar3Ev(%class.C* {{[^,]*}} %this) unnamed_addr [[NUW]] align 1024
void C::bar3() { }
-// CHECK: define void @_ZN1C4bar4Ev(%class.C* {{[^,]*}} %this) [[NUW]] align 1024
+// CHECK: define{{.*}} void @_ZN1C4bar4Ev(%class.C* {{[^,]*}} %this) [[NUW]] align 1024
void C::bar4() { }
// PR6635
-// CHECK-LABEL: define i32 @_Z5test1v()
+// CHECK-LABEL: define{{.*}} i32 @_Z5test1v()
int test1() { return 10; }
// CHECK at top of file
extern "C" int test2() __attribute__((alias("_Z5test1v")));
// CHECK: @_Z9vtemplateIiE = linkonce_odr global %struct.f undef, comdat
-// CHECK: define i32 @main()
+// CHECK: define{{.*}} i32 @main()
// CHECK: call void @_ZNK1fclEv(%struct.f* {{[^,]*}} @_Z9vtemplateIiE)
unsigned b71 : 2;
};
unsigned read00(S* s) {
- // CHECK-X86-64-LABEL: define i32 @_ZN2N06read00
+ // CHECK-X86-64-LABEL: define{{.*}} i32 @_ZN2N06read00
// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
// CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]]
// CHECK-X86-64: %[[and:.*]] = and i64 %[[val]], 16383
// CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
// CHECK-X86-64: ret i32 %[[trunc]]
- // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read00
+ // CHECK-PPC64-LABEL: define{{.*}} zeroext i32 @_ZN2N06read00
// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
// CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]]
// CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 50
return s->b00;
}
unsigned read01(S* s) {
- // CHECK-X86-64-LABEL: define i32 @_ZN2N06read01
+ // CHECK-X86-64-LABEL: define{{.*}} i32 @_ZN2N06read01
// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
// CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]]
// CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 14
// CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 3
// CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
// CHECK-X86-64: ret i32 %[[trunc]]
- // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read01
+ // CHECK-PPC64-LABEL: define{{.*}} zeroext i32 @_ZN2N06read01
// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
// CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]]
// CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 48
return s->b01;
}
unsigned read20(S* s) {
- // CHECK-X86-64-LABEL: define i32 @_ZN2N06read20
+ // CHECK-X86-64-LABEL: define{{.*}} i32 @_ZN2N06read20
// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
// CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]]
// CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 16
// CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 63
// CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
// CHECK-X86-64: ret i32 %[[trunc]]
- // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read20
+ // CHECK-PPC64-LABEL: define{{.*}} zeroext i32 @_ZN2N06read20
// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
// CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]]
// CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 42
return s->b20;
}
unsigned read21(S* s) {
- // CHECK-X86-64-LABEL: define i32 @_ZN2N06read21
+ // CHECK-X86-64-LABEL: define{{.*}} i32 @_ZN2N06read21
// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
// CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]]
// CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 22
// CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 3
// CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
// CHECK-X86-64: ret i32 %[[trunc]]
- // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read21
+ // CHECK-PPC64-LABEL: define{{.*}} zeroext i32 @_ZN2N06read21
// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
// CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]]
// CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 40
return s->b21;
}
unsigned read30(S* s) {
- // CHECK-X86-64-LABEL: define i32 @_ZN2N06read30
+ // CHECK-X86-64-LABEL: define{{.*}} i32 @_ZN2N06read30
// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
// CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]]
// CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 24
// CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 1073741823
// CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
// CHECK-X86-64: ret i32 %[[trunc]]
- // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read30
+ // CHECK-PPC64-LABEL: define{{.*}} zeroext i32 @_ZN2N06read30
// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
// CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]]
// CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 10
return s->b30;
}
unsigned read31(S* s) {
- // CHECK-X86-64-LABEL: define i32 @_ZN2N06read31
+ // CHECK-X86-64-LABEL: define{{.*}} i32 @_ZN2N06read31
// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
// CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]]
// CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 54
// CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 3
// CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
// CHECK-X86-64: ret i32 %[[trunc]]
- // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read31
+ // CHECK-PPC64-LABEL: define{{.*}} zeroext i32 @_ZN2N06read31
// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
// CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]]
// CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 8
return s->b31;
}
unsigned read70(S* s) {
- // CHECK-X86-64-LABEL: define i32 @_ZN2N06read70
+ // CHECK-X86-64-LABEL: define{{.*}} i32 @_ZN2N06read70
// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
// CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]]
// CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 56
// CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 63
// CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
// CHECK-X86-64: ret i32 %[[trunc]]
- // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read70
+ // CHECK-PPC64-LABEL: define{{.*}} zeroext i32 @_ZN2N06read70
// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
// CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]]
// CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 2
return s->b70;
}
unsigned read71(S* s) {
- // CHECK-X86-64-LABEL: define i32 @_ZN2N06read71
+ // CHECK-X86-64-LABEL: define{{.*}} i32 @_ZN2N06read71
// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
// CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]]
// CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 62
// CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[shr]] to i32
// CHECK-X86-64: ret i32 %[[trunc]]
- // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read71
+ // CHECK-PPC64-LABEL: define{{.*}} zeroext i32 @_ZN2N06read71
// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
// CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]]
// CHECK-PPC64: %[[and:.*]] = and i64 %[[val]], 3
char c;
};
unsigned read(S* s) {
- // CHECK-X86-64-LABEL: define i32 @_ZN2N14read
+ // CHECK-X86-64-LABEL: define{{.*}} i32 @_ZN2N14read
// CHECK-X86-64: %[[ptr:.*]] = getelementptr inbounds %{{.*}}, %{{.*}}* %{{.*}}, i32 0, i32 1
// CHECK-X86-64: %[[val:.*]] = load i8, i8* %[[ptr]]
// CHECK-X86-64: %[[and:.*]] = and i8 %[[val]], 1
// CHECK-X86-64: %[[ext:.*]] = zext i8 %[[and]] to i32
// CHECK-X86-64: ret i32 %[[ext]]
- // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N14read
+ // CHECK-PPC64-LABEL: define{{.*}} zeroext i32 @_ZN2N14read
// CHECK-PPC64: %[[ptr:.*]] = getelementptr inbounds %{{.*}}, %{{.*}}* %{{.*}}, i32 0, i32 1
// CHECK-PPC64: %[[val:.*]] = load i8, i8* %[[ptr]]
// CHECK-PPC64: %[[shr:.*]] = lshr i8 %[[val]], 7
return s->b;
}
void write(S* s, unsigned x) {
- // CHECK-X86-64-LABEL: define void @_ZN2N15write
+ // CHECK-X86-64-LABEL: define{{.*}} void @_ZN2N15write
// CHECK-X86-64: %[[ptr:.*]] = getelementptr inbounds %{{.*}}, %{{.*}}* %{{.*}}, i32 0, i32 1
// CHECK-X86-64: %[[x_trunc:.*]] = trunc i32 %{{.*}} to i8
// CHECK-X86-64: %[[old:.*]] = load i8, i8* %[[ptr]]
// CHECK-X86-64: %[[old_and:.*]] = and i8 %[[old]], -2
// CHECK-X86-64: %[[new:.*]] = or i8 %[[old_and]], %[[x_and]]
// CHECK-X86-64: store i8 %[[new]], i8* %[[ptr]]
- // CHECK-PPC64-LABEL: define void @_ZN2N15write
+ // CHECK-PPC64-LABEL: define{{.*}} void @_ZN2N15write
// CHECK-PPC64: %[[ptr:.*]] = getelementptr inbounds %{{.*}}, %{{.*}}* %{{.*}}, i32 0, i32 1
// CHECK-PPC64: %[[x_trunc:.*]] = trunc i32 %{{.*}} to i8
// CHECK-PPC64: %[[old:.*]] = load i8, i8* %[[ptr]]
void *p;
};
unsigned read(S* s) {
- // CHECK-X86-64-LABEL: define i32 @_ZN2N24read
+ // CHECK-X86-64-LABEL: define{{.*}} i32 @_ZN2N24read
// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
// CHECK-X86-64: %[[val:.*]] = load i32, i32* %[[ptr]]
// CHECK-X86-64: %[[and:.*]] = and i32 %[[val]], 16777215
// CHECK-X86-64: ret i32 %[[and]]
- // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N24read
+ // CHECK-PPC64-LABEL: define{{.*}} zeroext i32 @_ZN2N24read
// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
// CHECK-PPC64: %[[val:.*]] = load i32, i32* %[[ptr]]
// CHECK-PPC64: %[[shr:.*]] = lshr i32 %[[val]], 8
return s->b;
}
void write(S* s, unsigned x) {
- // CHECK-X86-64-LABEL: define void @_ZN2N25write
+ // CHECK-X86-64-LABEL: define{{.*}} void @_ZN2N25write
// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
// CHECK-X86-64: %[[old:.*]] = load i32, i32* %[[ptr]]
// CHECK-X86-64: %[[x_and:.*]] = and i32 %{{.*}}, 16777215
// CHECK-X86-64: %[[old_and:.*]] = and i32 %[[old]], -16777216
// CHECK-X86-64: %[[new:.*]] = or i32 %[[old_and]], %[[x_and]]
// CHECK-X86-64: store i32 %[[new]], i32* %[[ptr]]
- // CHECK-PPC64-LABEL: define void @_ZN2N25write
+ // CHECK-PPC64-LABEL: define{{.*}} void @_ZN2N25write
// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
// CHECK-PPC64: %[[old:.*]] = load i32, i32* %[[ptr]]
// CHECK-PPC64: %[[x_and:.*]] = and i32 %{{.*}}, 16777215
unsigned b : 24;
};
unsigned read(S* s) {
- // CHECK-X86-64-LABEL: define i32 @_ZN2N34read
+ // CHECK-X86-64-LABEL: define{{.*}} i32 @_ZN2N34read
// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
// CHECK-X86-64: %[[val:.*]] = load i32, i32* %[[ptr]]
// CHECK-X86-64: %[[and:.*]] = and i32 %[[val]], 16777215
// CHECK-X86-64: ret i32 %[[and]]
- // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N34read
+ // CHECK-PPC64-LABEL: define{{.*}} zeroext i32 @_ZN2N34read
// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
// CHECK-PPC64: %[[val:.*]] = load i32, i32* %[[ptr]]
// CHECK-PPC64: %[[shr:.*]] = lshr i32 %[[val]], 8
return s->b;
}
void write(S* s, unsigned x) {
- // CHECK-X86-64-LABEL: define void @_ZN2N35write
+ // CHECK-X86-64-LABEL: define{{.*}} void @_ZN2N35write
// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
// CHECK-X86-64: %[[old:.*]] = load i32, i32* %[[ptr]]
// CHECK-X86-64: %[[x_and:.*]] = and i32 %{{.*}}, 16777215
// CHECK-X86-64: %[[old_and:.*]] = and i32 %[[old]], -16777216
// CHECK-X86-64: %[[new:.*]] = or i32 %[[old_and]], %[[x_and]]
// CHECK-X86-64: store i32 %[[new]], i32* %[[ptr]]
- // CHECK-PPC64-LABEL: define void @_ZN2N35write
+ // CHECK-PPC64-LABEL: define{{.*}} void @_ZN2N35write
// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
// CHECK-PPC64: %[[old:.*]] = load i32, i32* %[[ptr]]
// CHECK-PPC64: %[[x_and:.*]] = and i32 %{{.*}}, 16777215
// FIXME: We should widen this load as long as the function isn't being
// instrumented by ThreadSanitizer.
//
- // CHECK-X86-64-LABEL: define i32 @_ZN2N44read
+ // CHECK-X86-64-LABEL: define{{.*}} i32 @_ZN2N44read
// CHECK-X86-64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
// CHECK-X86-64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24*
// CHECK-X86-64: %[[val:.*]] = load i24, i24* %[[ptr]]
// CHECK-X86-64: %[[ext:.*]] = zext i24 %[[val]] to i32
// CHECK-X86-64: ret i32 %[[ext]]
- // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N44read
+ // CHECK-PPC64-LABEL: define{{.*}} zeroext i32 @_ZN2N44read
// CHECK-PPC64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
// CHECK-PPC64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24*
// CHECK-PPC64: %[[val:.*]] = load i24, i24* %[[ptr]]
return s->b;
}
void write(Base* s, unsigned x) {
- // CHECK-X86-64-LABEL: define void @_ZN2N45write
+ // CHECK-X86-64-LABEL: define{{.*}} void @_ZN2N45write
// CHECK-X86-64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
// CHECK-X86-64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24*
// CHECK-X86-64: %[[new:.*]] = trunc i32 %{{.*}} to i24
// CHECK-X86-64: store i24 %[[new]], i24* %[[ptr]]
- // CHECK-PPC64-LABEL: define void @_ZN2N45write
+ // CHECK-PPC64-LABEL: define{{.*}} void @_ZN2N45write
// CHECK-PPC64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
// CHECK-PPC64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24*
// CHECK-PPC64: %[[new:.*]] = trunc i32 %{{.*}} to i24
struct Y { unsigned b : 24; } y;
};
unsigned read(U* u) {
- // CHECK-X86-64-LABEL: define i32 @_ZN2N54read
+ // CHECK-X86-64-LABEL: define{{.*}} i32 @_ZN2N54read
// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
// CHECK-X86-64: %[[val:.*]] = load i32, i32* %[[ptr]]
// CHECK-X86-64: %[[and:.*]] = and i32 %[[val]], 16777215
// CHECK-X86-64: ret i32 %[[and]]
- // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N54read
+ // CHECK-PPC64-LABEL: define{{.*}} zeroext i32 @_ZN2N54read
// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
// CHECK-PPC64: %[[val:.*]] = load i32, i32* %[[ptr]]
// CHECK-PPC64: %[[shr:.*]] = lshr i32 %[[val]], 8
return u->y.b;
}
void write(U* u, unsigned x) {
- // CHECK-X86-64-LABEL: define void @_ZN2N55write
+ // CHECK-X86-64-LABEL: define{{.*}} void @_ZN2N55write
// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
// CHECK-X86-64: %[[old:.*]] = load i32, i32* %[[ptr]]
// CHECK-X86-64: %[[x_and:.*]] = and i32 %{{.*}}, 16777215
// CHECK-X86-64: %[[old_and:.*]] = and i32 %[[old]], -16777216
// CHECK-X86-64: %[[new:.*]] = or i32 %[[old_and]], %[[x_and]]
// CHECK-X86-64: store i32 %[[new]], i32* %[[ptr]]
- // CHECK-PPC64-LABEL: define void @_ZN2N55write
+ // CHECK-PPC64-LABEL: define{{.*}} void @_ZN2N55write
// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
// CHECK-PPC64: %[[old:.*]] = load i32, i32* %[[ptr]]
// CHECK-PPC64: %[[x_and:.*]] = and i32 %{{.*}}, 16777215
unsigned char b2 : 8;
};
unsigned read(S* s) {
- // CHECK-X86-64-LABEL: define i32 @_ZN2N64read
+ // CHECK-X86-64-LABEL: define{{.*}} i32 @_ZN2N64read
// CHECK-X86-64: %[[ptr1:.*]] = bitcast {{.*}}* %{{.*}} to i24*
// CHECK-X86-64: %[[val1:.*]] = load i24, i24* %[[ptr1]]
// CHECK-X86-64: %[[ext1:.*]] = zext i24 %[[val1]] to i32
// CHECK-X86-64: %[[ext2:.*]] = zext i8 %[[val2]] to i32
// CHECK-X86-64: %[[add:.*]] = add nsw i32 %[[ext1]], %[[ext2]]
// CHECK-X86-64: ret i32 %[[add]]
- // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N64read
+ // CHECK-PPC64-LABEL: define{{.*}} zeroext i32 @_ZN2N64read
// CHECK-PPC64: %[[ptr1:.*]] = bitcast {{.*}}* %{{.*}} to i24*
// CHECK-PPC64: %[[val1:.*]] = load i24, i24* %[[ptr1]]
// CHECK-PPC64: %[[ext1:.*]] = zext i24 %[[val1]] to i32
return s->b1 + s->b2;
}
void write(S* s, unsigned x) {
- // CHECK-X86-64-LABEL: define void @_ZN2N65write
+ // CHECK-X86-64-LABEL: define{{.*}} void @_ZN2N65write
// CHECK-X86-64: %[[ptr1:.*]] = bitcast {{.*}}* %{{.*}} to i24*
// CHECK-X86-64: %[[new1:.*]] = trunc i32 %{{.*}} to i24
// CHECK-X86-64: store i24 %[[new1]], i24* %[[ptr1]]
// CHECK-X86-64: %[[new2:.*]] = trunc i32 %{{.*}} to i8
// CHECK-X86-64: %[[ptr2:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
// CHECK-X86-64: store i8 %[[new2]], i8* %[[ptr2]]
- // CHECK-PPC64-LABEL: define void @_ZN2N65write
+ // CHECK-PPC64-LABEL: define{{.*}} void @_ZN2N65write
// CHECK-PPC64: %[[ptr1:.*]] = bitcast {{.*}}* %{{.*}} to i24*
// CHECK-PPC64: %[[new1:.*]] = trunc i32 %{{.*}} to i24
// CHECK-PPC64: store i24 %[[new1]], i24* %[[ptr1]]
// FIXME: We should widen this load as long as the function isn't being
// instrumented by ThreadSanitizer.
//
- // CHECK-X86-64-LABEL: define i32 @_ZN2N74read
+ // CHECK-X86-64-LABEL: define{{.*}} i32 @_ZN2N74read
// CHECK-X86-64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
// CHECK-X86-64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24*
// CHECK-X86-64: %[[val:.*]] = load i24, i24* %[[ptr]]
// CHECK-X86-64: %[[ext:.*]] = zext i24 %[[val]] to i32
// CHECK-X86-64: ret i32 %[[ext]]
- // CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N74read
+ // CHECK-PPC64-LABEL: define{{.*}} zeroext i32 @_ZN2N74read
// CHECK-PPC64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
// CHECK-PPC64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24*
// CHECK-PPC64: %[[val:.*]] = load i24, i24* %[[ptr]]
return s->b;
}
void write(B2* s, unsigned x) {
- // CHECK-X86-64-LABEL: define void @_ZN2N75write
+ // CHECK-X86-64-LABEL: define{{.*}} void @_ZN2N75write
// CHECK-X86-64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
// CHECK-X86-64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24*
// CHECK-X86-64: %[[new:.*]] = trunc i32 %{{.*}} to i24
// CHECK-X86-64: store i24 %[[new]], i24* %[[ptr]]
- // CHECK-PPC64-LABEL: define void @_ZN2N75write
+ // CHECK-PPC64-LABEL: define{{.*}} void @_ZN2N75write
// CHECK-PPC64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
// CHECK-PPC64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24*
// CHECK-PPC64: %[[new:.*]] = trunc i32 %{{.*}} to i24
{
if ((a1.m_sorted = b)) {}
}
-// CHECK-LABEL: define void @_Z5func1bR1A
+// CHECK-LABEL: define{{.*}} void @_Z5func1bR1A
// CHECK: br i1
// CHECK: ret void
foo();
}
-// LINUX: define void @_Z4userv()
+// LINUX: define{{.*}} void @_Z4userv()
// LINUX: call noalias nonnull i8* @_Znwm
// LINUX: call float @atan2f
// LINUX: call void @_Z3foov
// LINUX: declare float @atan2f(float, float)
// LINUX: declare void @_Z3foov()
-// SPIR: define spir_func void @_Z4userv()
+// SPIR: define{{.*}} spir_func void @_Z4userv()
// SPIR: call spir_func noalias nonnull i8* @_Znwj
// SPIR: call spir_func float @atan2f
// SPIR: call spir_func void @_Z3foov
}
} // namespace std
-// CHECK-FN-CG-LABEL: define zeroext i1 @_Z3foov()
+// CHECK-FN-CG-LABEL: define{{.*}} zeroext i1 @_Z3foov()
// CHECK-FN-CG: ret i1 false
bool foo() {
return __builtin_is_constant_evaluated();
return m + int(sizeof(arr));
}
-// CHECK-STATIC-DAG: @p = global i32 26,
+// CHECK-STATIC-DAG: @p ={{.*}} global i32 26,
CONSTINIT int p = f(); // f().m == 13; initialized to 26
-// CHECK-STATIC-DAG: @p2 = global i32 26,
+// CHECK-STATIC-DAG: @p2 ={{.*}} global i32 26,
int p2 = f(); // same result without CONSTINIT
// CHECK-DYN-LABEL: define internal void @__cxx_global_var_init()
int y;
-// CHECK-STATIC-DAG: @b = global i32 2,
+// CHECK-STATIC-DAG: @b ={{.*}} global i32 2,
CONSTINIT int b = __builtin_is_constant_evaluated() ? 2 : y; // static initialization to 2
// CHECK-DYN-LABEL: define internal void @__cxx_global_var_init.1()
const int a = __builtin_is_constant_evaluated() ? y : 1; // dynamic initialization to 1
const int *a_sink = &a;
-// CHECK-ARR-LABEL: define void @_Z13test_arr_exprv
+// CHECK-ARR-LABEL: define{{.*}} void @_Z13test_arr_exprv
void test_arr_expr() {
// CHECK-ARR: %x1 = alloca [101 x i8],
char x1[std::is_constant_evaluated() && __builtin_is_constant_evaluated() ? 101 : 1];
char x3[std::is_constant_evaluated() || __builtin_is_constant_evaluated() ? RANDU() : 13];
}
-// CHECK-ARR-LABEL: define void @_Z17test_new_arr_exprv
+// CHECK-ARR-LABEL: define{{.*}} void @_Z17test_new_arr_exprv
void test_new_arr_expr() {
// CHECK-ARR: call noalias nonnull i8* @_Znam(i64 17)
new char[std::is_constant_evaluated() || __builtin_is_constant_evaluated() ? 1 : 17];
return *p;
}
-// CHECK-FOLD-LABEL: define void @_Z21test_ir_constant_foldv()
+// CHECK-FOLD-LABEL: define{{.*}} void @_Z21test_ir_constant_foldv()
void test_ir_constant_fold() {
// CHECK-FOLD-NEXT: entry:
// CHECK-FOLD-NEXT: call void @OK()
std::is_constant_evaluated() ? BOOM() : OK();
}
-// CHECK-STATIC-DAG: @ir = constant i32* @i_constant,
+// CHECK-STATIC-DAG: @ir ={{.*}} constant i32* @i_constant,
int i_constant;
int i_not_constant;
int &ir = __builtin_is_constant_evaluated() ? i_constant : i_not_constant;
virtual void foo() {}
};
-// CHECK-LABEL: define void @test_builtin_launder_virtual_fn
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_virtual_fn
extern "C" void test_builtin_launder_virtual_fn(TestVirtualFn *p) {
// CHECK: store [[TYPE:%[^ ]+]] %p, [[TYPE]]* %p.addr
// CHECK-NEXT: [[TMP0:%.*]] = load [[TYPE]], [[TYPE]]* %p.addr
struct TestPolyBase : TestVirtualFn {
};
-// CHECK-LABEL: define void @test_builtin_launder_poly_base
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_poly_base
extern "C" void test_builtin_launder_poly_base(TestPolyBase *p) {
// CHECK-STRICT-NOT: ret void
// CHECK-STRICT: @llvm.launder.invariant.group
struct TestBase {};
struct TestVirtualBase : virtual TestBase {};
-// CHECK-LABEL: define void @test_builtin_launder_virtual_base
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_virtual_base
extern "C" void test_builtin_launder_virtual_base(TestVirtualBase *p) {
// CHECK-STRICT-NOT: ret void
// CHECK-STRICT: @llvm.launder.invariant.group
// Negative Cases
//===----------------------------------------------------------------------===//
-// CHECK-LABEL: define void @test_builtin_launder_ommitted_one
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_ommitted_one
extern "C" void test_builtin_launder_ommitted_one(int *p) {
// CHECK: entry
// CHECK-NEXT: %p.addr = alloca i32*
int x;
};
-// CHECK-LABEL: define void @test_builtin_launder_ommitted_two
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_ommitted_two
extern "C" void test_builtin_launder_ommitted_two(TestNoInvariant *p) {
// CHECK: entry
// CHECK-NOT: llvm.launder.invariant.group
TestVirtualFn member;
};
-// CHECK-LABEL: define void @test_builtin_launder_virtual_member
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_virtual_member
extern "C" void test_builtin_launder_virtual_member(TestVirtualMember *p) {
// CHECK: entry
// CHECK-NONSTRICT-NOT: @llvm.launder.invariant.group
TestVirtualMember member;
};
-// CHECK-LABEL: define void @test_builtin_launder_virtual_member_depth_2
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_virtual_member_depth_2
extern "C" void test_builtin_launder_virtual_member_depth_2(TestVirtualMemberDepth2 *p) {
// CHECK: entry
// CHECK-NONSTRICT-NOT: @llvm.launder.invariant.group
TestVirtualFn &member;
};
-// CHECK-LABEL: define void @test_builtin_launder_virtual_reference_member
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_virtual_reference_member
extern "C" void test_builtin_launder_virtual_reference_member(TestVirtualReferenceMember *p) {
// CHECK: entry
// CHECK-NOT: @llvm.launder.invariant.group
TestRecursiveMember &member;
};
-// CHECK-LABEL: define void @test_builtin_launder_recursive_member
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_recursive_member
extern "C" void test_builtin_launder_recursive_member(TestRecursiveMember *p) {
// CHECK: entry
// CHECK-NOT: @llvm.launder.invariant.group
virtual void foo();
};
-// CHECK-LABEL: define void @test_builtin_launder_virtual_recursive_member
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_virtual_recursive_member
extern "C" void test_builtin_launder_virtual_recursive_member(TestVirtualRecursiveMember *p) {
// CHECK: entry
// CHECK-NONSTRICT-NOT: @llvm.launder.invariant.group
TestVirtualRecursiveMember *d = __builtin_launder(p);
}
-// CHECK-LABEL: define void @test_builtin_launder_array(
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_array(
extern "C" void test_builtin_launder_array(TestVirtualFn (&Arr)[5]) {
// CHECK: entry
// CHECK-NONSTRICT-NOT: @llvm.launder.invariant.group
TestVirtualFn *d = __builtin_launder(Arr);
}
-// CHECK-LABEL: define void @test_builtin_launder_array_nested(
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_array_nested(
extern "C" void test_builtin_launder_array_nested(TestVirtualFn (&Arr)[5][2]) {
// CHECK: entry
// CHECK-NONSTRICT-NOT: @llvm.launder.invariant.group
RetTy d = __builtin_launder(Arr);
}
-// CHECK-LABEL: define void @test_builtin_launder_array_no_invariant(
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_array_no_invariant(
extern "C" void test_builtin_launder_array_no_invariant(TestNoInvariant (&Arr)[5]) {
// CHECK: entry
// CHECK-NOT: @llvm.launder.invariant.group
TestNoInvariant *d = __builtin_launder(Arr);
}
-// CHECK-LABEL: define void @test_builtin_launder_array_nested_no_invariant(
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_array_nested_no_invariant(
extern "C" void test_builtin_launder_array_nested_no_invariant(TestNoInvariant (&Arr)[5][2]) {
// CHECK: entry
// CHECK-NOT: @llvm.launder.invariant.group
template struct WithMember<TestVirtualFn[5]>;
-// CHECK-LABEL: define void @test_builtin_launder_member_array(
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_member_array(
extern "C" void test_builtin_launder_member_array(WithMember<TestVirtualFn[5]> *p) {
// CHECK: entry
// CHECK-NONSTRICT-NOT: @llvm.launder.invariant.group
template struct WithMember<TestVirtualFn[5][2]>;
-// CHECK-LABEL: define void @test_builtin_launder_member_array_nested(
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_member_array_nested(
extern "C" void test_builtin_launder_member_array_nested(WithMember<TestVirtualFn[5][2]> *p) {
// CHECK: entry
// CHECK-NONSTRICT-NOT: @llvm.launder.invariant.group
template struct WithMember<TestNoInvariant[5]>;
-// CHECK-LABEL: define void @test_builtin_launder_member_array_no_invariant(
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_member_array_no_invariant(
extern "C" void test_builtin_launder_member_array_no_invariant(WithMember<TestNoInvariant[5]> *p) {
// CHECK: entry
// CHECK-NOT: @llvm.launder.invariant.group
template struct WithMember<TestNoInvariant[5][2]>;
-// CHECK-LABEL: define void @test_builtin_launder_member_array_nested_no_invariant(
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_member_array_nested_no_invariant(
extern "C" void test_builtin_launder_member_array_nested_no_invariant(WithMember<TestNoInvariant[5][2]> *p) {
// CHECK: entry
// CHECK-NOT: @llvm.launder.invariant.group
template struct WithBase<TestNoInvariant>;
-// CHECK-LABEL: define void @test_builtin_launder_base_no_invariant(
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_base_no_invariant(
extern "C" void test_builtin_launder_base_no_invariant(WithBase<TestNoInvariant> *p) {
// CHECK: entry
// CHECK-NOT: @llvm.launder.invariant.group
template struct WithBase<TestVirtualFn>;
-// CHECK-LABEL: define void @test_builtin_launder_base(
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_base(
extern "C" void test_builtin_launder_base(WithBase<TestVirtualFn> *p) {
// CHECK: entry
// CHECK-NONSTRICT-NOT: @llvm.launder.invariant.group
const int x;
};
-// CHECK-LABEL: define void @test_builtin_launder_const_member
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_const_member
extern "C" void test_builtin_launder_const_member(TestConstMember *p) {
// CHECK: entry
// CHECK-NOT: @llvm.launder.invariant.group
TestConstMember x;
};
-// CHECK-LABEL: define void @test_builtin_launder_const_subobject
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_const_subobject
extern "C" void test_builtin_launder_const_subobject(TestConstSubobject *p) {
// CHECK: entry
// CHECK-NOT: @llvm.launder.invariant.group
const struct TestConstMember x;
};
-// CHECK-LABEL: define void @test_builtin_launder_const_object
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_const_object
extern "C" void test_builtin_launder_const_object(TestConstObject *p) {
// CHECK: entry
// CHECK-NOT: @llvm.launder.invariant.group
int &x;
};
-// CHECK-LABEL: define void @test_builtin_launder_reference_member
+// CHECK-LABEL: define{{.*}} void @test_builtin_launder_reference_member
extern "C" void test_builtin_launder_reference_member(TestReferenceMember *p) {
// CHECK: entry
// CHECK-NOT: @llvm.launder.invariant.group
void *operator new[](size_t, void*, bool) throw();
-// CHECK-LABEL: define void @test_basic(
+// CHECK-LABEL: define{{.*}} void @test_basic(
extern "C" void test_basic() {
// CHECK: call noalias nonnull i8* @_Znwm(i64 4) [[ATTR_BUILTIN_NEW:#[^ ]*]]
// CHECK: call void @_ZdlPv({{.*}}) [[ATTR_BUILTIN_DELETE:#[^ ]*]]
// CHECK: declare nonnull i8* @_Znwm(i64) [[ATTR_NOBUILTIN:#[^ ]*]]
// CHECK: declare void @_ZdlPv(i8*) [[ATTR_NOBUILTIN_NOUNWIND:#[^ ]*]]
-// CHECK-LABEL: define void @test_aligned_alloc(
+// CHECK-LABEL: define{{.*}} void @test_aligned_alloc(
extern "C" void test_aligned_alloc() {
// CHECK: call noalias nonnull align 4 i8* @_ZnwmSt11align_val_t(i64 4, i64 4) [[ATTR_BUILTIN_NEW:#[^ ]*]]
// CHECK: call void @_ZdlPvSt11align_val_t({{.*}}, i64 4) [[ATTR_BUILTIN_DELETE:#[^ ]*]]
// CHECK: declare nonnull i8* @_ZnwmSt11align_val_t(i64, i64) [[ATTR_NOBUILTIN:#[^ ]*]]
// CHECK: declare void @_ZdlPvSt11align_val_t(i8*, i64) [[ATTR_NOBUILTIN_NOUNWIND:#[^ ]*]]
-// CHECK-LABEL: define void @test_sized_delete(
+// CHECK-LABEL: define{{.*}} void @test_sized_delete(
extern "C" void test_sized_delete() {
// CHECK: call noalias nonnull i8* @_Znwm(i64 4) [[ATTR_BUILTIN_NEW:#[^ ]*]]
// CHECK: call void @_ZdlPvm({{.*}}, i64 4) [[ATTR_BUILTIN_DELETE:#[^ ]*]]
// CHECK-GLOBAL-ONE-DAG: @[[FILE:.*]] = {{.*}}c"test_const_init.cpp\00"
// CHECK-GLOBAL-ONE-DAG: @[[FUNC:.*]] = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
//
-// CHECK-GLOBAL-ONE: @const_init_global = global %struct.source_location { i32 1000, i32 {{[0-9]+}}, {{[^@]*}}@[[FILE]], {{[^@]*}}@[[FUNC]]
+// CHECK-GLOBAL-ONE: @const_init_global ={{.*}} global %struct.source_location { i32 1000, i32 {{[0-9]+}}, {{[^@]*}}@[[FILE]], {{[^@]*}}@[[FUNC]]
#line 1000 "test_const_init.cpp"
SL const_init_global = SL::current();
// RUN: FileCheck --input-file %t.ll %s --check-prefix=CHECK-GLOBAL-TWO
//
-// CHECK-GLOBAL-TWO-DAG: @runtime_init_global = global %struct.source_location zeroinitializer, align 8
+// CHECK-GLOBAL-TWO-DAG: @runtime_init_global ={{.*}} global %struct.source_location zeroinitializer, align 8
//
// CHECK-GLOBAL-TWO-DAG: @[[FILE:.*]] = {{.*}}c"test_runtime_init.cpp\00"
// CHECK-GLOBAL-TWO-DAG: @[[FUNC:.*]] = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
// RUN: FileCheck --input-file %t.ll %s --check-prefix=CHECK-CTOR-GLOBAL
//
-// CHECK-CTOR-GLOBAL-DAG: @GlobalInitVal = global %struct.TestInit zeroinitializer, align 8
+// CHECK-CTOR-GLOBAL-DAG: @GlobalInitVal ={{.*}} global %struct.TestInit zeroinitializer, align 8
// CHECK-CTOR-GLOBAL-DAG: @[[FILE:.*]] = {{.*}}c"GlobalInitVal.cpp\00"
// CHECK-CTOR-GLOBAL-DAG: @[[FUNC:.*]] = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
//
// CHECK-CTOR-LOCAL-DAG: @[[FILE:.*]] = {{.*}}c"LocalInitVal.cpp\00"
// CHECK-CTOR-LOCAL-DAG: @[[FUNC:.*]] = {{.*}}c"test_init_function\00"
//
-// CHECK-CTOR-LOCAL: define void @test_init_function()
+// CHECK-CTOR-LOCAL: define{{.*}} void @test_init_function()
// CHECK-CTOR-LOCAL-NOT: ret
//
// CHECK-CTOR-LOCAL: call void @_ZN15source_location7currentEjjPKcS1_(%struct.source_location* sret(%struct.source_location) align 8 %[[TMP:[^,]*]],
// CHECK-CONSTEXPR-T2-DAG: @[[FILE_ARG:.*]] = {{.*}}c"ConstexprGlobal.cpp\00"
// CHECK-CONSTEXPR-T2-DAG: @[[EMPTY:.*]] = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
//
-// CHECK-CONSTEXPR-T2: @ConstexprGlobal = global %struct.TestInitConstexpr {
+// CHECK-CONSTEXPR-T2: @ConstexprGlobal ={{.*}} global %struct.TestInitConstexpr {
// CHECK-CONSTEXPR-T2-SAME: %struct.source_location { i32 4200, i32 {{[0-9]+}}, {{[^@]*}}@[[FILE_INIT]], {{[^@]*}}@[[FUNC_INIT]],
// CHECK-CONSTEXPR-T2-SAME: {{[^%]*}}%struct.source_location { i32 4400, i32 {{[0-9]+}}, {{[^@]*}}@[[FILE_ARG]], {{[^@]*}}@[[EMPTY]]
#line 4400 "ConstexprGlobal.cpp"
// CHECK-CONSTEXPR-LOCAL-DAG: @[[FUNC:.*]] = {{.*}}c"test_init_function_constexpr\00"
// CHECK-CONSTEXPR-LOCAL-DAG: @[[FILE:.*]] = {{.*}}c"ConstexprLocal.cpp\00"
//
-// CHECK-CONSTEXPR-LOCAL: define void @test_init_function_constexpr()
+// CHECK-CONSTEXPR-LOCAL: define{{.*}} void @test_init_function_constexpr()
// CHECK-CONSTEXPR-LOCAL: call void @_ZN15source_location7currentEjjPKcS1_(%struct.source_location* sret(%struct.source_location) align 8 %[[TMP:[^,]*]],
// CHECK-CONSTEXPR-LOCAL-SAME: i32 4600, i32 {{[0-9]+}}, {{[^@]*}}@[[FILE]], {{[^@]*}}@[[FUNC]]
// CHECK-CONSTEXPR-LOCAL: call void @_ZN17TestInitConstexprC1E15source_location(%struct.TestInitConstexpr* {{[^,]*}} %local_val, {{.*}}%[[TMP]])
// CHECK-AGG-DEFAULT-DAG: @[[FILE:.*]] = {{.*}}c"TestInitAgg.cpp\00"
// CHECK-AGG-DEFAULT-DAG: @[[FUNC:.*]] = {{.*}}c"TestInitAgg\00"
//
-// CHECK-AGG-DEFAULT: @GlobalAggDefault = global %struct.TestInitAgg {
+// CHECK-AGG-DEFAULT: @GlobalAggDefault ={{.*}} global %struct.TestInitAgg {
// CHECK-AGG-DEFAULT-SAME: %struct.source_location zeroinitializer,
// CHECK-AGG-DEFAULT-SAME: %struct.source_location { i32 5000, i32 {{[0-9]+}}, {{[^@]*}}@[[FILE]], {{[^@]*}}@[[FUNC]]
#line 5400 "GlobalAggDefault.cpp"
// CHECK-AGG-BRACE-DAG: @[[FILE:.*]] = {{.*}}c"BraceInitEnd.cpp\00"
// CHECK-AGG-BRACE-DAG: @[[FUNC:.*]] = {{.*}}c"test_agg_init\00"
//
-// CHECK-AGG-BRACE: define void @test_agg_init()
+// CHECK-AGG-BRACE: define{{.*}} void @test_agg_init()
// CHECK-AGG-BRACE: %[[I2:.*]] = getelementptr inbounds %struct.TestInitAgg, %struct.TestInitAgg* %local_brace_init, i32 0, i32 1
// CHECK-AGG-BRACE-NEXT: call void @_ZN15source_location7currentEjjPKcS1_(%struct.source_location* sret(%struct.source_location) align 8 %[[I2]],
// CHECK-AGG-BRACE-SAME: i32 5700, i32 {{[0-9]+}}, {{[^@]*}}@[[FILE]], {{[^@]*}}@[[FUNC]]
// CHECK-AGG-EQUAL-DAG: @[[FILE:.*]] = {{.*}}c"EqualInitEnd.cpp\00"
// CHECK-AGG-EQUAL-DAG: @[[FUNC:.*]] = {{.*}}c"test_agg_init\00"
//
-// CHECK-AGG-EQUAL: define void @test_agg_init()
+// CHECK-AGG-EQUAL: define{{.*}} void @test_agg_init()
// CHECK-AGG-EQUAL: %[[I2:.*]] = getelementptr inbounds %struct.TestInitAgg, %struct.TestInitAgg* %local_equal_init, i32 0, i32 1
// CHECK-AGG-EQUAL-NEXT: call void @_ZN15source_location7currentEjjPKcS1_(%struct.source_location* sret(%struct.source_location) align 8 %[[I2]],
// CHECK-AGG-EQUAL-SAME: i32 5900, i32 {{[0-9]+}}, {{[^@]*}}@[[FILE]], {{[^@]*}}@[[FUNC]]
// CHECK-AGG-LIST-DAG: @[[FILE_ELEM:.*]] = {{.*}}c"ListElem.cpp\00"
// CHECK-AGG-LIST-DAG: @[[FUNC:.*]] = {{.*}}c"test_agg_init\00"
//
-// CHECK-AGG-LIST: define void @test_agg_init()
+// CHECK-AGG-LIST: define{{.*}} void @test_agg_init()
//
// CHECK-AGG-LIST: %[[I1:.*]] = getelementptr inbounds %struct.TestInitAgg, %struct.TestInitAgg* %local_list_init, i32 0, i32 0
// CHECK-AGG-LIST-NEXT: call void @_ZN15source_location7currentEjjPKcS1_(%struct.source_location* sret(%struct.source_location) align 8 %[[I1]],
int get_line2(int l = get_line()) { return l; }
-// CHECK: @global_one = global i32 [[@LINE+1]], align 4
+// CHECK: @global_one ={{.*}} global i32 [[@LINE+1]], align 4
int global_one = __builtin_LINE();
-// CHECK-NEXT: @global_two = global i32 [[@LINE+1]], align 4
+// CHECK-NEXT: @global_two ={{.*}} global i32 [[@LINE+1]], align 4
int global_two = get_line_constexpr();
// CHECK: @_ZL12global_three = internal constant i32 [[@LINE+1]], align 4
const int global_three(get_line_constexpr());
static void test_class();
};
-// CHECK-LABEL: define void @_ZN11InClassInit10test_classEv()
+// CHECK-LABEL: define{{.*}} void @_ZN11InClassInit10test_classEv()
void InClassInit::test_class() {
// CHECK: call void @_ZN11InClassInitC1Ev(%struct.InClassInit* {{[^,]*}} %test_one)
InClassInit test_one;
InClassInit test_five(Tag4{});
}
-// CHECK-LABEL: define void @_ZN11InClassInitC2Ev
+// CHECK-LABEL: define{{.*}} void @_ZN11InClassInitC2Ev
// CHECK: store i32 [[@LINE+4]], i32* %Init, align 4
// CHECK: %call = call i32 @_Z8get_linei(i32 [[@LINE+3]])
// CHECK-NEXT: %call2 = call i32 @_Z9get_line2i(i32 %call)
InClassInit::InClassInit(Tag3, int l) : Init(l) {}
-// CHECK-LABEL: define void @_ZN11InClassInitC2E4Tag4i(%struct.InClassInit* {{[^,]*}} %this, i32 %arg)
+// CHECK-LABEL: define{{.*}} void @_ZN11InClassInitC2E4Tag4i(%struct.InClassInit* {{[^,]*}} %this, i32 %arg)
// CHECK: %[[TEMP:.+]] = load i32, i32* %arg.addr, align 4
// CHECK-NEXT: store i32 %[[TEMP]], i32* %Init, align 4
// CHECK: %[[CALL:.+]] = call i32 @_Z8get_linei(i32 [[@LINE+3]])
// CHECK-NEXT: store i32 %[[CALL2]], i32* %Init2, align 4
InClassInit::InClassInit(Tag4, int arg) : Init(arg) {}
-// CHECK-LABEL: define void @_Z13get_line_testv()
+// CHECK-LABEL: define{{.*}} void @_Z13get_line_testv()
void get_line_test() {
// CHECK: %[[CALL:.+]] = call i32 @_Z8get_linei(i32 [[@LINE+2]])
// CHECK-NEXT: store i32 %[[CALL]], i32* @sink, align 4
}
int o = X::__builtin_fabs(-2.0);
-// CHECK: @o = global i32 2, align 4
+// CHECK: @o ={{.*}} global i32 2, align 4
long p = X::__builtin_fabsf(-3.0f);
-// CHECK: @p = global i64 3, align 8
+// CHECK: @p ={{.*}} global i64 3, align 8
// PR8839
extern "C" char memmove();
int x, y;
};
-// CHECK-LABEL: define i64 @{{.*}}get_offset_of_y_naively{{.*}}(
+// CHECK-LABEL: define{{.*}} i64 @{{.*}}get_offset_of_y_naively{{.*}}(
uintptr_t get_offset_of_y_naively() {
// CHECK: [[ENTRY:.*]]:
// CHECK-NEXT: ret i64 ptrtoint (i32* getelementptr (i32, i32* null, i32 1) to i64)
return ((uintptr_t)(&(((S *)nullptr)->y)));
}
-// CHECK-LABEL: define i64 @{{.*}}get_offset_of_y_via_builtin{{.*}}(
+// CHECK-LABEL: define{{.*}} i64 @{{.*}}get_offset_of_y_via_builtin{{.*}}(
uintptr_t get_offset_of_y_via_builtin() {
// CHECK: [[ENTRY:.*]]:
// CHECK-NEXT: ret i64 4
// offset. The pointer before subtraction doesn't need to be aligned for
// the destination type.
-// CHECK-LABEL: define void @_Z16downcast_pointerP1B(%class.B* %b)
+// CHECK-LABEL: define{{.*}} void @_Z16downcast_pointerP1B(%class.B* %b)
void downcast_pointer(B *b) {
(void) static_cast<C*>(b);
// Alignment check from EmitTypeCheck(TCK_DowncastPointer, ...)
// CHECK-NEXT: br i1 [[AND]]
}
-// CHECK-LABEL: define void @_Z18downcast_referenceR1B(%class.B* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %b)
+// CHECK-LABEL: define{{.*}} void @_Z18downcast_referenceR1B(%class.B* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %b)
void downcast_reference(B &b) {
(void) static_cast<C&>(b);
// Alignment check from EmitTypeCheck(TCK_DowncastReference, ...)
B::q();
}
-// CHECK-LABEL: define void @_ZN29FunctionSanitizerVirtualCalls1B1fEv
+// CHECK-LABEL: define{{.*}} void @_ZN29FunctionSanitizerVirtualCalls1B1fEv
// CHECK-NOT: prologue
//
-// CHECK-LABEL: define void @_ZTv0_n24_N29FunctionSanitizerVirtualCalls1B1fEv
+// CHECK-LABEL: define{{.*}} void @_ZTv0_n24_N29FunctionSanitizerVirtualCalls1B1fEv
// CHECK-NOT: prologue
//
-// CHECK-LABEL: define void @_ZN29FunctionSanitizerVirtualCalls11force_irgenEv()
+// CHECK-LABEL: define{{.*}} void @_ZN29FunctionSanitizerVirtualCalls11force_irgenEv()
// CHECK: prologue
//
// CHECK-LABEL: define linkonce_odr void @_ZN29FunctionSanitizerVirtualCalls1AC1Ev
// RUN: %clang_cc1 -std=c++17 -emit-llvm -fchar8_t -triple x86_64-linux %s -o - | FileCheck %s --check-prefix=ITANIUM
// RUN: %clang_cc1 -std=c++17 -emit-llvm -fchar8_t -triple x86_64-windows %s -o - | FileCheck %s --check-prefix=MSABI
-// ITANIUM: define void @_Z1fDu(
+// ITANIUM: define{{.*}} void @_Z1fDu(
// MSABI: define {{.*}}void @"?f@@YAX_Q@Z"(
void f(char8_t c) {}
const int cx; // stays in .rodata.1
const int cy; // .rodata.2
-// CHECK: @x = global i32 0, align 4 #0
-// CHECK: @y = global i32 0, align 4 #1
-// CHECK: @z = global i32 0, align 4
-// CHECK: @cx = constant i32 0, align 4 #2
-// CHECK: @cy = constant i32 0, align 4 #3
-// CHECK: @cz = constant i32 0, align 4 #1
+// CHECK: @x ={{.*}} global i32 0, align 4 #0
+// CHECK: @y ={{.*}} global i32 0, align 4 #1
+// CHECK: @z ={{.*}} global i32 0, align 4
+// CHECK: @cx ={{.*}} constant i32 0, align 4 #2
+// CHECK: @cy ={{.*}} constant i32 0, align 4 #3
+// CHECK: @cz ={{.*}} constant i32 0, align 4 #1
// CHECK: attributes #0 = { "bss-section"=".bss.1" }
// CHECK: attributes #1 = { "bss-section"=".bss.2" }
return b + fptrs[f]();
}
}
-//CHECK: @a = global i32 0, align 4 #0
-//CHECK: @b = global i32 1, align 4 #0
-//CHECK: @c = global [4 x i32] zeroinitializer, align 4 #0
-//CHECK: @d = global [5 x i16] zeroinitializer, align 2 #0
-//CHECK: @e = global [6 x i16] [i16 0, i16 0, i16 1, i16 0, i16 0, i16 0], align 2 #0
-//CHECK: @f = constant i32 2, align 4 #0
+//CHECK: @a ={{.*}} global i32 0, align 4 #0
+//CHECK: @b ={{.*}} global i32 1, align 4 #0
+//CHECK: @c ={{.*}} global [4 x i32] zeroinitializer, align 4 #0
+//CHECK: @d ={{.*}} global [5 x i16] zeroinitializer, align 2 #0
+//CHECK: @e ={{.*}} global [6 x i16] [i16 0, i16 0, i16 1, i16 0, i16 0, i16 0], align 2 #0
+//CHECK: @f ={{.*}} constant i32 2, align 4 #0
-//CHECK: @h = global i32 0, align 4 #1
-//CHECK: @i = global i32 0, align 4 #2
-//CHECK: @j = constant i32 4, align 4 #2
-//CHECK: @k = global i32 0, align 4 #2
+//CHECK: @h ={{.*}} global i32 0, align 4 #1
+//CHECK: @i ={{.*}} global i32 0, align 4 #2
+//CHECK: @j ={{.*}} constant i32 4, align 4 #2
+//CHECK: @k ={{.*}} global i32 0, align 4 #2
//CHECK: @_ZZ3gooE7lstat_h = internal global i32 0, align 4 #2
//CHECK: @_ZL1g = internal global [2 x i32] zeroinitializer, align 4 #0
-//CHECK: @l = global i32 5, align 4 #3
-//CHECK: @m = constant i32 6, align 4 #3
+//CHECK: @l ={{.*}} global i32 5, align 4 #3
+//CHECK: @m ={{.*}} constant i32 6, align 4 #3
-//CHECK: @n = global i32 0, align 4
-//CHECK: @o = global i32 6, align 4
-//CHECK: @p = constant i32 7, align 4
+//CHECK: @n ={{.*}} global i32 0, align 4
+//CHECK: @o ={{.*}} global i32 6, align 4
+//CHECK: @p ={{.*}} constant i32 7, align 4
//CHECK: @_ZL5fptrs = internal constant [2 x i32 ()*] [i32 ()* @foo, i32 ()* @goo], align 4 #3
-//CHECK: define i32 @foo() #5 {
-//CHECK: define i32 @goo() #6 {
+//CHECK: define{{.*}} i32 @foo() #5 {
+//CHECK: define{{.*}} i32 @goo() #6 {
//CHECK: declare i32 @zoo(i32*, i32*) #7
-//CHECK: define i32 @hoo() #8 {
+//CHECK: define{{.*}} i32 @hoo() #8 {
//CHECK: attributes #0 = { "bss-section"="my_bss.1" "data-section"="my_data.1" "rodata-section"="my_rodata.1" }
//CHECK: attributes #1 = { "data-section"="my_data.1" "rodata-section"="my_rodata.1" }
};
// CHECK: @.compoundliteral = internal global [5 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5], align 4
-// CHECK: @q = global i32* getelementptr inbounds ([5 x i32], [5 x i32]* @.compoundliteral, i32 0, i32 0), align 4
+// CHECK: @q ={{.*}} global i32* getelementptr inbounds ([5 x i32], [5 x i32]* @.compoundliteral, i32 0, i32 0), align 4
-// CHECK-LABEL: define i32 @_Z1fv()
+// CHECK-LABEL: define{{.*}} i32 @_Z1fv()
int f() {
// CHECK: [[LVALUE:%[a-z0-9.]+]] = alloca
// CHECK-NEXT: [[I:%[a-z0-9]+]] = getelementptr inbounds {{.*}}, {{.*}}* [[LVALUE]], i32 0, i32 0
return ((Y){17, "seventeen"}).i;
}
-// CHECK-LABEL: define i32 @_Z1gv()
+// CHECK-LABEL: define{{.*}} i32 @_Z1gv()
int g() {
// CHECK: store [2 x i32]* %{{[a-z0-9.]+}}, [2 x i32]** [[V:%[a-z0-9.]+]]
const int (&v)[2] = (int [2]) {1,2};
};
B test0(B &x) {
- // CHECK-LABEL: define void @_ZN5test35test0ERNS_1BE(
+ // CHECK-LABEL: define{{.*}} void @_ZN5test35test0ERNS_1BE(
// CHECK: [[X:%.*]] = alloca [[B:%.*]]*,
// CHECK: store [[B]]* {{%.*}}, [[B]]** [[X]]
// CHECK-NEXT: [[T0:%.*]] = load [[B]]*, [[B]]** [[X]]
}
B test1() {
- // CHECK-LABEL: define void @_ZN5test35test1Ev(
+ // CHECK-LABEL: define{{.*}} void @_ZN5test35test1Ev(
// CHECK: [[TEMP:%.*]] = alloca [[B]],
// CHECK: call void @_ZN5test312test1_helperEv([[B]]* sret([[B]]) align 1 [[TEMP]])
// CHECK-NEXT: [[BOOL:%.*]] = call zeroext i1 @_ZN5test31BcvbEv([[B]]* {{[^,]*}} [[TEMP]])
A test2(B &x) {
- // CHECK-LABEL: define void @_ZN5test35test2ERNS_1BE(
+ // CHECK-LABEL: define{{.*}} void @_ZN5test35test2ERNS_1BE(
// CHECK: [[X:%.*]] = alloca [[B]]*,
// CHECK: store [[B]]* {{%.*}}, [[B]]** [[X]]
// CHECK-NEXT: [[T0:%.*]] = load [[B]]*, [[B]]** [[X]]
}
A test3() {
- // CHECK-LABEL: define void @_ZN5test35test3Ev(
+ // CHECK-LABEL: define{{.*}} void @_ZN5test35test3Ev(
// CHECK: [[TEMP:%.*]] = alloca [[B]],
// CHECK: call void @_ZN5test312test3_helperEv([[B]]* sret([[B]]) align 1 [[TEMP]])
// CHECK-NEXT: [[BOOL:%.*]] = call zeroext i1 @_ZN5test31BcvbEv([[B]]* {{[^,]*}} [[TEMP]])
constexpr A(int n, double d, const char *y) : n(n), d(d), u(y) {}
};
- // CHECK: @_ZN11StructUnion1aE = constant {{.*}} { i32 1, double 2.000000e+00, {{.*}} { i32 3, [4 x i8] undef } }
+ // CHECK: @_ZN11StructUnion1aE ={{.*}} constant {{.*}} { i32 1, double 2.000000e+00, {{.*}} { i32 3, [4 x i8] undef } }
extern constexpr A a(1, 2.0, 3);
- // CHECK: @_ZN11StructUnion1bE = constant {{.*}} { i32 4, double 5.000000e+00, {{.*}} { i8* getelementptr inbounds ([6 x i8], [6 x i8]* @{{.*}}, i32 0, i32 0) } }
+ // CHECK: @_ZN11StructUnion1bE ={{.*}} constant {{.*}} { i32 4, double 5.000000e+00, {{.*}} { i8* getelementptr inbounds ([6 x i8], [6 x i8]* @{{.*}}, i32 0, i32 0) } }
extern constexpr A b(4, 5, "hello");
struct B {
int n;
};
- // CHECK: @_ZN11StructUnion1cE = global {{.*}} zeroinitializer
- // CHECK: @_ZN11StructUnion2c2E = global {{.*}} zeroinitializer
+ // CHECK: @_ZN11StructUnion1cE ={{.*}} global {{.*}} zeroinitializer
+ // CHECK: @_ZN11StructUnion2c2E ={{.*}} global {{.*}} zeroinitializer
B c;
B c2 = B();
- // CHECK: @_ZN11StructUnion1dE = global {{.*}} zeroinitializer
+ // CHECK: @_ZN11StructUnion1dE ={{.*}} global {{.*}} zeroinitializer
B d[10];
struct C {
int c;
};
- // CHECK: @_ZN11StructUnion1eE = global {{.*}} zeroinitializer
+ // CHECK: @_ZN11StructUnion1eE ={{.*}} global {{.*}} zeroinitializer
C e[10];
struct D {
int d;
};
- // CHECK: @_ZN11StructUnion1fE = global {{.*}} { i32 5 }
+ // CHECK: @_ZN11StructUnion1fE ={{.*}} global {{.*}} { i32 5 }
D f;
union E {
void *b = &f;
};
- // CHECK: @_ZN11StructUnion1gE = global {{.*}} @_ZN11StructUnion1fE
+ // CHECK: @_ZN11StructUnion1gE ={{.*}} global {{.*}} @_ZN11StructUnion1fE
E g;
- // CHECK: @_ZN11StructUnion1hE = global {{.*}} @_ZN11StructUnion1fE
+ // CHECK: @_ZN11StructUnion1hE ={{.*}} global {{.*}} @_ZN11StructUnion1fE
E h = E();
}
struct Test : Ts... { constexpr Test() : Ts()..., n(5) {} int n; };
using Test1 = Test<N, C, Cs<1,2>, D, X<C,1>>;
- // CHECK: @_ZN9BaseClass2t1E = constant {{.*}} { i32 3, i8 1, i8 1, i8 1, double 4.000000e+00, i8 1, i32 5 }, align 8
+ // CHECK: @_ZN9BaseClass2t1E ={{.*}} constant {{.*}} { i32 3, i8 1, i8 1, i8 1, double 4.000000e+00, i8 1, i32 5 }, align 8
extern constexpr Test1 t1 = Test1();
struct DN : D, N {};
struct DND : DN, X<D,0> {};
struct DNN : DN, X<N,0> {};
- // CHECK: @_ZN9BaseClass3dndE = constant {{.*}} { double 4.000000e+00, i32 3, double 4.000000e+00 }
+ // CHECK: @_ZN9BaseClass3dndE ={{.*}} constant {{.*}} { double 4.000000e+00, i32 3, double 4.000000e+00 }
extern constexpr DND dnd = DND();
// Note, N subobject is laid out in DN subobject's tail padding.
- // CHECK: @_ZN9BaseClass3dnnE = constant {{.*}} { double 4.000000e+00, i32 3, i32 3 }
+ // CHECK: @_ZN9BaseClass3dnnE ={{.*}} constant {{.*}} { double 4.000000e+00, i32 3, i32 3 }
extern constexpr DNN dnn = DNN();
struct E {};
struct Test2 : X<E,0>, X<E,1>, X<E,2>, X<E,3> {};
- // CHECK: @_ZN9BaseClass2t2E = constant {{.*}} undef
+ // CHECK: @_ZN9BaseClass2t2E ={{.*}} constant {{.*}} undef
extern constexpr Test2 t2 = Test2();
struct __attribute((packed)) PackedD { double y = 2; };
struct Test3 : C, PackedD { constexpr Test3() {} };
- // CHECK: @_ZN9BaseClass2t3E = constant <{ i8, double }> <{ i8 1, double 2.000000e+00 }>
+ // CHECK: @_ZN9BaseClass2t3E ={{.*}} constant <{ i8, double }> <{ i8 1, double 2.000000e+00 }>
extern constexpr Test3 t3 = Test3();
}
namespace Array {
- // CHECK: @_ZN5Array3arrE = constant [2 x i32] [i32 4, i32 0]
+ // CHECK: @_ZN5Array3arrE ={{.*}} constant [2 x i32] [i32 4, i32 0]
extern constexpr int arr[2] = { 4 };
- // CHECK: @_ZN5Array1cE = constant [6 x [4 x i8]] [{{.*}} c"foo\00", [4 x i8] c"a\00\00\00", [4 x i8] c"bar\00", [4 x i8] c"xyz\00", [4 x i8] c"b\00\00\00", [4 x i8] c"123\00"]
+ // CHECK: @_ZN5Array1cE ={{.*}} constant [6 x [4 x i8]] [{{.*}} c"foo\00", [4 x i8] c"a\00\00\00", [4 x i8] c"bar\00", [4 x i8] c"xyz\00", [4 x i8] c"b\00\00\00", [4 x i8] c"123\00"]
extern constexpr char c[6][4] = { "foo", "a", { "bar" }, { 'x', 'y', 'z' }, { "b" }, '1', '2', '3' };
- // CHECK: @_ZN5Array2ucE = constant [4 x i8] c"foo\00"
+ // CHECK: @_ZN5Array2ucE ={{.*}} constant [4 x i8] c"foo\00"
extern constexpr unsigned char uc[] = { "foo" };
struct C { constexpr C() : n(5) {} int n, m = 3 * n + 1; };
- // CHECK: @_ZN5Array5ctorsE = constant [3 x {{.*}}] [{{.*}} { i32 5, i32 16 }, {{.*}} { i32 5, i32 16 }, {{.*}} { i32 5, i32 16 }]
+ // CHECK: @_ZN5Array5ctorsE ={{.*}} constant [3 x {{.*}}] [{{.*}} { i32 5, i32 16 }, {{.*}} { i32 5, i32 16 }, {{.*}} { i32 5, i32 16 }]
extern const C ctors[3];
constexpr C ctors[3];
- // CHECK: @_ZN5Array1dE = constant {{.*}} { [2 x i32] [i32 1, i32 2], [3 x i32] [i32 3, i32 4, i32 5] }
+ // CHECK: @_ZN5Array1dE ={{.*}} constant {{.*}} { [2 x i32] [i32 1, i32 2], [3 x i32] [i32 3, i32 4, i32 5] }
struct D { int n[2]; int m[3]; } extern constexpr d = { 1, 2, 3, 4, 5 };
struct E {
char d[4];
constexpr E() : c("foo"), d("x") {}
};
- // CHECK: @_ZN5Array1eE = constant {{.*}} { [4 x i8] c"foo\00", [4 x i8] c"x\00\00\00" }
+ // CHECK: @_ZN5Array1eE ={{.*}} constant {{.*}} { [4 x i8] c"foo\00", [4 x i8] c"x\00\00\00" }
extern constexpr E e = E();
// PR13290
struct F { constexpr F() : n(4) {} int n; };
- // CHECK: @_ZN5Array2f1E = global {{.*}} zeroinitializer
+ // CHECK: @_ZN5Array2f1E ={{.*}} global {{.*}} zeroinitializer
F f1[1][1][0] = { };
- // CHECK: @_ZN5Array2f2E = global {{.* i32 4 .* i32 4 .* i32 4 .* i32 4 .* i32 4 .* i32 4 .* i32 4 .* i32 4}}
+ // CHECK: @_ZN5Array2f2E ={{.*}} global {{.* i32 4 .* i32 4 .* i32 4 .* i32 4 .* i32 4 .* i32 4 .* i32 4 .* i32 4}}
F f2[2][2][2] = { };
}
void m();
};
- // CHECK: @_ZN9MemberPtr2daE = constant i64 8
- // CHECK: @_ZN9MemberPtr2dbE = constant i64 12
- // CHECK: @_ZN9MemberPtr2dcE = constant i64 32
- // CHECK: @_ZN9MemberPtr2ddE = constant i64 36
- // CHECK: @_ZN9MemberPtr2deE = constant i64 16
- // CHECK: @_ZN9MemberPtr2dzE = constant i64 40
+ // CHECK: @_ZN9MemberPtr2daE ={{.*}} constant i64 8
+ // CHECK: @_ZN9MemberPtr2dbE ={{.*}} constant i64 12
+ // CHECK: @_ZN9MemberPtr2dcE ={{.*}} constant i64 32
+ // CHECK: @_ZN9MemberPtr2ddE ={{.*}} constant i64 36
+ // CHECK: @_ZN9MemberPtr2deE ={{.*}} constant i64 16
+ // CHECK: @_ZN9MemberPtr2dzE ={{.*}} constant i64 40
extern constexpr int (D::*da) = &B1::a;
extern constexpr int (D::*db) = &C::b;
extern constexpr int (D::*dc) = &B2::c;
extern constexpr int (D::*de) = &C::e;
extern constexpr int (D::*dz) = &D::z;
- // CHECK: @_ZN9MemberPtr2baE = constant i64 8
- // CHECK: @_ZN9MemberPtr2bbE = constant i64 12
- // CHECK: @_ZN9MemberPtr2bcE = constant i64 8
- // CHECK: @_ZN9MemberPtr2bdE = constant i64 12
- // CHECK: @_ZN9MemberPtr2beE = constant i64 16
- // CHECK: @_ZN9MemberPtr3b1zE = constant i64 40
- // CHECK: @_ZN9MemberPtr3b2zE = constant i64 16
+ // CHECK: @_ZN9MemberPtr2baE ={{.*}} constant i64 8
+ // CHECK: @_ZN9MemberPtr2bbE ={{.*}} constant i64 12
+ // CHECK: @_ZN9MemberPtr2bcE ={{.*}} constant i64 8
+ // CHECK: @_ZN9MemberPtr2bdE ={{.*}} constant i64 12
+ // CHECK: @_ZN9MemberPtr2beE ={{.*}} constant i64 16
+ // CHECK: @_ZN9MemberPtr3b1zE ={{.*}} constant i64 40
+ // CHECK: @_ZN9MemberPtr3b2zE ={{.*}} constant i64 16
extern constexpr int (B1::*ba) = (int(B1::*))&B1::a;
extern constexpr int (B1::*bb) = (int(B1::*))&C::b;
extern constexpr int (B2::*bc) = (int(B2::*))&B2::c;
extern constexpr int (B1::*b1z) = (int(B1::*))&D::z;
extern constexpr int (B2::*b2z) = (int(B2::*))&D::z;
- // CHECK: @_ZN9MemberPtr2dfE = constant {{.*}} { i64 1, i64 0 }
- // CHECK: @_ZN9MemberPtr2dgE = constant {{.*}} { i64 {{.*}}2B11gEv{{.*}}, i64 0 }
- // CHECK: @_ZN9MemberPtr2dhE = constant {{.*}} { i64 1, i64 24 }
- // CHECK: @_ZN9MemberPtr2diE = constant {{.*}} { i64 {{.*}}2B21iEv{{.*}}, i64 24 }
- // CHECK: @_ZN9MemberPtr2djE = constant {{.*}} { i64 9, i64 0 }
- // CHECK: @_ZN9MemberPtr2dkE = constant {{.*}} { i64 {{.*}}1C1kEv{{.*}}, i64 0 }
- // CHECK: @_ZN9MemberPtr2dlE = constant {{.*}} { i64 17, i64 0 }
- // CHECK: @_ZN9MemberPtr2dmE = constant {{.*}} { i64 {{.*}}1D1mEv{{.*}}, i64 0 }
+ // CHECK: @_ZN9MemberPtr2dfE ={{.*}} constant {{.*}} { i64 1, i64 0 }
+ // CHECK: @_ZN9MemberPtr2dgE ={{.*}} constant {{.*}} { i64 {{.*}}2B11gEv{{.*}}, i64 0 }
+ // CHECK: @_ZN9MemberPtr2dhE ={{.*}} constant {{.*}} { i64 1, i64 24 }
+ // CHECK: @_ZN9MemberPtr2diE ={{.*}} constant {{.*}} { i64 {{.*}}2B21iEv{{.*}}, i64 24 }
+ // CHECK: @_ZN9MemberPtr2djE ={{.*}} constant {{.*}} { i64 9, i64 0 }
+ // CHECK: @_ZN9MemberPtr2dkE ={{.*}} constant {{.*}} { i64 {{.*}}1C1kEv{{.*}}, i64 0 }
+ // CHECK: @_ZN9MemberPtr2dlE ={{.*}} constant {{.*}} { i64 17, i64 0 }
+ // CHECK: @_ZN9MemberPtr2dmE ={{.*}} constant {{.*}} { i64 {{.*}}1D1mEv{{.*}}, i64 0 }
extern constexpr void (D::*df)() = &C::f;
extern constexpr void (D::*dg)() = &B1::g;
extern constexpr void (D::*dh)() = &B2::h;
extern constexpr void (D::*dl)() = &D::l;
extern constexpr void (D::*dm)() = &D::m;
- // CHECK: @_ZN9MemberPtr2bfE = constant {{.*}} { i64 1, i64 0 }
- // CHECK: @_ZN9MemberPtr2bgE = constant {{.*}} { i64 {{.*}}2B11gEv{{.*}}, i64 0 }
- // CHECK: @_ZN9MemberPtr2bhE = constant {{.*}} { i64 1, i64 0 }
- // CHECK: @_ZN9MemberPtr2biE = constant {{.*}} { i64 {{.*}}2B21iEv{{.*}}, i64 0 }
- // CHECK: @_ZN9MemberPtr2bjE = constant {{.*}} { i64 9, i64 0 }
- // CHECK: @_ZN9MemberPtr2bkE = constant {{.*}} { i64 {{.*}}1C1kEv{{.*}}, i64 0 }
- // CHECK: @_ZN9MemberPtr3b1lE = constant {{.*}} { i64 17, i64 0 }
- // CHECK: @_ZN9MemberPtr3b1mE = constant {{.*}} { i64 {{.*}}1D1mEv{{.*}}, i64 0 }
- // CHECK: @_ZN9MemberPtr3b2lE = constant {{.*}} { i64 17, i64 -24 }
- // CHECK: @_ZN9MemberPtr3b2mE = constant {{.*}} { i64 {{.*}}1D1mEv{{.*}}, i64 -24 }
+ // CHECK: @_ZN9MemberPtr2bfE ={{.*}} constant {{.*}} { i64 1, i64 0 }
+ // CHECK: @_ZN9MemberPtr2bgE ={{.*}} constant {{.*}} { i64 {{.*}}2B11gEv{{.*}}, i64 0 }
+ // CHECK: @_ZN9MemberPtr2bhE ={{.*}} constant {{.*}} { i64 1, i64 0 }
+ // CHECK: @_ZN9MemberPtr2biE ={{.*}} constant {{.*}} { i64 {{.*}}2B21iEv{{.*}}, i64 0 }
+ // CHECK: @_ZN9MemberPtr2bjE ={{.*}} constant {{.*}} { i64 9, i64 0 }
+ // CHECK: @_ZN9MemberPtr2bkE ={{.*}} constant {{.*}} { i64 {{.*}}1C1kEv{{.*}}, i64 0 }
+ // CHECK: @_ZN9MemberPtr3b1lE ={{.*}} constant {{.*}} { i64 17, i64 0 }
+ // CHECK: @_ZN9MemberPtr3b1mE ={{.*}} constant {{.*}} { i64 {{.*}}1D1mEv{{.*}}, i64 0 }
+ // CHECK: @_ZN9MemberPtr3b2lE ={{.*}} constant {{.*}} { i64 17, i64 -24 }
+ // CHECK: @_ZN9MemberPtr3b2mE ={{.*}} constant {{.*}} { i64 {{.*}}1D1mEv{{.*}}, i64 -24 }
extern constexpr void (B1::*bf)() = (void(B1::*)())&C::f;
extern constexpr void (B1::*bg)() = (void(B1::*)())&B1::g;
extern constexpr void (B2::*bh)() = (void(B2::*)())&B2::h;
// This creates a non-const temporary and binds a reference to it.
// CHECK: @[[TEMP:.*]] = internal global {{.*}} { i32 5 }, align 4
- // CHECK: @_ZN16LiteralReference3litE = constant {{.*}} @[[TEMP]], align 8
+ // CHECK: @_ZN16LiteralReference3litE ={{.*}} constant {{.*}} @[[TEMP]], align 8
const Lit &lit = Lit();
// This creates a const temporary as part of the reference initialization.
// CHECK: @[[TEMP:.*]] = internal constant {{.*}} { i32 5 }, align 4
- // CHECK: @_ZN16LiteralReference4lit2E = constant {{.*}} @[[TEMP]], align 8
+ // CHECK: @_ZN16LiteralReference4lit2E ={{.*}} constant {{.*}} @[[TEMP]], align 8
const Lit &lit2 = {};
struct A { int &&r1; const int &&r2; };
// CHECK: @[[TEMP2:.*]] = internal global i32 2, align 4
// CHECK: @[[TEMP3:.*]] = internal constant i32 3, align 4
// CHECK: @[[TEMPA2:.*]] = internal constant {{.*}} { i32* @[[TEMP2]], i32* @[[TEMP3]] }, align 8
- // CHECK: @_ZN16LiteralReference1bE = global {{.*}} { {{.*}}* @[[TEMPA1]], {{.*}}* @[[TEMPA2]] }, align 8
+ // CHECK: @_ZN16LiteralReference1bE ={{.*}} global {{.*}} { {{.*}}* @[[TEMPA1]], {{.*}}* @[[TEMPA2]] }, align 8
struct Subobj {
int a, b, c;
};
// CHECK: @[[TEMP:.*]] = internal global {{.*}} { i32 1, i32 2, i32 3 }, align 4
- // CHECK: @_ZN16LiteralReference2soE = constant {{.*}} (i8* getelementptr {{.*}} @[[TEMP]]{{.*}}, i64 4)
+ // CHECK: @_ZN16LiteralReference2soE ={{.*}} constant {{.*}} (i8* getelementptr {{.*}} @[[TEMP]]{{.*}}, i64 4)
constexpr int &&so = Subobj{ 1, 2, 3 }.b;
struct Dummy { int padding; };
};
using ConstDerived = const Derived;
// CHECK: @[[TEMPCOMMA:.*]] = internal constant {{.*}} { i32 200, i32 4, i32 5, i32 6 }
- // CHECK: @_ZN16LiteralReference5commaE = constant {{.*}} getelementptr {{.*}} @[[TEMPCOMMA]]{{.*}}, i64 8)
+ // CHECK: @_ZN16LiteralReference5commaE ={{.*}} constant {{.*}} getelementptr {{.*}} @[[TEMPCOMMA]]{{.*}}, i64 8)
constexpr const int &comma = (1, (2, ConstDerived{}).b);
// CHECK: @[[TEMPDERIVED:.*]] = internal global {{.*}} { i32 200, i32 4, i32 5, i32 6 }
- // CHECK: @_ZN16LiteralReference4baseE = constant {{.*}} getelementptr {{.*}} @[[TEMPDERIVED]]{{.*}}, i64 4)
+ // CHECK: @_ZN16LiteralReference4baseE ={{.*}} constant {{.*}} getelementptr {{.*}} @[[TEMPDERIVED]]{{.*}}, i64 4)
constexpr Subobj &&base = Derived{};
- // CHECK: @_ZN16LiteralReference7derivedE = constant {{.*}} @[[TEMPDERIVED]]
+ // CHECK: @_ZN16LiteralReference7derivedE ={{.*}} constant {{.*}} @[[TEMPDERIVED]]
constexpr Derived &derived = static_cast<Derived&>(base);
}
int *p;
};
static_assert(!__is_literal(NonTrivialDtor), "");
- // CHECK: @_ZN19NonLiteralConstexpr3ntdE = global {{.*}} { i32 120, i32* getelementptr
+ // CHECK: @_ZN19NonLiteralConstexpr3ntdE ={{.*}} global {{.*}} { i32 120, i32* getelementptr
NonTrivialDtor ntd;
struct VolatileMember {
volatile int n;
};
static_assert(!__is_literal(VolatileMember), "");
- // CHECK: @_ZN19NonLiteralConstexpr2vmE = global {{.*}} { i32 5 }
+ // CHECK: @_ZN19NonLiteralConstexpr2vmE ={{.*}} global {{.*}} { i32 5 }
VolatileMember vm;
struct Both {
~Both();
volatile int n;
};
- // CHECK: @_ZN19NonLiteralConstexpr1bE = global {{.*}} { i32 10 }
+ // CHECK: @_ZN19NonLiteralConstexpr1bE ={{.*}} global {{.*}} { i32 10 }
Both b;
void StaticVars() {
constexpr E() : B(3), c{'b','y','e'} {}
char c[3];
};
- // CHECK: @_ZN14VirtualMembers1eE = global { i8**, double, i32, i8**, double, [5 x i8], i16, i8**, double, [5 x i8], [3 x i8] } { i8** getelementptr inbounds ({ [3 x i8*], [4 x i8*], [4 x i8*] }, { [3 x i8*], [4 x i8*], [4 x i8*] }* @_ZTVN14VirtualMembers1EE, i32 0, inrange i32 0, i32 2), double 1.000000e+00, i32 64, i8** getelementptr inbounds ({ [3 x i8*], [4 x i8*], [4 x i8*] }, { [3 x i8*], [4 x i8*], [4 x i8*] }* @_ZTVN14VirtualMembers1EE, i32 0, inrange i32 1, i32 2), double 2.000000e+00, [5 x i8] c"hello", i16 5, i8** getelementptr inbounds ({ [3 x i8*], [4 x i8*], [4 x i8*] }, { [3 x i8*], [4 x i8*], [4 x i8*] }* @_ZTVN14VirtualMembers1EE, i32 0, inrange i32 2, i32 2), double 3.000000e+00, [5 x i8] c"world", [3 x i8] c"bye" }
+ // CHECK: @_ZN14VirtualMembers1eE ={{.*}} global { i8**, double, i32, i8**, double, [5 x i8], i16, i8**, double, [5 x i8], [3 x i8] } { i8** getelementptr inbounds ({ [3 x i8*], [4 x i8*], [4 x i8*] }, { [3 x i8*], [4 x i8*], [4 x i8*] }* @_ZTVN14VirtualMembers1EE, i32 0, inrange i32 0, i32 2), double 1.000000e+00, i32 64, i8** getelementptr inbounds ({ [3 x i8*], [4 x i8*], [4 x i8*] }, { [3 x i8*], [4 x i8*], [4 x i8*] }* @_ZTVN14VirtualMembers1EE, i32 0, inrange i32 1, i32 2), double 2.000000e+00, [5 x i8] c"hello", i16 5, i8** getelementptr inbounds ({ [3 x i8*], [4 x i8*], [4 x i8*] }, { [3 x i8*], [4 x i8*], [4 x i8*] }* @_ZTVN14VirtualMembers1EE, i32 0, inrange i32 2, i32 2), double 3.000000e+00, [5 x i8] c"world", [3 x i8] c"bye" }
E e;
struct nsMemoryImpl {
T t;
};
- // CHECK: @_ZN14VirtualMembers1tE = global { i8**, i32 } { i8** getelementptr inbounds ({ [3 x i8*] }, { [3 x i8*] }* @_ZTVN14VirtualMembers13TemplateClassIiEE, i32 0, inrange i32 0, i32 2), i32 42 }
+ // CHECK: @_ZN14VirtualMembers1tE ={{.*}} global { i8**, i32 } { i8** getelementptr inbounds ({ [3 x i8*] }, { [3 x i8*] }* @_ZTVN14VirtualMembers13TemplateClassIiEE, i32 0, inrange i32 0, i32 2), i32 42 }
TemplateClass<int> t;
}
// CHECK: @[[A2:_ZGRN14ArrayTemporary1bE.*]] = internal constant [3 x i32] [i32 4, i32 5, i32 6]
// CHECK: @[[ARR:_ZGRN14ArrayTemporary1bE.*]] = internal constant [2 x {{.*}}] [{{.*}} { [3 x i32]* @[[A1]] }, {{.*}} { [3 x i32]* @[[A2]] }]
// CHECK: @[[B:_ZGRN14ArrayTemporary1bE.*]] = internal global {{.*}} { [2 x {{.*}}]* @[[ARR]] }
- // CHECK: @_ZN14ArrayTemporary1bE = constant {{.*}}* @[[B]]
+ // CHECK: @_ZN14ArrayTemporary1bE ={{.*}} constant {{.*}}* @[[B]]
B &&b = { { { { 1, 2, 3 } }, { { 4, 5, 6 } } } };
}
// FIXME: This declaration should not be emitted -- it isn't odr-used.
// CHECK: @_ZN22UnemittedTemporaryDecl3refE
- // CHECK: @_ZN22UnemittedTemporaryDecl4ref2E = constant i32* @_ZGRN22UnemittedTemporaryDecl3refE_
+ // CHECK: @_ZN22UnemittedTemporaryDecl4ref2E ={{.*}} constant i32* @_ZGRN22UnemittedTemporaryDecl3refE_
}
namespace DR2126 {
// CHECK: @_ZGRN6DR21261aE0_ = internal global i32 42
// FIXME: This is unused and need not be emitted.
// CHECK: @_ZGRN6DR21261aE_ = internal constant {{.*}} { i32* @_ZGRN6DR21261aE0_ }
- // CHECK: @_ZN6DR21261rE = constant i32* @_ZGRN6DR21261aE0_
+ // CHECK: @_ZN6DR21261rE ={{.*}} constant i32* @_ZGRN6DR21261aE0_
int &r = a.b;
// Dynamically initialized: the temporary object bound to 'b' could be
// modified (eg, by placement 'new') before the initializer of 's' runs.
constexpr A &&b = {42};
- // CHECK: @_ZN6DR21261sE = global i32* null
+ // CHECK: @_ZN6DR21261sE ={{.*}} global i32* null
int &s = b.b;
}
// CHECK: @_ZZN12LocalVarInit4ctorEvE1a = internal constant {{.*}} i32 102
// CHECK: @__const._ZN12LocalVarInit8mutable_Ev.a = private unnamed_addr constant {{.*}} i32 103
// CHECK: @_ZGRN33ClassTemplateWithStaticDataMember1SIvE1aE_ = linkonce_odr constant i32 5, comdat
-// CHECK: @_ZN33ClassTemplateWithStaticDataMember3useE = constant i32* @_ZGRN33ClassTemplateWithStaticDataMember1SIvE1aE_
+// CHECK: @_ZN33ClassTemplateWithStaticDataMember3useE ={{.*}} constant i32* @_ZGRN33ClassTemplateWithStaticDataMember1SIvE1aE_
// CHECK: @_ZGRN39ClassTemplateWithHiddenStaticDataMember1SIvE1aE_ = linkonce_odr hidden constant i32 5, comdat
-// CHECK: @_ZN39ClassTemplateWithHiddenStaticDataMember3useE = constant i32* @_ZGRN39ClassTemplateWithHiddenStaticDataMember1SIvE1aE_
+// CHECK: @_ZN39ClassTemplateWithHiddenStaticDataMember3useE ={{.*}} constant i32* @_ZGRN39ClassTemplateWithHiddenStaticDataMember1SIvE1aE_
// CHECK: @_ZGRZN20InlineStaticConstRef3funEvE1i_ = linkonce_odr constant i32 10, comdat
// Constant initialization tests go before this point,
// RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-pch -o %t.pch %s -std=c++2a
// RUN: %clang_cc1 -triple x86_64-linux-gnu -include-pch %t.pch -x c++ /dev/null -emit-llvm -o - -std=c++2a | FileCheck %s --implicit-check-not=cxx_global_var_init --implicit-check-not=cxa_atexit
-// CHECK: @a = global i32 123,
+// CHECK: @a ={{.*}} global i32 123,
int a = (delete new int, 123);
struct B {
constexpr ~B() { n *= 5; }
int n = 123;
};
-// CHECK: @b = global {{.*}} i32 123
+// CHECK: @b ={{.*}} global {{.*}} i32 123
extern constexpr B b = B();
// CHECK: @_ZL1c = internal global {{.*}} i32 123
constexpr ~D() {}
};
D d;
-// CHECK: @d = global {{.*}} zeroinitializer
+// CHECK: @d ={{.*}} global {{.*}} zeroinitializer
D d_arr[3];
-// CHECK: @d_arr = global {{.*}} zeroinitializer
+// CHECK: @d_arr ={{.*}} global {{.*}} zeroinitializer
thread_local D d_tl;
-// CHECK: @d_tl = thread_local global {{.*}} zeroinitializer
+// CHECK: @d_tl ={{.*}} thread_local global {{.*}} zeroinitializer
// CHECK-NOT: @llvm.global_ctors
B::B() {
}
-// CHECK: @_ZN1BC1Ev = unnamed_addr alias void (%struct.B*), void (%struct.B*)* @_ZN1BC2Ev
+// CHECK: @_ZN1BC1Ev ={{.*}} unnamed_addr alias void (%struct.B*), void (%struct.B*)* @_ZN1BC2Ev
struct A { int x; A(int); ~A(); };
A f() { return A(0); }
-// CHECK-LABEL: define void @_Z1fv
+// CHECK-LABEL: define{{.*}} void @_Z1fv
// CHECK: call {{.*}} @_ZN1AC1Ei
// CHECK-NEXT: ret void
static A makeA() { A a; a.value = 2; return a; }
};
- // CHECK-LABEL: define i32 @_ZN7PR121394testEv
+ // CHECK-LABEL: define{{.*}} i32 @_ZN7PR121394testEv
int test() {
// CHECK: call void @_ZN7PR121391A5makeAEv
// CHECK-NEXT: call %"struct.PR12139::A"* @_ZN7PR121391AC1ERKS0_i
// elidable, but we don't have an AST representation for the case where we
// must elide not only a constructor call but also some argument
// conversions, so we don't elide it.
- // CHECK-LABEL: define void @_ZN25ElidableCallIsNotCopyCtor1fEv(
+ // CHECK-LABEL: define{{.*}} void @_ZN25ElidableCallIsNotCopyCtor1fEv(
// CHECK: call {{.*}} @_ZN25ElidableCallIsNotCopyCtor1BC1Ei(
// CHECK: call {{.*}} @_ZN25ElidableCallIsNotCopyCtor1AC1ERKS0_(
// CHECK: call {{.*}} @_ZN25ElidableCallIsNotCopyCtor1BC1ENS_1AE(
// Test that we don't produce an alias from ~B to ~A<int> (or crash figuring
// out if we should).
// pr17875.
- // CHECK3: define void @_ZN5test71BD2Ev
+ // CHECK3: define{{.*}} void @_ZN5test71BD2Ev
template <typename> struct A {
~A() {}
};
namespace test8 {
// Test that we replace ~zed with ~bar which is an alias to ~foo.
- // CHECK4: @_ZN5test83barD2Ev = unnamed_addr alias {{.*}} @_ZN5test83fooD2Ev
+ // CHECK4: @_ZN5test83barD2Ev ={{.*}} unnamed_addr alias {{.*}} @_ZN5test83fooD2Ev
// CHECK4: define internal void @__cxx_global_var_init.5()
// CHECK4: call i32 @__cxa_atexit({{.*}}@_ZN5test83barD2Ev
struct foo {
~foo();
};
foo::~foo() {}
-// CHECK6: @_ZN6test113fooD2Ev = unnamed_addr alias {{.*}} @_ZN6test113barD2Ev
-// CHECK6: @_ZN6test113fooD1Ev = unnamed_addr alias {{.*}} @_ZN6test113fooD2Ev
+// CHECK6: @_ZN6test113fooD2Ev ={{.*}} unnamed_addr alias {{.*}} @_ZN6test113barD2Ev
+// CHECK6: @_ZN6test113fooD1Ev ={{.*}} unnamed_addr alias {{.*}} @_ZN6test113fooD2Ev
}
namespace test12 {
virtual void squawk() { other(); }
};
- // CHECK-LABEL: define void @_ZN7PR145883FooC1Ev(%"class.PR14588::Foo"*
+ // CHECK-LABEL: define{{.*}} void @_ZN7PR145883FooC1Ev(%"class.PR14588::Foo"*
// CHECK: call void @_ZN7PR145883FooC1EPKv(
// CHECK: invoke void @_ZN7PR145885otherEv()
// CHECK: call void @_ZN7PR145883FooD1Ev
typedef A x[];
int f() {
x{{{1}}};
- // CHECK-LABEL: define i32 @_Z1fv
+ // CHECK-LABEL: define{{.*}} i32 @_Z1fv
// CHECK: store i32 1
// (It's okay if the output changes here, as long as we don't crash.)
return 0;
S1();
};
- // CHECK-LABEL: define void @_ZN22ValueInitArrayOfMemPtr1fEi
+ // CHECK-LABEL: define{{.*}} void @_ZN22ValueInitArrayOfMemPtr1fEi
void f(int n) {
Agg1 a = { n };
// CHECK: store i32 -1,
}
// Test dynamic initialization.
- // CHECK-LABEL: define void @_ZN22ValueInitArrayOfMemPtr1gEMNS_1SEi
+ // CHECK-LABEL: define{{.*}} void @_ZN22ValueInitArrayOfMemPtr1gEMNS_1SEi
void g(p ptr) {
// CHECK: store i32 -1,
f(a{ptr});
using T = S[3];
void f(const T &);
void f(T *);
- // CHECK-LABEL: define void @_ZN10array_dtor1gEv(
+ // CHECK-LABEL: define{{.*}} void @_ZN10array_dtor1gEv(
void g() {
// CHECK: %[[ARRAY:.*]] = alloca [3 x
// CHECK: br
// CHECK: ret void
}
- // CHECK-LABEL: define void @_ZN10array_dtor1hEv(
+ // CHECK-LABEL: define{{.*}} void @_ZN10array_dtor1hEv(
void h() {
// CHECK: %[[ARRAY:.*]] = alloca [3 x
// CHECK: br
// CHECK: ret void
}
- // CHECK-LABEL: define void @_ZN10array_dtor1iEv(
+ // CHECK-LABEL: define{{.*}} void @_ZN10array_dtor1iEv(
void i() {
// CHECK: %[[ARRAY:.*]] = alloca [3 x
// CHECK: br
};
void fn1() {
- // CHECK-LABEL: define void @_Z3fn1v
+ // CHECK-LABEL: define{{.*}} void @_Z3fn1v
S s { 1 };
// CHECK: alloca %struct.S, align 1
// CHECK: call void @_ZN1SC1Ei(%struct.S* {{[^,]*}} %s, i32 1)
}
void fn2() {
- // CHECK-LABEL: define void @_Z3fn2v
+ // CHECK-LABEL: define{{.*}} void @_Z3fn2v
S s { 1, 2.0, 3.0 };
// CHECK: alloca %struct.S, align 1
// CHECK: call void @_ZN1SC1Eidd(%struct.S* {{[^,]*}} %s, i32 1, double 2.000000e+00, double 3.000000e+00)
}
void fn3() {
- // CHECK-LABEL: define void @_Z3fn3v
+ // CHECK-LABEL: define{{.*}} void @_Z3fn3v
S sa[] { { 1 }, { 2 }, { 3 } };
// CHECK: alloca [3 x %struct.S], align 1
// CHECK: call void @_ZN1SC1Ei(%struct.S* {{[^,]*}} %{{.+}}, i32 1)
}
void fn4() {
- // CHECK-LABEL: define void @_Z3fn4v
+ // CHECK-LABEL: define{{.*}} void @_Z3fn4v
S sa[] { { 1, 2.0, 3.0 }, { 4, 5.0, 6.0 } };
// CHECK: alloca [2 x %struct.S], align 1
// CHECK: call void @_ZN1SC1Eidd(%struct.S* {{[^,]*}} %{{.+}}, i32 1, double 2.000000e+00, double 3.000000e+00)
// This creates and lifetime-extends a 'const char[5]' temporary.
// CHECK: @_ZGR19extended_string_ref_ = internal constant [5 x i8] c"hi\00\00\00",
-// CHECK: @extended_string_ref = constant [5 x i8]* @_ZGR19extended_string_ref_,
+// CHECK: @extended_string_ref ={{.*}} constant [5 x i8]* @_ZGR19extended_string_ref_,
const char (&extended_string_ref)[5] = {"hi"};
// This binds directly to a string literal object.
-// CHECK: @nonextended_string_ref = constant [3 x i8]* @.str
+// CHECK: @nonextended_string_ref ={{.*}} constant [3 x i8]* @.str
const char (&nonextended_string_ref)[3] = {"hi"};
namespace reference {
// CHECK-STATIC-BL: {{.*}} { i32* getelementptr inbounds ([2 x i32], [2 x i32]* @_ZGR6nested1_, i32 0, i32 0), i64 2 },
// CHECK-STATIC-BL: {{.*}} { i32* getelementptr inbounds ([2 x i32], [2 x i32]* @_ZGR6nested2_, i32 0, i32 0), i64 2 }
// CHECK-STATIC-BL: ], align 8
-// CHECK-STATIC-BL: @nested = global {{.*}} { {{.*}} getelementptr inbounds ([3 x {{.*}}], [3 x {{.*}}]* @_ZGR6nested_, i32 0, i32 0), i64 3 }, align 8
+// CHECK-STATIC-BL: @nested ={{.*}} global {{.*}} { {{.*}} getelementptr inbounds ([3 x {{.*}}], [3 x {{.*}}]* @_ZGR6nested_, i32 0, i32 0), i64 3 }, align 8
-// CHECK-DYNAMIC-BL: @nested = global
+// CHECK-DYNAMIC-BL: @nested ={{.*}} global
// CHECK-DYNAMIC-BL: @_ZGR6nested_ = internal global [3 x
// CHECK-DYNAMIC-BL: @_ZGR6nested0_ = internal global [2 x i32] zeroinitializer
// CHECK-DYNAMIC-BL: @_ZGR6nested1_ = internal global [2 x i32] zeroinitializer
// CHECK-STATIC-BE: {{.*}} { i32* getelementptr inbounds ([2 x i32], [2 x i32]* @_ZGR6nested2_, i32 0, i32 0),
// CHECK-STATIC-BE: i32* bitcast (i8* getelementptr (i8, i8* bitcast ([2 x i32]* @_ZGR6nested2_ to i8*), i64 8) to i32*) }
// CHECK-STATIC-BE: ], align 8
-// CHECK-STATIC-BE: @nested = global {{.*}} { {{.*}} getelementptr inbounds ([3 x {{.*}}], [3 x {{.*}}]* @_ZGR6nested_, i32 0, i32 0),
+// CHECK-STATIC-BE: @nested ={{.*}} global {{.*}} { {{.*}} getelementptr inbounds ([3 x {{.*}}], [3 x {{.*}}]* @_ZGR6nested_, i32 0, i32 0),
// CHECK-STATIC-BE: {{.*}} bitcast ({{.*}}* getelementptr (i8, i8* bitcast ([3 x {{.*}}]* @_ZGR6nested_ to i8*), i64 48) to {{.*}}*) }
-// CHECK-DYNAMIC-BE: @nested = global
+// CHECK-DYNAMIC-BE: @nested ={{.*}} global
// CHECK-DYNAMIC-BE: @_ZGR6nested_ = internal global [3 x
// CHECK-DYNAMIC-BE: @_ZGR6nested0_ = internal global [2 x i32] zeroinitializer
// CHECK-DYNAMIC-BE: @_ZGR6nested1_ = internal global [2 x i32] zeroinitializer
}
// CHECK: @_ZGR15globalInitList1_ = internal constant [3 x i32] [i32 1, i32 2, i32 3]
-// CHECK: @globalInitList1 = global {{[^ ]+}} { i32* getelementptr inbounds ([3 x i32], [3 x i32]* @_ZGR15globalInitList1_, {{[^)]*}}), i32*
+// CHECK: @globalInitList1 ={{.*}} global {{[^ ]+}} { i32* getelementptr inbounds ([3 x i32], [3 x i32]* @_ZGR15globalInitList1_, {{[^)]*}}), i32*
std::initializer_list<int> globalInitList1 = {1, 2, 3};
void fn1(int i) {
- // CHECK-LABEL: define void @_Z3fn1i
+ // CHECK-LABEL: define{{.*}} void @_Z3fn1i
// temporary array
// CHECK: [[array:%[^ ]+]] = alloca [3 x i32]
// CHECK: getelementptr inbounds [3 x i32], [3 x i32]* [[array]], i{{32|64}} 0
void fn2() {
- // CHECK-LABEL: define void @_Z3fn2v
+ // CHECK-LABEL: define{{.*}} void @_Z3fn2v
void target(std::initializer_list<destroyme1>);
// objects should be destroyed before dm2, after call returns
target({ destroyme1(), destroyme1() });
}
void fn3() {
- // CHECK-LABEL: define void @_Z3fn3v
+ // CHECK-LABEL: define{{.*}} void @_Z3fn3v
// objects should be destroyed after dm2
auto list = { destroyme1(), destroyme1() };
destroyme2 dm2;
~wantslist1();
};
// X86: @_ZGR15globalInitList1_ = internal constant [3 x i32] [i32 1, i32 2, i32 3]
-// X86: @globalInitList1 = global %{{[^ ]+}} { i32* getelementptr inbounds ([3 x i32], [3 x i32]* @_ZGR15globalInitList1_, i32 0, i32 0), i{{32|64}} 3 }
+// X86: @globalInitList1 ={{.*}} global %{{[^ ]+}} { i32* getelementptr inbounds ([3 x i32], [3 x i32]* @_ZGR15globalInitList1_, i32 0, i32 0), i{{32|64}} 3 }
// AMDGCN: @_ZGR15globalInitList1_ = internal addrspace(1) constant [3 x i32] [i32 1, i32 2, i32 3]
-// AMDGCN: @globalInitList1 = addrspace(1) global %{{[^ ]+}} { i32* addrspacecast (i32 addrspace(1)* getelementptr inbounds ([3 x i32], [3 x i32] addrspace(1)* @_ZGR15globalInitList1_, i32 0, i32 0) to i32*), i{{32|64}} 3 }
+// AMDGCN: @globalInitList1 ={{.*}} addrspace(1) global %{{[^ ]+}} { i32* addrspacecast (i32 addrspace(1)* getelementptr inbounds ([3 x i32], [3 x i32] addrspace(1)* @_ZGR15globalInitList1_, i32 0, i32 0) to i32*), i{{32|64}} 3 }
std::initializer_list<int> globalInitList1 = {1, 2, 3};
#ifndef NO_TLS
// initializer is not a constant expression (pointers to thread_local
// objects aren't really a problem).
//
-// X86: @_ZN25thread_local_global_array1xE = thread_local global
+// X86: @_ZN25thread_local_global_array1xE ={{.*}} thread_local global
// X86: @_ZGRN25thread_local_global_array1xE_ = internal thread_local constant [4 x i32] [i32 1, i32 2, i32 3, i32 4]
std::initializer_list<int> thread_local x = {1, 2, 3, 4};
}
#endif
-// X86: @globalInitList2 = global %{{[^ ]+}} zeroinitializer
+// X86: @globalInitList2 ={{.*}} global %{{[^ ]+}} zeroinitializer
// X86: @_ZGR15globalInitList2_ = internal global [2 x %[[WITHARG:[^ ]*]]] zeroinitializer
-// AMDGCN: @globalInitList2 = addrspace(1) global %{{[^ ]+}} zeroinitializer
+// AMDGCN: @globalInitList2 ={{.*}} addrspace(1) global %{{[^ ]+}} zeroinitializer
// AMDGCN: @_ZGR15globalInitList2_ = internal addrspace(1) global [2 x %[[WITHARG:[^ ]*]]] zeroinitializer
-// X86: @_ZN15partly_constant1kE = global i32 0, align 4
-// X86: @_ZN15partly_constant2ilE = global {{.*}} null, align 8
+// X86: @_ZN15partly_constant1kE ={{.*}} global i32 0, align 4
+// X86: @_ZN15partly_constant2ilE ={{.*}} global {{.*}} null, align 8
// X86: @[[PARTLY_CONSTANT_OUTER:_ZGRN15partly_constant2ilE_]] = internal global {{.*}} zeroinitializer, align 8
// X86: @[[PARTLY_CONSTANT_INNER:_ZGRN15partly_constant2ilE0_]] = internal global [3 x {{.*}}] zeroinitializer, align 8
// X86: @[[PARTLY_CONSTANT_FIRST:_ZGRN15partly_constant2ilE1_]] = internal constant [3 x i32] [i32 1, i32 2, i32 3], align 4
// X86: @[[PARTLY_CONSTANT_SECOND:_ZGRN15partly_constant2ilE2_]] = internal global [2 x i32] zeroinitializer, align 4
// X86: @[[PARTLY_CONSTANT_THIRD:_ZGRN15partly_constant2ilE3_]] = internal constant [4 x i32] [i32 5, i32 6, i32 7, i32 8], align 4
-// AMDGCN: @_ZN15partly_constant1kE = addrspace(1) global i32 0, align 4
-// AMDGCN: @_ZN15partly_constant2ilE = addrspace(4) global {{.*}} null, align 8
+// AMDGCN: @_ZN15partly_constant1kE ={{.*}} addrspace(1) global i32 0, align 4
+// AMDGCN: @_ZN15partly_constant2ilE ={{.*}} addrspace(4) global {{.*}} null, align 8
// AMDGCN: @[[PARTLY_CONSTANT_OUTER:_ZGRN15partly_constant2ilE_]] = internal addrspace(4) global {{.*}} zeroinitializer, align 8
// AMDGCN: @[[PARTLY_CONSTANT_INNER:_ZGRN15partly_constant2ilE0_]] = internal addrspace(4) global [3 x {{.*}}] zeroinitializer, align 8
// AMDGCN: @[[PARTLY_CONSTANT_FIRST:_ZGRN15partly_constant2ilE1_]] = internal addrspace(4) constant [3 x i32] [i32 1, i32 2, i32 3], align 4
};
void fn1(int i) {
- // CHECK-LABEL: define void @_Z3fn1i
+ // CHECK-LABEL: define{{.*}} void @_Z3fn1i
// temporary array
// X86: [[array:%[^ ]+]] = alloca [3 x i32]
// AMDGCN: [[alloca:%[^ ]+]] = alloca [3 x i32], align 4, addrspace(5)
- // AMDGCN: [[array:%[^ ]+]] = addrspacecast [3 x i32] addrspace(5)* [[alloca]] to [3 x i32]*
+ // AMDGCN: [[array:%[^ ]+]] ={{.*}} addrspacecast [3 x i32] addrspace(5)* [[alloca]] to [3 x i32]*
// CHECK: getelementptr inbounds [3 x i32], [3 x i32]* [[array]], i{{32|64}} 0
// CHECK-NEXT: store i32 1, i32*
// CHECK-NEXT: getelementptr
}
void fn2() {
- // CHECK-LABEL: define void @_Z3fn2v
+ // CHECK-LABEL: define{{.*}} void @_Z3fn2v
void target(std::initializer_list<destroyme1>);
// objects should be destroyed before dm2, after call returns
// CHECK: call void @_Z6targetSt16initializer_listI10destroyme1E
}
void fn3() {
- // CHECK-LABEL: define void @_Z3fn3v
+ // CHECK-LABEL: define{{.*}} void @_Z3fn3v
// objects should be destroyed after dm2
auto list = { destroyme1(), destroyme1() };
destroyme2 dm2;
}
void fn4() {
- // CHECK-LABEL: define void @_Z3fn4v
+ // CHECK-LABEL: define{{.*}} void @_Z3fn4v
void target(std::initializer_list<witharg1>);
// objects should be destroyed before dm2, after call returns
// CHECK: call void @_ZN8witharg1C1ERK10destroyme1
}
void fn5() {
- // CHECK-LABEL: define void @_Z3fn5v
+ // CHECK-LABEL: define{{.*}} void @_Z3fn5v
// temps should be destroyed before dm2
// objects should be destroyed after dm2
// CHECK: call void @_ZN8witharg1C1ERK10destroyme1
}
void fn6() {
- // CHECK-LABEL: define void @_Z3fn6v
+ // CHECK-LABEL: define{{.*}} void @_Z3fn6v
void target(const wantslist1&);
// objects should be destroyed before dm2, after call returns
// CHECK: call void @_ZN10wantslist1C1ESt16initializer_listI10destroyme1E
// CHECK: call void @_ZN10destroyme2D1Ev
}
void fn7() {
- // CHECK-LABEL: define void @_Z3fn7v
+ // CHECK-LABEL: define{{.*}} void @_Z3fn7v
// temps should be destroyed before dm2
// object should be destroyed after dm2
// CHECK: call void @_ZN10wantslist1C1ESt16initializer_listI10destroyme1E
}
void fn8() {
- // CHECK-LABEL: define void @_Z3fn8v
+ // CHECK-LABEL: define{{.*}} void @_Z3fn8v
void target(std::initializer_list<std::initializer_list<destroyme1>>);
// objects should be destroyed before dm2, after call returns
// CHECK: call void @_Z6targetSt16initializer_listIS_I10destroyme1EE
}
void fn9() {
- // CHECK-LABEL: define void @_Z3fn9v
+ // CHECK-LABEL: define{{.*}} void @_Z3fn9v
// objects should be destroyed after dm2
std::initializer_list<destroyme1> inner;
std::initializer_list<std::initializer_list<destroyme1>> list =
}
void fn10(int i) {
- // CHECK-LABEL: define void @_Z4fn10i
+ // CHECK-LABEL: define{{.*}} void @_Z4fn10i
// CHECK: alloca [3 x i32]
// CHECK-X86: call noalias nonnull align 16 i8* @_Znw{{[jm]}}
// CHECK-AMDGPU: call noalias nonnull align 8 i8* @_Znw{{[jm]}}
}
void fn11() {
- // CHECK-LABEL: define void @_Z4fn11v
+ // CHECK-LABEL: define{{.*}} void @_Z4fn11v
(void) new std::initializer_list<destroyme1> {destroyme1(), destroyme1()};
// CHECK: call void @_ZN10destroyme1D1Ev
destroyme2 dm2;
namespace rdar13325066 {
struct X { ~X(); };
- // CHECK-LABEL: define void @_ZN12rdar133250664loopERNS_1XES1_
+ // CHECK-LABEL: define{{.*}} void @_ZN12rdar133250664loopERNS_1XES1_
void loop(X &x1, X &x2) {
// CHECK: br label
// CHECK: br i1
};
void z();
- // CHECK-LABEL: define void @_ZN5dtors1fEv(
+ // CHECK-LABEL: define{{.*}} void @_ZN5dtors1fEv(
void f() {
// CHECK: call void @_ZN5dtors1SC1Ev(
// CHECK: call void @_ZN5dtors1SC1Ev(
// CHECK-NOT: call void @_ZN5dtors1SD1Ev(
}
- // CHECK-LABEL: define void @_ZN5dtors1gEv(
+ // CHECK-LABEL: define{{.*}} void @_ZN5dtors1gEv(
void g() {
// CHECK: call void @_ZN5dtors1SC1Ev(
// CHECK: call void @_ZN5dtors1SC1Ev(
// CHECK-NOT: call void @_ZN5dtors1SD1Ev(
}
- // CHECK-LABEL: define void @_ZN5dtors1hEv(
+ // CHECK-LABEL: define{{.*}} void @_ZN5dtors1hEv(
void h() {
// CHECK: call void @_ZN5dtors1SC1Ev(
// CHECK: call void @_ZN5dtors1SC1Ev(
struct B { const A &a; ~B(); };
struct C { std::initializer_list<B> b; ~C(); };
void f();
- // CHECK-LABEL: define void @_ZN6nested1gEv(
+ // CHECK-LABEL: define{{.*}} void @_ZN6nested1gEv(
void g() {
// CHECK: call void @_ZN6nested1AC1Ev(
// CHECK-NOT: call
struct A {
static const int Foo = 123;
};
-// X86: @_ZN1A3FooE = constant i32 123, align 4
-// AMD: @_ZN1A3FooE = addrspace(4) constant i32 123, align 4
+// X86: @_ZN1A3FooE ={{.*}} constant i32 123, align 4
+// AMD: @_ZN1A3FooE ={{.*}} addrspace(4) constant i32 123, align 4
const int *p = &A::Foo; // emit available_externally
const int A::Foo; // convert to full definition
namespace NonAggregateCopyInAggregateInit { // PR32044
struct A { constexpr A(int n) : x(n), y() {} int x, y; } extern a;
- // CHECK-DAG: @_ZN31NonAggregateCopyInAggregateInit1bE = global %{{.*}} { %[[A:.*]]* @_ZN31NonAggregateCopyInAggregateInit1aE }
+ // CHECK-DAG: @_ZN31NonAggregateCopyInAggregateInit1bE ={{.*}} global %{{.*}} { %[[A:.*]]* @_ZN31NonAggregateCopyInAggregateInit1aE }
struct B { A &p; } b{{a}};
// CHECK-DAG: @_ZGRN31NonAggregateCopyInAggregateInit1cE_ = internal global %[[A]] { i32 1, i32 0 }
- // CHECK-DAG: @_ZN31NonAggregateCopyInAggregateInit1cE = global %{{.*}} { %{{.*}}* @_ZGRN31NonAggregateCopyInAggregateInit1cE_ }
+ // CHECK-DAG: @_ZN31NonAggregateCopyInAggregateInit1cE ={{.*}} global %{{.*}} { %{{.*}}* @_ZGRN31NonAggregateCopyInAggregateInit1cE_ }
struct C { A &&p; } c{{1}};
}
namespace NearlyZeroInit {
- // CHECK-DAG: @_ZN14NearlyZeroInit1aE = global {{.*}} <{ i32 1, i32 2, i32 3, [120 x i32] zeroinitializer }>
+ // CHECK-DAG: @_ZN14NearlyZeroInit1aE ={{.*}} global {{.*}} <{ i32 1, i32 2, i32 3, [120 x i32] zeroinitializer }>
int a[123] = {1, 2, 3};
- // CHECK-DAG: @_ZN14NearlyZeroInit1bE = global {{.*}} { i32 1, <{ i32, [2147483647 x i32] }> <{ i32 2, [2147483647 x i32] zeroinitializer }> }
+ // CHECK-DAG: @_ZN14NearlyZeroInit1bE ={{.*}} global {{.*}} { i32 1, <{ i32, [2147483647 x i32] }> <{ i32 2, [2147483647 x i32] zeroinitializer }> }
struct B { int n; int arr[1024 * 1024 * 1024 * 2u]; } b = {1, {2}};
}
// FIXME: [dcl.init]p2, the padding bits of the union object should be
// initialized to 0, not undef, which would allow us to collapse the tail
// of these arrays to zeroinitializer.
- // CHECK-DAG: @_ZN7PR375601cE = global <{ { i8, [3 x i8] } }> <{ { i8, [3 x i8] } { i8 0, [3 x i8] undef } }>
+ // CHECK-DAG: @_ZN7PR375601cE ={{.*}} global <{ { i8, [3 x i8] } }> <{ { i8, [3 x i8] } { i8 0, [3 x i8] undef } }>
U c[1] = {};
- // CHECK-DAG: @_ZN7PR375601dE = global {{.*}} <{ { i8, [3 x i8] } { i8 97, [3 x i8] undef }, %"{{[^"]*}}" { i32 123 }, { i8, [3 x i8] } { i8 98, [3 x i8] undef }, { i8, [3 x i8] } { i8 0, [3 x i8] undef },
+ // CHECK-DAG: @_ZN7PR375601dE ={{.*}} global {{.*}} <{ { i8, [3 x i8] } { i8 97, [3 x i8] undef }, %"{{[^"]*}}" { i32 123 }, { i8, [3 x i8] } { i8 98, [3 x i8] undef }, { i8, [3 x i8] } { i8 0, [3 x i8] undef },
U d[16] = {'a', {.a = 123}, 'b'};
- // CHECK-DAG: @_ZN7PR375601eE = global {{.*}} <{ %"{{[^"]*}}" { i32 123 }, %"{{[^"]*}}" { i32 456 }, { i8, [3 x i8] } { i8 0, [3 x i8] undef },
+ // CHECK-DAG: @_ZN7PR375601eE ={{.*}} global {{.*}} <{ %"{{[^"]*}}" { i32 123 }, %"{{[^"]*}}" { i32 456 }, { i8, [3 x i8] } { i8 0, [3 x i8] undef },
U e[16] = {{.a = 123}, {.a = 456}};
union V {
int a;
char x;
};
- // CHECK-DAG: @_ZN7PR375601fE = global [1 x %"{{[^"]*}}"] zeroinitializer
+ // CHECK-DAG: @_ZN7PR375601fE ={{.*}} global [1 x %"{{[^"]*}}"] zeroinitializer
V f[1] = {};
- // CHECK-DAG: @_ZN7PR375601gE = global {{.*}} <{ { i8, [3 x i8] } { i8 97, [3 x i8] undef }, %"{{[^"]*}}" { i32 123 }, { i8, [3 x i8] } { i8 98, [3 x i8] undef }, [13 x %"{{[^"]*}}"] zeroinitializer }>
+ // CHECK-DAG: @_ZN7PR375601gE ={{.*}} global {{.*}} <{ { i8, [3 x i8] } { i8 97, [3 x i8] undef }, %"{{[^"]*}}" { i32 123 }, { i8, [3 x i8] } { i8 98, [3 x i8] undef }, [13 x %"{{[^"]*}}"] zeroinitializer }>
V g[16] = {{.x = 'a'}, {.a = 123}, {.x = 'b'}};
- // CHECK-DAG: @_ZN7PR375601hE = global {{.*}} <{ %"{{[^"]*}}" { i32 123 }, %"{{[^"]*}}" { i32 456 }, [14 x %"{{[^"]*}}"] zeroinitializer }>
+ // CHECK-DAG: @_ZN7PR375601hE ={{.*}} global {{.*}} <{ %"{{[^"]*}}" { i32 123 }, %"{{[^"]*}}" { i32 456 }, [14 x %"{{[^"]*}}"] zeroinitializer }>
V h[16] = {{.a = 123}, {.a = 456}};
- // CHECK-DAG: @_ZN7PR375601iE = global [4 x %"{{[^"]*}}"] [%"{{[^"]*}}" { i32 123 }, %"{{[^"]*}}" { i32 456 }, %"{{[^"]*}}" zeroinitializer, %"{{[^"]*}}" zeroinitializer]
+ // CHECK-DAG: @_ZN7PR375601iE ={{.*}} global [4 x %"{{[^"]*}}"] [%"{{[^"]*}}" { i32 123 }, %"{{[^"]*}}" { i32 456 }, %"{{[^"]*}}" zeroinitializer, %"{{[^"]*}}" zeroinitializer]
V i[4] = {{.a = 123}, {.a = 456}};
}
// Regression test for PR40327
-// LINUX: @default_tls = thread_local global i32
+// LINUX: @default_tls ={{.*}} thread_local global i32
// LINUX: @hidden_tls = hidden thread_local global i32
// LINUX: define weak_odr hidden i32* @_ZTW11default_tls()
// LINUX: define weak_odr hidden i32* @_ZTW10hidden_tls()
// RUN: %clang_cc1 -std=c++1y -triple x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s
-// CHECK: @x = global {{.*}} zeroinitializer
+// CHECK: @x ={{.*}} global {{.*}} zeroinitializer
// CHECK: define {{.*}} @_Z1fv
inline auto f() {
int n;
};
-// CHECK-LABEL: define void @_Z1fv(
+// CHECK-LABEL: define{{.*}} void @_Z1fv(
void f() {
// CHECK: call void @_ZN1SC1Ev(
// CHECK: invoke void @__cxa_throw
// CHECK: }
}
-// CHECK-LABEL: define void @_Z1gv(
+// CHECK-LABEL: define{{.*}} void @_Z1gv(
void g() {
// CHECK: call void @_ZN1SC1Ev(
// CHECK: invoke void @__cxa_throw
void x() noexcept;
void y() noexcept;
-// CHECK-LABEL: define void @_Z1hbb(
+// CHECK-LABEL: define{{.*}} void @_Z1hbb(
void h(bool b1, bool b2) {
// CHECK: {{.*}} = alloca i1,
// CHECK: %[[S_ISACTIVE:.*]] = alloca i1,
(void) [s(S{})] {};
}
-// CHECK-LABEL: define void @_Z1fv(
+// CHECK-LABEL: define{{.*}} void @_Z1fv(
// CHECK: call void @_ZN1SC1Ev(
// CHECK: call void @"_ZZ1fvEN3$_0D1Ev"(
[a(1), b(2)] { return a + b; } ();
}
-// CHECK-LABEL: define void @_Z1gv(
+// CHECK-LABEL: define{{.*}} void @_Z1gv(
// CHECK: getelementptr inbounds {{.*}}, i32 0, i32 0
// CHECK: store i32 1, i32*
// CHECK: getelementptr inbounds {{.*}}, i32 0, i32 1
// CHECK: add nsw i32
-// CHECK-LABEL: define void @_Z18init_capture_dtorsv
+// CHECK-LABEL: define{{.*}} void @_Z18init_capture_dtorsv
void init_capture_dtors() {
// Ensure that init-captures are not treated as separate full-expressions.
struct HasDtor { ~HasDtor() {} };
}
int h(int a) {
- // CHECK-LABEL: define i32 @_Z1hi(
+ // CHECK-LABEL: define{{.*}} i32 @_Z1hi(
// CHECK: %[[A_ADDR:.*]] = alloca i32,
// CHECK: %[[OUTER:.*]] = alloca
// CHECK: store i32 {{.*}}, i32* %[[A_ADDR]],
A c { 1, 0, 'A', f(), { 3 } };
// CHECK: @[[STR_A:.*]] = {{.*}} [7 x i8] c"foobar\00"
-// CHECK: @a = global {{.*}} zeroinitializer
+// CHECK: @a ={{.*}} global {{.*}} zeroinitializer
// @b has a constant initializer
// CHECK: @[[STR_B:.*]] = {{.*}} [8 x i8] c"bazquux\00"
-// CHECK: @b = global {{.*}} i32 4, {{.*}} @[[STR_B]], {{.*}} i8 117, i32 42, {{.*}} i8 9
+// CHECK: @b ={{.*}} global {{.*}} i32 4, {{.*}} @[[STR_B]], {{.*}} i8 117, i32 42, {{.*}} i8 9
B x;
B y {};
B z { 1 };
-// CHECK: @z = global {{.*}} { i32 1 }
+// CHECK: @z ={{.*}} global {{.*}} { i32 1 }
// Brace initialization should initialize the first field even though it is
// unnamed.
};
C n{};
-// CHECK: @n = global %union.C { %struct.anon { i64 -1 } }, align 8
+// CHECK: @n ={{.*}} global %union.C { %struct.anon { i64 -1 } }, align 8
// Initialization of 'a':
#if !__has_feature(cxx_exceptions) // File A
-// CHECKA-DAG: define nonnull align 4 dereferenceable(4) i32* @_Z3barv(
+// CHECKA-DAG: define{{.*}} nonnull align 4 dereferenceable(4) i32* @_Z3barv(
const int &bar() {
// CHECKA-DAG: call nonnull align 4 dereferenceable(4) i32* @_ZL3foov()
return foo();
template<typename T> T &make();
-// CHECK: @_ZDC2a12a2E = global {{.*}} zeroinitializer, align 4
+// CHECK: @_ZDC2a12a2E ={{.*}} global {{.*}} zeroinitializer, align 4
auto [a1, a2] = make<A>();
-// CHECK: @_ZDC2b12b2E = global {{.*}} zeroinitializer, align 1
-// CHECK: @b1 = global {{.*}}* null, align 8
+// CHECK: @_ZDC2b12b2E ={{.*}} global {{.*}} zeroinitializer, align 1
+// CHECK: @b1 ={{.*}} global {{.*}}* null, align 8
// CHECK: @_ZGR2b1_ = internal global {{.*}} zeroinitializer, align 1
-// CHECK: @b2 = global i32* null, align 8
+// CHECK: @b2 ={{.*}} global i32* null, align 8
// CHECK: @_ZGR2b2_ = internal global i32 0, align 4
auto [b1, b2] = make<B>();
-// CHECK: @_ZDC2c12c2E = global [2 x i32]* null, align 8
+// CHECK: @_ZDC2c12c2E ={{.*}} global [2 x i32]* null, align 8
auto &[c1, c2] = make<C>();
-// CHECK: @_ZDC2d12d2E = global <2 x i32> zeroinitializer, align 8
+// CHECK: @_ZDC2d12d2E ={{.*}} global <2 x i32> zeroinitializer, align 8
auto [d1, d2] = make<D>();
-// CHECK: @_ZDC2e12e2E = global { i32, i32 } zeroinitializer, align 4
+// CHECK: @_ZDC2e12e2E ={{.*}} global { i32, i32 } zeroinitializer, align 4
auto [e1, e2] = make<E>();
// CHECK: call {{.*}}* @_Z4makeI1AERT_v()
// CHECK: store i32 %{{.*}}, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @_ZDC2e12e2E, i32 0, i32 0)
// CHECK: store i32 %{{.*}}, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @_ZDC2e12e2E, i32 0, i32 1)
-// CHECK: define i32 @_Z12test_globalsv()
+// CHECK: define{{.*}} i32 @_Z12test_globalsv()
int test_globals() {
return a2 + b2 + c2 + d2 + e2;
// CHECK: load i8, i8* getelementptr inbounds (%struct.A, %struct.A* @_ZDC2a12a2E, i32 0, i32 1)
// CHECK: load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @_ZDC2e12e2E, i32 0, i32 1)
}
-// CHECK: define i32 @_Z11test_localsv()
+// CHECK: define{{.*}} i32 @_Z11test_localsv()
int test_locals() {
auto [b1, b2] = make<B>();
// CHECK: call {{.*}}@_ZN1XD1Ev({{.*}}%[[b1]])
}
-// CHECK: define void @_Z13test_bitfieldR1A(
+// CHECK: define{{.*}} void @_Z13test_bitfieldR1A(
void test_bitfield(A &a) {
auto &[a1, a2] = a;
a1 = 5;
C c1 = {};
C c2 = {1};
- // CHECK: @_ZN8Constant2c1E = global { i8 } zeroinitializer, align 1
- // CHECK: @_ZN8Constant2c2E = global { i8 } { i8 1 }, align 1
+ // CHECK: @_ZN8Constant2c1E ={{.*}} global { i8 } zeroinitializer, align 1
+ // CHECK: @_ZN8Constant2c2E ={{.*}} global { i8 } { i8 1 }, align 1
// Test packing bases into tail padding.
D d1 = {};
D d2 = {1, 2, 3};
D d3 = {1};
- // CHECK: @_ZN8Constant2d1E = global { i32, i8, i8 } zeroinitializer, align 4
- // CHECK: @_ZN8Constant2d2E = global { i32, i8, i8 } { i32 1, i8 2, i8 3 }, align 4
- // CHECK: @_ZN8Constant2d3E = global { i32, i8, i8 } { i32 1, i8 0, i8 0 }, align 4
+ // CHECK: @_ZN8Constant2d1E ={{.*}} global { i32, i8, i8 } zeroinitializer, align 4
+ // CHECK: @_ZN8Constant2d2E ={{.*}} global { i32, i8, i8 } { i32 1, i8 2, i8 3 }, align 4
+ // CHECK: @_ZN8Constant2d3E ={{.*}} global { i32, i8, i8 } { i32 1, i8 0, i8 0 }, align 4
// CHECK-LABEL: define {{.*}}global_var_init
// CHECK: call {{.*}} @__cxa_atexit({{.*}} @_ZN8Constant1DD1Ev {{.*}} @_ZN8Constant2d1E
// CHECK-DAG: @_ZN6compat1aE = weak_odr constant i32 1
// CHECK-DAG: @_ZN6compat1cE = weak_odr constant i32 3
// CHECK-DAG: @_ZN6compat1dE = linkonce_odr constant i32 4
-// CHECK-DAG: @_ZN6compat1eE = constant i32 5
+// CHECK-DAG: @_ZN6compat1eE ={{.*}} constant i32 5
// CHECK-DAG: @_ZN6compat1fE = weak_odr constant i32 6
// CHECK-DAG: @_ZN6compat1gE = linkonce_odr constant i32 7
static int e;
};
// CHECK: @_ZN1XIiE1aE = linkonce_odr global i32 10
-// CHECK: @_ZN1XIiE1bE = global i32 20
+// CHECK: @_ZN1XIiE1bE ={{.*}} global i32 20
// CHECK-NOT: @_ZN1XIiE1cE
// CHECK: @_ZN1XIiE1dE = linkonce_odr constant i32 40
// CHECK: @_ZN1XIiE1eE = linkonce_odr global i32 50
return b;
}
-// EVAL-STATIC: @A = global %struct.Agg { i32 13, i64 17 }, align 8
+// EVAL-STATIC: @A ={{.*}} global %struct.Agg { i32 13, i64 17 }, align 8
Agg A = retAgg();
// EVAL-NOT: @_Z9retRefAggv()
struct H : G { virtual ~H(); } h;
H::~H() { call_in_dtor(); }
-// CHECK-ITANIUM-LABEL: define void @_ZN1HD0Ev(
+// CHECK-ITANIUM-LABEL: define{{.*}} void @_ZN1HD0Ev(
// CHECK-ITANIUM-NOT: call
// CHECK-ITANIUM: getelementptr {{.*}}, i64 24
// CHECK-ITANIUM-NOT: call
struct I : H { virtual ~I(); alignas(32) char buffer[32]; } i;
I::~I() { call_in_dtor(); }
-// CHECK-ITANIUM-LABEL: define void @_ZN1ID0Ev(
+// CHECK-ITANIUM-LABEL: define{{.*}} void @_ZN1ID0Ev(
// CHECK-ITANIUM-NOT: call
// CHECK-ITANIUM: getelementptr {{.*}}, i64 24
// CHECK-ITANIUM-NOT: call
// RUN: %clang_cc1 -triple x86_64-none-linux-gnu -emit-llvm -debug-info-kind=limited %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=BOTH
// RUN: %clang_cc1 -triple i686-pc-windows-msvc -emit-llvm -debug-info-kind=limited %s -o - | FileCheck %s --check-prefix=MSVC --check-prefix=BOTH
-// CHECK: @_ZN6pr96081xE = global [3 x i8]* null, align 8, !dbg [[X:![0-9]+]]
+// CHECK: @_ZN6pr96081xE ={{.*}} global [3 x i8]* null, align 8, !dbg [[X:![0-9]+]]
-// CHECK: define void @_ZN7pr147634funcENS_3fooE
+// CHECK: define{{.*}} void @_ZN7pr147634funcENS_3fooE
// CHECK: call void @llvm.dbg.declare({{.*}}, metadata ![[F:[0-9]+]], metadata !DIExpression())
// !llvm.dbg.cu pulls in globals and their types first.
// RUN: %clang_cc1 -triple i986-unknown-linux-gnu -fdefault-calling-conv=vectorcall -emit-llvm -o - %s | FileCheck %s --check-prefix=VECTORCALL --check-prefix=ALL
// RUN: %clang_cc1 -triple i986-unknown-linux-gnu -fdefault-calling-conv=regcall -emit-llvm -o - %s | FileCheck %s --check-prefix=REGCALL --check-prefix=ALL
-// CDECL: define void @_Z5test1v
-// FASTCALL: define x86_fastcallcc void @_Z5test1v
-// STDCALL: define x86_stdcallcc void @_Z5test1v
-// VECTORCALL: define x86_vectorcallcc void @_Z5test1v
-// REGCALL: define x86_regcallcc void @_Z17__regcall3__test1v
+// CDECL: define{{.*}} void @_Z5test1v
+// FASTCALL: define{{.*}} x86_fastcallcc void @_Z5test1v
+// STDCALL: define{{.*}} x86_stdcallcc void @_Z5test1v
+// VECTORCALL: define{{.*}} x86_vectorcallcc void @_Z5test1v
+// REGCALL: define{{.*}} x86_regcallcc void @_Z17__regcall3__test1v
void test1() {}
// fastcall, stdcall, vectorcall and regcall do not support variadic functions.
-// CDECL: define void @_Z12testVariadicz
-// FASTCALL: define void @_Z12testVariadicz
-// STDCALL: define void @_Z12testVariadicz
-// VECTORCALL: define void @_Z12testVariadicz
-// REGCALL: define void @_Z12testVariadicz
+// CDECL: define{{.*}} void @_Z12testVariadicz
+// FASTCALL: define{{.*}} void @_Z12testVariadicz
+// STDCALL: define{{.*}} void @_Z12testVariadicz
+// VECTORCALL: define{{.*}} void @_Z12testVariadicz
+// REGCALL: define{{.*}} void @_Z12testVariadicz
void testVariadic(...){}
-// ALL: define void @_Z5test2v
+// ALL: define{{.*}} void @_Z5test2v
void __attribute__((cdecl)) test2() {}
-// ALL: define x86_fastcallcc void @_Z5test3v
+// ALL: define{{.*}} x86_fastcallcc void @_Z5test3v
void __attribute__((fastcall)) test3() {}
-// ALL: define x86_stdcallcc void @_Z5test4v
+// ALL: define{{.*}} x86_stdcallcc void @_Z5test4v
void __attribute__((stdcall)) test4() {}
// ALL: define x86_vectorcallcc void @_Z5test5v
void __attribute__((vectorcall)) test5() {}
-// ALL: define x86_regcallcc void @_Z17__regcall3__test6v
+// ALL: define{{.*}} x86_regcallcc void @_Z17__regcall3__test6v
void __attribute__((regcall)) test6() {}
// ALL: define linkonce_odr void @_ZN1A11test_memberEv
a.test_member();
}
-// ALL: define i32 @main
+// ALL: define{{.*}} i32 @main
int main() {
return 1;
}
namespace test1 {
struct A { void operator delete(void*,size_t); int x; };
- // CHECK-LABEL: define void @_ZN5test11aEPNS_1AE(
+ // CHECK-LABEL: define{{.*}} void @_ZN5test11aEPNS_1AE(
void a(A *x) {
// CHECK: load
// CHECK-NEXT: icmp eq {{.*}}, null
void operator delete[](void *, size_t);
};
- // CHECK: define [[A:%.*]]* @_ZN5test24testEv()
+ // CHECK: define{{.*}} [[A:%.*]]* @_ZN5test24testEv()
A *test() {
// CHECK: [[NEW:%.*]] = call noalias nonnull i8* @_Znaj(i32 44)
// CHECK-NEXT: [[T0:%.*]] = bitcast i8* [[NEW]] to i32*
return ::new A[10];
}
- // CHECK-LABEL: define void @_ZN5test24testEPNS_1AE(
+ // CHECK-LABEL: define{{.*}} void @_ZN5test24testEPNS_1AE(
void test(A *p) {
// CHECK: [[P:%.*]] = alloca [[A]]*, align 4
// CHECK-NEXT: store [[A]]* {{%.*}}, [[A]]** [[P]], align 4
};
struct B : A {};
- // CHECK-LABEL: define void @_ZN5test34testEv()
+ // CHECK-LABEL: define{{.*}} void @_ZN5test34testEv()
void test() {
// CHECK: [[CALL:%.*]] = call noalias nonnull i8* @_Znaj(i32 24)
// CHECK-NEXT: bitcast i8* [[CALL]] to i32*
struct B : A {};
static_assert(sizeof(B) == 24);
-// CHECK: define nonnull align 8 dereferenceable(24) {{.*}} @_Z1fR1B({{.*}} nonnull align 8 dereferenceable(24)
+// CHECK: define{{.*}} nonnull align 8 dereferenceable(24) {{.*}} @_Z1fR1B({{.*}} nonnull align 8 dereferenceable(24)
B &f(B &b) { return b; }
struct C : virtual A {};
static_assert(sizeof(C) == 32);
-// CHECK: define nonnull align 8 dereferenceable(8) {{.*}} @_Z1fR1C({{.*}} nonnull align 8 dereferenceable(8)
+// CHECK: define{{.*}} nonnull align 8 dereferenceable(8) {{.*}} @_Z1fR1C({{.*}} nonnull align 8 dereferenceable(8)
C &f(C &c) { return c; }
A *B::getAsA() {
return static_cast<X*>(this);
- // CHECK-LABEL: define %class.A* @_ZN1B6getAsAEv
+ // CHECK-LABEL: define{{.*}} %class.A* @_ZN1B6getAsAEv
// CHECK: %[[THIS:.*]] = load %class.B*, %class.B**
// CHECK-NEXT: %[[BC:.*]] = bitcast %class.B* %[[THIS]] to i8*
// CHECK-NEXT: getelementptr inbounds i8, i8* %[[BC]], i64 -4
struct A { int x, y[3]; };
struct B { A a; };
-// CHECK: @b = global %{{[^ ]*}} { %{{[^ ]*}} { i32 1, [3 x i32] [i32 2, i32 5, i32 4] } }
+// CHECK: @b ={{.*}} global %{{[^ ]*}} { %{{[^ ]*}} { i32 1, [3 x i32] [i32 2, i32 5, i32 4] } }
B b = {(A){1, 2, 3, 4}, .a.y[1] = 5};
union U {
struct WithLargeArray {
LargeArray arr;
};
-// CHECK: @large = global { { <{ [11 x i32], [4085 x i32] }> } } { { <{ [11 x i32], [4085 x i32] }> } { <{ [11 x i32], [4085 x i32] }> <{ [11 x i32] [i32 1, i32 2, i32 3, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10], [4085 x i32] zeroinitializer }> } }
+// CHECK: @large ={{.*}} global { { <{ [11 x i32], [4085 x i32] }> } } { { <{ [11 x i32], [4085 x i32] }> } { <{ [11 x i32], [4085 x i32] }> <{ [11 x i32] [i32 1, i32 2, i32 3, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10], [4085 x i32] zeroinitializer }> } }
WithLargeArray large = {(LargeArray){1, 2, 3}, .arr.arr[10] = 10};
union OverwritePaddingWithBitfield {
struct WithOverwritePaddingWithBitfield {
OverwritePaddingWithBitfield a;
};
-// CHECK: @overwrite_padding = global { { i8, i8 } } { { i8, i8 } { i8 3, i8 1 } }
+// CHECK: @overwrite_padding ={{.*}} global { { i8, i8 } } { { i8, i8 } { i8 3, i8 1 } }
WithOverwritePaddingWithBitfield overwrite_padding = {(OverwritePaddingWithBitfield){1}, .a.bitfield = 3};
struct B final : A {};
struct C : A { virtual ~C() final {} };
struct D { virtual ~D() final = 0; };
- // CHECK-LABEL: define void @_ZN5Test13fooEPNS_1BE
+ // CHECK-LABEL: define{{.*}} void @_ZN5Test13fooEPNS_1BE
void foo(B *b) {
// CHECK: call void @_ZN5Test11BD1Ev
delete b;
}
- // CHECK-LABEL: define void @_ZN5Test14foo2EPNS_1CE
+ // CHECK-LABEL: define{{.*}} void @_ZN5Test14foo2EPNS_1CE
void foo2(C *c) {
// CHECK: call void @_ZN5Test11CD1Ev
delete c;
}
- // CHECK-LABEL: define void @_ZN5Test14evilEPNS_1DE
+ // CHECK-LABEL: define{{.*}} void @_ZN5Test14evilEPNS_1DE
void evil(D *p) {
// CHECK-NOT: call void @_ZN5Test11DD1Ev
delete p;
virtual int f() final;
};
- // CHECK-LABEL: define i32 @_ZN5Test11fEPNS_1AE
+ // CHECK-LABEL: define{{.*}} i32 @_ZN5Test11fEPNS_1AE
int f(A *a) {
// CHECK: call i32 @_ZN5Test11A1fEv
return a->f();
virtual int f();
};
- // CHECK-LABEL: define i32 @_ZN5Test21fEPNS_1AE
+ // CHECK-LABEL: define{{.*}} i32 @_ZN5Test21fEPNS_1AE
int f(A *a) {
// CHECK: call i32 @_ZN5Test21A1fEv
return a->f();
virtual int f();
};
- // CHECK-LABEL: define i32 @_ZN6Test2a1fEPNS_1AE
+ // CHECK-LABEL: define{{.*}} i32 @_ZN6Test2a1fEPNS_1AE
int f(A *a) {
// CHECK: call i32 @_ZN6Test2a1A1fEv
return a->f();
struct B final : A { };
- // CHECK-LABEL: define i32 @_ZN5Test31fEPNS_1BE
+ // CHECK-LABEL: define{{.*}} i32 @_ZN5Test31fEPNS_1BE
int f(B *b) {
// CHECK: call i32 @_ZN5Test31A1fEv
return b->f();
}
- // CHECK-LABEL: define i32 @_ZN5Test31fERNS_1BE
+ // CHECK-LABEL: define{{.*}} i32 @_ZN5Test31fERNS_1BE
int f(B &b) {
// CHECK: call i32 @_ZN5Test31A1fEv
return b.f();
}
- // CHECK-LABEL: define i32 @_ZN5Test31fEPv
+ // CHECK-LABEL: define{{.*}} i32 @_ZN5Test31fEPv
int f(void *v) {
// CHECK: call i32 @_ZN5Test31A1fEv
return static_cast<B*>(v)->f();
virtual int operator-();
};
- // CHECK-LABEL: define void @_ZN5Test41fEPNS_1BE
+ // CHECK-LABEL: define{{.*}} void @_ZN5Test41fEPNS_1BE
void f(B* d) {
// CHECK: call void @_ZN5Test41B1fEv
static_cast<A*>(d)->f();
struct C final : B {
};
- // CHECK-LABEL: define void @_ZN5Test51fEPNS_1CE
+ // CHECK-LABEL: define{{.*}} void @_ZN5Test51fEPNS_1CE
void f(C* d) {
// FIXME: It should be possible to devirtualize this case, but that is
// not implemented yet.
// CHECK-NEXT: call void %[[FUNC]]
static_cast<A*>(d)->f();
}
- // CHECK-LABEL: define void @_ZN5Test53fopEPNS_1CE
+ // CHECK-LABEL: define{{.*}} void @_ZN5Test53fopEPNS_1CE
void fop(C* d) {
// FIXME: It should be possible to devirtualize this case, but that is
// not implemented yet.
struct D final : public C, public B {
};
- // CHECK-LABEL: define void @_ZN5Test61fEPNS_1DE
+ // CHECK-LABEL: define{{.*}} void @_ZN5Test61fEPNS_1DE
void f(D* d) {
// CHECK: call void @_ZN5Test61DD1Ev
static_cast<A*>(d)->~A();
virtual int f() {return z;}
};
- // CHECK-LABEL: define i32 @_ZN5Test71fEPNS_3zedE
+ // CHECK-LABEL: define{{.*}} i32 @_ZN5Test71fEPNS_3zedE
int f(zed *z) {
// CHECK: alloca
// CHECK-NEXT: store
virtual int foo() { return b; }
};
struct C final : A, B { };
- // CHECK-LABEL: define i32 @_ZN5Test84testEPNS_1CE
+ // CHECK-LABEL: define{{.*}} i32 @_ZN5Test84testEPNS_1CE
int test(C *c) {
// CHECK: %[[THIS:.*]] = phi
// CHECK-NEXT: call i32 @_ZN5Test81B3fooEv(%"struct.Test8::B"* {{[^,]*}} %[[THIS]])
int f() final;
};
- // CHECK-LABEL: define i32 @_ZN6Test101fEPNS_1BE
+ // CHECK-LABEL: define{{.*}} i32 @_ZN6Test101fEPNS_1BE
int f(B *b) {
// CHECK: call i32 @_ZN6Test101B1fEv
return static_cast<A *>(b)->f();
struct D : public B {
};
void f(D d) {
- // CHECK-LABEL: define void @_ZN5test31fENS_1DE
+ // CHECK-LABEL: define{{.*}} void @_ZN5test31fENS_1DE
d.B::~B();
}
}
virtual void m();
};
void C::m() {}
-// CHECK: define [[DSO_ATTRS]] void @_ZThn8_N1C1mEv
+// CHECK: define{{.*}} [[DSO_ATTRS]] void @_ZThn8_N1C1mEv
struct Base {
virtual void m();
virtual void m();
};
void Derived::m() {}
-// CHECK: define [[DSO_ATTRS]] void @_ZTv0_n24_N7Derived1mEv
+// CHECK: define{{.*}} [[DSO_ATTRS]] void @_ZTv0_n24_N7Derived1mEv
struct A { A(int); A(int, int); ~A(); void *p; };
A *a() {
- // CHECK: define [[A:%.*]]* @_ZN5test11aEv()
+ // CHECK: define{{( dso_local)?}} [[A:%.*]]* @_ZN5test11aEv()
// CHECK: [[NEW:%.*]] = call noalias nonnull i8* @_Znwm(i64 8)
// CHECK-NEXT: [[CAST:%.*]] = bitcast i8* [[NEW]] to [[A]]*
// CHECK-NEXT: invoke void @_ZN5test11AC1Ei([[A]]* {{[^,]*}} [[CAST]], i32 5)
}
A *b() {
- // CHECK: define [[A:%.*]]* @_ZN5test11bEv()
+ // CHECK: define{{( dso_local)?}} [[A:%.*]]* @_ZN5test11bEv()
// CHECK: [[NEW:%.*]] = call noalias nonnull i8* @_Znwm(i64 8)
// CHECK-NEXT: [[CAST:%.*]] = bitcast i8* [[NEW]] to [[A]]*
// CHECK-NEXT: [[FOO:%.*]] = invoke i32 @_ZN5test13fooEv()
B makeB();
A *c() {
- // CHECK: define [[A:%.*]]* @_ZN5test11cEv()
+ // CHECK: define{{( dso_local)?}} [[A:%.*]]* @_ZN5test11cEv()
// CHECK: [[ACTIVE:%.*]] = alloca i1
// CHECK-NEXT: [[NEW:%.*]] = call noalias nonnull i8* @_Znwm(i64 8)
// CHECK-NEXT: store i1 true, i1* [[ACTIVE]]
// CHECK98-NEXT: unreachable
A *d() {
- // CHECK: define [[A:%.*]]* @_ZN5test11dEv()
+ // CHECK: define{{( dso_local)?}} [[A:%.*]]* @_ZN5test11dEv()
// CHECK: [[ACTIVE:%.*]] = alloca i1
// CHECK-NEXT: [[NEW:%.*]] = call noalias nonnull i8* @_Znwm(i64 8)
// CHECK-NEXT: store i1 true, i1* [[ACTIVE]]
}
A *e() {
- // CHECK: define [[A:%.*]]* @_ZN5test11eEv()
+ // CHECK: define{{( dso_local)?}} [[A:%.*]]* @_ZN5test11eEv()
// CHECK: [[ACTIVE:%.*]] = alloca i1
// CHECK-NEXT: [[NEW:%.*]] = call noalias nonnull i8* @_Znwm(i64 8)
// CHECK-NEXT: store i1 true, i1* [[ACTIVE]]
}
A *i() {
- // CHECK: define [[A:%.*]]* @_ZN5test11iEv()
+ // CHECK: define{{( dso_local)?}} [[A:%.*]]* @_ZN5test11iEv()
// CHECK: [[X:%.*]] = alloca [[A]]*, align 8
// CHECK: [[ACTIVE:%.*]] = alloca i1
// CHECK: [[NEW:%.*]] = call noalias nonnull i8* @_Znwm(i64 8)
};
A *a() {
- // CHECK: define [[A:%.*]]* @_ZN5test21aEv()
+ // CHECK: define{{( dso_local)?}} [[A:%.*]]* @_ZN5test21aEv()
// CHECK: [[NEW:%.*]] = call i8* @_ZN5test21AnwEm(i64 8)
// CHECK-NEXT: [[CAST:%.*]] = bitcast i8* [[NEW]] to [[A]]*
// CHECK-NEXT: invoke void @_ZN5test21AC1Ei([[A]]* {{[^,]*}} [[CAST]], i32 5)
A makeA(), *makeAPtr();
A *a() {
- // CHECK: define [[A:%.*]]* @_ZN5test31aEv()
+ // CHECK: define{{( dso_local)?}} [[A:%.*]]* @_ZN5test31aEv()
// CHECK: [[FOO:%.*]] = call i8* @_ZN5test33fooEv()
// CHECK: [[BAR:%.*]] = call double @_ZN5test33barEv()
// CHECK: [[NEW:%.*]] = call i8* @_ZN5test31AnwEmPvd(i64 8, i8* [[FOO]], double [[BAR]])
// rdar://problem/8439196
A *b(bool cond) {
- // CHECK: define [[A:%.*]]* @_ZN5test31bEb(i1 zeroext
+ // CHECK: define{{( dso_local)?}} [[A:%.*]]* @_ZN5test31bEb(i1 zeroext
// CHECK: [[SAVED0:%.*]] = alloca i8*
// CHECK-NEXT: [[SAVED1:%.*]] = alloca i8*
// CHECK-NEXT: [[CLEANUPACTIVE:%.*]] = alloca i1
};
A *a() {
- // CHECK: define [[A:%.*]]* @_ZN5test41aEv()
+ // CHECK: define{{( dso_local)?}} [[A:%.*]]* @_ZN5test41aEv()
// CHECK: [[FOO:%.*]] = call i8* @_ZN5test43fooEv()
// CHECK-NEXT: [[BAR:%.*]] = call i8* @_ZN5test43barEv()
// CHECK-NEXT: [[NEW:%.*]] = call i8* @_ZN5test41AnwEmPvS1_(i64 8, i8* [[FOO]], i8* [[BAR]])
void foo();
- // CHECK-LABEL: define void @_ZN5test54testEv()
+ // CHECK-LABEL: define{{.*}} void @_ZN5test54testEv()
// CHECK: [[EXNSLOT:%.*]] = alloca i8*
// CHECK-NEXT: [[SELECTORSLOT:%.*]] = alloca i32
// CHECK-NEXT: [[A:%.*]] = alloca [[A_T:%.*]], align 1
};
B *test() {
- // CHECK: define [[B:%.*]]* @_ZN5test74testEv()
+ // CHECK: define{{( dso_local)?}} [[B:%.*]]* @_ZN5test74testEv()
// CHECK: [[OUTER_NEW:%.*]] = alloca i1
// CHECK-NEXT: alloca [[A:%.*]],
// CHECK-NEXT: alloca i8*
void test() {
throw makeA();
}
- // CHECK-LABEL: define void @_ZN5test84testEv
+ // CHECK-LABEL: define{{.*}} void @_ZN5test84testEv
}
// Make sure we generate the correct code for the delete[] call which
A* test() {
return new A[10];
}
- // CHECK: define {{%.*}}* @_ZN5test94testEv
+ // CHECK: define{{.*}} {{%.*}}* @_ZN5test94testEv
// CHECK: [[TEST9_NEW:%.*]] = call noalias nonnull i8* @_Znam
// CHECK: call void @_ZdaPv(i8* [[TEST9_NEW]])
}
struct A { ~A(); };
A::~A() try { cleanup(); } catch (...) { return; }
- // CHECK-LABEL: define void @_ZN6test101AD1Ev(
+ // CHECK-LABEL: define{{.*}} void @_ZN6test101AD1Ev(
// CHECK: invoke void @_ZN6test107cleanupEv()
// CHECK-NOT: rethrow
// CHECK: ret void
struct B { ~B(); };
B::~B() try { cleanup(); } catch (...) {}
- // CHECK-LABEL: define void @_ZN6test101BD1Ev(
+ // CHECK-LABEL: define{{.*}} void @_ZN6test101BD1Ev(
// CHECK: invoke void @_ZN6test107cleanupEv()
// CHECK: call i8* @__cxa_begin_catch
// CHECK-NEXT: invoke void @__cxa_rethrow()
struct C { ~C(); };
C::~C() try { cleanup(); } catch (...) { if (suppress) return; }
- // CHECK-LABEL: define void @_ZN6test101CD1Ev(
+ // CHECK-LABEL: define{{.*}} void @_ZN6test101CD1Ev(
// CHECK: invoke void @_ZN6test107cleanupEv()
// CHECK: call i8* @__cxa_begin_catch
// CHECK-NEXT: load i8, i8* @_ZN6test108suppressE, align 1
C::C() {
throw 0;
}
- // CHECK-LABEL: define void @_ZN6test111CC2Ev(
+ // CHECK-LABEL: define{{.*}} void @_ZN6test111CC2Ev(
// CHECK: [[THIS:%.*]] = load [[C:%.*]]*, [[C:%.*]]** {{%.*}}
// Construct single.
// CHECK-NEXT: [[SINGLE:%.*]] = getelementptr inbounds [[C]], [[C]]* [[THIS]], i32 0, i32 0
int a, b;
};
-// CHECK: define void @_ZN6test134testEi(
+// CHECK: define{{.*}} void @_ZN6test134testEi(
// CHECK: %[[REF_TMP:.*]] = alloca %[[STRUCT_TEST13_A]], align 4
// CHECK: %[[CLEANUP_COND:.*]] = alloca i1, align 1
// CHECK: %[[REF_TMP1:.*]] = alloca %[[STRUCT_TEST13_A]], align 4
}
void BitfieldAssignment() {
- // LIN: define void @_Z18BitfieldAssignmentv
+ // LIN: define{{.*}} void @_Z18BitfieldAssignmentv
// WIN: define dso_local void @"?BitfieldAssignment@@YAXXZ"
BitFieldsByte B;
B.A = 3;
};
void UnderlyingTypeUsage(AsEnumUnderlyingType Param) {
- // LIN: define void @_Z19UnderlyingTypeUsage20AsEnumUnderlyingType(i9 signext %
+ // LIN: define{{.*}} void @_Z19UnderlyingTypeUsage20AsEnumUnderlyingType(i9 signext %
// WIN: define dso_local void @"?UnderlyingTypeUsage@@YAXW4AsEnumUnderlyingType@@@Z"(i9 %
AsEnumUnderlyingType Var;
// CHECK: alloca i9, align 2
}
unsigned _ExtInt(33) ManglingTestRetParam(unsigned _ExtInt(33) Param) {
-// LIN: define i64 @_Z20ManglingTestRetParamU7_ExtIntILi33EEj(i64 %
+// LIN: define{{.*}} i64 @_Z20ManglingTestRetParamU7_ExtIntILi33EEj(i64 %
// WIN: define dso_local i33 @"?ManglingTestRetParam@@YAU?$_UExtInt@$0CB@@__clang@@U12@@Z"(i33
return 0;
}
_ExtInt(33) ManglingTestRetParam(_ExtInt(33) Param) {
-// LIN: define i64 @_Z20ManglingTestRetParamU7_ExtIntILi33EEi(i64 %
+// LIN: define{{.*}} i64 @_Z20ManglingTestRetParamU7_ExtIntILi33EEi(i64 %
// WIN: define dso_local i33 @"?ManglingTestRetParam@@YAU?$_ExtInt@$0CB@@__clang@@U12@@Z"(i33
return 0;
}
void ManglingTestNTTP();
void ManglingInstantiator() {
- // LIN: define void @_Z20ManglingInstantiatorv()
+ // LIN: define{{.*}} void @_Z20ManglingInstantiatorv()
// WIN: define dso_local void @"?ManglingInstantiator@@YAXXZ"()
_ExtInt(93) A;
ManglingTestTemplateParam(A);
}
void TakesVarargs(int i, ...) {
- // LIN: define void @_Z12TakesVarargsiz(i32 %i, ...)
+ // LIN: define{{.*}} void @_Z12TakesVarargsiz(i32 %i, ...)
// WIN: define dso_local void @"?TakesVarargs@@YAXHZZ"(i32 %i, ...)
__builtin_va_list args;
// WIN: call void @llvm.va_end(i8* %[[ARGSEND]])
}
void typeid_tests() {
- // LIN: define void @_Z12typeid_testsv()
+ // LIN: define{{.*}} void @_Z12typeid_testsv()
// WIN: define dso_local void @"?typeid_tests@@YAXXZ"()
unsigned _ExtInt(33) U33_1, U33_2;
_ExtInt(33) S33_1, S33_2;
}
void ExplicitCasts() {
- // LIN: define void @_Z13ExplicitCastsv()
+ // LIN: define{{.*}} void @_Z13ExplicitCastsv()
// WIN: define dso_local void @"?ExplicitCasts@@YAXXZ"()
_ExtInt(33) a;
};
void OffsetOfTest() {
- // LIN: define void @_Z12OffsetOfTestv()
+ // LIN: define{{.*}} void @_Z12OffsetOfTestv()
// WIN: define dso_local void @"?OffsetOfTest@@YAXXZ"()
auto A = __builtin_offsetof(S,A);
void ShiftExtIntByConstant(_ExtInt(28) Ext) {
-// LIN: define void @_Z21ShiftExtIntByConstantU7_ExtIntILi28EEi
+// LIN: define{{.*}} void @_Z21ShiftExtIntByConstantU7_ExtIntILi28EEi
// WIN: define dso_local void @"?ShiftExtIntByConstant@@YAXU?$_ExtInt@$0BM@@__clang@@@Z"
Ext << 7;
// CHECK: shl i28 %{{.+}}, 7
}
void ConstantShiftByExtInt(_ExtInt(28) Ext, _ExtInt(65) LargeExt) {
- // LIN: define void @_Z21ConstantShiftByExtIntU7_ExtIntILi28EEiU7_ExtIntILi65EEi
+ // LIN: define{{.*}} void @_Z21ConstantShiftByExtIntU7_ExtIntILi28EEiU7_ExtIntILi65EEi
// WIN: define dso_local void @"?ConstantShiftByExtInt@@YAXU?$_ExtInt@$0BM@@__clang@@U?$_ExtInt@$0EB@@2@@Z"
10 << Ext;
// CHECK: %[[PROMO:.+]] = zext i28 %{{.+}} to i32
}
void Shift(_ExtInt(28) Ext, _ExtInt(65) LargeExt, int i) {
- // LIN: define void @_Z5ShiftU7_ExtIntILi28EEiU7_ExtIntILi65EEii
+ // LIN: define{{.*}} void @_Z5ShiftU7_ExtIntILi28EEiU7_ExtIntILi65EEii
// WIN: define dso_local void @"?Shift@@YAXU?$_ExtInt@$0BM@@__clang@@U?$_ExtInt@$0EB@@2@H@Z"
i << Ext;
// CHECK: %[[PROMO:.+]] = zext i28 %{{.+}} to i32
void ComplexTest(_Complex _ExtInt(12) first,
_Complex _ExtInt(33) second) {
- // LIN: define void @_Z11ComplexTestCU7_ExtIntILi12EEiCU7_ExtIntILi33EEi
+ // LIN: define{{.*}} void @_Z11ComplexTestCU7_ExtIntILi12EEiCU7_ExtIntILi33EEi
// WIN: define dso_local void @"?ComplexTest@@YAXU?$_Complex@U?$_ExtInt@$0M@@__clang@@@__clang@@U?$_Complex@U?$_ExtInt@$0CB@@__clang@@@2@@Z"
first + second;
// CHECK: %[[FIRST_REALP:.+]] = getelementptr inbounds { i12, i12 }, { i12, i12 }* %{{.+}}, i32 0, i32 0
// CHECK-DAG: @aa = external global i32, section ".sdata", align 4
extern int bb __attribute__((section(".sdata"))) = 1;
-// CHECK-DAG: @bb = global i32 1, section ".sdata", align 4
+// CHECK-DAG: @bb ={{.*}} global i32 1, section ".sdata", align 4
int foo() {
return aa + bb;
void __attribute__((fastcall)) foo1(int &y);
void bar1(int &y) {
- // CHECK-LABEL: define void @_Z4bar1Ri
+ // CHECK-LABEL: define{{.*}} void @_Z4bar1Ri
// CHECK: call x86_fastcallcc void @_Z4foo1Ri(i32* inreg nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %
foo1(y);
}
void __attribute__((fastcall)) foo2(S1 a, int b);
void bar2(S1 a, int b) {
- // CHECK-LABEL: define void @_Z4bar22S1i
+ // CHECK-LABEL: define{{.*}} void @_Z4bar22S1i
// CHECK: call x86_fastcallcc void @_Z4foo22S1i(%struct.S1* inreg %{{.*}}, i32 inreg %
foo2(a, b);
}
void f(void) {}
[[gnu::flatten]]
-// CHECK: define void @_Z1gv()
+// CHECK: define{{.*}} void @_Z1gv()
void g(void) {
// CHECK-NOT: call {{.*}} @_Z1fv
f();
// CHECK-DAG: @_ZN12_GLOBAL__N_15arr1nE = internal global [10 x fp128]
// CHECK-DAG: @_ZN12_GLOBAL__N_15arr2nE = internal global [3 x fp128] [fp128 0xL33333333333333333FFF333333333333, fp128 0xL00000000000000004000800000000000, fp128 0xL00000000000000004025176592E00000]
// CHECK-DAG: define internal fp128 @_ZN12_GLOBAL__N_16func1nERKu9__ieee128(fp128*
-// CHECK-DAG: @f1f = global fp128 0xL00000000000000000000000000000000
-// CHECK-DAG: @f2f = global fp128 0xL33333333333333334004033333333333
-// CHECK-DAG: @arr1f = global [10 x fp128]
-// CHECK-DAG: @arr2f = global [3 x fp128] [fp128 0xL3333333333333333BFFF333333333333, fp128 0xL0000000000000000C000800000000000, fp128 0xL0000000000000000C025176592E00000]
+// CHECK-DAG: @f1f ={{.*}} global fp128 0xL00000000000000000000000000000000
+// CHECK-DAG: @f2f ={{.*}} global fp128 0xL33333333333333334004033333333333
+// CHECK-DAG: @arr1f ={{.*}} global [10 x fp128]
+// CHECK-DAG: @arr2f ={{.*}} global [3 x fp128] [fp128 0xL3333333333333333BFFF333333333333, fp128 0xL0000000000000000C000800000000000, fp128 0xL0000000000000000C025176592E00000]
// CHECK-DAG: declare fp128 @_Z6func1fu9__ieee128(fp128)
// CHECK-DAG: define linkonce_odr void @_ZN2C1C2Eu9__ieee128(%class.C1* {{[^,]*}} %this, fp128 %arg)
// CHECK-DAG: define linkonce_odr fp128 @_ZN2C16func2cEu9__ieee128(fp128 %arg)
// CHECK-X86-DAG: @_ZN12_GLOBAL__N_15arr1nE = internal global [10 x fp128]
// CHECK-X86-DAG: @_ZN12_GLOBAL__N_15arr2nE = internal global [3 x fp128] [fp128 0xL33333333333333333FFF333333333333, fp128 0xL00000000000000004000800000000000, fp128 0xL00000000000000004025176592E00000]
// CHECK-X86-DAG: define internal fp128 @_ZN12_GLOBAL__N_16func1nERKg(fp128*
-// CHECK-X86-DAG: @f1f = global fp128 0xL00000000000000000000000000000000
-// CHECK-X86-DAG: @f2f = global fp128 0xL33333333333333334004033333333333
-// CHECK-X86-DAG: @arr1f = global [10 x fp128]
-// CHECK-X86-DAG: @arr2f = global [3 x fp128] [fp128 0xL3333333333333333BFFF333333333333, fp128 0xL0000000000000000C000800000000000, fp128 0xL0000000000000000C025176592E00000]
+// CHECK-X86-DAG: @f1f ={{.*}} global fp128 0xL00000000000000000000000000000000
+// CHECK-X86-DAG: @f2f ={{.*}} global fp128 0xL33333333333333334004033333333333
+// CHECK-X86-DAG: @arr1f ={{.*}} global [10 x fp128]
+// CHECK-X86-DAG: @arr2f ={{.*}} global [3 x fp128] [fp128 0xL3333333333333333BFFF333333333333, fp128 0xL0000000000000000C000800000000000, fp128 0xL0000000000000000C025176592E00000]
// CHECK-X86-DAG: declare fp128 @_Z6func1fg(fp128)
// CHECK-X86-DAG: define linkonce_odr void @_ZN2C1C2Eg(%class.C1* {{[^,]*}} %this, fp128 %arg)
// CHECK-X86-DAG: define linkonce_odr fp128 @_ZN2C16func2cEg(fp128 %arg)
// RUN: %clang_cc1 -emit-llvm -o - -triple arm-none-linux-gnueabi %s | FileCheck %s
-// CHECK: @_ZN1SIDhDhE1iE = global i32 3
+// CHECK: @_ZN1SIDhDhE1iE ={{.*}} global i32 3
template <typename T, typename U> struct S { static int i; };
template <> int S<__fp16, __fp16>::i = 3;
-// CHECK-LABEL: define void @_Z1fPDh(half* %x)
+// CHECK-LABEL: define{{.*}} void @_Z1fPDh(half* %x)
void f (__fp16 *x) { }
-// CHECK-LABEL: define void @_Z1gPDhS_(half* %x, half* %y)
+// CHECK-LABEL: define{{.*}} void @_Z1gPDhS_(half* %x, half* %y)
void g (__fp16 *x, __fp16 *y) { }
A a, b;
// PR9593
-// CHECK-LABEL: define void @_Z4funcv()
+// CHECK-LABEL: define{{.*}} void @_Z4funcv()
// CHECK: call i32 @__cxa_guard_acquire(i64* @_ZGVZ4funcvE2a1)
// CHECK: call void @_ZN1AC1Ev([[A]]* {{[^,]*}} @_ZZ4funcvE2a1)
// CHECK-NEXT: call i32 @atexit(void ()* @__dtor__ZZ4funcvE2a1)
struct I3 : Base2 {};
struct D5 : I1, I2, I3 {}; // homogeneous aggregate
-// PPC: define void @_Z7func_D12D1(%struct.D1* noalias sret(%struct.D1) align 8 %agg.result, [3 x i64] %x.coerce)
-// ARM32: define arm_aapcs_vfpcc void @_Z7func_D12D1(%struct.D1* noalias sret(%struct.D1) align 8 %agg.result, [3 x i64] %x.coerce)
-// ARM64: define void @_Z7func_D12D1(%struct.D1* noalias sret(%struct.D1) align 8 %agg.result, %struct.D1* %x)
+// PPC: define{{.*}} void @_Z7func_D12D1(%struct.D1* noalias sret(%struct.D1) align 8 %agg.result, [3 x i64] %x.coerce)
+// ARM32: define{{.*}} arm_aapcs_vfpcc void @_Z7func_D12D1(%struct.D1* noalias sret(%struct.D1) align 8 %agg.result, [3 x i64] %x.coerce)
+// ARM64: define{{.*}} void @_Z7func_D12D1(%struct.D1* noalias sret(%struct.D1) align 8 %agg.result, %struct.D1* %x)
// X64: define dso_local x86_vectorcallcc void @"\01_Z7func_D12D1@@24"(%struct.D1* noalias sret(%struct.D1) align 8 %agg.result, %struct.D1* %x)
D1 CC func_D1(D1 x) { return x; }
-// PPC: define [3 x double] @_Z7func_D22D2([3 x double] %x.coerce)
-// ARM32: define arm_aapcs_vfpcc %struct.D2 @_Z7func_D22D2(%struct.D2 %x.coerce)
-// ARM64: define %struct.D2 @_Z7func_D22D2([3 x double] %x.coerce)
+// PPC: define{{.*}} [3 x double] @_Z7func_D22D2([3 x double] %x.coerce)
+// ARM32: define{{.*}} arm_aapcs_vfpcc %struct.D2 @_Z7func_D22D2(%struct.D2 %x.coerce)
+// ARM64: define{{.*}} %struct.D2 @_Z7func_D22D2([3 x double] %x.coerce)
// X64: define dso_local x86_vectorcallcc %struct.D2 @"\01_Z7func_D22D2@@24"(%struct.D2 inreg %x.coerce)
D2 CC func_D2(D2 x) { return x; }
-// PPC: define void @_Z7func_D32D3(%struct.D3* noalias sret(%struct.D3) align 8 %agg.result, [4 x i64] %x.coerce)
-// ARM32: define arm_aapcs_vfpcc void @_Z7func_D32D3(%struct.D3* noalias sret(%struct.D3) align 8 %agg.result, [4 x i64] %x.coerce)
-// ARM64: define void @_Z7func_D32D3(%struct.D3* noalias sret(%struct.D3) align 8 %agg.result, %struct.D3* %x)
+// PPC: define{{.*}} void @_Z7func_D32D3(%struct.D3* noalias sret(%struct.D3) align 8 %agg.result, [4 x i64] %x.coerce)
+// ARM32: define{{.*}} arm_aapcs_vfpcc void @_Z7func_D32D3(%struct.D3* noalias sret(%struct.D3) align 8 %agg.result, [4 x i64] %x.coerce)
+// ARM64: define{{.*}} void @_Z7func_D32D3(%struct.D3* noalias sret(%struct.D3) align 8 %agg.result, %struct.D3* %x)
D3 CC func_D3(D3 x) { return x; }
-// PPC: define [4 x double] @_Z7func_D42D4([4 x double] %x.coerce)
-// ARM32: define arm_aapcs_vfpcc %struct.D4 @_Z7func_D42D4(%struct.D4 %x.coerce)
-// ARM64: define %struct.D4 @_Z7func_D42D4([4 x double] %x.coerce)
+// PPC: define{{.*}} [4 x double] @_Z7func_D42D4([4 x double] %x.coerce)
+// ARM32: define{{.*}} arm_aapcs_vfpcc %struct.D4 @_Z7func_D42D4(%struct.D4 %x.coerce)
+// ARM64: define{{.*}} %struct.D4 @_Z7func_D42D4([4 x double] %x.coerce)
D4 CC func_D4(D4 x) { return x; }
D5 CC func_D5(D5 x) { return x; }
-// PPC: define [3 x double] @_Z7func_D52D5([3 x double] %x.coerce)
-// ARM32: define arm_aapcs_vfpcc %struct.D5 @_Z7func_D52D5(%struct.D5 %x.coerce)
+// PPC: define{{.*}} [3 x double] @_Z7func_D52D5([3 x double] %x.coerce)
+// ARM32: define{{.*}} arm_aapcs_vfpcc %struct.D5 @_Z7func_D52D5(%struct.D5 %x.coerce)
// The C++ multiple inheritance expansion case is a little more complicated, so
// do some extra checking.
//
-// ARM64-LABEL: define %struct.D5 @_Z7func_D52D5([3 x double] %x.coerce)
+// ARM64-LABEL: define{{.*}} %struct.D5 @_Z7func_D52D5([3 x double] %x.coerce)
// ARM64: bitcast %struct.D5* %{{.*}} to [3 x double]*
// ARM64: store [3 x double] %x.coerce, [3 x double]*
// Check the call site.
//
-// ARM64-LABEL: define void @_Z7call_D5P2D5(%struct.D5* %p)
+// ARM64-LABEL: define{{.*}} void @_Z7call_D5P2D5(%struct.D5* %p)
// ARM64: load [3 x double], [3 x double]*
// ARM64: call %struct.D5 @_Z7func_D52D5([3 x double] %{{.*}})
struct Float2 { float y; };
struct HVAWithEmptyBase : Float1, Empty, Float2 { float z; };
-// PPC: define void @_Z15with_empty_base16HVAWithEmptyBase([3 x float] %a.coerce)
-// ARM64: define void @_Z15with_empty_base16HVAWithEmptyBase([3 x float] %a.coerce)
-// ARM32: define arm_aapcs_vfpcc void @_Z15with_empty_base16HVAWithEmptyBase(%struct.HVAWithEmptyBase %a.coerce)
+// PPC: define{{.*}} void @_Z15with_empty_base16HVAWithEmptyBase([3 x float] %a.coerce)
+// ARM64: define{{.*}} void @_Z15with_empty_base16HVAWithEmptyBase([3 x float] %a.coerce)
+// ARM32: define{{.*}} arm_aapcs_vfpcc void @_Z15with_empty_base16HVAWithEmptyBase(%struct.HVAWithEmptyBase %a.coerce)
void CC with_empty_base(HVAWithEmptyBase a) {}
// FIXME: MSVC doesn't consider this an HVA because of the empty base.
float z;
};
-// PPC: define void @_Z19with_empty_bitfield20HVAWithEmptyBitField([3 x float] %a.coerce)
-// ARM64: define void @_Z19with_empty_bitfield20HVAWithEmptyBitField([3 x float] %a.coerce)
-// ARM32: define arm_aapcs_vfpcc void @_Z19with_empty_bitfield20HVAWithEmptyBitField(%struct.HVAWithEmptyBitField %a.coerce)
+// PPC: define{{.*}} void @_Z19with_empty_bitfield20HVAWithEmptyBitField([3 x float] %a.coerce)
+// ARM64: define{{.*}} void @_Z19with_empty_bitfield20HVAWithEmptyBitField([3 x float] %a.coerce)
+// ARM32: define{{.*}} arm_aapcs_vfpcc void @_Z19with_empty_bitfield20HVAWithEmptyBitField(%struct.HVAWithEmptyBitField %a.coerce)
// X64: define dso_local x86_vectorcallcc void @"\01_Z19with_empty_bitfield20HVAWithEmptyBitField@@16"(%struct.HVAWithEmptyBitField inreg %a.coerce)
void CC with_empty_bitfield(HVAWithEmptyBitField a) {}
int n;
};
-// CHECK: @a = global {{.*}} zeroinitializer
+// CHECK: @a ={{.*}} global {{.*}} zeroinitializer
extern const A a = A();
struct B {
mutable int n;
};
-// CHECK: @b = global {{.*}} zeroinitializer
+// CHECK: @b ={{.*}} global {{.*}} zeroinitializer
extern const B b = B();
struct C {
int n;
};
-// CHECK: @c = global {{.*}} zeroinitializer
+// CHECK: @c ={{.*}} global {{.*}} zeroinitializer
extern const C c = C();
int f();
-// CHECK: @d = global i32 0
+// CHECK: @d ={{.*}} global i32 0
extern const int d = f();
void e() {
// CHECK: store {{.*}}, i32* @d
// CHECK: call {{.*}}@llvm.invariant.start.p0i8(i64 4, i8* bitcast ({{.*}} @d to i8*))
-// CHECK-LABEL: define void @_Z1ev(
+// CHECK-LABEL: define{{.*}} void @_Z1ev(
// CHECK: call void @_ZN1AC1Ev(%struct.A* nonnull {{[^,]*}} @_ZZ1evE1a)
// CHECK: call {{.*}}@llvm.invariant.start.p0i8(i64 4, i8* {{.*}}bitcast ({{.*}} @_ZZ1evE1a to i8*))
// CHECK-NOT: llvm.invariant.end
void foo() {
A a{f(), g()};
}
-// CHECK-ITANIUM-LABEL: define void @_Z3foov
+// CHECK-ITANIUM-LABEL: define{{.*}} void @_Z3foov
// CHECK-MS-LABEL: define dso_local void @"?foo@@YAXXZ"
// CHECK: call i32 @f()
// CHECK: call i32 @g()
B();
};
B::B() : A{f(), g()} {}
-// CHECK-ITANIUM-LABEL: define void @_ZN1BC2Ev
+// CHECK-ITANIUM-LABEL: define{{.*}} void @_ZN1BC2Ev
// CHECK-MS-LABEL: define dso_local x86_thiscallcc %struct.B* @"??0B@@QAE@XZ"
// CHECK: call i32 @f()
// CHECK: call i32 @g()
void foo();
};
-// CHECK-LABEL: define void @_Z21testExternallyVisiblev()
+// CHECK-LABEL: define{{.*}} void @_Z21testExternallyVisiblev()
void testExternallyVisible() {
A *a = new A;
}
-// CHECK-LABEL: define void @_Z21testInternallyVisibleb(
+// CHECK-LABEL: define{{.*}} void @_Z21testInternallyVisibleb(
void testInternallyVisible(bool p) {
B *b = new B;
// CHECK: = load {{.*}}, !invariant.group ![[MD]]
}
// void usage function, calls conversion operator.
-// LIN64: define void @_Z5usagev()
-// VECCALL: define void @_Z5usagev()
+// LIN64: define{{.*}} void @_Z5usagev()
+// VECCALL: define{{.*}} void @_Z5usagev()
// WIN32: define dso_local void @"?usage@@YAXXZ"()
// CHECK: call double (i32, float, double)* @"_ZZ5usagevENK3$_0cvPFdifdEEv"
// WIN32: call x86_thiscallcc double (i32, float, double)* @"??B<lambda_0>@?0??usage@@YAXXZ@QBEP6A?A?<auto>@@HMN@ZXZ"
}();
}
-// CHECK: define void @_Z3foov
+// CHECK: define{{.*}} void @_Z3foov
// CHECK: getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 0
// CHECK-NEXT: getelementptr inbounds %{{.+}}, %{{.+}}* %{{.+}}, i32 0, i32 1
// CHECK-NEXT: store float 0.000
void Derived::VariadicFunction(...) { }
-// CHECK: define void @_ZN7Derived16VariadicFunctionEz({{.*}} !dbg ![[SP:[0-9]+]]
+// CHECK: define{{.*}} void @_ZN7Derived16VariadicFunctionEz({{.*}} !dbg ![[SP:[0-9]+]]
// CHECK: ret void, !dbg ![[LOC:[0-9]+]]
-// CHECK: define void @_ZT{{.+}}N7Derived16VariadicFunctionEz({{.*}} !dbg ![[SP_I:[0-9]+]]
+// CHECK: define{{.*}} void @_ZT{{.+}}N7Derived16VariadicFunctionEz({{.*}} !dbg ![[SP_I:[0-9]+]]
// CHECK: ret void, !dbg ![[LOC_I:[0-9]+]]
//
// CHECK: ![[SP]] = distinct !DISubprogram(name: "VariadicFunction"
// CHECK-WIN: call i64 @_Z11func_as_intIU8sysv_abiFiiEExPT_(i32 (i32)* @_Z9f_sysvabii)
// CHECK-WIN: call i64 @_Z11func_as_intIFiiEExPT_(i32 (i32)* @_Z7f_msabii)
-// CHECK-LIN: define i64 @_Z7useThemv()
+// CHECK-LIN: define{{.*}} i64 @_Z7useThemv()
// CHECK-LIN: call i64 @_Z11func_as_intIFiiEElPT_(i32 (i32)* @_Z7f_plaini)
// CHECK-LIN: call i64 @_Z11func_as_intIFiiEElPT_(i32 (i32)* @_Z9f_sysvabii)
// CHECK-LIN: call i64 @_Z11func_as_intIU6ms_abiFiiEElPT_(i32 (i32)* @_Z7f_msabii)
void (B::*pb)();
void (C::*pc)();
-// GLOBAL-LP64: @pa2 = global { i64, i64 } { i64 ptrtoint (void (%struct.A*)* @_ZN1A1fEv to i64), i64 0 }, align 8
+// GLOBAL-LP64: @pa2 ={{.*}} global { i64, i64 } { i64 ptrtoint (void (%struct.A*)* @_ZN1A1fEv to i64), i64 0 }, align 8
void (A::*pa2)() = &A::f;
-// GLOBAL-LP64: @pa3 = global { i64, i64 } { i64 1, i64 0 }, align 8
-// GLOBAL-LP32: @pa3 = global { i32, i32 } { i32 1, i32 0 }, align 4
+// GLOBAL-LP64: @pa3 ={{.*}} global { i64, i64 } { i64 1, i64 0 }, align 8
+// GLOBAL-LP32: @pa3 ={{.*}} global { i32, i32 } { i32 1, i32 0 }, align 4
void (A::*pa3)() = &A::vf1;
-// GLOBAL-LP64: @pa4 = global { i64, i64 } { i64 9, i64 0 }, align 8
-// GLOBAL-LP32: @pa4 = global { i32, i32 } { i32 5, i32 0 }, align 4
+// GLOBAL-LP64: @pa4 ={{.*}} global { i64, i64 } { i64 9, i64 0 }, align 8
+// GLOBAL-LP32: @pa4 ={{.*}} global { i32, i32 } { i32 5, i32 0 }, align 4
void (A::*pa4)() = &A::vf2;
-// GLOBAL-LP64: @pc2 = global { i64, i64 } { i64 ptrtoint (void (%struct.A*)* @_ZN1A1fEv to i64), i64 16 }, align 8
+// GLOBAL-LP64: @pc2 ={{.*}} global { i64, i64 } { i64 ptrtoint (void (%struct.A*)* @_ZN1A1fEv to i64), i64 16 }, align 8
void (C::*pc2)() = &C::f;
-// GLOBAL-LP64: @pc3 = global { i64, i64 } { i64 1, i64 0 }, align 8
+// GLOBAL-LP64: @pc3 ={{.*}} global { i64, i64 } { i64 1, i64 0 }, align 8
void (A::*pc3)() = &A::vf1;
void f() {
struct B { void foo(); virtual void vfoo(); };
struct C : A, B { void foo(); virtual void vfoo(); };
- // GLOBAL-ARM: @_ZN5test74ptr0E = global {{.*}} { i32 ptrtoint ({{.*}}* @_ZN5test71A3fooEv to i32), i32 0 }
- // GLOBAL-ARM: @_ZN5test74ptr1E = global {{.*}} { i32 ptrtoint ({{.*}}* @_ZN5test71B3fooEv to i32), i32 8 }
- // GLOBAL-ARM: @_ZN5test74ptr2E = global {{.*}} { i32 ptrtoint ({{.*}}* @_ZN5test71C3fooEv to i32), i32 0 }
- // GLOBAL-ARM: @_ZN5test74ptr3E = global {{.*}} { i32 0, i32 1 }
- // GLOBAL-ARM: @_ZN5test74ptr4E = global {{.*}} { i32 0, i32 9 }
- // GLOBAL-ARM: @_ZN5test74ptr5E = global {{.*}} { i32 0, i32 1 }
+ // GLOBAL-ARM: @_ZN5test74ptr0E ={{.*}} global {{.*}} { i32 ptrtoint ({{.*}}* @_ZN5test71A3fooEv to i32), i32 0 }
+ // GLOBAL-ARM: @_ZN5test74ptr1E ={{.*}} global {{.*}} { i32 ptrtoint ({{.*}}* @_ZN5test71B3fooEv to i32), i32 8 }
+ // GLOBAL-ARM: @_ZN5test74ptr2E ={{.*}} global {{.*}} { i32 ptrtoint ({{.*}}* @_ZN5test71C3fooEv to i32), i32 0 }
+ // GLOBAL-ARM: @_ZN5test74ptr3E ={{.*}} global {{.*}} { i32 0, i32 1 }
+ // GLOBAL-ARM: @_ZN5test74ptr4E ={{.*}} global {{.*}} { i32 0, i32 9 }
+ // GLOBAL-ARM: @_ZN5test74ptr5E ={{.*}} global {{.*}} { i32 0, i32 1 }
void (C::*ptr0)() = &A::foo;
void (C::*ptr1)() = &B::foo;
void (C::*ptr2)() = &C::foo;
fooptr p;
};
- // CODE-LP64-LABEL: define void @_ZN5test94testEv(
+ // CODE-LP64-LABEL: define{{.*}} void @_ZN5test94testEv(
// CODE-LP64: alloca i32
// CODE-LP64-NEXT: ret void
void test() {
// It's not that the offsets are doubled on ARM, it's that they're left-shifted by 1.
-// GLOBAL-LP64: @_ZN6test101aE = global { i64, i64 } { i64 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i64), i64 0 }, align 8
-// GLOBAL-LP32: @_ZN6test101aE = global { i32, i32 } { i32 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i32), i32 0 }, align 4
-// GLOBAL-ARM: @_ZN6test101aE = global { i32, i32 } { i32 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i32), i32 0 }, align 4
+// GLOBAL-LP64: @_ZN6test101aE ={{.*}} global { i64, i64 } { i64 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i64), i64 0 }, align 8
+// GLOBAL-LP32: @_ZN6test101aE ={{.*}} global { i32, i32 } { i32 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i32), i32 0 }, align 4
+// GLOBAL-ARM: @_ZN6test101aE ={{.*}} global { i32, i32 } { i32 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i32), i32 0 }, align 4
void (A::*a)() = &A::foo;
-// GLOBAL-LP64: @_ZN6test101bE = global { i64, i64 } { i64 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i64), i64 8 }, align 8
-// GLOBAL-LP32: @_ZN6test101bE = global { i32, i32 } { i32 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i32), i32 4 }, align 4
-// GLOBAL-ARM: @_ZN6test101bE = global { i32, i32 } { i32 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i32), i32 8 }, align 4
+// GLOBAL-LP64: @_ZN6test101bE ={{.*}} global { i64, i64 } { i64 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i64), i64 8 }, align 8
+// GLOBAL-LP32: @_ZN6test101bE ={{.*}} global { i32, i32 } { i32 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i32), i32 4 }, align 4
+// GLOBAL-ARM: @_ZN6test101bE ={{.*}} global { i32, i32 } { i32 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i32), i32 8 }, align 4
void (B::*b)() = (void (B::*)()) &A::foo;
-// GLOBAL-LP64: @_ZN6test101cE = global { i64, i64 } { i64 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i64), i64 8 }, align 8
-// GLOBAL-LP32: @_ZN6test101cE = global { i32, i32 } { i32 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i32), i32 4 }, align 4
-// GLOBAL-ARM: @_ZN6test101cE = global { i32, i32 } { i32 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i32), i32 8 }, align 4
+// GLOBAL-LP64: @_ZN6test101cE ={{.*}} global { i64, i64 } { i64 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i64), i64 8 }, align 8
+// GLOBAL-LP32: @_ZN6test101cE ={{.*}} global { i32, i32 } { i32 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i32), i32 4 }, align 4
+// GLOBAL-ARM: @_ZN6test101cE ={{.*}} global { i32, i32 } { i32 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i32), i32 8 }, align 4
void (C::*c)() = (void (C::*)()) (void (B::*)()) &A::foo;
-// GLOBAL-LP64: @_ZN6test101dE = global { i64, i64 } { i64 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i64), i64 16 }, align 8
-// GLOBAL-LP32: @_ZN6test101dE = global { i32, i32 } { i32 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i32), i32 8 }, align 4
-// GLOBAL-ARM: @_ZN6test101dE = global { i32, i32 } { i32 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i32), i32 16 }, align 4
+// GLOBAL-LP64: @_ZN6test101dE ={{.*}} global { i64, i64 } { i64 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i64), i64 16 }, align 8
+// GLOBAL-LP32: @_ZN6test101dE ={{.*}} global { i32, i32 } { i32 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i32), i32 8 }, align 4
+// GLOBAL-ARM: @_ZN6test101dE ={{.*}} global { i32, i32 } { i32 ptrtoint (void (%"struct.test10::A"*)* @_ZN6test101A3fooEv to i32), i32 16 }, align 4
void (D::*d)() = (void (C::*)()) (void (B::*)()) &A::foo;
}
struct C : B { virtual void a(); };
void (C::*x)() = &C::a;
- // GLOBAL-LP64: @_ZN6test111xE = global { i64, i64 } { i64 1, i64 0 }
- // GLOBAL-LP32: @_ZN6test111xE = global { i32, i32 } { i32 1, i32 0 }
- // GLOBAL-ARM: @_ZN6test111xE = global { i32, i32 } { i32 0, i32 1 }
+ // GLOBAL-LP64: @_ZN6test111xE ={{.*}} global { i64, i64 } { i64 1, i64 0 }
+ // GLOBAL-LP32: @_ZN6test111xE ={{.*}} global { i32, i32 } { i32 1, i32 0 }
+ // GLOBAL-ARM: @_ZN6test111xE ={{.*}} global { i32, i32 } { i32 0, i32 1 }
}
void foo();
void __cdecl foo();
void __cdecl foo() {}
-// GCABI-LABEL: define void @_Z3foov()
+// GCABI-LABEL: define{{.*}} void @_Z3foov()
// MSABI: define dso_local void @"?foo@@YAXXZ"
void __cdecl bar();
void bar();
void bar() {}
-// GCABI-LABEL: define void @_Z3barv()
+// GCABI-LABEL: define{{.*}} void @_Z3barv()
// MSABI: define dso_local void @"?bar@@YAXXZ"
// Test that it's OK to mark either the method declaration or method definition
};
void METHOD_CC A::baz() {}
-// GCABI-LABEL: define void @_ZN1A3bazEv
+// GCABI-LABEL: define{{.*}} void @_ZN1A3bazEv
// MSABI: define dso_local x86_thiscallcc void @"?baz@A@@QAEXXZ"
void A::qux() {}
-// GCABI-LABEL: define void @_ZN1A3quxEv
+// GCABI-LABEL: define{{.*}} void @_ZN1A3quxEv
// MSABI: define dso_local x86_thiscallcc void @"?qux@A@@QAEXXZ"
void __cdecl static_baz() {}
-// GCABI-LABEL: define void @_Z10static_bazv
+// GCABI-LABEL: define{{.*}} void @_Z10static_bazv
// MSABI: define dso_local void @"?static_baz@@YAXXZ"
void static_qux() {}
-// GCABI-LABEL: define void @_Z10static_quxv
+// GCABI-LABEL: define{{.*}} void @_Z10static_quxv
// MSABI: define dso_local void @"?static_qux@@YAXXZ"
namespace PR31656 {
// Returning structs that fit into a register.
Small small_return() { return Small(); }
-// LINUX-LABEL: define void @_Z12small_returnv(%struct.Small* noalias sret(%struct.Small) align 4 %agg.result)
+// LINUX-LABEL: define{{.*}} void @_Z12small_returnv(%struct.Small* noalias sret(%struct.Small) align 4 %agg.result)
// WIN32: define dso_local i32 @"?small_return@@YA?AUSmall@@XZ"()
// WIN64: define dso_local i32 @"?small_return@@YA?AUSmall@@XZ"()
// WOA64: define dso_local i64 @"?small_return@@YA?AUSmall@@XZ"()
Medium medium_return() { return Medium(); }
-// LINUX-LABEL: define void @_Z13medium_returnv(%struct.Medium* noalias sret(%struct.Medium) align 4 %agg.result)
+// LINUX-LABEL: define{{.*}} void @_Z13medium_returnv(%struct.Medium* noalias sret(%struct.Medium) align 4 %agg.result)
// WIN32: define dso_local i64 @"?medium_return@@YA?AUMedium@@XZ"()
// WIN64: define dso_local i64 @"?medium_return@@YA?AUMedium@@XZ"()
// WOA64: define dso_local i64 @"?medium_return@@YA?AUMedium@@XZ"()
// Returning structs that fit into a register but are not POD.
SmallCpp11NotCpp03Pod small_non_pod_return() { return SmallCpp11NotCpp03Pod(); }
-// LINUX-LABEL: define void @_Z20small_non_pod_returnv(%struct.SmallCpp11NotCpp03Pod* noalias sret(%struct.SmallCpp11NotCpp03Pod) align 4 %agg.result)
+// LINUX-LABEL: define{{.*}} void @_Z20small_non_pod_returnv(%struct.SmallCpp11NotCpp03Pod* noalias sret(%struct.SmallCpp11NotCpp03Pod) align 4 %agg.result)
// WIN32: define dso_local void @"?small_non_pod_return@@YA?AUSmallCpp11NotCpp03Pod@@XZ"(%struct.SmallCpp11NotCpp03Pod* noalias sret(%struct.SmallCpp11NotCpp03Pod) align 4 %agg.result)
// WIN64: define dso_local void @"?small_non_pod_return@@YA?AUSmallCpp11NotCpp03Pod@@XZ"(%struct.SmallCpp11NotCpp03Pod* noalias sret(%struct.SmallCpp11NotCpp03Pod) align 4 %agg.result)
// WOA64: define dso_local void @"?small_non_pod_return@@YA?AUSmallCpp11NotCpp03Pod@@XZ"(%struct.SmallCpp11NotCpp03Pod* inreg noalias sret(%struct.SmallCpp11NotCpp03Pod) align 4 %agg.result)
SmallWithCtor small_with_ctor_return() { return SmallWithCtor(); }
-// LINUX-LABEL: define void @_Z22small_with_ctor_returnv(%struct.SmallWithCtor* noalias sret(%struct.SmallWithCtor) align 4 %agg.result)
+// LINUX-LABEL: define{{.*}} void @_Z22small_with_ctor_returnv(%struct.SmallWithCtor* noalias sret(%struct.SmallWithCtor) align 4 %agg.result)
// WIN32: define dso_local void @"?small_with_ctor_return@@YA?AUSmallWithCtor@@XZ"(%struct.SmallWithCtor* noalias sret(%struct.SmallWithCtor) align 4 %agg.result)
// WIN64: define dso_local void @"?small_with_ctor_return@@YA?AUSmallWithCtor@@XZ"(%struct.SmallWithCtor* noalias sret(%struct.SmallWithCtor) align 4 %agg.result)
// FIXME: The 'sret' mark here doesn't seem to be enough to convince LLVM to
// WOA64: define dso_local void @"?small_with_ctor_return@@YA?AUSmallWithCtor@@XZ"(%struct.SmallWithCtor* inreg noalias sret(%struct.SmallWithCtor) align 4 %agg.result)
SmallWithDtor small_with_dtor_return() { return SmallWithDtor(); }
-// LINUX-LABEL: define void @_Z22small_with_dtor_returnv(%struct.SmallWithDtor* noalias sret(%struct.SmallWithDtor) align 4 %agg.result)
+// LINUX-LABEL: define{{.*}} void @_Z22small_with_dtor_returnv(%struct.SmallWithDtor* noalias sret(%struct.SmallWithDtor) align 4 %agg.result)
// WIN32: define dso_local void @"?small_with_dtor_return@@YA?AUSmallWithDtor@@XZ"(%struct.SmallWithDtor* noalias sret(%struct.SmallWithDtor) align 4 %agg.result)
// WIN64: define dso_local void @"?small_with_dtor_return@@YA?AUSmallWithDtor@@XZ"(%struct.SmallWithDtor* noalias sret(%struct.SmallWithDtor) align 4 %agg.result)
// WOA64: define dso_local void @"?small_with_dtor_return@@YA?AUSmallWithDtor@@XZ"(%struct.SmallWithDtor* inreg noalias sret(%struct.SmallWithDtor) align 4 %agg.result)
SmallWithVftable small_with_vftable_return() { return SmallWithVftable(); }
-// LINUX-LABEL: define void @_Z25small_with_vftable_returnv(%struct.SmallWithVftable* noalias sret(%struct.SmallWithVftable) align 4 %agg.result)
+// LINUX-LABEL: define{{.*}} void @_Z25small_with_vftable_returnv(%struct.SmallWithVftable* noalias sret(%struct.SmallWithVftable) align 4 %agg.result)
// WIN32: define dso_local void @"?small_with_vftable_return@@YA?AUSmallWithVftable@@XZ"(%struct.SmallWithVftable* noalias sret(%struct.SmallWithVftable) align 4 %agg.result)
// WIN64: define dso_local void @"?small_with_vftable_return@@YA?AUSmallWithVftable@@XZ"(%struct.SmallWithVftable* noalias sret(%struct.SmallWithVftable) align 8 %agg.result)
// WOA64: define dso_local void @"?small_with_vftable_return@@YA?AUSmallWithVftable@@XZ"(%struct.SmallWithVftable* inreg noalias sret(%struct.SmallWithVftable) align 8 %agg.result)
MediumWithCopyCtor medium_with_copy_ctor_return() { return MediumWithCopyCtor(); }
-// LINUX-LABEL: define void @_Z28medium_with_copy_ctor_returnv(%struct.MediumWithCopyCtor* noalias sret(%struct.MediumWithCopyCtor) align 4 %agg.result)
+// LINUX-LABEL: define{{.*}} void @_Z28medium_with_copy_ctor_returnv(%struct.MediumWithCopyCtor* noalias sret(%struct.MediumWithCopyCtor) align 4 %agg.result)
// WIN32: define dso_local void @"?medium_with_copy_ctor_return@@YA?AUMediumWithCopyCtor@@XZ"(%struct.MediumWithCopyCtor* noalias sret(%struct.MediumWithCopyCtor) align 4 %agg.result)
// WIN64: define dso_local void @"?medium_with_copy_ctor_return@@YA?AUMediumWithCopyCtor@@XZ"(%struct.MediumWithCopyCtor* noalias sret(%struct.MediumWithCopyCtor) align 4 %agg.result)
// WOA: define dso_local arm_aapcs_vfpcc void @"?medium_with_copy_ctor_return@@YA?AUMediumWithCopyCtor@@XZ"(%struct.MediumWithCopyCtor* noalias sret(%struct.MediumWithCopyCtor) align 4 %agg.result)
// Returning a large struct that doesn't fit into a register.
Big big_return() { return Big(); }
-// LINUX-LABEL: define void @_Z10big_returnv(%struct.Big* noalias sret(%struct.Big) align 4 %agg.result)
+// LINUX-LABEL: define{{.*}} void @_Z10big_returnv(%struct.Big* noalias sret(%struct.Big) align 4 %agg.result)
// WIN32: define dso_local void @"?big_return@@YA?AUBig@@XZ"(%struct.Big* noalias sret(%struct.Big) align 4 %agg.result)
// WIN64: define dso_local void @"?big_return@@YA?AUBig@@XZ"(%struct.Big* noalias sret(%struct.Big) align 4 %agg.result)
// WOA64: define dso_local void @"?big_return@@YA?AUBig@@XZ"(%struct.Big* noalias sret(%struct.Big) align 4 %agg.result)
void small_arg(Small s) {}
-// LINUX-LABEL: define void @_Z9small_arg5Small(i32 %s.0)
+// LINUX-LABEL: define{{.*}} void @_Z9small_arg5Small(i32 %s.0)
// WIN32: define dso_local void @"?small_arg@@YAXUSmall@@@Z"(i32 %s.0)
// WIN64: define dso_local void @"?small_arg@@YAXUSmall@@@Z"(i32 %s.coerce)
// WOA: define dso_local arm_aapcs_vfpcc void @"?small_arg@@YAXUSmall@@@Z"([1 x i32] %s.coerce)
void medium_arg(Medium s) {}
-// LINUX-LABEL: define void @_Z10medium_arg6Medium(i32 %s.0, i32 %s.1)
+// LINUX-LABEL: define{{.*}} void @_Z10medium_arg6Medium(i32 %s.0, i32 %s.1)
// WIN32: define dso_local void @"?medium_arg@@YAXUMedium@@@Z"(i32 %s.0, i32 %s.1)
// WIN64: define dso_local void @"?medium_arg@@YAXUMedium@@@Z"(i64 %s.coerce)
// WOA: define dso_local arm_aapcs_vfpcc void @"?medium_arg@@YAXUMedium@@@Z"([2 x i32] %s.coerce)
void base_no_byval_arg(BaseNoByval s) {}
-// LINUX-LABEL: define void @_Z17base_no_byval_arg11BaseNoByval(%struct.BaseNoByval* byval(%struct.BaseNoByval) align 4 %s)
+// LINUX-LABEL: define{{.*}} void @_Z17base_no_byval_arg11BaseNoByval(%struct.BaseNoByval* byval(%struct.BaseNoByval) align 4 %s)
// WIN32: define dso_local void @"?base_no_byval_arg@@YAXUBaseNoByval@@@Z"(i32 %s.0, i32 %s.1)
// WIN64: define dso_local void @"?base_no_byval_arg@@YAXUBaseNoByval@@@Z"(i64 %s.coerce)
// WOA: define dso_local arm_aapcs_vfpcc void @"?base_no_byval_arg@@YAXUBaseNoByval@@@Z"([2 x i32] %s.coerce)
void small_arg_with_ctor(SmallWithCtor s) {}
-// LINUX-LABEL: define void @_Z19small_arg_with_ctor13SmallWithCtor(%struct.SmallWithCtor* byval(%struct.SmallWithCtor) align 4 %s)
+// LINUX-LABEL: define{{.*}} void @_Z19small_arg_with_ctor13SmallWithCtor(%struct.SmallWithCtor* byval(%struct.SmallWithCtor) align 4 %s)
// WIN32: define dso_local void @"?small_arg_with_ctor@@YAXUSmallWithCtor@@@Z"(i32 %s.0)
// WIN64: define dso_local void @"?small_arg_with_ctor@@YAXUSmallWithCtor@@@Z"(i32 %s.coerce)
// WOA: define dso_local arm_aapcs_vfpcc void @"?small_arg_with_ctor@@YAXUSmallWithCtor@@@Z"([1 x i32] %s.coerce)
// FIXME: We could coerce to a series of i32s here if we wanted to.
void multibyte_arg(Multibyte s) {}
-// LINUX-LABEL: define void @_Z13multibyte_arg9Multibyte(%struct.Multibyte* byval(%struct.Multibyte) align 4 %s)
+// LINUX-LABEL: define{{.*}} void @_Z13multibyte_arg9Multibyte(%struct.Multibyte* byval(%struct.Multibyte) align 4 %s)
// WIN32: define dso_local void @"?multibyte_arg@@YAXUMultibyte@@@Z"(%struct.Multibyte* byval(%struct.Multibyte) align 4 %s)
// WIN64: define dso_local void @"?multibyte_arg@@YAXUMultibyte@@@Z"(i32 %s.coerce)
// WOA: define dso_local arm_aapcs_vfpcc void @"?multibyte_arg@@YAXUMultibyte@@@Z"([1 x i32] %s.coerce)
void packed_arg(Packed s) {}
-// LINUX-LABEL: define void @_Z10packed_arg6Packed(%struct.Packed* byval(%struct.Packed) align 4 %s)
+// LINUX-LABEL: define{{.*}} void @_Z10packed_arg6Packed(%struct.Packed* byval(%struct.Packed) align 4 %s)
// WIN32: define dso_local void @"?packed_arg@@YAXUPacked@@@Z"(%struct.Packed* byval(%struct.Packed) align 4 %s)
// WIN64: define dso_local void @"?packed_arg@@YAXUPacked@@@Z"(%struct.Packed* %s)
// WIN32: }
void small_arg_with_vftable(SmallWithVftable s) {}
-// LINUX-LABEL: define void @_Z22small_arg_with_vftable16SmallWithVftable(%struct.SmallWithVftable* %s)
+// LINUX-LABEL: define{{.*}} void @_Z22small_arg_with_vftable16SmallWithVftable(%struct.SmallWithVftable* %s)
// WIN32: define dso_local void @"?small_arg_with_vftable@@YAXUSmallWithVftable@@@Z"(<{ %struct.SmallWithVftable }>* inalloca %0)
// WIN64: define dso_local void @"?small_arg_with_vftable@@YAXUSmallWithVftable@@@Z"(%struct.SmallWithVftable* %s)
// WOA64: define dso_local void @"?small_arg_with_vftable@@YAXUSmallWithVftable@@@Z"(%struct.SmallWithVftable* %s)
void medium_arg_with_copy_ctor(MediumWithCopyCtor s) {}
-// LINUX-LABEL: define void @_Z25medium_arg_with_copy_ctor18MediumWithCopyCtor(%struct.MediumWithCopyCtor* %s)
+// LINUX-LABEL: define{{.*}} void @_Z25medium_arg_with_copy_ctor18MediumWithCopyCtor(%struct.MediumWithCopyCtor* %s)
// WIN32: define dso_local void @"?medium_arg_with_copy_ctor@@YAXUMediumWithCopyCtor@@@Z"(<{ %struct.MediumWithCopyCtor }>* inalloca %0)
// WIN64: define dso_local void @"?medium_arg_with_copy_ctor@@YAXUMediumWithCopyCtor@@@Z"(%struct.MediumWithCopyCtor* %s)
// WOA: define dso_local arm_aapcs_vfpcc void @"?medium_arg_with_copy_ctor@@YAXUMediumWithCopyCtor@@@Z"(%struct.MediumWithCopyCtor* %s)
// WOA64: define dso_local void @"?medium_arg_with_copy_ctor@@YAXUMediumWithCopyCtor@@@Z"(%struct.MediumWithCopyCtor* %s)
void big_arg(Big s) {}
-// LINUX-LABEL: define void @_Z7big_arg3Big(%struct.Big* byval(%struct.Big) align 4 %s)
+// LINUX-LABEL: define{{.*}} void @_Z7big_arg3Big(%struct.Big* byval(%struct.Big) align 4 %s)
// WIN32: define dso_local void @"?big_arg@@YAXUBig@@@Z"(%struct.Big* byval(%struct.Big) align 4 %s)
// WIN64: define dso_local void @"?big_arg@@YAXUBig@@@Z"(%struct.Big* %s)
int &x;
};
void takes_ref_field(RefField s) {}
-// LINUX-LABEL: define void @_Z15takes_ref_field8RefField(%struct.RefField* byval(%struct.RefField) align 4 %s)
+// LINUX-LABEL: define{{.*}} void @_Z15takes_ref_field8RefField(%struct.RefField* byval(%struct.RefField) align 4 %s)
// WIN32: define dso_local void @"?takes_ref_field@@YAXURefField@@@Z"(i32* %s.0)
// WIN64: define dso_local void @"?takes_ref_field@@YAXURefField@@@Z"(i64 %s.coerce)
int x;
takes_ref_field(RefField(x));
}
-// LINUX-LABEL: define void @_Z14pass_ref_fieldv()
+// LINUX-LABEL: define{{.*}} void @_Z14pass_ref_fieldv()
// LINUX: call void @_Z15takes_ref_field8RefField(%struct.RefField* byval(%struct.RefField) align 4 %{{.*}})
// WIN32-LABEL: define dso_local void @"?pass_ref_field@@YAXXZ"()
// WIN32: call void @"?takes_ref_field@@YAXURefField@@@Z"(i32* %{{.*}})
return x;
}
-// CHECK-LABEL: define void @"?foo@B@@QEAA?AUA@@U2@@Z"(%struct.B* {{[^,]*}} %this, %struct.A* noalias sret(%struct.A) align 4 %agg.result, %struct.A* %x)
+// CHECK-LABEL: define{{.*}} void @"?foo@B@@QEAA?AUA@@U2@@Z"(%struct.B* {{[^,]*}} %this, %struct.A* noalias sret(%struct.A) align 4 %agg.result, %struct.A* %x)
return 0;
}
-// CHECK: define i32 @main
+// CHECK: define{{.*}} i32 @main
// CHECK: call void @_ZN8UUIDTestI10TestStructL_Z42_GUID_eafa1952_66f8_438b_8fba_af1bbae42191EEC1Ev
// CHECK: call void @_ZN11UUIDTestTwoIL_Z42_GUID_eafa1952_66f8_438b_8fba_af1bbae42191EEC1Ev
// CHECK: call void @_ZN11UUIDTestTwoIL_Z42_GUID_eafa1952_66f8_438b_8fba_af1bbae42191EEC1Ev
#ifdef DEFINE_GUID
// Make sure we can properly generate code when the UUID has curly braces on it.
GUID thing = (side_effect(), __uuidof(Curly));
-// CHECK-DEFINE-GUID: @thing = global %struct._GUID zeroinitializer, align 4
-// CHECK-DEFINE-WRONG-GUID: @thing = global %struct._GUID zeroinitializer, align 4
+// CHECK-DEFINE-GUID: @thing ={{.*}} global %struct._GUID zeroinitializer, align 4
+// CHECK-DEFINE-WRONG-GUID: @thing ={{.*}} global %struct._GUID zeroinitializer, align 4
// This gets initialized in a static initializer.
-// CHECK-DEFINE-GUID: @g = global %struct._GUID zeroinitializer, align 4
-// CHECK-DEFINE-WRONG-GUID: @g = global %struct._GUID zeroinitializer, align 4
+// CHECK-DEFINE-GUID: @g ={{.*}} global %struct._GUID zeroinitializer, align 4
+// CHECK-DEFINE-WRONG-GUID: @g ={{.*}} global %struct._GUID zeroinitializer, align 4
GUID g = (side_effect(), __uuidof(S1));
-// CHECK-DEFINE-GUID: @const_init = global %struct._GUID { i32 305419896, i16 4660, i16 4660, [8 x i8] c"\124\124Vx\90\AC" }
-// CHECK-DEFINE-WRONG-GUID: @const_init = global %struct._GUID zeroinitializer
+// CHECK-DEFINE-GUID: @const_init ={{.*}} global %struct._GUID { i32 305419896, i16 4660, i16 4660, [8 x i8] c"\124\124Vx\90\AC" }
+// CHECK-DEFINE-WRONG-GUID: @const_init ={{.*}} global %struct._GUID zeroinitializer
GUID const_init = __uuidof(Curly);
#endif
// First global use of __uuidof(S1) forces the creation of the global.
// CHECK: @_GUID_12345678_1234_1234_1234_1234567890ab = linkonce_odr constant { i32, i16, i16, [8 x i8] } { i32 305419896, i16 4660, i16 4660, [8 x i8] c"\124\124Vx\90\AB" }, comdat
-// CHECK: @gr = constant %struct._GUID* bitcast ({ i32, i16, i16, [8 x i8] }* @_GUID_12345678_1234_1234_1234_1234567890ab to %struct._GUID*), align 4
-// CHECK-64: @gr = constant %struct._GUID* bitcast ({ i32, i16, i16, [8 x i8] }* @_GUID_12345678_1234_1234_1234_1234567890ab to %struct._GUID*), align 8
+// CHECK: @gr ={{.*}} constant %struct._GUID* bitcast ({ i32, i16, i16, [8 x i8] }* @_GUID_12345678_1234_1234_1234_1234567890ab to %struct._GUID*), align 4
+// CHECK-64: @gr ={{.*}} constant %struct._GUID* bitcast ({ i32, i16, i16, [8 x i8] }* @_GUID_12345678_1234_1234_1234_1234567890ab to %struct._GUID*), align 8
const GUID& gr = __uuidof(S1);
-// CHECK: @gp = global %struct._GUID* bitcast ({ i32, i16, i16, [8 x i8] }* @_GUID_12345678_1234_1234_1234_1234567890ab to %struct._GUID*), align 4
+// CHECK: @gp ={{.*}} global %struct._GUID* bitcast ({ i32, i16, i16, [8 x i8] }* @_GUID_12345678_1234_1234_1234_1234567890ab to %struct._GUID*), align 4
const GUID* gp = &__uuidof(S1);
-// CHECK: @cp = global %struct._GUID* bitcast ({ i32, i16, i16, [8 x i8] }* @_GUID_12345678_1234_1234_1234_1234567890ac to %struct._GUID*), align 4
+// CHECK: @cp ={{.*}} global %struct._GUID* bitcast ({ i32, i16, i16, [8 x i8] }* @_GUID_12345678_1234_1234_1234_1234567890ac to %struct._GUID*), align 4
const GUID* cp = &__uuidof(Curly);
// Special case: _uuidof(0)
-// CHECK: @zeroiid = constant %struct._GUID* bitcast ({ i32, i16, i16, [8 x i8] }* @_GUID_00000000_0000_0000_0000_000000000000 to %struct._GUID*), align 4
+// CHECK: @zeroiid ={{.*}} constant %struct._GUID* bitcast ({ i32, i16, i16, [8 x i8] }* @_GUID_00000000_0000_0000_0000_000000000000 to %struct._GUID*), align 4
const GUID& zeroiid = __uuidof(0);
// __uuidof(S2) hasn't been used globally yet, so it's emitted when it's used
long *rv = new long; // size_t is implicit in the new operator
return rv;
}
-// O32-LABEL: define i32* @_Z10alloc_longv()
+// O32-LABEL: define{{.*}} i32* @_Z10alloc_longv()
// O32: call noalias nonnull i8* @_Znwj(i32 signext 4)
-// N32-LABEL: define i32* @_Z10alloc_longv()
+// N32-LABEL: define{{.*}} i32* @_Z10alloc_longv()
// N32: call noalias nonnull i8* @_Znwj(i32 signext 4)
-// N64-LABEL: define i64* @_Z10alloc_longv()
+// N64-LABEL: define{{.*}} i64* @_Z10alloc_longv()
// N64: call noalias nonnull i8* @_Znwm(i64 zeroext 8)
long *alloc_long_array() {
return rv;
}
-// O32-LABEL: define i32* @_Z16alloc_long_arrayv()
+// O32-LABEL: define{{.*}} i32* @_Z16alloc_long_arrayv()
// O32: call noalias nonnull i8* @_Znaj(i32 signext 8)
-// N32-LABEL: define i32* @_Z16alloc_long_arrayv()
+// N32-LABEL: define{{.*}} i32* @_Z16alloc_long_arrayv()
// N32: call noalias nonnull i8* @_Znaj(i32 signext 8)
-// N64-LABEL: define i64* @_Z16alloc_long_arrayv()
+// N64-LABEL: define{{.*}} i64* @_Z16alloc_long_arrayv()
// N64: call noalias nonnull i8* @_Znam(i64 zeroext 16)
#include <stddef.h>
extern "C" char *something(long long x) {
}
-// CHECK: @_Znwm = alias i8* (i64), i8* (i64)* @something
+// CHECK: @_Znwm ={{.*}} alias i8* (i64), i8* (i64)* @something
void *operator new(size_t) __attribute__((alias("something")));
// PR16715: don't assert here.
~Throws();
};
-// CHECK-LABEL: define void @_Z7cleanupi
+// CHECK-LABEL: define{{.*}} void @_Z7cleanupi
void cleanup(int n) {
// CHECK: invoke void @_ZN6ThrowsC1Ei
// CHECK-NEXT: to label %{{[^ ]+}} unwind label %[[LPAD:[^ ]+]]
}
-// CHECK-LABEL: define void @_Z7cleanupv
+// CHECK-LABEL: define{{.*}} void @_Z7cleanupv
void cleanup() {
// CHECK: invoke void @_ZN6ThrowsC1Ei
// CHECK-NEXT: to label %{{[^ ]+}} unwind label %[[LPAD2:[^ ]+]]
// CHECK: @[[ABC4:.*]] = {{.*}} constant [4 x i8] c"abc\00"
// CHECK: @[[ABC15:.*]] = {{.*}} constant [15 x i8] c"abc\00\00\00\00
-// CHECK-LABEL: define void @_Z2fni
+// CHECK-LABEL: define{{.*}} void @_Z2fni
void fn(int n) {
// CHECK: icmp ult i{{32|64}} %{{[^ ]+}}, 3
// CHECK: store i32 1
new int[n] { 1, 2, 3 };
}
-// CHECK-LABEL: define void @_Z11const_exactv
+// CHECK-LABEL: define{{.*}} void @_Z11const_exactv
void const_exact() {
// CHECK-NOT: icmp ult i{{32|64}} %{{[^ ]+}}, 3
// CHECK-NOT: icmp eq i32*
new int[3] { 1, 2, 3 };
}
-// CHECK-LABEL: define void @_Z16const_sufficientv
+// CHECK-LABEL: define{{.*}} void @_Z16const_sufficientv
void const_sufficient() {
// CHECK-NOT: icmp ult i{{32|64}} %{{[^ ]+}}, 3
new int[4] { 1, 2, 3 };
// CHECK: ret void
}
-// CHECK-LABEL: define void @_Z22check_array_value_initv
+// CHECK-LABEL: define{{.*}} void @_Z22check_array_value_initv
void check_array_value_init() {
struct S;
new (int S::*[3][4][5]) ();
// CHECK: br i1
}
-// CHECK-LABEL: define void @_Z15string_nonconsti
+// CHECK-LABEL: define{{.*}} void @_Z15string_nonconsti
void string_nonconst(int n) {
// CHECK: icmp slt i{{32|64}} %{{[^ ]+}}, 4
// FIXME: Conditionally throw an exception rather than passing -1 to alloc function
new char[n] { "abc" };
}
-// CHECK-LABEL: define void @_Z12string_exactv
+// CHECK-LABEL: define{{.*}} void @_Z12string_exactv
void string_exact() {
// CHECK-NOT: icmp
// CHECK: %[[PTR:.*]] = call noalias nonnull i8* @_Zna{{.}}(i{{32|64}} 4)
new char[4] { "abc" };
}
-// CHECK-LABEL: define void @_Z17string_sufficientv
+// CHECK-LABEL: define{{.*}} void @_Z17string_sufficientv
void string_sufficient() {
// CHECK-NOT: icmp
// CHECK: %[[PTR:.*]] = call noalias nonnull i8* @_Zna{{.}}(i{{32|64}} 15)
new char[15] { "abc" };
}
-// CHECK-LABEL: define void @_Z10aggr_exactv
+// CHECK-LABEL: define{{.*}} void @_Z10aggr_exactv
void aggr_exact() {
// CHECK-NOT: icmp
// CHECK: %[[MEM:.*]] = call noalias nonnull i8* @_Zna{{.}}(i{{32|64}} 16)
new Aggr[2] { 1, 2, 3 };
}
-// CHECK-LABEL: define void @_Z15aggr_sufficienti
+// CHECK-LABEL: define{{.*}} void @_Z15aggr_sufficienti
void aggr_sufficient(int n) {
// CHECK: icmp ult i32 %{{.*}}, 2
// CHECK: %[[MEM:.*]] = call noalias nonnull i8* @_Zna{{.}}(
new Aggr[n] { 1, 2, 3 };
}
-// SIO-LABEL: define void @_Z14constexpr_testv
+// SIO-LABEL: define{{.*}} void @_Z14constexpr_testv
void constexpr_test() {
// SIO: call noalias nonnull i8* @_Zna{{.}}(i32 4)
new int[0+1]{0};
}
-// CHECK-LABEL: define void @_Z13unknown_boundv
+// CHECK-LABEL: define{{.*}} void @_Z13unknown_boundv
void unknown_bound() {
struct Aggr { int x, y, z; };
new Aggr[]{1, 2, 3, 4};
// CHECK: }
}
-// CHECK-LABEL: define void @_Z20unknown_bound_stringv
+// CHECK-LABEL: define{{.*}} void @_Z20unknown_bound_stringv
void unknown_bound_string() {
new char[]{"hello"};
// CHECK: call {{.*}}_Znaj(i32 6)
typedef A elt;
- // CHECK: define [[A:%.*]]* @_ZN5test04testEs(i16 signext
+ // CHECK: define{{.*}} [[A:%.*]]* @_ZN5test04testEs(i16 signext
// CHECK: [[N:%.*]] = sext i16 {{%.*}} to i32
// CHECK-NEXT: [[T0:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[N]], i32 4)
// CHECK-NEXT: [[T1:%.*]] = extractvalue { i32, i1 } [[T0]], 1
typedef A elt[100];
- // CHECK: define [100 x [[A:%.*]]]* @_ZN5test14testEs(i16 signext
+ // CHECK: define{{.*}} [100 x [[A:%.*]]]* @_ZN5test14testEs(i16 signext
// CHECK: [[N:%.*]] = sext i16 {{%.*}} to i32
// CHECK-NEXT: [[T0:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[N]], i32 400)
// CHECK-NEXT: [[T1:%.*]] = extractvalue { i32, i1 } [[T0]], 1
typedef A elt[100];
- // CHECK: define [100 x [[A:%.*]]]* @_ZN5test24testEs(i16 signext
+ // CHECK: define{{.*}} [100 x [[A:%.*]]]* @_ZN5test24testEs(i16 signext
// CHECK: [[N:%.*]] = sext i16 {{%.*}} to i32
// CHECK-NEXT: [[T0:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[N]], i32 400)
// CHECK-NEXT: [[T1:%.*]] = extractvalue { i32, i1 } [[T0]], 1
typedef A elt;
- // CHECK: define [[A:%.*]]* @_ZN5test44testEs(i16 signext
+ // CHECK: define{{.*}} [[A:%.*]]* @_ZN5test44testEs(i16 signext
// CHECK: [[N:%.*]] = sext i16 {{%.*}} to i32
// CHECK-NEXT: call noalias nonnull i8* @_Znaj(i32 [[N]])
// CHECK: getelementptr inbounds {{.*}}, i32 [[N]]
typedef A elt;
- // CHECK: define [[A:%.*]]* @_ZN5test54testEi(i32
+ // CHECK: define{{.*}} [[A:%.*]]* @_ZN5test54testEi(i32
// CHECK: [[N:%.*]] = load i32, i32*
// CHECK-NEXT: call noalias nonnull i8* @_Znaj(i32 [[N]])
// CHECK: getelementptr inbounds {{.*}}, i32 [[N]]
typedef A elt;
- // CHECK: define [[A:%.*]]* @_ZN5test64testEt(i16 zeroext
+ // CHECK: define{{.*}} [[A:%.*]]* @_ZN5test64testEt(i16 zeroext
// CHECK: [[N:%.*]] = zext i16 {{%.*}} to i32
// CHECK-NEXT: [[T0:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[N]], i32 4)
// CHECK-NEXT: [[T1:%.*]] = extractvalue { i32, i1 } [[T0]], 1
typedef A elt[100];
- // CHECK: define [100 x [[A:%.*]]]* @_ZN5test74testEt(i16 zeroext
+ // CHECK: define{{.*}} [100 x [[A:%.*]]]* @_ZN5test74testEt(i16 zeroext
// CHECK: [[N:%.*]] = zext i16 {{%.*}} to i32
// CHECK-NEXT: [[T0:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[N]], i32 400)
// CHECK-NEXT: [[T1:%.*]] = extractvalue { i32, i1 } [[T0]], 1
typedef A elt;
- // CHECK: define [[A:%.*]]* @_ZN5test84testEx(i64
+ // CHECK: define{{.*}} [[A:%.*]]* @_ZN5test84testEx(i64
// CHECK: [[N:%.*]] = load i64, i64*
// CHECK-NEXT: [[T1:%.*]] = trunc i64 [[N]] to i32
// CHECK-NEXT: [[T2:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[T1]], i32 4)
typedef A elt;
- // CHECK: define [[A:%.*]]* @_ZN5test94testEy(i64
+ // CHECK: define{{.*}} [[A:%.*]]* @_ZN5test94testEy(i64
// CHECK: [[N:%.*]] = load i64, i64*
// CHECK-NEXT: [[T1:%.*]] = trunc i64 [[N]] to i32
// CHECK-NEXT: [[T2:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[T1]], i32 4)
return new(1, 2, 3.45, 100) A;
}
-// CHECK-LABEL: define void @_Z3t11i
+// CHECK-LABEL: define{{.*}} void @_Z3t11i
struct B { int a; };
struct Bmemptr { int Bmemptr::* memptr; int a; };
struct Empty { };
// We don't need to initialize an empty class.
-// CHECK-LABEL: define void @_Z3t12v
+// CHECK-LABEL: define{{.*}} void @_Z3t12v
void t12() {
// CHECK: call noalias nonnull i8* @_Znam
// CHECK-NOT: br
}
// Zero-initialization
-// CHECK-LABEL: define void @_Z3t13i
+// CHECK-LABEL: define{{.*}} void @_Z3t13i
void t13(int n) {
// CHECK: call noalias nonnull i8* @_Znwm
// CHECK: store i32 0, i32*
namespace test15 {
struct A { A(); ~A(); };
- // CHECK-LABEL: define void @_ZN6test156test0aEPv(
+ // CHECK-LABEL: define{{.*}} void @_ZN6test156test0aEPv(
// CHECK: [[P:%.*]] = load i8*, i8**
// CHECK-NOT: icmp eq i8* [[P]], null
// CHECK-NOT: br i1
new (p) A();
}
- // CHECK-LABEL: define void @_ZN6test156test0bEPv(
+ // CHECK-LABEL: define{{.*}} void @_ZN6test156test0bEPv(
// CHECK: [[P0:%.*]] = load i8*, i8**
// CHECK: [[P:%.*]] = call i8* @_ZnwmPvb(i64 1, i8* [[P0]]
// CHECK-NEXT: icmp eq i8* [[P]], null
new (p, true) A();
}
- // CHECK-LABEL: define void @_ZN6test156test1aEPv(
+ // CHECK-LABEL: define{{.*}} void @_ZN6test156test1aEPv(
// CHECK: [[P:%.*]] = load i8*, i8**
// CHECK-NOT: icmp eq i8* [[P]], null
// CHECK-NOT: br i1
new (p) A[5];
}
- // CHECK-LABEL: define void @_ZN6test156test1bEPv(
+ // CHECK-LABEL: define{{.*}} void @_ZN6test156test1bEPv(
// CHECK: [[P0:%.*]] = load i8*, i8**
// CHECK: [[P:%.*]] = call i8* @_ZnamPvb(i64 13, i8* [[P0]]
// CHECK-NEXT: icmp eq i8* [[P]], null
// TODO: it's okay if all these size calculations get dropped.
// FIXME: maybe we should try to throw on overflow?
- // CHECK-LABEL: define void @_ZN6test155test2EPvi(
+ // CHECK-LABEL: define{{.*}} void @_ZN6test155test2EPvi(
// CHECK: [[N:%.*]] = load i32, i32*
// CHECK-NEXT: [[T0:%.*]] = sext i32 [[N]] to i64
// CHECK-NEXT: [[P:%.*]] = load i8*, i8**
namespace PR11523 {
class MyClass;
typedef int MyClass::* NewTy;
- // CHECK-LABEL: define i64* @_ZN7PR115231fEv
+ // CHECK-LABEL: define{{.*}} i64* @_ZN7PR115231fEv
// CHECK: store i64 -1
NewTy* f() { return new NewTy[2](); }
}
namespace PR13380 {
struct A { A() {} };
struct B : public A { int x; };
- // CHECK-LABEL: define i8* @_ZN7PR133801fEv
+ // CHECK-LABEL: define{{.*}} i8* @_ZN7PR133801fEv
// CHECK: call noalias nonnull i8* @_Znam(
// CHECK: call void @llvm.memset.p0i8
// CHECK-NEXT: call void @_ZN7PR133801BC1Ev
namespace N3664 {
struct S { S() throw(int); };
- // CHECK-LABEL: define void @_ZN5N36641fEv
+ // CHECK-LABEL: define{{.*}} void @_ZN5N36641fEv
void f() {
// CHECK: call noalias nonnull i8* @_Znwm(i64 4) [[ATTR_BUILTIN_NEW:#[^ ]*]]
int *p = new int; // expected-note {{allocated with 'new' here}}
// CHECK: declare i8* @_ZnamRKSt9nothrow_t(i64, {{.*}}) [[ATTR_NOBUILTIN_NOUNWIND_ALLOCSIZE:#[^ ]*]]
- // CHECK-LABEL: define void @_ZN5N36641gEv
+ // CHECK-LABEL: define{{.*}} void @_ZN5N36641gEv
void g() {
// It's OK for there to be attributes here, so long as we don't have a
// 'builtin' attribute.
}
namespace builtins {
- // CHECK-LABEL: define void @_ZN8builtins1fEv
+ // CHECK-LABEL: define{{.*}} void @_ZN8builtins1fEv
void f() {
// CHECK: call noalias nonnull i8* @_Znwm(i64 4) [[ATTR_BUILTIN_NEW]]
// CHECK: call void @_ZdlPv({{.*}}) [[ATTR_BUILTIN_DELETE]]
~X();
};
-// CHECK-LABEL: define void @_Z4Testv(
+// CHECK-LABEL: define{{.*}} void @_Z4Testv(
X Test()
{
X x;
// CHECK-CXX2A-DAG: @_ZN7PR422765State1mE = linkonce_odr constant [2 x { i64, i64 }] [{ {{.*}} @_ZN7PR422765State2f1Ev {{.*}}, i64 0 }, { {{.*}} @_ZN7PR422765State2f2Ev {{.*}}, i64 0 }], comdat
struct A { int x, y[2]; int arr[3]; };
-// CHECK-LABEL: define i32 @_Z1fi(
+// CHECK-LABEL: define{{.*}} i32 @_Z1fi(
int f(int i) {
// CHECK: call void {{.*}}memcpy{{.*}}({{.*}}, {{.*}} @__const._Z1fi.a
constexpr A a = {1, 2, 3, 4, 5, 6};
using l = void (State::*)();
static constexpr l m[]{&State::f1, &State::f2};
};
- // CHECK-LABEL: define void @_ZN7PR422765State16syncDirtyObjectsEv(
+ // CHECK-LABEL: define{{.*}} void @_ZN7PR422765State16syncDirtyObjectsEv(
void State::syncDirtyObjects() {
for (int i = 0; i < sizeof(m) / sizeof(m[0]); ++i)
// CHECK-CXX11: getelementptr inbounds [2 x { i64, i64 }], [2 x { i64, i64 }]* @_ZN7PR422765State1mE.const, i64 0, i64 %
struct A { ~A(); int n; char c[3]; };
struct B { [[no_unique_address]] A a; char k; };
-// CHECK-DAG: @b = global { i32, [3 x i8], i8 } { i32 1, [3 x i8] c"\02\03\04", i8 5 }
+// CHECK-DAG: @b ={{.*}} global { i32, [3 x i8], i8 } { i32 1, [3 x i8] c"\02\03\04", i8 5 }
B b = {1, 2, 3, 4, 5};
struct C : A {};
struct D : C {};
struct E { int e; [[no_unique_address]] D d; char k; };
-// CHECK-DAG: @e = global { i32, i32, [3 x i8], i8 } { i32 1, i32 2, [3 x i8] c"\03\04\05", i8 6 }
+// CHECK-DAG: @e ={{.*}} global { i32, i32, [3 x i8], i8 } { i32 1, i32 2, [3 x i8] c"\03\04\05", i8 6 }
E e = {1, 2, 3, 4, 5, 6};
struct Empty1 {};
int b;
[[no_unique_address]] Empty3 e3;
};
-// CHECK-DAG: @he = global %{{[^ ]*}} { i32 1, i32 2 }
+// CHECK-DAG: @he ={{.*}} global %{{[^ ]*}} { i32 1, i32 2 }
HasEmpty he = {{}, 1, {}, 2, {}};
struct HasEmptyDuplicates {
int b;
[[no_unique_address]] Empty1 e3; // +8
};
-// CHECK-DAG: @off1 = global i64 0
+// CHECK-DAG: @off1 ={{.*}} global i64 0
Empty1 HasEmptyDuplicates::*off1 = &HasEmptyDuplicates::e1;
-// CHECK-DAG: @off2 = global i64 4
+// CHECK-DAG: @off2 ={{.*}} global i64 4
Empty1 HasEmptyDuplicates::*off2 = &HasEmptyDuplicates::e2;
-// CHECK-DAG: @off3 = global i64 8
+// CHECK-DAG: @off3 ={{.*}} global i64 8
Empty1 HasEmptyDuplicates::*off3 = &HasEmptyDuplicates::e3;
-// CHECK-DAG: @hed = global %{{[^ ]*}} { i32 1, i32 2, [4 x i8] undef }
+// CHECK-DAG: @hed ={{.*}} global %{{[^ ]*}} { i32 1, i32 2, [4 x i8] undef }
HasEmptyDuplicates hed = {{}, 1, {}, 2, {}};
struct __attribute__((packed, aligned(2))) PackedAndPadded {
[[no_unique_address]] PackedAndPadded pap;
char d;
};
-// CHECK-DAG: @wpap = global <{ i8, i32, i8 }> <{ i8 1, i32 2, i8 3 }>
+// CHECK-DAG: @wpap ={{.*}} global <{ i8, i32, i8 }> <{ i8 1, i32 2, i8 3 }>
WithPackedAndPadded wpap = {1, 2, 3};
struct FieldOverlap {
int n;
};
static_assert(sizeof(FieldOverlap) == 4);
-// CHECK-DAG: @fo = global %{{[^ ]*}} { i32 1234 }
+// CHECK-DAG: @fo ={{.*}} global %{{[^ ]*}} { i32 1234 }
FieldOverlap fo = {{}, {}, {}, {}, 1234};
-// CHECK-DAG: @e1 = constant %[[E1:[^ ]*]]* bitcast (%[[FO:[^ ]*]]* @fo to %[[E1]]*)
+// CHECK-DAG: @e1 ={{.*}} constant %[[E1:[^ ]*]]* bitcast (%[[FO:[^ ]*]]* @fo to %[[E1]]*)
Empty1 &e1 = fo.e1;
-// CHECK-DAG: @e2 = constant %[[E1]]* bitcast (i8* getelementptr (i8, i8* bitcast (%[[FO]]* @fo to i8*), i64 1) to %[[E1]]*)
+// CHECK-DAG: @e2 ={{.*}} constant %[[E1]]* bitcast (i8* getelementptr (i8, i8* bitcast (%[[FO]]* @fo to i8*), i64 1) to %[[E1]]*)
Empty1 &e2 = fo.e2;
// CHECK-LABEL: accessE1
}
};
-// CHECK-LABEL: define void @_Z5test0v
-// CHECK-EH-LABEL: define void @_Z5test0v
+// CHECK-LABEL: define{{.*}} void @_Z5test0v
+// CHECK-EH-LABEL: define{{.*}} void @_Z5test0v
X test0() {
X x;
// CHECK: call {{.*}} @_ZN1XC1Ev
return x;
}
-// CHECK-LABEL: define void @_Z5test1b(
-// CHECK-EH-LABEL: define void @_Z5test1b(
+// CHECK-LABEL: define{{.*}} void @_Z5test1b(
+// CHECK-EH-LABEL: define{{.*}} void @_Z5test1b(
X test1(bool B) {
// CHECK: call {{.*}} @_ZN1XC1Ev
// CHECK-NEXT: ret void
// CHECK-EH-NEXT: ret void
}
-// CHECK-LABEL: define void @_Z5test2b
-// CHECK-EH-LABEL: define void @_Z5test2b
+// CHECK-LABEL: define{{.*}} void @_Z5test2b
+// CHECK-EH-LABEL: define{{.*}} void @_Z5test2b
// CHECK-EH-SAME: personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
X test2(bool B) {
// No NRVO.
}
-// CHECK-LABEL: define void @_Z5test3b
+// CHECK-LABEL: define{{.*}} void @_Z5test3b
X test3(bool B) {
// CHECK: call {{.*}} @_ZN1XC1Ev
// CHECK-NOT: call {{.*}} @_ZN1XC1ERKS_
extern "C" void exit(int) throw();
-// CHECK-LABEL: define void @_Z5test4b
+// CHECK-LABEL: define{{.*}} void @_Z5test4b
X test4(bool B) {
{
// CHECK: call {{.*}} @_ZN1XC1Ev
}
#ifdef __EXCEPTIONS
-// CHECK-EH-LABEL: define void @_Z5test5
+// CHECK-EH-LABEL: define{{.*}} void @_Z5test5
void may_throw();
X test5() {
try {
#endif
// rdar://problem/10430868
-// CHECK-LABEL: define void @_Z5test6v
+// CHECK-LABEL: define{{.*}} void @_Z5test6v
X test6() {
X a __attribute__((aligned(8)));
return a;
// CHECK-NEXT: ret void
}
-// CHECK-LABEL: define void @_Z5test7b
+// CHECK-LABEL: define{{.*}} void @_Z5test7b
X test7(bool b) {
// CHECK: call {{.*}} @_ZN1XC1Ev
// CHECK-NEXT: ret
return X();
}
-// CHECK-LABEL: define void @_Z5test8b
+// CHECK-LABEL: define{{.*}} void @_Z5test8b
X test8(bool b) {
// CHECK: call {{.*}} @_ZN1XC1Ev
// CHECK-NEXT: ret
// Make sure noalias is added to indirect arguments with trivially copyable types
// if -fpass-by-value-is-noalias is provided.
-// WITH_NOALIAS: define void @_Z4take3Foo(%struct.Foo* noalias %arg)
-// NO_NOALIAS: define void @_Z4take3Foo(%struct.Foo* %arg)
+// WITH_NOALIAS: define{{.*}} void @_Z4take3Foo(%struct.Foo* noalias %arg)
+// NO_NOALIAS: define{{.*}} void @_Z4take3Foo(%struct.Foo* %arg)
void take(Foo arg) {}
int G;
// Make sure noalias is not added to indirect arguments that are not trivially
// copyable even if -fpass-by-value-is-noalias is provided.
-// WITH_NOALIAS: define void @_Z4take10NonTrivial(%struct.NonTrivial* %arg)
-// NO_NOALIAS: define void @_Z4take10NonTrivial(%struct.NonTrivial* %arg)
+// WITH_NOALIAS: define{{.*}} void @_Z4take10NonTrivial(%struct.NonTrivial* %arg)
+// NO_NOALIAS: define{{.*}} void @_Z4take10NonTrivial(%struct.NonTrivial* %arg)
void take(NonTrivial arg) {}
// Escape examples. Pointers to the objects passed to take() may escape, depending on whether a temporary copy is created or not (e.g. due to NRVO).
};
A *p;
-// WITH_NOALIAS: define void @_Z4take1A(%struct.A* noalias %arg)
-// NO_NOALIAS: define void @_Z4take1A(%struct.A* %arg)
+// WITH_NOALIAS: define{{.*}} void @_Z4take1A(%struct.A* noalias %arg)
+// NO_NOALIAS: define{{.*}} void @_Z4take1A(%struct.A* %arg)
void take(A arg) {}
-// WITH_NOALIAS: define void @_Z7CreateAPP1A(%struct.A* noalias sret(%struct.A) align 1 %agg.result, %struct.A** %where)
-// NO_NOALIAS: define void @_Z7CreateAPP1A(%struct.A* noalias sret(%struct.A) align 1 %agg.result, %struct.A** %where)
+// WITH_NOALIAS: define{{.*}} void @_Z7CreateAPP1A(%struct.A* noalias sret(%struct.A) align 1 %agg.result, %struct.A** %where)
+// NO_NOALIAS: define{{.*}} void @_Z7CreateAPP1A(%struct.A* noalias sret(%struct.A) align 1 %agg.result, %struct.A** %where)
A CreateA(A **where) {
A justlikethis;
*where = &justlikethis; //Escaped pointer 2 (should also be UB, then)
one = two;
}
-// CHECK: define void @_Z5byval1SS_(%struct.S* %one, %struct.S* %two)
+// CHECK: define{{.*}} void @_Z5byval1SS_(%struct.S* %one, %struct.S* %two)
bool f(bool *x) {
return *x;
}
-// CHECK-LABEL: define zeroext i1 @_Z1fPb
+// CHECK-LABEL: define{{.*}} zeroext i1 @_Z1fPb
// CHECK: load i8, i8* %{{[^ ]*}}, align 1, !range [[RANGE_i8_0_2:![^ ]*]]
// Only enum-tests follow. Ensure that after the bool test, no further range
// metadata shows up when strict enums are disabled.
-// NO-STRICT-ENUMS-LABEL: define zeroext i1 @_Z1fPb
+// NO-STRICT-ENUMS-LABEL: define{{.*}} zeroext i1 @_Z1fPb
// NO-STRICT-ENUMS: load i8, i8* %{{[^ ]*}}, align 1, !range
// NO-STRICT-ENUMS-NOT: !range
e1 g1(e1 *x) {
return *x;
}
-// CHECK-LABEL: define i32 @_Z2g1P2e1
+// CHECK-LABEL: define{{.*}} i32 @_Z2g1P2e1
// CHECK: ret i32 0
enum e2 { e2_a = 0 };
e2 g2(e2 *x) {
return *x;
}
-// CHECK-LABEL: define i32 @_Z2g2P2e2
+// CHECK-LABEL: define{{.*}} i32 @_Z2g2P2e2
// CHECK: ret i32 0
enum e3 { e3_a = 16 };
e3 g3(e3 *x) {
return *x;
}
-// CHECK-LABEL: define i32 @_Z2g3P2e3
+// CHECK-LABEL: define{{.*}} i32 @_Z2g3P2e3
// CHECK: load i32, i32* %x, align 4, !range [[RANGE_i32_0_32:![^ ]*]]
enum e4 { e4_a = -16};
e4 g4(e4 *x) {
return *x;
}
-// CHECK-LABEL: define i32 @_Z2g4P2e4
+// CHECK-LABEL: define{{.*}} i32 @_Z2g4P2e4
// CHECK: load i32, i32* %x, align 4, !range [[RANGE_i32_m16_16:![^ ]*]]
enum e5 { e5_a = -16, e5_b = 16};
e5 g5(e5 *x) {
return *x;
}
-// CHECK-LABEL: define i32 @_Z2g5P2e5
+// CHECK-LABEL: define{{.*}} i32 @_Z2g5P2e5
// CHECK: load i32, i32* %x, align 4, !range [[RANGE_i32_m32_32:![^ ]*]]
enum e6 { e6_a = -1 };
e6 g6(e6 *x) {
return *x;
}
-// CHECK-LABEL: define i32 @_Z2g6P2e6
+// CHECK-LABEL: define{{.*}} i32 @_Z2g6P2e6
// CHECK: load i32, i32* %x, align 4, !range [[RANGE_i32_m1_1:![^ ]*]]
enum e7 { e7_a = -16, e7_b = 2};
e7 g7(e7 *x) {
return *x;
}
-// CHECK-LABEL: define i32 @_Z2g7P2e7
+// CHECK-LABEL: define{{.*}} i32 @_Z2g7P2e7
// CHECK: load i32, i32* %x, align 4, !range [[RANGE_i32_m16_16]]
enum e8 { e8_a = -17};
e8 g8(e8 *x) {
return *x;
}
-// CHECK-LABEL: define i32 @_Z2g8P2e8
+// CHECK-LABEL: define{{.*}} i32 @_Z2g8P2e8
// CHECK: load i32, i32* %x, align 4, !range [[RANGE_i32_m32_32:![^ ]*]]
enum e9 { e9_a = 17};
e9 g9(e9 *x) {
return *x;
}
-// CHECK-LABEL: define i32 @_Z2g9P2e9
+// CHECK-LABEL: define{{.*}} i32 @_Z2g9P2e9
// CHECK: load i32, i32* %x, align 4, !range [[RANGE_i32_0_32]]
enum e10 { e10_a = -16, e10_b = 32};
e10 g10(e10 *x) {
return *x;
}
-// CHECK-LABEL: define i32 @_Z3g10P3e10
+// CHECK-LABEL: define{{.*}} i32 @_Z3g10P3e10
// CHECK: load i32, i32* %x, align 4, !range [[RANGE_i32_m64_64:![^ ]*]]
enum e11 {e11_a = 4294967296 };
enum e11 g11(enum e11 *x) {
return *x;
}
-// CHECK-LABEL: define i64 @_Z3g11P3e11
+// CHECK-LABEL: define{{.*}} i64 @_Z3g11P3e11
// CHECK: load i64, i64* %x, align {{[84]}}, !range [[RANGE_i64_0_2pow33:![^ ]*]]
enum e12 {e12_a = 9223372036854775808U };
enum e12 g12(enum e12 *x) {
return *x;
}
-// CHECK-LABEL: define i64 @_Z3g12P3e12
+// CHECK-LABEL: define{{.*}} i64 @_Z3g12P3e12
// CHECK: load i64, i64* %x, align {{[84]}}
// CHECK-NOT: range
// CHECK: ret
e13 g13(e13 *x) {
return *x;
}
-// CHECK-LABEL: define signext i8 @_Z3g13P3e13
+// CHECK-LABEL: define{{.*}} signext i8 @_Z3g13P3e13
// CHECK: load i8, i8* %x, align 1
// CHECK-NOT: range
// CHECK: ret
e14 g14(e14 *x) {
return *x;
}
-// CHECK-LABEL: define i32 @_Z3g14P3e14
+// CHECK-LABEL: define{{.*}} i32 @_Z3g14P3e14
// CHECK: load i32, i32* %x, align 4
// CHECK-NOT: range
// CHECK: ret
e15 g15(e15 *x) {
return *x;
}
-// CHECK-LABEL: define i32 @_Z3g15P3e15
+// CHECK-LABEL: define{{.*}} i32 @_Z3g15P3e15
// CHECK: load i32, i32* %x, align 4
// CHECK-NOT: range
// CHECK: ret
e16 g16(e16 *x) {
return *x;
}
-// CHECK-LABEL: define i32 @_Z3g16P3e16
+// CHECK-LABEL: define{{.*}} i32 @_Z3g16P3e16
// CHECK: load i32, i32* %x, align 4
// CHECK-NOT: range
// CHECK: ret
};
foo::foo() {
- // CHECK-LABEL: define void @_ZN3fooC2Ev(%struct.foo* inreg %this)
- // CHECK-LABEL: define void @_ZN3fooC1Ev(%struct.foo* inreg %this)
+ // CHECK-LABEL: define{{.*}} void @_ZN3fooC2Ev(%struct.foo* inreg %this)
+ // CHECK-LABEL: define{{.*}} void @_ZN3fooC1Ev(%struct.foo* inreg %this)
}
foo::~foo() {
- // CHECK-LABEL: define void @_ZN3fooD2Ev(%struct.foo* inreg %this)
- // CHECK-LABEL: define void @_ZN3fooD1Ev(%struct.foo* inreg %this)
+ // CHECK-LABEL: define{{.*}} void @_ZN3fooD2Ev(%struct.foo* inreg %this)
+ // CHECK-LABEL: define{{.*}} void @_ZN3fooD1Ev(%struct.foo* inreg %this)
}
void dummy() {
}
// Test that we did not crash, by checking whether function was created.
-// CHECK-LABEL: define void @_Z4funcv() #0 {
+// CHECK-LABEL: define{{.*}} void @_Z4funcv() #0 {
// CHECK: ret void
// CHECK: }
// RUN: %clang_cc1 -o - -emit-llvm -triple x86_64-linux-pc %s | FileCheck %s
int(&&intu_rvref)[] {1,2,3,4};
// CHECK: @_ZGR10intu_rvref_ = internal global [4 x i32] [i32 1, i32 2, i32 3, i32 4]
-// CHECK: @intu_rvref = constant [4 x i32]* @_ZGR10intu_rvref_
+// CHECK: @intu_rvref ={{.*}} constant [4 x i32]* @_ZGR10intu_rvref_
void foo() {
static const int(&&intu_rvref)[] {1,2,3,4};
static int y;
};
int x2::y = 10;
-// CHECK: @_ZN2x21yE = global
+// CHECK: @_ZN2x21yE ={{.*}} global
#pragma GCC visibility pop
#pragma GCC visibility push(hidden)
#pragma GCC visibility push(hidden)
namespace n __attribute((visibility("default"))) {
void f() {}
- // CHECK-LABEL: define void @_ZN1n1fEv
+ // CHECK-LABEL: define{{.*}} void @_ZN1n1fEv
}
#pragma GCC visibility pop
}
extern "C" {
int foo() { return 1; }
-// CHECK: define i32 @bar()
+// CHECK: define{{.*}} i32 @bar()
}
// Check that #pragma redefine_extname applies to C code only, and shouldn't be
// applied to C++.
#pragma redefine_extname foo_cpp bar_cpp
extern int foo_cpp() { return 1; }
-// CHECK-NOT: define i32 @bar_cpp()
+// CHECK-NOT: define{{.*}} i32 @bar_cpp()
int __regcall foo (int i){
return i;
}
-// CHECK-LIN: define x86_regcallcc {{.+}}@_Z15__regcall3__foo
+// CHECK-LIN: define{{.*}} x86_regcallcc {{.+}}@_Z15__regcall3__foo
// CHECK-WIN64: define dso_local x86_regcallcc {{.+}}@"?foo@@YwHH@Z"
// CHECK-WIN32: define dso_local x86_regcallcc {{.+}}@"?foo@@YwHH@Z"
};
bool __regcall operator ==(const test_class&, const test_class&){ --x; return false;}
-// CHECK-LIN-DAG: define x86_regcallcc zeroext i1 @_ZeqRK10test_classS1_
+// CHECK-LIN-DAG: define{{.*}} x86_regcallcc zeroext i1 @_ZeqRK10test_classS1_
// CHECK-WIN64-DAG: define dso_local x86_regcallcc zeroext i1 @"??8@Yw_NAEBVtest_class@@0@Z"
// CHECK-WIN32-DAG: define dso_local x86_regcallcc zeroext i1 @"??8@Yw_NABVtest_class@@0@Z"
test_class __regcall operator""_test_class (unsigned long long) { ++x; return test_class{};}
-// CHECK-LIN64-DAG: define x86_regcallcc void @_Zli11_test_classy(%class.test_class* noalias sret(%class.test_class) align 4 %agg.result, i64 %0)
-// CHECK-LIN32-DAG: define x86_regcallcc void @_Zli11_test_classy(%class.test_class* inreg noalias sret(%class.test_class) align 4 %agg.result, i64 %0)
+// CHECK-LIN64-DAG: define{{.*}} x86_regcallcc void @_Zli11_test_classy(%class.test_class* noalias sret(%class.test_class) align 4 %agg.result, i64 %0)
+// CHECK-LIN32-DAG: define{{.*}} x86_regcallcc void @_Zli11_test_classy(%class.test_class* inreg noalias sret(%class.test_class) align 4 %agg.result, i64 %0)
// CHECK-WIN64-DAG: ??__K_test_class@@Yw?AVtest_class@@_K@Z"
// CHECK-WIN32-DAG: ??__K_test_class@@Yw?AVtest_class@@_K@Z"
long double _Complex __regcall foo(long double _Complex f) {
return f;
}
-// CHECK-LIN64-DAG: define x86_regcallcc void @_Z15__regcall3__fooCe({ x86_fp80, x86_fp80 }* noalias sret({ x86_fp80, x86_fp80 }) align 16 %agg.result, { x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %f)
-// CHECK-LIN32-DAG: define x86_regcallcc void @_Z15__regcall3__fooCe({ x86_fp80, x86_fp80 }* inreg noalias sret({ x86_fp80, x86_fp80 }) align 4 %agg.result, { x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 4 %f)
+// CHECK-LIN64-DAG: define{{.*}} x86_regcallcc void @_Z15__regcall3__fooCe({ x86_fp80, x86_fp80 }* noalias sret({ x86_fp80, x86_fp80 }) align 16 %agg.result, { x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %f)
+// CHECK-LIN32-DAG: define{{.*}} x86_regcallcc void @_Z15__regcall3__fooCe({ x86_fp80, x86_fp80 }* inreg noalias sret({ x86_fp80, x86_fp80 }) align 4 %agg.result, { x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 4 %f)
// CHECK-WIN64-DAG: define dso_local x86_regcallcc { double, double } @"?foo@@YwU?$_Complex@O@__clang@@U12@@Z"(double %f.0, double %f.1)
// CHECK-WIN32-DAG: define dso_local x86_regcallcc { double, double } @"?foo@@YwU?$_Complex@O@__clang@@U12@@Z"(double %f.0, double %f.1)
// CHECK-DAG: @_ZTIM1ADoFvvE = linkonce_odr constant { i8*, i8*, i32, i8*, i8* } { i8* bitcast (i8** getelementptr inbounds (i8*, i8** @_ZTVN10__cxxabiv129__pointer_to_member_type_infoE, i64 2) to i8*), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @_ZTSM1ADoFvvE, i32 0, i32 0), i32 64, i8* bitcast ({ i8*, i8* }* @_ZTIFvvE to i8*), i8* bitcast ({ i8*, i8* }* @_ZTI1A to i8*) }, comdat
auto &ti_noexcept_memptr = typeid(void (A::*)() noexcept);
-// CHECK-LABEL: define void @_Z1fv(
+// CHECK-LABEL: define{{.*}} void @_Z1fv(
__attribute__((noreturn)) void f() noexcept {
// CHECK: call void @__cxa_throw({{.*}}@_ZTIPDoFvvE
throw f;
}
-// CHECK-LABEL: define void @_Z1gM1ADoFvvE(
+// CHECK-LABEL: define{{.*}} void @_Z1gM1ADoFvvE(
void g(__attribute__((noreturn)) void (A::*p)() noexcept) {
// CHECK: call void @__cxa_throw({{.*}}@_ZTIM1ADoFvvE
throw p;
~NontrivialDtor();
};
-// CHECK-LABEL: define void @_Z33cleanupsAreEmittedWithoutTryCatchv
+// CHECK-LABEL: define{{.*}} void @_Z33cleanupsAreEmittedWithoutTryCatchv
void cleanupsAreEmittedWithoutTryCatch() {
// CHECK: %[[CLEAN:[^ ]+]] = bitcast %struct.NontrivialDtor* %{{[^ ]+}} to i8*
// CHECK: call void @llvm.lifetime.start.p0i8({{[^,]+}}, i8* nonnull %[[CLEAN]])
getLarge();
}
-// CHECK-LABEL: define void @_Z30cleanupsAreEmittedWithTryCatchv
+// CHECK-LABEL: define{{.*}} void @_Z30cleanupsAreEmittedWithTryCatchv
void cleanupsAreEmittedWithTryCatch() {
// CHECK: %[[CLEAN:[^ ]+]] = bitcast %struct.NontrivialDtor* %{{[^ ]+}} to i8*
// CHECK: call void @llvm.lifetime.start.p0i8({{[^,]+}}, i8* nonnull %[[CLEAN]])
getLarge();
}
-// CHECK-LABEL: define void @_Z39cleanupInTryHappensBeforeCleanupInCatchv
+// CHECK-LABEL: define{{.*}} void @_Z39cleanupInTryHappensBeforeCleanupInCatchv
void cleanupInTryHappensBeforeCleanupInCatch() {
// CHECK: %[[T1:[^ ]+]] = bitcast %struct.Large* %{{[^ ]+}} to i8*
// CHECK: call void @llvm.lifetime.start.p0i8({{[^,]+}}, i8* nonnull %[[T1]])
extern "C" {
void small_rvoed_unnamed_temporary_object() {
-// CHECK-LABEL: define void @small_rvoed_unnamed_temporary_object
+// CHECK-LABEL: define{{.*}} void @small_rvoed_unnamed_temporary_object
// CHECK: call void @llvm.lifetime.start
// CHECK: call void @_Z9foo_smallv
// CHECK: call void @llvm.lifetime.end
}
void large_rvoed_unnamed_temporary_object() {
-// CHECK-LABEL: define void @large_rvoed_unnamed_temporary_object
+// CHECK-LABEL: define{{.*}} void @large_rvoed_unnamed_temporary_object
// CHECK: call void @llvm.lifetime.start
// CHECK: call void @_Z9foo_largev
// CHECK: call void @llvm.lifetime.end
}
void small_rvoed_named_temporary_object() {
-// CHECK-LABEL: define void @small_rvoed_named_temporary_object
+// CHECK-LABEL: define{{.*}} void @small_rvoed_named_temporary_object
// CHECK: call void @llvm.lifetime.start
// CHECK: call void @_Z9foo_smallv
// CHECK: call void @llvm.lifetime.end
}
void large_rvoed_named_temporary_object() {
-// CHECK-LABEL: define void @large_rvoed_named_temporary_object
+// CHECK-LABEL: define{{.*}} void @large_rvoed_named_temporary_object
// CHECK: call void @llvm.lifetime.start
// CHECK: call void @_Z9foo_largev
// CHECK: call void @llvm.lifetime.end
}
void small_auto_object() {
-// CHECK-LABEL: define void @small_auto_object
+// CHECK-LABEL: define{{.*}} void @small_auto_object
// CHECK: call void @llvm.lifetime.start
// CHECK: call void @_Z9bar_smallP7S_small
// CHECK: call void @llvm.lifetime.end
}
void large_auto_object() {
-// CHECK-LABEL: define void @large_auto_object
+// CHECK-LABEL: define{{.*}} void @large_auto_object
// CHECK: call void @llvm.lifetime.start
// CHECK: call void @_Z9bar_largeP7S_large
// CHECK: call void @llvm.lifetime.end
}
int large_combiner_test(S_large s) {
-// CHECK-LABEL: define i32 @large_combiner_test
+// CHECK-LABEL: define{{.*}} i32 @large_combiner_test
// CHECK: [[T2:%.*]] = alloca %struct.Combiner
// CHECK: [[T1:%.*]] = alloca %struct.Combiner
// CHECK: [[T3:%.*]] = call %struct.Combiner* @_ZN8CombinerC1E7S_large(%struct.Combiner* {{[^,]*}} [[T1]], [9 x i32] %s.coerce)
// RUN: %clang_cc1 -triple x86_64-apple-darwin -emit-llvm -o - %s | \
// RUN: FileCheck --check-prefix=MACHO %s
-// CHECK: @_ZN5test11A1aE = constant i32 10, align 4
+// CHECK: @_ZN5test11A1aE ={{.*}} constant i32 10, align 4
// CHECK: @_ZN5test212_GLOBAL__N_11AIiE1xE = internal global i32 0, align 4
// CHECK: @_ZN5test31AIiE1xE = weak_odr global i32 0, comdat, align 4
// CHECK: @_ZGVN5test31AIiE1xE = weak_odr global i64 0, comdat($_ZN5test31AIiE1xE)
// MACHO: @_ZGVN5test31AIiE1xE = weak_odr global i64 0
// MACHO-NOT: comdat
-// CHECK: _ZN5test51U2k0E = global i32 0
-// CHECK: _ZN5test51U2k1E = global i32 0
-// CHECK: _ZN5test51U2k2E = constant i32 76
+// CHECK: _ZN5test51U2k0E ={{.*}} global i32 0
+// CHECK: _ZN5test51U2k1E ={{.*}} global i32 0
+// CHECK: _ZN5test51U2k2E ={{.*}} constant i32 76
// CHECK-NOT: test51U2k3E
// CHECK-NOT: test51U2k4E
};
int f(A *a) {
- // CHECK-LABEL: define i32 @_ZN5test41fEPNS_1AE
+ // CHECK-LABEL: define{{.*}} i32 @_ZN5test41fEPNS_1AE
// CHECK: ret i32 76
return a->n;
}
union QDSUnion { float32x4_t q; float s[4]; };
constexpr float32x4_t a = {1,2,3,4};
QDSUnion t = {{(a)}};
-// CHECK: @t = global %union.QDSUnion { <4 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00> }
+// CHECK: @t ={{.*}} global %union.QDSUnion { <4 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00> }
// RUN: %clang_cc1 %s -triple=x86_64-pc-linuxs -emit-llvm -std=c++11 -o - | FileCheck -check-prefix=CHECK -check-prefix=CHECK11 %s
// CHECK: @_ZZ1hvE1i = internal global i32 0, align 4
-// CHECK: @base_req = global [4 x i8] c"foo\00", align 1
-// CHECK: @base_req_uchar = global [4 x i8] c"bar\00", align 1
+// CHECK: @base_req ={{.*}} global [4 x i8] c"foo\00", align 1
+// CHECK: @base_req_uchar ={{.*}} global [4 x i8] c"bar\00", align 1
// CHECK: @_ZZN5test31BC1EvE1u = internal global { i8, [3 x i8] } { i8 97, [3 x i8] undef }, align 4
B::B() {
static int x = foo();
}
- // CHECK-LABEL: define void @_ZN5test21BC2Ev
+ // CHECK-LABEL: define{{.*}} void @_ZN5test21BC2Ev
// CHECK: load atomic i8, i8* bitcast (i64* @_ZGVZN5test21BC1EvE1x to i8*) acquire,
// CHECK: call i32 @__cxa_guard_acquire(i64* @_ZGVZN5test21BC1EvE1x)
// CHECK: [[T0:%.*]] = call i32 @_ZN5test23fooEv()
// CHECK: store i32 [[T0]], i32* @_ZZN5test21BC1EvE1x,
// CHECK: call void @__cxa_guard_release(i64* @_ZGVZN5test21BC1EvE1x)
- // CHECK-LABEL: define void @_ZN5test21BC1Ev
+ // CHECK-LABEL: define{{.*}} void @_ZN5test21BC1Ev
// CHECK: load atomic i8, i8* bitcast (i64* @_ZGVZN5test21BC1EvE1x to i8*) acquire,
// CHECK: call i32 @__cxa_guard_acquire(i64* @_ZGVZN5test21BC1EvE1x)
// CHECK: [[T0:%.*]] = call i32 @_ZN5test23fooEv()
B::~B() {
static int y = foo();
}
- // CHECK-LABEL: define void @_ZN5test21BD2Ev(
+ // CHECK-LABEL: define{{.*}} void @_ZN5test21BD2Ev(
// CHECK: load atomic i8, i8* bitcast (i64* @_ZGVZN5test21BD1EvE1y to i8*) acquire,
// CHECK: call i32 @__cxa_guard_acquire(i64* @_ZGVZN5test21BD1EvE1y)
// CHECK: [[T0:%.*]] = call i32 @_ZN5test23fooEv()
// CHECK: store i32 [[T0]], i32* @_ZZN5test21BD1EvE1y,
// CHECK: call void @__cxa_guard_release(i64* @_ZGVZN5test21BD1EvE1y)
- // CHECK-LABEL: define void @_ZN5test21BD1Ev(
+ // CHECK-LABEL: define{{.*}} void @_ZN5test21BD1Ev(
// CHECK: call void @_ZN5test21BD2Ev(
}
union U { char x; int i; };
static U u = { 'a' };
}
- // CHECK-LABEL: define void @_ZN5test31BC2Ev(
- // CHECK-LABEL: define void @_ZN5test31BC1Ev(
+ // CHECK-LABEL: define{{.*}} void @_ZN5test31BC2Ev(
+ // CHECK-LABEL: define{{.*}} void @_ZN5test31BC1Ev(
}
// We forgot to set the comdat when replacing the global with a different type.
static thread_local inline S thread_local_inline_member;
};
-// CHECK-LABEL: define void @_Z1fv()
+// CHECK-LABEL: define{{.*}} void @_Z1fv()
void f() {
// CHECK: load atomic i8, i8* bitcast (i64* @_ZGVZ1fvE12static_local to i8*) acquire,
// CHECK: icmp eq i8 {{.*}}, 0
return *decltype(deduced_return())()();
}
-// CHECK-LABEL: define i32 @call_deduced_return_operator()
+// CHECK-LABEL: define{{.*}} i32 @call_deduced_return_operator()
// CHECK: call i32* @_ZZL14deduced_returnvEN1SclEv(
// CHECK: load i32, i32* %
// CHECK: ret i32 %
return *decltype(block_deduced_return())()();
}
-// CHECK-LABEL: define i32 @call_block_deduced_return()
+// CHECK-LABEL: define{{.*}} i32 @call_block_deduced_return()
// CHECK: call i32* @_ZZZL20block_deduced_returnvEUb_EN1SclEv(
// CHECK: load i32, i32* %
// CHECK: ret i32 %
extern "C" int use_global_lambda() {
return *decltype(global_lambda())::get();
}
-// CHECK-LABEL: define i32 @use_global_lambda()
+// CHECK-LABEL: define{{.*}} i32 @use_global_lambda()
// CHECK: call i32* @"_ZZNK3$_2clEvEN1S3getEv"()
// CHECK-LABEL: define internal i32* @"_ZZNK3$_2clEvEN1S3getEv"()
enum byte : unsigned char {};
}
-// CHECK-LABEL: define void @test0(
+// CHECK-LABEL: define{{.*}} void @test0(
extern "C" void test0(std::byte *sb, int *i) {
// CHECK: store i8 0, i8* %{{.*}} !tbaa [[TAG_CHAR:!.*]]
*sb = std::byte{0};
// Make sure we don't get confused with other enums named 'byte'.
-// CHECK-LABEL: define void @test1(
+// CHECK-LABEL: define{{.*}} void @test1(
extern "C" void test1(::byte *b, ::my::byte *mb, ::my::std::byte *msb) {
*b = ::byte{0};
*mb = ::my::byte{0};
}
};
-// CHECK-LABEL: define void @_Z4testv()
+// CHECK-LABEL: define{{.*}} void @_Z4testv()
void test( void ) {
// CHECK: call void @_ZN1CC1Ev(%class.C* {{[^,]*}} [[C:%.+]])
C c;
} catch (...) { }
}
-// CHECK-LABEL: define void @_Z1fv
+// CHECK-LABEL: define{{.*}} void @_Z1fv
// CHECK: call void @_ZN5ErrorC1ERK1X
// CHECK: invoke void @__cxa_throw
// CHECK: landingpad
int test5(bool x, bool y, int z) {
return (x ? throw 1 : y) ? z : throw 2;
}
-// CHECK-LABEL: define i32 @_Z5test5bbi(
+// CHECK-LABEL: define{{.*}} i32 @_Z5test5bbi(
// CHECK: br i1
//
// x.true:
int test6(bool x, bool y, int z) {
return (x ? throw 1 : y) ? z : (throw 2);
}
-// CHECK-LABEL: define i32 @_Z5test6bbi(
+// CHECK-LABEL: define{{.*}} i32 @_Z5test6bbi(
// CHECK: br i1
//
// x.true:
}
}
-// CHECK-LABEL: define void @_Z5test7b(
+// CHECK-LABEL: define{{.*}} void @_Z5test7b(
void test7(bool cond) {
// CHECK: br i1
//
cond ? throw test7 : val;
}
-// CHECK-LABEL: define nonnull align 4 dereferenceable(4) i32* @_Z5test8b(
+// CHECK-LABEL: define{{.*}} nonnull align 4 dereferenceable(4) i32* @_Z5test8b(
int &test8(bool cond) {
// CHECK: br i1
//
virtual void f();
};
-// CHECK-LABEL: define void @_ZThn8_N5Test11C1fEv(
+// CHECK-LABEL: define{{.*}} void @_ZThn8_N5Test11C1fEv(
// CHECK-DBG-NOT: dbg.declare
// CHECK: ret void
//
virtual void f();
};
-// CHECK-LABEL: define void @_ZTv0_n24_N5Test21B1fEv(
+// CHECK-LABEL: define{{.*}} void @_ZTv0_n24_N5Test21B1fEv(
// CHECK-DBG-NOT: dbg.declare
// CHECK: ret void
void B::f() { }
virtual V2 *f();
};
-// CHECK: define %{{.*}}* @_ZTch0_v0_n24_N5Test31B1fEv(
+// CHECK: define{{.*}} %{{.*}}* @_ZTch0_v0_n24_N5Test31B1fEv(
// WIN64: define weak_odr dso_local %{{.*}} @"?f@B@Test3@@QEAAPEAUV1@2@XZ"(
V2 *B::f() { return 0; }
virtual X f();
};
- // CHECK-LABEL: define void @_ZThn16_N5Test66Thunks1fEv
+ // CHECK-LABEL: define{{.*}} void @_ZThn16_N5Test66Thunks1fEv
// CHECK-DBG-NOT: dbg.declare
// CHECK-NOT: memcpy
// CHECK: {{call void @_ZN5Test66Thunks1fEv.*sret(.+) align 1}}
void D::baz(X, X&, _Complex float, Small, Small&, Large) { }
- // CHECK-LABEL: define void @_ZThn8_N5Test71D3bazENS_1XERS1_CfNS_5SmallERS4_NS_5LargeE(
+ // CHECK-LABEL: define{{.*}} void @_ZThn8_N5Test71D3bazENS_1XERS1_CfNS_5SmallERS4_NS_5LargeE(
// CHECK-DBG-NOT: dbg.declare
// CHECK-NOT: memcpy
// CHECK: ret void
struct B { virtual void bar(NonPOD); };
struct C : A, B { virtual void bar(NonPOD); static void helper(NonPOD); };
- // CHECK: define void @_ZN5Test81C6helperENS_6NonPODE([[NONPODTYPE:%.*]]*
+ // CHECK: define{{.*}} void @_ZN5Test81C6helperENS_6NonPODE([[NONPODTYPE:%.*]]*
void C::helper(NonPOD var) {}
- // CHECK-LABEL: define void @_ZThn8_N5Test81C3barENS_6NonPODE(
+ // CHECK-LABEL: define{{.*}} void @_ZThn8_N5Test81C3barENS_6NonPODE(
// CHECK-DBG-NOT: dbg.declare
// CHECK-NOT: load [[NONPODTYPE]], [[NONPODTYPE]]*
// CHECK-NOT: memcpy
};
void C::f() {
}
- // CHECK: define void @_ZThn8_N6Test141C1fEv({{.*}}) unnamed_addr [[NUW:#[0-9]+]]
+ // CHECK: define{{.*}} void @_ZThn8_N6Test141C1fEv({{.*}}) unnamed_addr [[NUW:#[0-9]+]]
// CHECK-DBG-NOT: dbg.declare
// CHECK: ret void
}
}
// ITANIUM: define hidden void @_Z2afP1A
-// ITANIUM-DEFAULTVIS: define void @_Z2afP1A
+// ITANIUM-DEFAULTVIS: define{{.*}} void @_Z2afP1A
// MS: define dso_local void @"?af@@YAXPEAUA@@@Z"
void af(A *a) {
// TT-ITANIUM: [[P:%[^ ]*]] = call i1 @llvm.type.test(i8* [[VT:%[^ ]*]], metadata !"_ZTS1A")
};
// ITANIUM: define hidden void @_ZN5test21fEPNS_1DE
-// ITANIUM-DEFAULTVIS: define void @_ZN5test21fEPNS_1DE
+// ITANIUM-DEFAULTVIS: define{{.*}} void @_ZN5test21fEPNS_1DE
// MS: define dso_local void @"?f@test2@@YAXPEAUD@1@@Z"
void f(D *d) {
// TT-ITANIUM: {{%[^ ]*}} = call i1 @llvm.type.test(i8* {{%[^ ]*}}, metadata !"_ZTSN5test21DE")
// Check that typeinfo recorded in function prolog doesn't have "Do" noexcept
// qualifier in its mangled name.
// CHECK: @[[RTTI:[0-9]+]] = private constant i8* bitcast ({ i8*, i8* }* @_ZTIFvvE to i8*)
-// CHECK: define void @_Z1fv() #{{.*}} prologue <{ i32, i32 }> <{ i32 {{.*}}, i32 trunc (i64 sub (i64 ptrtoint (i8** @[[RTTI]] to i64), i64 ptrtoint (void ()* @_Z1fv to i64)) to i32) }>
+// CHECK: define{{.*}} void @_Z1fv() #{{.*}} prologue <{ i32, i32 }> <{ i32 {{.*}}, i32 trunc (i64 sub (i64 ptrtoint (i8** @[[RTTI]] to i64), i64 ptrtoint (void ()* @_Z1fv to i64)) to i32) }>
void f() noexcept {}
-// CHECK: define void @_Z1gPDoFvvE
+// CHECK: define{{.*}} void @_Z1gPDoFvvE
void g(void (*p)() noexcept) {
// Check that reference typeinfo at call site doesn't have "Do" noexcept
// qualifier in its mangled name, either.
// CHECK-VPTR-MS: @__ubsan_vptr_type_cache = external dso_local
-// ITANIUM: define i32 @_Z5get_vP1T
+// ITANIUM: define{{.*}} i32 @_Z5get_vP1T
// MSABI: define dso_local i32 @"?get_v
int get_v(T* t) {
// First, we check that vtable is not loaded before a type check.
return t->v();
}
-// ITANIUM: define void @_Z9delete_itP1T
+// ITANIUM: define{{.*}} void @_Z9delete_itP1T
// MSABI: define dso_local void @"?delete_it
void delete_it(T *t) {
// First, we check that vtable is not loaded before a type check.
delete t;
}
-// ITANIUM: define %struct.U* @_Z7dyncastP1T
+// ITANIUM: define{{.*}} %struct.U* @_Z7dyncastP1T
// MSABI: define dso_local %struct.U* @"?dyncast
U* dyncast(T *t) {
// First, we check that dynamic_cast is not called before a type check.
void bar() {
foo({});
}
-// CHECK-LABEL: define void @_ZN7trivial3barEv()
+// CHECK-LABEL: define{{.*}} void @_ZN7trivial3barEv()
// CHECK: alloca %"struct.trivial::A"
// CHECK: load i8*, i8**
// CHECK: call void @_ZN7trivial3fooENS_1AE(i8* %{{.*}})
// normally doesn't permit copies when using braced initialization.
foo({});
}
-// CHECK-LABEL: define void @_ZN12default_ctor3barEv()
+// CHECK-LABEL: define{{.*}} void @_ZN12default_ctor3barEv()
// CHECK: alloca %"struct.default_ctor::A"
// CHECK: call void @_Z{{.*}}C1Ev(
// CHECK: load i8*, i8**
void bar() {
foo({});
}
-// CHECK-LABEL: define void @_ZN9move_ctor3barEv()
+// CHECK-LABEL: define{{.*}} void @_ZN9move_ctor3barEv()
// CHECK: call void @_Z{{.*}}C1Ev(
// CHECK-NOT: call
// NEWABI: call void @_ZN9move_ctor3fooENS_1AE(%"struct.move_ctor::A"* %{{.*}})
void bar() {
foo({});
}
-// CHECK-LABEL: define void @_ZN11all_deleted3barEv()
+// CHECK-LABEL: define{{.*}} void @_ZN11all_deleted3barEv()
// CHECK: call void @_Z{{.*}}C1Ev(
// CHECK-NOT: call
// NEWABI: call void @_ZN11all_deleted3fooENS_1AE(%"struct.all_deleted::A"* %{{.*}})
void bar() {
foo({});
}
-// CHECK-LABEL: define void @_ZN18implicitly_deleted3barEv()
+// CHECK-LABEL: define{{.*}} void @_ZN18implicitly_deleted3barEv()
// CHECK: call void @_Z{{.*}}C1Ev(
// CHECK-NOT: call
// NEWABI: call void @_ZN18implicitly_deleted3fooENS_1AE(%"struct.implicitly_deleted::A"* %{{.*}})
void bar() {
foo({});
}
-// CHECK-LABEL: define void @_ZN11one_deleted3barEv()
+// CHECK-LABEL: define{{.*}} void @_ZN11one_deleted3barEv()
// CHECK: call void @_Z{{.*}}C1Ev(
// CHECK-NOT: call
// NEWABI: call void @_ZN11one_deleted3fooENS_1AE(%"struct.one_deleted::A"* %{{.*}})
void bar() {
foo({});
}
-// CHECK-LABEL: define void @_ZN14copy_defaulted3barEv()
+// CHECK-LABEL: define{{.*}} void @_ZN14copy_defaulted3barEv()
// CHECK: call void @_Z{{.*}}C1Ev(
// CHECK: load i8*, i8**
// CHECK: call void @_ZN14copy_defaulted3fooENS_1AE(i8* %{{.*}})
void bar() {
foo({});
}
-// CHECK-LABEL: define void @_ZN14move_defaulted3barEv()
+// CHECK-LABEL: define{{.*}} void @_ZN14move_defaulted3barEv()
// CHECK: call void @_Z{{.*}}C1Ev(
// CHECK: load i8*, i8**
// CHECK: call void @_ZN14move_defaulted3fooENS_1AE(i8* %{{.*}})
void bar() {
foo({});
}
-// CHECK-LABEL: define void @_ZN17trivial_defaulted3barEv()
+// CHECK-LABEL: define{{.*}} void @_ZN17trivial_defaulted3barEv()
// CHECK: call void @_Z{{.*}}C1Ev(
// CHECK: load i8*, i8**
// CHECK: call void @_ZN17trivial_defaulted3fooENS_1AE(i8* %{{.*}})
void bar() {
foo({});
}
-// CHECK-LABEL: define void @_ZN14two_copy_ctors3barEv()
+// CHECK-LABEL: define{{.*}} void @_ZN14two_copy_ctors3barEv()
// CHECK: call void @_Z{{.*}}C1Ev(
// NEWABI: call void @_ZN14two_copy_ctors3fooENS_1BE(%"struct.two_copy_ctors::B"* %{{.*}})
// OLDABI: call void @_ZN14two_copy_ctors3fooENS_1BE(%"struct.two_copy_ctors::B"* byval
void *p;
};
void *foo(A a) { return a.p; }
-// NEWABI-LABEL: define i8* @_ZN15definition_only3fooENS_1AE(%"struct.definition_only::A"*
-// OLDABI-LABEL: define i8* @_ZN15definition_only3fooENS_1AE(i8*
+// NEWABI-LABEL: define{{.*}} i8* @_ZN15definition_only3fooENS_1AE(%"struct.definition_only::A"*
+// OLDABI-LABEL: define{{.*}} i8* @_ZN15definition_only3fooENS_1AE(i8*
// WIN64-LABEL: define dso_local i8* @"?foo@definition_only@@YAPEAXUA@1@@Z"(%"struct.definition_only::A"*
}
B b;
};
void *foo(A a) { return a.b.p; }
-// NEWABI-LABEL: define i8* @_ZN17deleted_by_member3fooENS_1AE(%"struct.deleted_by_member::A"*
-// OLDABI-LABEL: define i8* @_ZN17deleted_by_member3fooENS_1AE(i8*
+// NEWABI-LABEL: define{{.*}} i8* @_ZN17deleted_by_member3fooENS_1AE(%"struct.deleted_by_member::A"*
+// OLDABI-LABEL: define{{.*}} i8* @_ZN17deleted_by_member3fooENS_1AE(i8*
// WIN64-LABEL: define dso_local i8* @"?foo@deleted_by_member@@YAPEAXUA@1@@Z"(%"struct.deleted_by_member::A"*
}
A();
};
void *foo(A a) { return a.p; }
-// NEWABI-LABEL: define i8* @_ZN15deleted_by_base3fooENS_1AE(%"struct.deleted_by_base::A"*
-// OLDABI-LABEL: define i8* @_ZN15deleted_by_base3fooENS_1AE(i8*
+// NEWABI-LABEL: define{{.*}} i8* @_ZN15deleted_by_base3fooENS_1AE(%"struct.deleted_by_base::A"*
+// OLDABI-LABEL: define{{.*}} i8* @_ZN15deleted_by_base3fooENS_1AE(i8*
// WIN64-LABEL: define dso_local i8* @"?foo@deleted_by_base@@YAPEAXUA@1@@Z"(%"struct.deleted_by_base::A"*
}
B b;
};
void *foo(A a) { return a.b.p; }
-// NEWABI-LABEL: define i8* @_ZN22deleted_by_member_copy3fooENS_1AE(%"struct.deleted_by_member_copy::A"*
-// OLDABI-LABEL: define i8* @_ZN22deleted_by_member_copy3fooENS_1AE(i8*
+// NEWABI-LABEL: define{{.*}} i8* @_ZN22deleted_by_member_copy3fooENS_1AE(%"struct.deleted_by_member_copy::A"*
+// OLDABI-LABEL: define{{.*}} i8* @_ZN22deleted_by_member_copy3fooENS_1AE(i8*
// WIN64-LABEL: define dso_local i8* @"?foo@deleted_by_member_copy@@YAPEAXUA@1@@Z"(%"struct.deleted_by_member_copy::A"*
}
A();
};
void *foo(A a) { return a.p; }
-// NEWABI-LABEL: define i8* @_ZN20deleted_by_base_copy3fooENS_1AE(%"struct.deleted_by_base_copy::A"*
-// OLDABI-LABEL: define i8* @_ZN20deleted_by_base_copy3fooENS_1AE(i8*
+// NEWABI-LABEL: define{{.*}} i8* @_ZN20deleted_by_base_copy3fooENS_1AE(%"struct.deleted_by_base_copy::A"*
+// OLDABI-LABEL: define{{.*}} i8* @_ZN20deleted_by_base_copy3fooENS_1AE(i8*
// WIN64-LABEL: define dso_local i8* @"?foo@deleted_by_base_copy@@YAPEAXUA@1@@Z"(%"struct.deleted_by_base_copy::A"*
}
A(const A &o) = delete;
void *p;
};
-// NEWABI-LABEL: define i8* @_ZN15explicit_delete3fooENS_1AE(%"struct.explicit_delete::A"*
-// OLDABI-LABEL: define i8* @_ZN15explicit_delete3fooENS_1AE(i8*
+// NEWABI-LABEL: define{{.*}} i8* @_ZN15explicit_delete3fooENS_1AE(%"struct.explicit_delete::A"*
+// OLDABI-LABEL: define{{.*}} i8* @_ZN15explicit_delete3fooENS_1AE(i8*
// WIN64-LABEL: define dso_local i8* @"?foo@explicit_delete@@YAPEAXUA@1@@Z"(%"struct.explicit_delete::A"*
void *foo(A a) { return a.p; }
}
// RUN: %clang_cc1 -triple i386-linux -emit-llvm %s -o - | FileCheck %s
// RUN: %clang_cc1 -triple i386-windows-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MINGW
-// CHECK: @_ZTI3foo = constant
+// CHECK: @_ZTI3foo ={{.*}} constant
// CHECK-MINGW: @_ZTI3foo = linkonce_odr
class foo {
foo();
void test_1(A *p) {
// A has default visibility, so no need for type.checked.load.
-// CHECK-LABEL: define void @_Z6test_1P1A
+// CHECK-LABEL: define{{.*}} void @_Z6test_1P1A
// NOVFE-LABEL: define dso_local void @_Z6test_1P1A
// CHECK: [[FN_PTR_ADDR:%.+]] = getelementptr inbounds void (%struct.A*)*, void (%struct.A*)** {{%.+}}, i64 0
// NOVFE: [[FN_PTR_ADDR:%.+]] = getelementptr inbounds void (%struct.A*)*, void (%struct.A*)** {{%.+}}, i64 0
void test_2(B *p) {
// B has public LTO visibility, so no need for type.checked.load.
-// CHECK-LABEL: define void @_Z6test_2P1B
+// CHECK-LABEL: define{{.*}} void @_Z6test_2P1B
// NOVFE-LABEL: define dso_local void @_Z6test_2P1B
// CHECK: [[FN_PTR_ADDR:%.+]] = getelementptr inbounds void (%struct.B*)*, void (%struct.B*)** {{%.+}}, i64 0
// NOVFE: [[FN_PTR_ADDR:%.+]] = getelementptr inbounds void (%struct.B*)*, void (%struct.B*)** {{%.+}}, i64 0
void test_3(C *p) {
// C has hidden visibility, so we generate type.checked.load to allow VFE.
-// CHECK-LABEL: define void @_Z6test_3P1C
+// CHECK-LABEL: define{{.*}} void @_Z6test_3P1C
// NOVFE-LABEL: define dso_local void @_Z6test_3P1C
// CHECK: [[LOAD:%.+]] = call { i8*, i1 } @llvm.type.checked.load(i8* {{%.+}}, i32 0, metadata !"_ZTS1C")
// NOVFE: call i1 @llvm.type.test(i8* {{%.+}}, metadata !"_ZTS1C")
void test_4(C *p) {
// When using type.checked.load, we pass the vtable offset to the intrinsic,
// rather than adding it to the pointer with a GEP.
-// CHECK-LABEL: define void @_Z6test_4P1C
+// CHECK-LABEL: define{{.*}} void @_Z6test_4P1C
// NOVFE-LABEL: define dso_local void @_Z6test_4P1C
// CHECK: [[LOAD:%.+]] = call { i8*, i1 } @llvm.type.checked.load(i8* {{%.+}}, i32 8, metadata !"_ZTS1C")
// NOVFE: call i1 @llvm.type.test(i8* {{%.+}}, metadata !"_ZTS1C")
// this case "_ZTSM1CFvvE.virtual"). If we passed the offset from the member
// function pointer to the intrinsic, this information would be lost. No
// codegen changes on the non-virtual side.
-// CHECK-LABEL: define void @_Z6test_5P1CMS_FvvE(
+// CHECK-LABEL: define{{.*}} void @_Z6test_5P1CMS_FvvE(
// NOVFE-LABEL: define dso_local void @_Z6test_5P1CMS_FvvE(
// CHECK: [[FN_PTR_ADDR:%.+]] = getelementptr i8, i8* %vtable, i64 {{%.+}}
// CHECK: [[LOAD:%.+]] = call { i8*, i1 } @llvm.type.checked.load(i8* [[FN_PTR_ADDR]], i32 0, metadata !"_ZTSM1CFvvE.virtual")
// CHECK-DAG: @_ZZ18inline_hidden_funcvE3var = linkonce_odr hidden global i32 0, comdat
// CHECK-DAG: @_ZZ19inline_default_funcvE3var = linkonce_odr global i32 0, comdat
// CHECK-DAG: @_ZZN13ExportedClass10inl_methodEvE3var = linkonce_odr global i32 0, comdat, align 4
-// CHECK-DAG: define i32 @_Z4funcv()
+// CHECK-DAG: define{{.*}} i32 @_Z4funcv()
// CHECK-DAG: define hidden i32 @_Z11hidden_funcv()
-// CHECK-DAG: define i32 @_Z12default_funcv()
+// CHECK-DAG: define{{.*}} i32 @_Z12default_funcv()
// CHECK-DAG: define linkonce_odr hidden i32 @_Z11inline_funcv()
// CHECK-DAG: define linkonce_odr hidden i32 @_Z18inline_hidden_funcv()
// CHECK-DAG: define linkonce_odr i32 @_Z19inline_default_funcv()
// CHECK-DAG: define linkonce_odr hidden i32 @_ZN13ExportedClass10inl_methodEv({{.*}})
-// CHECK-DAG: define i32 @_ZN13ExportedClass10ext_methodEv({{.*}})
+// CHECK-DAG: define{{.*}} i32 @_ZN13ExportedClass10ext_methodEv({{.*}})
// CHECK-NO-VIH-DAG: @_ZZ4funcvE3var = internal global i32 0
// CHECK-NO-VIH-DAG: @_ZZ11hidden_funcvE3var = internal global i32 0
// CHECK-NO-VIH-DAG: @_ZZ18inline_hidden_funcvE3var = linkonce_odr hidden global i32 0, comdat
// CHECK-NO-VIH-DAG: @_ZZ19inline_default_funcvE3var = linkonce_odr global i32 0, comdat
// CHECK-NO-VIH-DAG: @_ZZN13ExportedClass10inl_methodEvE3var = linkonce_odr global i32 0, comdat, align 4
-// CHECK-NO-VIH-DAG: define i32 @_Z4funcv()
+// CHECK-NO-VIH-DAG: define{{.*}} i32 @_Z4funcv()
// CHECK-NO-VIH-DAG: define hidden i32 @_Z11hidden_funcv()
-// CHECK-NO-VIH-DAG: define i32 @_Z12default_funcv()
+// CHECK-NO-VIH-DAG: define{{.*}} i32 @_Z12default_funcv()
// CHECK-NO-VIH-DAG: define linkonce_odr i32 @_Z11inline_funcv()
// CHECK-NO-VIH-DAG: define linkonce_odr hidden i32 @_Z18inline_hidden_funcv()
// CHECK-NO-VIH-DAG: define linkonce_odr i32 @_Z19inline_default_funcv()
// CHECK-NO-VIH-DAG: define linkonce_odr i32 @_ZN13ExportedClass10inl_methodEv({{.*}})
-// CHECK-NO-VIH-DAG: define i32 @_ZN13ExportedClass10ext_methodEv({{.*}})
+// CHECK-NO-VIH-DAG: define{{.*}} i32 @_ZN13ExportedClass10ext_methodEv({{.*}})
// CHECK-VIS-HIDDEN-DAG: @_ZZ4funcvE3var = internal global i32 0
// CHECK-VIS-HIDDEN-DAG: @_ZZ11hidden_funcvE3var = internal global i32 0
// CHECK-VIS-HIDDEN-DAG: @_ZZN13ExportedClass10inl_methodEvE3var = linkonce_odr global i32 0, comdat, align 4
// CHECK-VIS-HIDDEN-DAG: define hidden i32 @_Z4funcv()
// CHECK-VIS-HIDDEN-DAG: define hidden i32 @_Z11hidden_funcv()
-// CHECK-VIS-HIDDEN-DAG: define i32 @_Z12default_funcv()
+// CHECK-VIS-HIDDEN-DAG: define{{.*}} i32 @_Z12default_funcv()
// CHECK-VIS-HIDDEN-DAG: define linkonce_odr hidden i32 @_Z11inline_funcv()
// CHECK-VIS-HIDDEN-DAG: define linkonce_odr hidden i32 @_Z18inline_hidden_funcv()
// CHECK-VIS-HIDDEN-DAG: define linkonce_odr i32 @_Z19inline_default_funcv()
// CHECK-VIS-HIDDEN-DAG: define linkonce_odr hidden i32 @_ZN13ExportedClass10inl_methodEv({{.*}})
-// CHECK-VIS-HIDDEN-DAG: define i32 @_ZN13ExportedClass10ext_methodEv({{.*}})
+// CHECK-VIS-HIDDEN-DAG: define{{.*}} i32 @_ZN13ExportedClass10ext_methodEv({{.*}})
// CHECK-VIS-PROTECTED-DAG: @_ZZ4funcvE3var = internal global i32 0
// CHECK-VIS-PROTECTED-DAG: @_ZZ11hidden_funcvE3var = internal global i32 0
// CHECK-VIS-PROTECTED-DAG: @_ZZN13ExportedClass10inl_methodEvE3var = linkonce_odr global i32 0, comdat, align 4
// CHECK-VIS-PROTECTED-DAG: define protected i32 @_Z4funcv()
// CHECK-VIS-PROTECTED-DAG: define hidden i32 @_Z11hidden_funcv()
-// CHECK-VIS-PROTECTED-DAG: define i32 @_Z12default_funcv()
+// CHECK-VIS-PROTECTED-DAG: define{{.*}} i32 @_Z12default_funcv()
// CHECK-VIS-PROTECTED-DAG: define linkonce_odr hidden i32 @_Z11inline_funcv()
// CHECK-VIS-PROTECTED-DAG: define linkonce_odr hidden i32 @_Z18inline_hidden_funcv()
// CHECK-VIS-PROTECTED-DAG: define linkonce_odr i32 @_Z19inline_default_funcv()
// CHECK-VIS-PROTECTED-DAG: define linkonce_odr hidden i32 @_ZN13ExportedClass10inl_methodEv({{.*}})
-// CHECK-VIS-PROTECTED-DAG: define i32 @_ZN13ExportedClass10ext_methodEv({{.*}})
+// CHECK-VIS-PROTECTED-DAG: define{{.*}} i32 @_ZN13ExportedClass10ext_methodEv({{.*}})
int func(void) {
static int var = 0;
}
void test(int n) {
- // CHECK: define void {{.*test.*}}(i32 [[n:%.+]]) #
+ // CHECK: define{{.*}} void {{.*test.*}}(i32 [[n:%.+]]) #
// CHECK: [[n_addr:%.+]] = alloca
// CHECK-NEXT: [[saved_stack:%.+]] = alloca
// CHECK-NEXT: [[vla_expr:%.+]] = alloca i64, align 8
// V-table should be defined with strong linkage.
Test2a::Test2a() { use(typeid(Test2a)); }
-// CHECK: @_ZTV6Test2a = unnamed_addr constant
-// CHECK-LATE: @_ZTS6Test2a = constant
-// CHECK-LATE: @_ZTI6Test2a = constant
+// CHECK: @_ZTV6Test2a ={{.*}} unnamed_addr constant
+// CHECK-LATE: @_ZTS6Test2a ={{.*}} constant
+// CHECK-LATE: @_ZTI6Test2a ={{.*}} constant
// 'bar' becomes the key function when 'foo' is defined inline.
void Test2a::bar() {}
// V-table should be defined with strong linkage.
Test2b::Test2b() { use(typeid(Test2b)); }
-// CHECK: @_ZTV6Test2b = unnamed_addr constant
-// CHECK-LATE: @_ZTS6Test2b = constant
-// CHECK-LATE: @_ZTI6Test2b = constant
+// CHECK: @_ZTV6Test2b ={{.*}} unnamed_addr constant
+// CHECK-LATE: @_ZTS6Test2b ={{.*}} constant
+// CHECK-LATE: @_ZTI6Test2b ={{.*}} constant
inline void Test2b::foo() {}
// V-table should be defined with strong linkage.
Test2c::Test2c() { use(typeid(Test2c)); }
-// CHECK: @_ZTV6Test2c = unnamed_addr constant
-// CHECK: @_ZTS6Test2c = constant
-// CHECK: @_ZTI6Test2c = constant
+// CHECK: @_ZTV6Test2c ={{.*}} unnamed_addr constant
+// CHECK: @_ZTS6Test2c ={{.*}} constant
+// CHECK: @_ZTI6Test2c ={{.*}} constant
/*** Test3a ******************************************************************/
// D has a key function that is defined in this translation unit so its vtable is
// defined in the translation unit.
-// CHECK-DAG: @_ZTV1D = unnamed_addr constant
-// CHECK-DAG: @_ZTS1D = constant
-// CHECK-DAG: @_ZTI1D = constant
+// CHECK-DAG: @_ZTV1D ={{.*}} unnamed_addr constant
+// CHECK-DAG: @_ZTS1D ={{.*}} constant
+// CHECK-DAG: @_ZTI1D ={{.*}} constant
// E<char> is an explicit specialization with a key function defined
// in this translation unit, so its vtable should have external
// linkage.
-// CHECK-DAG: @_ZTV1EIcE = unnamed_addr constant
-// CHECK-DAG: @_ZTS1EIcE = constant
-// CHECK-DAG: @_ZTI1EIcE = constant
+// CHECK-DAG: @_ZTV1EIcE ={{.*}} unnamed_addr constant
+// CHECK-DAG: @_ZTS1EIcE ={{.*}} constant
+// CHECK-DAG: @_ZTI1EIcE ={{.*}} constant
// E<short> is an explicit template instantiation with a key function
// defined in this translation unit, so its vtable should have
__m256d data;
};
-// CHECK: define <4 x double> @_ZN5test14testENS_7PR22753E(<4 x double>
+// CHECK: define{{.*}} <4 x double> @_ZN5test14testENS_7PR22753E(<4 x double>
PR22753 test(PR22753 x) {
return x;
}
__m128d v3;
};
-// CHECK: define <2 x double> @_ZN5test27PR23082ENS_3UU1E(<2 x double>
+// CHECK: define{{.*}} <2 x double> @_ZN5test27PR23082ENS_3UU1E(<2 x double>
UU1 PR23082(UU1 x) {
return x;
}
__m256d v3;
};
-// CHECK: define <4 x double> @_ZN5test27PR23082ENS_3UU2E(<4 x double>
+// CHECK: define{{.*}} <4 x double> @_ZN5test27PR23082ENS_3UU2E(<4 x double>
UU2 PR23082(UU2 x) {
return x;
}
__attribute__((__vector_size__(32))) float f1;
int f2;
};
-// CHECK: define i32 @_ZN5test31fENS_1UE({{.*}}* byval({{.*}}) align 32
+// CHECK: define{{.*}} i32 @_ZN5test31fENS_1UE({{.*}}* byval({{.*}}) align 32
int f(U u) { return u.f2; }
}
typedef int test_struct::* test_struct_mdp;
typedef int (test_struct::*test_struct_mfp)();
-// CHECK-LABEL: define i32 @{{.*}}f_mdp{{.*}}(i32 %a)
+// CHECK-LABEL: define{{.*}} i32 @{{.*}}f_mdp{{.*}}(i32 %a)
test_struct_mdp f_mdp(test_struct_mdp a) { return a; }
// CHECK-LABEL: define {{.*}} @{{.*}}f_mfp{{.*}}(i64 %a.coerce)
// A struct with <= 12 bytes before a member data pointer should still
// be allowed in registers, since the member data pointer is only 4 bytes.
-// CHECK-LABEL: define void @{{.*}}f_struct_with_mdp{{.*}}(i64 %a.coerce0, i64 %a.coerce1)
+// CHECK-LABEL: define{{.*}} void @{{.*}}f_struct_with_mdp{{.*}}(i64 %a.coerce0, i64 %a.coerce1)
struct struct_with_mdp { char *a; char *b; char *c; test_struct_mdp d; };
void f_struct_with_mdp(struct_with_mdp a) { (void)a; }
struct struct_with_mdp_too_much {
char *a; char *b; char *c; char *d; test_struct_mdp e;
};
-// CHECK-LABEL: define void @{{.*}}f_struct_with_mdp_too_much{{.*}}({{.*}} byval({{.*}} {{.*}} %a)
+// CHECK-LABEL: define{{.*}} void @{{.*}}f_struct_with_mdp_too_much{{.*}}({{.*}} byval({{.*}} {{.*}} %a)
void f_struct_with_mdp_too_much(struct_with_mdp_too_much a) {
(void)a;
}
// A struct with <= 8 bytes before a member function pointer should still
// be allowed in registers, since the member function pointer is only 8 bytes.
-// CHECK-LABEL: define void @{{.*}}f_struct_with_mfp_0{{.*}}(i64 %a.coerce0, i32 %a.coerce1)
+// CHECK-LABEL: define{{.*}} void @{{.*}}f_struct_with_mfp_0{{.*}}(i64 %a.coerce0, i32 %a.coerce1)
struct struct_with_mfp_0 { char *a; test_struct_mfp b; };
void f_struct_with_mfp_0(struct_with_mfp_0 a) { (void)a; }
-// CHECK-LABEL: define void @{{.*}}f_struct_with_mfp_1{{.*}}(i64 %a.coerce0, i64 %a.coerce1)
+// CHECK-LABEL: define{{.*}} void @{{.*}}f_struct_with_mfp_1{{.*}}(i64 %a.coerce0, i64 %a.coerce1)
struct struct_with_mfp_1 { char *a; char *b; test_struct_mfp c; };
void f_struct_with_mfp_1(struct_with_mfp_1 a) { (void)a; }
-// CHECK-LABEL: define void @{{.*}}f_struct_with_mfp_too_much{{.*}}({{.*}} byval({{.*}}) {{.*}} %a, i32 %x)
+// CHECK-LABEL: define{{.*}} void @{{.*}}f_struct_with_mfp_too_much{{.*}}({{.*}} byval({{.*}}) {{.*}} %a, i32 %x)
struct struct_with_mfp_too_much {
char *a; char *b; char *c; test_struct_mfp d;
};
/* Struct containing an empty struct */
typedef struct { int* a; test_struct x; double *b; } struct_with_empty;
-// CHECK-LABEL: define void @{{.*}}f_pass_struct_with_empty{{.*}}(i64 %x{{.*}}, double* %x
+// CHECK-LABEL: define{{.*}} void @{{.*}}f_pass_struct_with_empty{{.*}}(i64 %x{{.*}}, double* %x
void f_pass_struct_with_empty(struct_with_empty x) {
(void) x;
}
-// CHECK-LABEL: define { i64, double* } @{{.*}}f_return_struct_with_empty
+// CHECK-LABEL: define{{.*}} { i64, double* } @{{.*}}f_return_struct_with_empty
struct_with_empty f_return_struct_with_empty() {
return {0, {}, 0};
}
// Basic base class test.
struct f0_s0 { unsigned a; };
struct f0_s1 : public f0_s0 { void *b; };
-// CHECK-LABEL: define void @_Z2f05f0_s1(i32 %a0.coerce0, i8* %a0.coerce1)
+// CHECK-LABEL: define{{.*}} void @_Z2f05f0_s1(i32 %a0.coerce0, i8* %a0.coerce1)
void f0(f0_s1 a0) { }
// Check with two eight-bytes in base class.
struct f1_s0 { unsigned a; unsigned b; float c; };
struct f1_s1 : public f1_s0 { float d;};
-// CHECK-LABEL: define void @_Z2f15f1_s1(i64 %a0.coerce0, <2 x float> %a0.coerce1)
+// CHECK-LABEL: define{{.*}} void @_Z2f15f1_s1(i64 %a0.coerce0, <2 x float> %a0.coerce1)
void f1(f1_s1 a0) { }
// Check with two eight-bytes in base class and merge.
struct f2_s0 { unsigned a; unsigned b; float c; };
struct f2_s1 : public f2_s0 { char d;};
-// CHECK-LABEL: define void @_Z2f25f2_s1(i64 %a0.coerce0, i64 %a0.coerce1)
+// CHECK-LABEL: define{{.*}} void @_Z2f25f2_s1(i64 %a0.coerce0, i64 %a0.coerce1)
void f2(f2_s1 a0) { }
// PR5831
-// CHECK-LABEL: define void @_Z2f34s3_1(i64 %x.coerce)
+// CHECK-LABEL: define{{.*}} void @_Z2f34s3_1(i64 %x.coerce)
struct s3_0 {};
struct s3_1 { struct s3_0 a; long b; };
void f3(struct s3_1 x) {}
-// CHECK-LABEL: define i64 @_Z4f4_0M2s4i(i64 %a)
+// CHECK-LABEL: define{{.*}} i64 @_Z4f4_0M2s4i(i64 %a)
// CHECK: define {{.*}} @_Z4f4_1M2s4FivE(i64 %a.coerce0, i64 %a.coerce1)
struct s4 {};
typedef int s4::* s4_mdp;
// A struct with <= one eightbyte before a member data pointer should still
// be allowed in registers.
-// CHECK-LABEL: define void @{{.*}}f_struct_with_mdp{{.*}}(i8* %a.coerce0, i64 %a.coerce1)
+// CHECK-LABEL: define{{.*}} void @{{.*}}f_struct_with_mdp{{.*}}(i8* %a.coerce0, i64 %a.coerce1)
struct struct_with_mdp { char *a; s4_mdp b; };
void f_struct_with_mdp(struct_with_mdp a) { (void)a; }
// A struct with anything before a member function will be too big and
// goes in memory.
-// CHECK-LABEL: define void @{{.*}}f_struct_with_mfp_0{{.*}}(%struct{{.*}} byval(%struct{{.*}}) align 8 %a)
+// CHECK-LABEL: define{{.*}} void @{{.*}}f_struct_with_mfp_0{{.*}}(%struct{{.*}} byval(%struct{{.*}}) align 8 %a)
struct struct_with_mfp_0 { char a; s4_mfp b; };
void f_struct_with_mfp_0(struct_with_mfp_0 a) { (void)a; }
-// CHECK-LABEL: define void @{{.*}}f_struct_with_mfp_1{{.*}}(%struct{{.*}} byval(%struct{{.*}}) align 8 %a)
+// CHECK-LABEL: define{{.*}} void @{{.*}}f_struct_with_mfp_1{{.*}}(%struct{{.*}} byval(%struct{{.*}}) align 8 %a)
struct struct_with_mfp_1 { void *a; s4_mfp b; };
void f_struct_with_mfp_1(struct_with_mfp_1 a) { (void)a; }
void AddKeyword(StringRef, int x);
void foo() {
- // CHECK-LABEL: define void @_ZN6PR75233fooEv()
+ // CHECK-LABEL: define{{.*}} void @_ZN6PR75233fooEv()
// CHECK: call void @_ZN6PR752310AddKeywordENS_9StringRefEi(i8* {{.*}}, i32 4)
AddKeyword(StringRef(), 4);
}
struct c2 : public s2 {};
- // CHECK-LABEL: define <2 x float> @_ZN6PR77423fooEPNS_2c2E(%"struct.PR7742::c2"* %P)
+ // CHECK-LABEL: define{{.*}} <2 x float> @_ZN6PR77423fooEPNS_2c2E(%"struct.PR7742::c2"* %P)
c2 foo(c2 *P) {
return c2();
}
B1 b1;
};
- // CHECK-LABEL: define i8* @_ZN6PR51793barENS_2B2E(i32* %b2.coerce)
+ // CHECK-LABEL: define{{.*}} i8* @_ZN6PR51793barENS_2B2E(i32* %b2.coerce)
const void *bar(B2 b2) {
return b2.b1.pa;
}
int test(outer x) {
return x.x + x.f;
}
- // CHECK-LABEL: define i32 @_ZN5test64testENS_5outerE(i64 %x.coerce0, i32 %x.coerce1)
+ // CHECK-LABEL: define{{.*}} i32 @_ZN5test64testENS_5outerE(i64 %x.coerce0, i32 %x.coerce1)
}
namespace test7 {
// Check that the StringRef is passed byval instead of expanded
// (which would split it between registers and memory).
// rdar://problem/9686430
- // CHECK: define void @_ZN5test71xENS_1AES0_llNS_9StringRefE({{.*}} byval({{.*}}) align 8 {{%.*}})
+ // CHECK: define{{.*}} void @_ZN5test71xENS_1AES0_llNS_9StringRefE({{.*}} byval({{.*}}) align 8 {{%.*}})
// And a couple extra related tests:
A y(A, long double, long, long, StringRef) { return A(); }
- // CHECK: define void @_ZN5test71yENS_1AEellNS_9StringRefE({{.*}} i8*
+ // CHECK: define{{.*}} void @_ZN5test71yENS_1AEellNS_9StringRefE({{.*}} i8*
struct StringDouble {char * ptr; double d;};
A z(A, A, A, A, A, StringDouble) { return A(); }
A zz(A, A, A, A, StringDouble) { return A(); }
- // CHECK: define void @_ZN5test71zENS_1AES0_S0_S0_S0_NS_12StringDoubleE({{.*}} byval({{.*}}) align 8 {{%.*}})
- // CHECK: define void @_ZN5test72zzENS_1AES0_S0_S0_NS_12StringDoubleE({{.*}} i8*
+ // CHECK: define{{.*}} void @_ZN5test71zENS_1AES0_S0_S0_S0_NS_12StringDoubleE({{.*}} byval({{.*}}) align 8 {{%.*}})
+ // CHECK: define{{.*}} void @_ZN5test72zzENS_1AES0_S0_S0_NS_12StringDoubleE({{.*}} i8*
}
namespace test8 {
struct T { void *data[2]; };
- // CHECK: define void @_ZN5test93fooEPNS_1SEPNS_1TE([[S:%.*]]* %0, [[T:%.*]]* %1)
+ // CHECK: define{{.*}} void @_ZN5test93fooEPNS_1SEPNS_1TE([[S:%.*]]* %0, [[T:%.*]]* %1)
void foo(S*, T*) {}
- // CHECK: define void @_ZN5test91aEiiiiNS_1TEPv([[S]]* noalias sret([[S]]) align 8 {{%.*}}, i32 %0, i32 %1, i32 %2, i32 %3, [[T]]* byval([[T]]) align 8 %4, i8* %5)
+ // CHECK: define{{.*}} void @_ZN5test91aEiiiiNS_1TEPv([[S]]* noalias sret([[S]]) align 8 {{%.*}}, i32 %0, i32 %1, i32 %2, i32 %3, [[T]]* byval([[T]]) align 8 %4, i8* %5)
S a(int, int, int, int, T, void*) {
return S();
}
- // CHECK: define [[S]]* @_ZN5test91bEPNS_1SEiiiiNS_1TEPv([[S]]* {{%.*}}, i32 %0, i32 %1, i32 %2, i32 %3, [[T:%.*]]* byval([[T]]) align 8 %4, i8* %5)
+ // CHECK: define{{.*}} [[S]]* @_ZN5test91bEPNS_1SEiiiiNS_1TEPv([[S]]* {{%.*}}, i32 %0, i32 %1, i32 %2, i32 %3, [[T:%.*]]* byval([[T]]) align 8 %4, i8* %5)
S* b(S* sret, int, int, int, int, T, void*) {
return sret;
}
- // CHECK: define void @_ZN5test91cEiiiNS_1TEPv([[S]]* noalias sret([[S]]) align 8 {{%.*}}, i32 %0, i32 %1, i32 %2, i8* {{%.*}}, i8* {{%.*}}, i8* %3)
+ // CHECK: define{{.*}} void @_ZN5test91cEiiiNS_1TEPv([[S]]* noalias sret([[S]]) align 8 {{%.*}}, i32 %0, i32 %1, i32 %2, i8* {{%.*}}, i8* {{%.*}}, i8* %3)
S c(int, int, int, T, void*) {
return S();
}
- // CHECK: define [[S]]* @_ZN5test91dEPNS_1SEiiiNS_1TEPv([[S]]* {{%.*}}, i32 %0, i32 %1, i32 %2, i8* {{%.*}}, i8* {{%.*}}, i8* %3)
+ // CHECK: define{{.*}} [[S]]* @_ZN5test91dEPNS_1SEiiiNS_1TEPv([[S]]* {{%.*}}, i32 %0, i32 %1, i32 %2, i8* {{%.*}}, i8* {{%.*}}, i8* %3)
S* d(S* sret, int, int, int, T, void*) {
return sret;
}
struct DerivedPacked : public BasePacked {
int three;
};
-// CHECK-LABEL: define i32 @_ZN6test1020FuncForDerivedPackedENS_13DerivedPackedE({{.*}}* byval({{.*}}) align 8
+// CHECK-LABEL: define{{.*}} i32 @_ZN6test1020FuncForDerivedPackedENS_13DerivedPackedE({{.*}}* byval({{.*}}) align 8
int FuncForDerivedPacked(DerivedPacked d) {
return d.three;
}
char __attribute__((__vector_size__(1))) f2;
};
int f(union U u) { return u.f2[1]; }
-// CHECK-LABEL: define i32 @_ZN6test111fENS_1UE(i32
+// CHECK-LABEL: define{{.*}} i32 @_ZN6test111fENS_1UE(i32
}
};
};
-// CHECK-LABEL: define void @_Z1fv()
+// CHECK-LABEL: define{{.*}} void @_Z1fv()
throwing_task f() {
// A variable RESUMETHREW is used to keep track of whether the body
// of 'await_resume' threw an exception. Exceptions thrown in
};
};
-// CHECK-LABEL: define void @_Z1gv()
+// CHECK-LABEL: define{{.*}} void @_Z1gv()
noexcept_task g() {
// If the await_resume function is marked as noexcept, none of the additional
// conditions that are present in f() above are added to the IR.
// Verifies that we don't crash when returning an lvalue from an await_resume()
// expression.
-// CHECK-LABEL: define void @_Z18AwaitReturnsLValued(double %0)
+// CHECK-LABEL: define{{.*}} void @_Z18AwaitReturnsLValued(double %0)
void AwaitReturnsLValue(double) {
AwaitResumeReturnsLValue a;
// CHECK: %[[AVAR:.+]] = alloca %struct.AwaitResumeReturnsLValue,
struct Cleanup { ~Cleanup(); };
void may_throw();
-// CHECK-LABEL: define void @_Z1fv(
+// CHECK-LABEL: define{{.*}} void @_Z1fv(
void f() {
// CHECK: call noalias nonnull i8* @_Znwm(i64
co_return;
}
-// CHECK-LABEL: define void @_Z1gv(
+// CHECK-LABEL: define{{.*}} void @_Z1gv(
void g() {
for (;;)
co_await suspend_always{};
};
// Verify that the NRVO is applied to the Gro object.
-// CHECK-LABEL: define void @_Z1fi(%struct.coro* noalias sret(%struct.coro) align 8 %agg.result, i32 %0)
+// CHECK-LABEL: define{{.*}} void @_Z1fi(%struct.coro* noalias sret(%struct.coro) align 8 %agg.result, i32 %0)
coro f(int) {
// CHECK: %call = call noalias nonnull i8* @_Znwm(
// CHECK-NEXT: br label %[[CoroInit:.*]]
};
// Verify that the NRVO is applied to the Gro object.
-// CHECK-LABEL: define void @_Z1hi(%struct.coro_two* noalias sret(%struct.coro_two) align 8 %agg.result, i32 %0)
+// CHECK-LABEL: define{{.*}} void @_Z1hi(%struct.coro_two* noalias sret(%struct.coro_two) align 8 %agg.result, i32 %0)
coro_two h(int) {
// CHECK: %call = call noalias i8* @_ZnwmRKSt9nothrow_t
struct Cleanup { ~Cleanup(); };
void doSomething() noexcept;
-// CHECK: define i32 @_Z1fv(
+// CHECK: define{{.*}} i32 @_Z1fv(
int f() {
// CHECK: %[[RetVal:.+]] = alloca i32
// CHECK: %[[GroActive:.+]] = alloca i1
void consume(int,int,int) noexcept;
// TODO: Add support for CopyOnly params
-// CHECK: define void @_Z1fi8MoveOnly11MoveAndCopy(i32 %val, %struct.MoveOnly* %[[MoParam:.+]], %struct.MoveAndCopy* %[[McParam:.+]]) #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*
+// CHECK: define{{.*}} void @_Z1fi8MoveOnly11MoveAndCopy(i32 %val, %struct.MoveOnly* %[[MoParam:.+]], %struct.MoveAndCopy* %[[McParam:.+]]) #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*
void f(int val, MoveOnly moParam, MoveAndCopy mcParam) {
// CHECK: %[[MoCopy:.+]] = alloca %struct.MoveOnly
// CHECK: %[[McCopy:.+]] = alloca %struct.MoveAndCopy
method good_coroutine_calls_custom_constructor(float);
};
-// CHECK-LABEL: define void @_ZN10some_class39good_coroutine_calls_custom_constructorEf(%struct.some_class*
+// CHECK-LABEL: define{{.*}} void @_ZN10some_class39good_coroutine_calls_custom_constructorEf(%struct.some_class*
method some_class::good_coroutine_calls_custom_constructor(float) {
// CHECK: invoke void @_ZNSt12experimental16coroutine_traitsIJ6methodR10some_classfEE12promise_typeC1ES3_f(%"struct.std::experimental::coroutine_traits<method, some_class &, float>::promise_type"* {{[^,]*}} %__promise, %struct.some_class* nonnull align 1 dereferenceable(1) %{{.+}}, float
co_return;
co_await coro::suspend_never{};
}
-// CHECK-LABEL: define void @_Z1fv(
+// CHECK-LABEL: define{{.*}} void @_Z1fv(
// CHECK: call void @_ZNSt12experimental13coroutines_v113suspend_never12await_resumeEv(%"struct.std::experimental::coroutines_v1::suspend_never"*
// CHECK: call void @_ZN5coro112promise_type11return_voidEv(%"struct.coro1::promise_type"* {{[^,]*}} %__promise)
co_return (void) A{};
}
-// CHECK-LABEL: define void @_Z2f2v(
+// CHECK-LABEL: define{{.*}} void @_Z2f2v(
// CHECK: call void @_ZN1AC1Ev(%struct.A* {{[^,]*}} %[[AVar:.*]])
// CHECK-NEXT: call void @_ZN1AD1Ev(%struct.A* {{[^,]*}} %[[AVar]])
// CHECK-NEXT: call void @_ZN5coro112promise_type11return_voidEv(%"struct.coro1::promise_type"*
co_return 42;
}
-// CHECK-LABEL: define void @_Z1gv(
+// CHECK-LABEL: define{{.*}} void @_Z1gv(
// CHECK: call void @_ZNSt12experimental13coroutines_v113suspend_never12await_resumeEv(%"struct.std::experimental::coroutines_v1::suspend_never"*
// CHECK: call void @_ZN5coro212promise_type12return_valueEi(%"struct.coro2::promise_type"* {{[^,]*}} %__promise, i32 42)
}
}
-// CHECK-LABEL: define void @_Z3barv
+// CHECK-LABEL: define{{.*}} void @_Z3barv
// CHECK: %[[MODE:.+]] = load i32, i32* %mode
// CHECK-NEXT: switch i32 %[[MODE]], label %{{.+}} [
// CHECK-NEXT: i32 1, label %[[CASE1:.+]]
// Check that we get exactly the message sends we expect, and no more.
//
-// CHECK-LABEL: define void @f0
+// CHECK-LABEL: define{{.*}} void @f0
void f0(C0 *a) {
// CHECK: objc_msgSend
int l0 = (a.x0 = 1);
// CHECK-GNUSTEP2: @._OBJC_CLASS_NSConstantString = external global i8*
// CHECK-GNUSTEP2: @0 = private unnamed_addr constant [13 x i8] c"Hello World!\00", align 1
// CHECK-GNUSTEP2: @.objc_string = private global { i8**, i32, i32, i32, i32, i8* } { i8** @._OBJC_CLASS_NSConstantString, i32 0, i32 12, i32 12, i32 0, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @0, i64 0, i64 0) }, section "__objc_constant_string", align 8
-// CHECK-GNUSTEP2: @b = global i8* inttoptr (i64 -3340545023602065388 to i8*), align 8
+// CHECK-GNUSTEP2: @b ={{.*}} global i8* inttoptr (i64 -3340545023602065388 to i8*), align 8
// CHECK-GNUSTEP2: @.objc_str_Hello_World = linkonce_odr hidden global { i8**, i32, i32, i32, i32, i8* } { i8** @._OBJC_CLASS_NSConstantString, i32 0, i32 11, i32 11, i32 0, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @1, i64 0, i64 0) }, section "__objc_constant_string", comdat, align 8
// CHECK-GNUSTEP2: @c =
// CHECK-SAME-GNUSTEP2: @.objc_str_Hello_World
@class C;
-// CHECK: define void @test0() [[TF:#[0-9]+]]
+// CHECK: define{{.*}} void @test0() [[TF:#[0-9]+]]
// CHECK-SAME: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_v0 to i8*)
void test0() {
@try {
// Check that we're emitting the protocol and a correctly initialised
// indirection variable.
-// CHECK: @._OBJC_PROTOCOL_X = global
+// CHECK: @._OBJC_PROTOCOL_X ={{.*}} global
// CHECK-SAME: , section "__objc_protocols", comdat, align 8
// CHECK: @._OBJC_REF_PROTOCOL_X = linkonce_odr global
// CHECK-SAME: @._OBJC_PROTOCOL_X
// Check that we load from the indirection variable on protocol references.
-// CHECK: define i8* @x()
+// CHECK: define{{.*}} i8* @x()
// CHECK: = load
// CHECK-SAME: @._OBJC_REF_PROTOCOL_X, align 8
void *x()
void test0(void) {
[Test0 test];
}
-// CHECK-LABEL: define void @test0()
+// CHECK-LABEL: define{{.*}} void @test0()
// CHECK: [[T0:%.*]] = call i8* (i8*, i8*, ...)* @objc_msg_lookup(i8* bitcast (i64* @_OBJC_CLASS_Test0 to i8*),
// CHECK-NEXT: [[T1:%.*]] = bitcast i8* (i8*, i8*, ...)* [[T0]] to void (i8*, i8*)*
// CHECK-NEXT: call void [[T1]](i8* bitcast (i64* @_OBJC_CLASS_Test0 to i8*),
Bar *__weak f;
};
-// WITH_NOALIAS: define void @take(%struct.Foo* %arg)
-// NO_NOALIAS: define void @take(%struct.Foo* %arg)
+// WITH_NOALIAS: define{{.*}} void @take(%struct.Foo* %arg)
+// NO_NOALIAS: define{{.*}} void @take(%struct.Foo* %arg)
void take(struct Foo arg) {}
@end
// Test that compound operations only compute the base once.
-// CHECK-LABEL: define void @test2
+// CHECK-LABEL: define{{.*}} void @test2
A *test2_helper(void);
void test2() {
// CHECK: [[BASE:%.*]] = call [[A:%.*]]* @test2_helper()
@interface Test4 {}
@property float f;
@end
-// CHECK-LABEL: define void @test4
+// CHECK-LABEL: define{{.*}} void @test4
void test4(Test4 *t) {
extern int test4_printf(const char *, ...);
// CHECK: [[TMP:%.*]] = call float {{.*}} @objc_msgSend
t.x |= 5;
t.x ^= 8;
}
-// CHECK: define void @test7([[TEST7:%.*]]*
+// CHECK: define{{.*}} void @test7([[TEST7:%.*]]*
// CHECK: [[T:%.*]] = alloca [[TEST7]]*,
// CHECK-NEXT: store
// CHECK-NEXT: [[T0:%.*]] = load [[TEST7]]*, [[TEST7]]** [[T]], align
(void)t;
}
-// HASSTRET-LABEL: define void @test0()
+// HASSTRET-LABEL: define{{.*}} void @test0()
// HASSTRET: [[T0:%.*]] = call i8* (i8*, i8*, ...)* @objc_msg_lookup_stret(i8* bitcast (i64* @_OBJC_CLASS_Test0 to i8*),
// HASSTRET-NEXT: [[T1:%.*]] = bitcast i8* (i8*, i8*, ...)* [[T0]] to void (%struct.test*, i8*, i8*)*
// HASSTRET-NEXT: call void [[T1]](%struct.test* sret(%struct.test) {{.*}}, i8* bitcast (i64* @_OBJC_CLASS_Test0 to i8*),
-// NOSTRET-LABEL: define void @test0()
+// NOSTRET-LABEL: define{{.*}} void @test0()
// NOSTRET: [[T0:%.*]] = call i8* (i8*, i8*, ...)* @objc_msg_lookup(i8*
// NOSTRET-NEXT: [[T1:%.*]] = bitcast i8* (i8*, i8*, ...)* [[T0]] to void (%struct.test*, i8*, i8*)*
// NOSTRET-NEXT: call void [[T1]](%struct.test* sret(%struct.test) {{.*}}, i8* {{.*}}, i8* bitcast ([2 x { i8*, i8* }]*
[__objc_yes] = 1,
[__objc_no] = 2
};
-// CHECK: @vals1 = global [2 x i32] [i32 2, i32 1]
+// CHECK: @vals1 ={{.*}} global [2 x i32] [i32 2, i32 1]
int vals2[] = {
[true] = 3,
[false] = 4
};
-// CHECK: @vals2 = global [2 x i32] [i32 4, i32 3]
+// CHECK: @vals2 ={{.*}} global [2 x i32] [i32 4, i32 3]
int vals3[] = {
[false] = 1,
[true] = 2,
5
};
-// CHECK: @vals3 = global [3 x i32] [i32 1, i32 2, i32 5]
+// CHECK: @vals3 ={{.*}} global [3 x i32] [i32 1, i32 2, i32 5]
int vals4[2] = {
[true] = 5,
[false] = 6
};
-// CHECK: @vals4 = global [2 x i32] [i32 6, i32 5]
+// CHECK: @vals4 ={{.*}} global [2 x i32] [i32 6, i32 5]
int vals5[3] = {
[false] = 1,
[true] = 2,
6
};
-// CHECK: @vals5 = global [3 x i32] [i32 1, i32 2, i32 6]
+// CHECK: @vals5 ={{.*}} global [3 x i32] [i32 1, i32 2, i32 6]
enum SomeEnum : unsigned char {
blah = 255
char vals6[] = {
[blah] = 'a'
};
-// CHECK: @vals6 = global [256 x i8] c"\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00a"
+// CHECK: @vals6 ={{.*}} global [256 x i8] c"\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00a"
@interface OCType @end
void opaque();
-// CHECK: define void @_Z3foov()
+// CHECK: define{{.*}} void @_Z3foov()
// CHECK-DWARF-SAME: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_v0 to i8*)
// CHECK-SJLJ-SAME: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_sj0 to i8*)
void foo() {
}
#endif
-// AMDGCN-LABEL: define amdgpu_kernel void @test_indirect_arg_local()
+// AMDGCN-LABEL: define{{.*}} amdgpu_kernel void @test_indirect_arg_local()
// AMDGCN: %[[byval_temp:.*]] = alloca %struct.LargeStructOneMember, align 8, addrspace(5)
// AMDGCN: %[[r0:.*]] = bitcast %struct.LargeStructOneMember addrspace(5)* %[[byval_temp]] to i8 addrspace(5)*
// AMDGCN: call void @llvm.memcpy.p5i8.p3i8.i64(i8 addrspace(5)* align 8 %[[r0]], i8 addrspace(3)* align 8 bitcast (%struct.LargeStructOneMember addrspace(3)* @test_indirect_arg_local.l_s to i8 addrspace(3)*), i64 800, i1 false)
FuncOneLargeMember(p_s);
}
-// AMDGCN-LABEL: define amdgpu_kernel void @KernelOneMember
+// AMDGCN-LABEL: define{{.*}} amdgpu_kernel void @KernelOneMember
// AMDGCN-SAME: (<2 x i32> %[[u_coerce:.*]])
// AMDGCN: %[[u:.*]] = alloca %struct.StructOneMember, align 8, addrspace(5)
// AMDGCN: %[[coerce_dive:.*]] = getelementptr inbounds %struct.StructOneMember, %struct.StructOneMember addrspace(5)* %[[u]], i32 0, i32 0
FuncOneMember(*u);
}
-// AMDGCN-LABEL: define amdgpu_kernel void @KernelLargeOneMember(
+// AMDGCN-LABEL: define{{.*}} amdgpu_kernel void @KernelLargeOneMember(
// AMDGCN: %[[U:.*]] = alloca %struct.LargeStructOneMember, align 8, addrspace(5)
// AMDGCN: store %struct.LargeStructOneMember %u.coerce, %struct.LargeStructOneMember addrspace(5)* %[[U]], align 8
// AMDGCN: call void @FuncOneLargeMember(%struct.LargeStructOneMember addrspace(5)* byval(%struct.LargeStructOneMember) align 8 %[[U]])
u.y[0] = (int2)(0, 0);
}
-// AMDGCN-LABEL: define amdgpu_kernel void @KernelTwoMember
+// AMDGCN-LABEL: define{{.*}} amdgpu_kernel void @KernelTwoMember
// AMDGCN-SAME: (%struct.StructTwoMember %[[u_coerce:.*]])
// AMDGCN: %[[u:.*]] = alloca %struct.StructTwoMember, align 8, addrspace(5)
// AMDGCN: %[[LD0:.*]] = load <2 x i32>, <2 x i32> addrspace(5)*
FuncTwoMember(u);
}
-// AMDGCN-LABEL: define amdgpu_kernel void @KernelLargeTwoMember
+// AMDGCN-LABEL: define{{.*}} amdgpu_kernel void @KernelLargeTwoMember
// AMDGCN-SAME: (%struct.LargeStructTwoMember %[[u_coerce:.*]])
// AMDGCN: %[[u:.*]] = alloca %struct.LargeStructTwoMember, align 8, addrspace(5)
// AMDGCN: store %struct.LargeStructTwoMember %[[u_coerce]], %struct.LargeStructTwoMember addrspace(5)* %[[u]]
// test that we generate address space casts everywhere we need conversions of
// pointers to different address spaces
-// CHECK: define void @test
+// CHECK: define{{.*}} void @test
void test(global int *arg_glob, generic int *arg_gen,
__attribute__((opencl_global_device)) int *arg_device,
__attribute__((opencl_global_host)) int *arg_host) {
}
// Test ternary operator.
-// CHECK: define void @test_ternary
+// CHECK: define{{.*}} void @test_ternary
void test_ternary(void) {
global int *var_glob;
generic int *var_gen;
// RUN: %clang_cc1 -O0 -cl-std=CL1.2 -triple amdgcn---amdgizcl -emit-llvm %s -o - | FileCheck -check-prefixes=CHECK,CL12 %s
// RUN: %clang_cc1 -O0 -cl-std=CL2.0 -triple amdgcn---amdgizcl -emit-llvm %s -o - | FileCheck -check-prefixes=CHECK,CL20 %s
-// CL12-LABEL: define void @func1(i32 addrspace(5)* %x)
-// CL20-LABEL: define void @func1(i32* %x)
+// CL12-LABEL: define{{.*}} void @func1(i32 addrspace(5)* %x)
+// CL20-LABEL: define{{.*}} void @func1(i32* %x)
void func1(int *x) {
// CL12: %[[x_addr:.*]] = alloca i32 addrspace(5)*{{.*}}addrspace(5)
// CL12: store i32 addrspace(5)* %x, i32 addrspace(5)* addrspace(5)* %[[x_addr]]
*x = 1;
}
-// CHECK-LABEL: define void @func2()
+// CHECK-LABEL: define{{.*}} void @func2()
void func2(void) {
// CHECK: %lv1 = alloca i32, align 4, addrspace(5)
// CHECK: %lv2 = alloca i32, align 4, addrspace(5)
lv1 = lvc;
}
-// CHECK-LABEL: define void @func3()
+// CHECK-LABEL: define{{.*}} void @func3()
// CHECK: %a = alloca [16 x [1 x float]], align 4, addrspace(5)
// CHECK: %[[CAST:.+]] = bitcast [16 x [1 x float]] addrspace(5)* %a to i8 addrspace(5)*
// CHECK: call void @llvm.memset.p5i8.i64(i8 addrspace(5)* align 4 %[[CAST]], i8 0, i64 64, i1 false)
// REQUIRES: amdgpu-registered-target
// RUN: %clang_cc1 -cl-std=CL2.0 -triple amdgcn-unknown-unknown -S -emit-llvm -o - %s | FileCheck %s
-// CHECK: @One = local_unnamed_addr addrspace(1) global [6442450944 x i8] zeroinitializer, align 1
+// CHECK: @One ={{.*}} local_unnamed_addr addrspace(1) global [6442450944 x i8] zeroinitializer, align 1
unsigned char One[6442450944];
-// CHECK: @Two = local_unnamed_addr addrspace(1) global [6442450944 x i32] zeroinitializer, align 4
+// CHECK: @Two ={{.*}} local_unnamed_addr addrspace(1) global [6442450944 x i32] zeroinitializer, align 4
global unsigned int Two[6442450944];
kernel void large_globals(unsigned int id) {
// CHECK: void @kernel_different_size_type_pair_arg(%struct.different_size_type_pair %arg1.coerce)
__kernel void kernel_different_size_type_pair_arg(different_size_type_pair arg1) { }
-// CHECK: define void @func_f32_arg(float %arg)
+// CHECK: define{{.*}} void @func_f32_arg(float %arg)
void func_f32_arg(float arg) { }
-// CHECK: define void @func_v2i16_arg(<2 x i16> %arg)
+// CHECK: define{{.*}} void @func_v2i16_arg(<2 x i16> %arg)
void func_v2i16_arg(short2 arg) { }
-// CHECK: define void @func_v3i32_arg(<3 x i32> %arg)
+// CHECK: define{{.*}} void @func_v3i32_arg(<3 x i32> %arg)
void func_v3i32_arg(int3 arg) { }
-// CHECK: define void @func_v4i32_arg(<4 x i32> %arg)
+// CHECK: define{{.*}} void @func_v4i32_arg(<4 x i32> %arg)
void func_v4i32_arg(int4 arg) { }
-// CHECK: define void @func_v16i32_arg(<16 x i32> %arg)
+// CHECK: define{{.*}} void @func_v16i32_arg(<16 x i32> %arg)
void func_v16i32_arg(int16 arg) { }
-// CHECK: define void @func_v32i32_arg(<32 x i32> %arg)
+// CHECK: define{{.*}} void @func_v32i32_arg(<32 x i32> %arg)
void func_v32i32_arg(int32 arg) { }
-// CHECK: define void @func_empty_struct_arg()
+// CHECK: define{{.*}} void @func_empty_struct_arg()
void func_empty_struct_arg(empty_struct empty) { }
// CHECK: void @func_single_element_struct_arg(i32 %arg1.coerce)
// CHECK: void @func_struct_padding_arg(i8 %arg1.coerce0, i64 %arg1.coerce1)
void func_struct_padding_arg(struct_padding_arg arg1) { }
-// CHECK: define void @func_struct_char_x8([2 x i32] %arg.coerce)
+// CHECK: define{{.*}} void @func_struct_char_x8([2 x i32] %arg.coerce)
void func_struct_char_x8(struct_char_x8 arg) { }
-// CHECK: define void @func_struct_char_x4(i32 %arg.coerce)
+// CHECK: define{{.*}} void @func_struct_char_x4(i32 %arg.coerce)
void func_struct_char_x4(struct_char_x4 arg) { }
-// CHECK: define void @func_struct_char_x3(i32 %arg.coerce)
+// CHECK: define{{.*}} void @func_struct_char_x3(i32 %arg.coerce)
void func_struct_char_x3(struct_char_x3 arg) { }
-// CHECK: define void @func_struct_char_x2(i16 %arg.coerce)
+// CHECK: define{{.*}} void @func_struct_char_x2(i16 %arg.coerce)
void func_struct_char_x2(struct_char_x2 arg) { }
-// CHECK: define void @func_struct_char_x1(i8 %arg.coerce)
+// CHECK: define{{.*}} void @func_struct_char_x1(i8 %arg.coerce)
void func_struct_char_x1(struct_char_x1 arg) { }
// CHECK: void @func_transparent_union_arg(i32 %u.coerce)
// CHECK: void @func_flexible_array_arg(%struct.flexible_array addrspace(5)* nocapture byval(%struct.flexible_array) align 4 %arg)
void func_flexible_array_arg(flexible_array arg) { }
-// CHECK: define float @func_f32_ret()
+// CHECK: define{{.*}} float @func_f32_ret()
float func_f32_ret()
{
return 0.0f;
}
-// CHECK: define void @func_empty_struct_ret()
+// CHECK: define{{.*}} void @func_empty_struct_ret()
empty_struct func_empty_struct_ret()
{
empty_struct s = {};
return s;
}
-// CHECK: define i32 @single_element_struct_ret()
+// CHECK: define{{.*}} i32 @single_element_struct_ret()
// CHECK: ret i32 0
single_element_struct_arg_t single_element_struct_ret()
{
return s;
}
-// CHECK: define i32 @nested_single_element_struct_ret()
+// CHECK: define{{.*}} i32 @nested_single_element_struct_ret()
// CHECK: ret i32 0
nested_single_element_struct_arg_t nested_single_element_struct_ret()
{
return s;
}
-// CHECK: define %struct.struct_arg @func_struct_ret()
+// CHECK: define{{.*}} %struct.struct_arg @func_struct_ret()
// CHECK: ret %struct.struct_arg zeroinitializer
struct_arg_t func_struct_ret()
{
return s;
}
-// CHECK: define %struct.struct_padding_arg @func_struct_padding_ret()
+// CHECK: define{{.*}} %struct.struct_padding_arg @func_struct_padding_ret()
// CHECK: ret %struct.struct_padding_arg zeroinitializer
struct_padding_arg func_struct_padding_ret()
{
return s;
}
-// CHECK: define [2 x i32] @func_struct_char_x8_ret()
+// CHECK: define{{.*}} [2 x i32] @func_struct_char_x8_ret()
// CHECK: ret [2 x i32] zeroinitializer
struct_char_x8 func_struct_char_x8_ret()
{
return s;
}
-// CHECK: define i32 @func_struct_char_x4_ret()
+// CHECK: define{{.*}} i32 @func_struct_char_x4_ret()
// CHECK: ret i32 0
struct_char_x4 func_struct_char_x4_ret()
{
return s;
}
-// CHECK: define i32 @func_struct_char_x3_ret()
+// CHECK: define{{.*}} i32 @func_struct_char_x3_ret()
// CHECK: ret i32 0
struct_char_x3 func_struct_char_x3_ret()
{
return s;
}
-// CHECK: define i16 @func_struct_char_x2_ret()
+// CHECK: define{{.*}} i16 @func_struct_char_x2_ret()
struct_char_x2 func_struct_char_x2_ret()
{
struct_char_x2 s = { 0 };
return s;
}
-// CHECK: define i8 @func_struct_char_x1_ret()
+// CHECK: define{{.*}} i8 @func_struct_char_x1_ret()
// CHECK: ret i8 0
struct_char_x1 func_struct_char_x1_ret()
{
return s;
}
-// CHECK: define %struct.struct_arr16 @func_ret_struct_arr16()
+// CHECK: define{{.*}} %struct.struct_arr16 @func_ret_struct_arr16()
// CHECK: ret %struct.struct_arr16 zeroinitializer
struct_arr16 func_ret_struct_arr16()
{
return s;
}
-// CHECK: define void @func_ret_struct_arr32(%struct.struct_arr32 addrspace(5)* noalias nocapture sret(%struct.struct_arr32) align 4 %agg.result)
+// CHECK: define{{.*}} void @func_ret_struct_arr32(%struct.struct_arr32 addrspace(5)* noalias nocapture sret(%struct.struct_arr32) align 4 %agg.result)
struct_arr32 func_ret_struct_arr32()
{
struct_arr32 s = { 0 };
return s;
}
-// CHECK: define void @func_ret_struct_arr33(%struct.struct_arr33 addrspace(5)* noalias nocapture sret(%struct.struct_arr33) align 4 %agg.result)
+// CHECK: define{{.*}} void @func_ret_struct_arr33(%struct.struct_arr33 addrspace(5)* noalias nocapture sret(%struct.struct_arr33) align 4 %agg.result)
struct_arr33 func_ret_struct_arr33()
{
struct_arr33 s = { 0 };
return s;
}
-// CHECK: define %struct.struct_char_arr32 @func_ret_struct_char_arr32()
+// CHECK: define{{.*}} %struct.struct_char_arr32 @func_ret_struct_char_arr32()
struct_char_arr32 func_ret_struct_char_arr32()
{
struct_char_arr32 s = { 0 };
return s;
}
-// CHECK: define i32 @func_transparent_union_ret() local_unnamed_addr #1 {
+// CHECK: define{{.*}} i32 @func_transparent_union_ret() local_unnamed_addr #1 {
// CHECK: ret i32 0
transparent_u func_transparent_union_ret()
{
return u;
}
-// CHECK: define %struct.different_size_type_pair @func_different_size_type_pair_ret()
+// CHECK: define{{.*}} %struct.different_size_type_pair @func_different_size_type_pair_ret()
different_size_type_pair func_different_size_type_pair_ret()
{
different_size_type_pair s = { 0 };
return s;
}
-// CHECK: define void @func_flexible_array_ret(%struct.flexible_array addrspace(5)* noalias nocapture sret(%struct.flexible_array) align 4 %agg.result)
+// CHECK: define{{.*}} void @func_flexible_array_ret(%struct.flexible_array addrspace(5)* noalias nocapture sret(%struct.flexible_array) align 4 %agg.result)
flexible_array func_flexible_array_ret()
{
flexible_array s = { 0 };
return s;
}
-// CHECK: define void @func_reg_state_lo(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3, i32 %s.coerce0, float %s.coerce1, i32 %s.coerce2)
+// CHECK: define{{.*}} void @func_reg_state_lo(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3, i32 %s.coerce0, float %s.coerce1, i32 %s.coerce2)
void func_reg_state_lo(int4 arg0, int4 arg1, int4 arg2, int arg3, struct_arg_t s) { }
-// CHECK: define void @func_reg_state_hi(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3, i32 %arg4, %struct.struct_arg addrspace(5)* nocapture byval(%struct.struct_arg) align 4 %s)
+// CHECK: define{{.*}} void @func_reg_state_hi(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3, i32 %arg4, %struct.struct_arg addrspace(5)* nocapture byval(%struct.struct_arg) align 4 %s)
void func_reg_state_hi(int4 arg0, int4 arg1, int4 arg2, int arg3, int arg4, struct_arg_t s) { }
// XXX - Why don't the inner structs flatten?
-// CHECK: define void @func_reg_state_num_regs_nested_struct(<4 x i32> %arg0, i32 %arg1, i32 %arg2.coerce0, %struct.nested %arg2.coerce1, i32 %arg3.coerce0, %struct.nested %arg3.coerce1, %struct.num_regs_nested_struct addrspace(5)* nocapture byval(%struct.num_regs_nested_struct) align 8 %arg4)
+// CHECK: define{{.*}} void @func_reg_state_num_regs_nested_struct(<4 x i32> %arg0, i32 %arg1, i32 %arg2.coerce0, %struct.nested %arg2.coerce1, i32 %arg3.coerce0, %struct.nested %arg3.coerce1, %struct.num_regs_nested_struct addrspace(5)* nocapture byval(%struct.num_regs_nested_struct) align 8 %arg4)
void func_reg_state_num_regs_nested_struct(int4 arg0, int arg1, num_regs_nested_struct arg2, num_regs_nested_struct arg3, num_regs_nested_struct arg4) { }
-// CHECK: define void @func_double_nested_struct_arg(<4 x i32> %arg0, i32 %arg1, i32 %arg2.coerce0, %struct.double_nested %arg2.coerce1, i16 %arg2.coerce2)
+// CHECK: define{{.*}} void @func_double_nested_struct_arg(<4 x i32> %arg0, i32 %arg1, i32 %arg2.coerce0, %struct.double_nested %arg2.coerce1, i16 %arg2.coerce2)
void func_double_nested_struct_arg(int4 arg0, int arg1, double_nested_struct arg2) { }
-// CHECK: define %struct.double_nested_struct @func_double_nested_struct_ret(<4 x i32> %arg0, i32 %arg1)
+// CHECK: define{{.*}} %struct.double_nested_struct @func_double_nested_struct_ret(<4 x i32> %arg0, i32 %arg1)
double_nested_struct func_double_nested_struct_ret(int4 arg0, int arg1) {
double_nested_struct s = { 0 };
return s;
}
-// CHECK: define void @func_large_struct_padding_arg_direct(i8 %arg.coerce0, i32 %arg.coerce1, i8 %arg.coerce2, i32 %arg.coerce3, i8 %arg.coerce4, i8 %arg.coerce5, i16 %arg.coerce6, i16 %arg.coerce7, [3 x i8] %arg.coerce8, i64 %arg.coerce9, i32 %arg.coerce10, i8 %arg.coerce11, i32 %arg.coerce12, i16 %arg.coerce13, i8 %arg.coerce14)
+// CHECK: define{{.*}} void @func_large_struct_padding_arg_direct(i8 %arg.coerce0, i32 %arg.coerce1, i8 %arg.coerce2, i32 %arg.coerce3, i8 %arg.coerce4, i8 %arg.coerce5, i16 %arg.coerce6, i16 %arg.coerce7, [3 x i8] %arg.coerce8, i64 %arg.coerce9, i32 %arg.coerce10, i8 %arg.coerce11, i32 %arg.coerce12, i16 %arg.coerce13, i8 %arg.coerce14)
void func_large_struct_padding_arg_direct(large_struct_padding arg) { }
-// CHECK: define void @func_large_struct_padding_arg_store(%struct.large_struct_padding addrspace(1)* nocapture %out, %struct.large_struct_padding addrspace(5)* nocapture readonly byval(%struct.large_struct_padding) align 8 %arg)
+// CHECK: define{{.*}} void @func_large_struct_padding_arg_store(%struct.large_struct_padding addrspace(1)* nocapture %out, %struct.large_struct_padding addrspace(5)* nocapture readonly byval(%struct.large_struct_padding) align 8 %arg)
void func_large_struct_padding_arg_store(global large_struct_padding* out, large_struct_padding arg) {
*out = arg;
}
-// CHECK: define void @v3i32_reg_count(<3 x i32> %arg1, <3 x i32> %arg2, <3 x i32> %arg3, <3 x i32> %arg4, i32 %arg5.coerce0, float %arg5.coerce1, i32 %arg5.coerce2)
+// CHECK: define{{.*}} void @v3i32_reg_count(<3 x i32> %arg1, <3 x i32> %arg2, <3 x i32> %arg3, <3 x i32> %arg4, i32 %arg5.coerce0, float %arg5.coerce1, i32 %arg5.coerce2)
void v3i32_reg_count(int3 arg1, int3 arg2, int3 arg3, int3 arg4, struct_arg_t arg5) { }
// Function signature from blender, nothing should be passed byval. The v3i32
// should not count as 4 passed registers.
-// CHECK: define void @v3i32_pair_reg_count(%struct.int3_pair addrspace(5)* nocapture %arg0, <3 x i32> %arg1.coerce0, <3 x i32> %arg1.coerce1, <3 x i32> %arg2, <3 x i32> %arg3.coerce0, <3 x i32> %arg3.coerce1, <3 x i32> %arg4, float %arg5)
+// CHECK: define{{.*}} void @v3i32_pair_reg_count(%struct.int3_pair addrspace(5)* nocapture %arg0, <3 x i32> %arg1.coerce0, <3 x i32> %arg1.coerce1, <3 x i32> %arg2, <3 x i32> %arg3.coerce0, <3 x i32> %arg3.coerce1, <3 x i32> %arg4, float %arg5)
void v3i32_pair_reg_count(int3_pair *arg0, int3_pair arg1, int3 arg2, int3_pair arg3, int3 arg4, float arg5) { }
// Each short4 should fit pack into 2 registers.
-// CHECK: define void @v4i16_reg_count(<4 x i16> %arg0, <4 x i16> %arg1, <4 x i16> %arg2, <4 x i16> %arg3, <4 x i16> %arg4, <4 x i16> %arg5, i32 %arg6.coerce0, i32 %arg6.coerce1, i32 %arg6.coerce2, i32 %arg6.coerce3)
+// CHECK: define{{.*}} void @v4i16_reg_count(<4 x i16> %arg0, <4 x i16> %arg1, <4 x i16> %arg2, <4 x i16> %arg3, <4 x i16> %arg4, <4 x i16> %arg5, i32 %arg6.coerce0, i32 %arg6.coerce1, i32 %arg6.coerce2, i32 %arg6.coerce3)
void v4i16_reg_count(short4 arg0, short4 arg1, short4 arg2, short4 arg3,
short4 arg4, short4 arg5, struct_4regs arg6) { }
-// CHECK: define void @v4i16_pair_reg_count_over(<4 x i16> %arg0, <4 x i16> %arg1, <4 x i16> %arg2, <4 x i16> %arg3, <4 x i16> %arg4, <4 x i16> %arg5, <4 x i16> %arg6, %struct.struct_4regs addrspace(5)* nocapture byval(%struct.struct_4regs) align 4 %arg7)
+// CHECK: define{{.*}} void @v4i16_pair_reg_count_over(<4 x i16> %arg0, <4 x i16> %arg1, <4 x i16> %arg2, <4 x i16> %arg3, <4 x i16> %arg4, <4 x i16> %arg5, <4 x i16> %arg6, %struct.struct_4regs addrspace(5)* nocapture byval(%struct.struct_4regs) align 4 %arg7)
void v4i16_pair_reg_count_over(short4 arg0, short4 arg1, short4 arg2, short4 arg3,
short4 arg4, short4 arg5, short4 arg6, struct_4regs arg7) { }
-// CHECK: define void @v3i16_reg_count(<3 x i16> %arg0, <3 x i16> %arg1, <3 x i16> %arg2, <3 x i16> %arg3, <3 x i16> %arg4, <3 x i16> %arg5, i32 %arg6.coerce0, i32 %arg6.coerce1, i32 %arg6.coerce2, i32 %arg6.coerce3)
+// CHECK: define{{.*}} void @v3i16_reg_count(<3 x i16> %arg0, <3 x i16> %arg1, <3 x i16> %arg2, <3 x i16> %arg3, <3 x i16> %arg4, <3 x i16> %arg5, i32 %arg6.coerce0, i32 %arg6.coerce1, i32 %arg6.coerce2, i32 %arg6.coerce3)
void v3i16_reg_count(short3 arg0, short3 arg1, short3 arg2, short3 arg3,
short3 arg4, short3 arg5, struct_4regs arg6) { }
-// CHECK: define void @v3i16_reg_count_over(<3 x i16> %arg0, <3 x i16> %arg1, <3 x i16> %arg2, <3 x i16> %arg3, <3 x i16> %arg4, <3 x i16> %arg5, <3 x i16> %arg6, %struct.struct_4regs addrspace(5)* nocapture byval(%struct.struct_4regs) align 4 %arg7)
+// CHECK: define{{.*}} void @v3i16_reg_count_over(<3 x i16> %arg0, <3 x i16> %arg1, <3 x i16> %arg2, <3 x i16> %arg3, <3 x i16> %arg4, <3 x i16> %arg5, <3 x i16> %arg6, %struct.struct_4regs addrspace(5)* nocapture byval(%struct.struct_4regs) align 4 %arg7)
void v3i16_reg_count_over(short3 arg0, short3 arg1, short3 arg2, short3 arg3,
short3 arg4, short3 arg5, short3 arg6, struct_4regs arg7) { }
-// CHECK: define void @v2i16_reg_count(<2 x i16> %arg0, <2 x i16> %arg1, <2 x i16> %arg2, <2 x i16> %arg3, <2 x i16> %arg4, <2 x i16> %arg5, <2 x i16> %arg6, <2 x i16> %arg7, <2 x i16> %arg8, <2 x i16> %arg9, <2 x i16> %arg10, <2 x i16> %arg11, i32 %arg13.coerce0, i32 %arg13.coerce1, i32 %arg13.coerce2, i32 %arg13.coerce3)
+// CHECK: define{{.*}} void @v2i16_reg_count(<2 x i16> %arg0, <2 x i16> %arg1, <2 x i16> %arg2, <2 x i16> %arg3, <2 x i16> %arg4, <2 x i16> %arg5, <2 x i16> %arg6, <2 x i16> %arg7, <2 x i16> %arg8, <2 x i16> %arg9, <2 x i16> %arg10, <2 x i16> %arg11, i32 %arg13.coerce0, i32 %arg13.coerce1, i32 %arg13.coerce2, i32 %arg13.coerce3)
void v2i16_reg_count(short2 arg0, short2 arg1, short2 arg2, short2 arg3,
short2 arg4, short2 arg5, short2 arg6, short2 arg7,
short2 arg8, short2 arg9, short2 arg10, short2 arg11,
struct_4regs arg13) { }
-// CHECK: define void @v2i16_reg_count_over(<2 x i16> %arg0, <2 x i16> %arg1, <2 x i16> %arg2, <2 x i16> %arg3, <2 x i16> %arg4, <2 x i16> %arg5, <2 x i16> %arg6, <2 x i16> %arg7, <2 x i16> %arg8, <2 x i16> %arg9, <2 x i16> %arg10, <2 x i16> %arg11, <2 x i16> %arg12, %struct.struct_4regs addrspace(5)* nocapture byval(%struct.struct_4regs) align 4 %arg13)
+// CHECK: define{{.*}} void @v2i16_reg_count_over(<2 x i16> %arg0, <2 x i16> %arg1, <2 x i16> %arg2, <2 x i16> %arg3, <2 x i16> %arg4, <2 x i16> %arg5, <2 x i16> %arg6, <2 x i16> %arg7, <2 x i16> %arg8, <2 x i16> %arg9, <2 x i16> %arg10, <2 x i16> %arg11, <2 x i16> %arg12, %struct.struct_4regs addrspace(5)* nocapture byval(%struct.struct_4regs) align 4 %arg13)
void v2i16_reg_count_over(short2 arg0, short2 arg1, short2 arg2, short2 arg3,
short2 arg4, short2 arg5, short2 arg6, short2 arg7,
short2 arg8, short2 arg9, short2 arg10, short2 arg11,
short2 arg12, struct_4regs arg13) { }
-// CHECK: define void @v2i8_reg_count(<2 x i8> %arg0, <2 x i8> %arg1, <2 x i8> %arg2, <2 x i8> %arg3, <2 x i8> %arg4, <2 x i8> %arg5, i32 %arg6.coerce0, i32 %arg6.coerce1, i32 %arg6.coerce2, i32 %arg6.coerce3)
+// CHECK: define{{.*}} void @v2i8_reg_count(<2 x i8> %arg0, <2 x i8> %arg1, <2 x i8> %arg2, <2 x i8> %arg3, <2 x i8> %arg4, <2 x i8> %arg5, i32 %arg6.coerce0, i32 %arg6.coerce1, i32 %arg6.coerce2, i32 %arg6.coerce3)
void v2i8_reg_count(char2 arg0, char2 arg1, char2 arg2, char2 arg3,
char2 arg4, char2 arg5, struct_4regs arg6) { }
-// CHECK: define void @v2i8_reg_count_over(<2 x i8> %arg0, <2 x i8> %arg1, <2 x i8> %arg2, <2 x i8> %arg3, <2 x i8> %arg4, <2 x i8> %arg5, i32 %arg6, %struct.struct_4regs addrspace(5)* nocapture byval(%struct.struct_4regs) align 4 %arg7)
+// CHECK: define{{.*}} void @v2i8_reg_count_over(<2 x i8> %arg0, <2 x i8> %arg1, <2 x i8> %arg2, <2 x i8> %arg3, <2 x i8> %arg4, <2 x i8> %arg5, i32 %arg6, %struct.struct_4regs addrspace(5)* nocapture byval(%struct.struct_4regs) align 4 %arg7)
void v2i8_reg_count_over(char2 arg0, char2 arg1, char2 arg2, char2 arg3,
char2 arg4, char2 arg5, int arg6, struct_4regs arg7) { }
-// CHECK: define void @num_regs_left_64bit_aggregate(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, <3 x i32> %arg3, [2 x i32] %arg4.coerce, i32 %arg5)
+// CHECK: define{{.*}} void @num_regs_left_64bit_aggregate(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, <3 x i32> %arg3, [2 x i32] %arg4.coerce, i32 %arg5)
void num_regs_left_64bit_aggregate(int4 arg0, int4 arg1, int4 arg2, int3 arg3, struct_char_x8 arg4, int arg5) { }
__attribute__((amdgpu_flat_work_group_size(32, 64))) // expected-no-diagnostics
kernel void flat_work_group_size_32_64() {
-// CHECK: define amdgpu_kernel void @flat_work_group_size_32_64() [[FLAT_WORK_GROUP_SIZE_32_64:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @flat_work_group_size_32_64() [[FLAT_WORK_GROUP_SIZE_32_64:#[0-9]+]]
}
__attribute__((amdgpu_waves_per_eu(2))) // expected-no-diagnostics
kernel void waves_per_eu_2() {
-// CHECK: define amdgpu_kernel void @waves_per_eu_2() [[WAVES_PER_EU_2:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @waves_per_eu_2() [[WAVES_PER_EU_2:#[0-9]+]]
}
__attribute__((amdgpu_waves_per_eu(2, 4))) // expected-no-diagnostics
kernel void waves_per_eu_2_4() {
-// CHECK: define amdgpu_kernel void @waves_per_eu_2_4() [[WAVES_PER_EU_2_4:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @waves_per_eu_2_4() [[WAVES_PER_EU_2_4:#[0-9]+]]
}
__attribute__((amdgpu_num_sgpr(32))) // expected-no-diagnostics
kernel void num_sgpr_32() {
-// CHECK: define amdgpu_kernel void @num_sgpr_32() [[NUM_SGPR_32:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @num_sgpr_32() [[NUM_SGPR_32:#[0-9]+]]
}
__attribute__((amdgpu_num_vgpr(64))) // expected-no-diagnostics
kernel void num_vgpr_64() {
-// CHECK: define amdgpu_kernel void @num_vgpr_64() [[NUM_VGPR_64:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @num_vgpr_64() [[NUM_VGPR_64:#[0-9]+]]
}
__attribute__((amdgpu_flat_work_group_size(32, 64), amdgpu_waves_per_eu(2))) // expected-no-diagnostics
kernel void flat_work_group_size_32_64_waves_per_eu_2() {
-// CHECK: define amdgpu_kernel void @flat_work_group_size_32_64_waves_per_eu_2() [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @flat_work_group_size_32_64_waves_per_eu_2() [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2:#[0-9]+]]
}
__attribute__((amdgpu_flat_work_group_size(32, 64), amdgpu_waves_per_eu(2, 4))) // expected-no-diagnostics
kernel void flat_work_group_size_32_64_waves_per_eu_2_4() {
-// CHECK: define amdgpu_kernel void @flat_work_group_size_32_64_waves_per_eu_2_4() [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @flat_work_group_size_32_64_waves_per_eu_2_4() [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4:#[0-9]+]]
}
__attribute__((amdgpu_flat_work_group_size(32, 64), amdgpu_num_sgpr(32))) // expected-no-diagnostics
kernel void flat_work_group_size_32_64_num_sgpr_32() {
-// CHECK: define amdgpu_kernel void @flat_work_group_size_32_64_num_sgpr_32() [[FLAT_WORK_GROUP_SIZE_32_64_NUM_SGPR_32:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @flat_work_group_size_32_64_num_sgpr_32() [[FLAT_WORK_GROUP_SIZE_32_64_NUM_SGPR_32:#[0-9]+]]
}
__attribute__((amdgpu_flat_work_group_size(32, 64), amdgpu_num_vgpr(64))) // expected-no-diagnostics
kernel void flat_work_group_size_32_64_num_vgpr_64() {
-// CHECK: define amdgpu_kernel void @flat_work_group_size_32_64_num_vgpr_64() [[FLAT_WORK_GROUP_SIZE_32_64_NUM_VGPR_64:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @flat_work_group_size_32_64_num_vgpr_64() [[FLAT_WORK_GROUP_SIZE_32_64_NUM_VGPR_64:#[0-9]+]]
}
__attribute__((amdgpu_waves_per_eu(2), amdgpu_num_sgpr(32))) // expected-no-diagnostics
kernel void waves_per_eu_2_num_sgpr_32() {
-// CHECK: define amdgpu_kernel void @waves_per_eu_2_num_sgpr_32() [[WAVES_PER_EU_2_NUM_SGPR_32:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @waves_per_eu_2_num_sgpr_32() [[WAVES_PER_EU_2_NUM_SGPR_32:#[0-9]+]]
}
__attribute__((amdgpu_waves_per_eu(2), amdgpu_num_vgpr(64))) // expected-no-diagnostics
kernel void waves_per_eu_2_num_vgpr_64() {
-// CHECK: define amdgpu_kernel void @waves_per_eu_2_num_vgpr_64() [[WAVES_PER_EU_2_NUM_VGPR_64:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @waves_per_eu_2_num_vgpr_64() [[WAVES_PER_EU_2_NUM_VGPR_64:#[0-9]+]]
}
__attribute__((amdgpu_waves_per_eu(2, 4), amdgpu_num_sgpr(32))) // expected-no-diagnostics
kernel void waves_per_eu_2_4_num_sgpr_32() {
-// CHECK: define amdgpu_kernel void @waves_per_eu_2_4_num_sgpr_32() [[WAVES_PER_EU_2_4_NUM_SGPR_32:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @waves_per_eu_2_4_num_sgpr_32() [[WAVES_PER_EU_2_4_NUM_SGPR_32:#[0-9]+]]
}
__attribute__((amdgpu_waves_per_eu(2, 4), amdgpu_num_vgpr(64))) // expected-no-diagnostics
kernel void waves_per_eu_2_4_num_vgpr_64() {
-// CHECK: define amdgpu_kernel void @waves_per_eu_2_4_num_vgpr_64() [[WAVES_PER_EU_2_4_NUM_VGPR_64:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @waves_per_eu_2_4_num_vgpr_64() [[WAVES_PER_EU_2_4_NUM_VGPR_64:#[0-9]+]]
}
__attribute__((amdgpu_num_sgpr(32), amdgpu_num_vgpr(64))) // expected-no-diagnostics
kernel void num_sgpr_32_num_vgpr_64() {
-// CHECK: define amdgpu_kernel void @num_sgpr_32_num_vgpr_64() [[NUM_SGPR_32_NUM_VGPR_64:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @num_sgpr_32_num_vgpr_64() [[NUM_SGPR_32_NUM_VGPR_64:#[0-9]+]]
}
__attribute__((amdgpu_flat_work_group_size(32, 64), amdgpu_waves_per_eu(2), amdgpu_num_sgpr(32)))
kernel void flat_work_group_size_32_64_waves_per_eu_2_num_sgpr_32() {
-// CHECK: define amdgpu_kernel void @flat_work_group_size_32_64_waves_per_eu_2_num_sgpr_32() [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_SGPR_32:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @flat_work_group_size_32_64_waves_per_eu_2_num_sgpr_32() [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_SGPR_32:#[0-9]+]]
}
__attribute__((amdgpu_flat_work_group_size(32, 64), amdgpu_waves_per_eu(2), amdgpu_num_vgpr(64)))
kernel void flat_work_group_size_32_64_waves_per_eu_2_num_vgpr_64() {
-// CHECK: define amdgpu_kernel void @flat_work_group_size_32_64_waves_per_eu_2_num_vgpr_64() [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_VGPR_64:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @flat_work_group_size_32_64_waves_per_eu_2_num_vgpr_64() [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_VGPR_64:#[0-9]+]]
}
__attribute__((amdgpu_flat_work_group_size(32, 64), amdgpu_waves_per_eu(2, 4), amdgpu_num_sgpr(32)))
kernel void flat_work_group_size_32_64_waves_per_eu_2_4_num_sgpr_32() {
-// CHECK: define amdgpu_kernel void @flat_work_group_size_32_64_waves_per_eu_2_4_num_sgpr_32() [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_SGPR_32:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @flat_work_group_size_32_64_waves_per_eu_2_4_num_sgpr_32() [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_SGPR_32:#[0-9]+]]
}
__attribute__((amdgpu_flat_work_group_size(32, 64), amdgpu_waves_per_eu(2, 4), amdgpu_num_vgpr(64)))
kernel void flat_work_group_size_32_64_waves_per_eu_2_4_num_vgpr_64() {
-// CHECK: define amdgpu_kernel void @flat_work_group_size_32_64_waves_per_eu_2_4_num_vgpr_64() [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_VGPR_64:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @flat_work_group_size_32_64_waves_per_eu_2_4_num_vgpr_64() [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_VGPR_64:#[0-9]+]]
}
__attribute__((amdgpu_flat_work_group_size(32, 64), amdgpu_waves_per_eu(2), amdgpu_num_sgpr(32), amdgpu_num_vgpr(64))) // expected-no-diagnostics
kernel void flat_work_group_size_32_64_waves_per_eu_2_num_sgpr_32_num_vgpr_64() {
-// CHECK: define amdgpu_kernel void @flat_work_group_size_32_64_waves_per_eu_2_num_sgpr_32_num_vgpr_64() [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_SGPR_32_NUM_VGPR_64:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @flat_work_group_size_32_64_waves_per_eu_2_num_sgpr_32_num_vgpr_64() [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_SGPR_32_NUM_VGPR_64:#[0-9]+]]
}
__attribute__((amdgpu_flat_work_group_size(32, 64), amdgpu_waves_per_eu(2, 4), amdgpu_num_sgpr(32), amdgpu_num_vgpr(64))) // expected-no-diagnostics
kernel void flat_work_group_size_32_64_waves_per_eu_2_4_num_sgpr_32_num_vgpr_64() {
-// CHECK: define amdgpu_kernel void @flat_work_group_size_32_64_waves_per_eu_2_4_num_sgpr_32_num_vgpr_64() [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_SGPR_32_NUM_VGPR_64:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @flat_work_group_size_32_64_waves_per_eu_2_4_num_sgpr_32_num_vgpr_64() [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_SGPR_32_NUM_VGPR_64:#[0-9]+]]
}
__attribute__((reqd_work_group_size(32, 2, 1))) // expected-no-diagnostics
kernel void reqd_work_group_size_32_2_1() {
-// CHECK: define amdgpu_kernel void @reqd_work_group_size_32_2_1() [[FLAT_WORK_GROUP_SIZE_64_64:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @reqd_work_group_size_32_2_1() [[FLAT_WORK_GROUP_SIZE_64_64:#[0-9]+]]
}
__attribute__((reqd_work_group_size(32, 2, 1), amdgpu_flat_work_group_size(16, 128))) // expected-no-diagnostics
kernel void reqd_work_group_size_32_2_1_flat_work_group_size_16_128() {
-// CHECK: define amdgpu_kernel void @reqd_work_group_size_32_2_1_flat_work_group_size_16_128() [[FLAT_WORK_GROUP_SIZE_16_128:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @reqd_work_group_size_32_2_1_flat_work_group_size_16_128() [[FLAT_WORK_GROUP_SIZE_16_128:#[0-9]+]]
}
void a_function() {
-// CHECK: define void @a_function() [[A_FUNCTION:#[0-9]+]]
+// CHECK: define{{.*}} void @a_function() [[A_FUNCTION:#[0-9]+]]
}
kernel void default_kernel() {
-// CHECK: define amdgpu_kernel void @default_kernel() [[DEFAULT_KERNEL_ATTRS:#[0-9]+]]
+// CHECK: define{{.*}} amdgpu_kernel void @default_kernel() [[DEFAULT_KERNEL_ATTRS:#[0-9]+]]
}
// REQUIRES: amdgpu-registered-target
// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -S -emit-llvm -o - %s | FileCheck %s
-// CHECK: define amdgpu_kernel void @test_call_kernel(i32 addrspace(1)* nocapture %out)
+// CHECK: define{{.*}} amdgpu_kernel void @test_call_kernel(i32 addrspace(1)* nocapture %out)
// CHECK: store i32 4, i32 addrspace(1)* %out, align 4
kernel void test_kernel(global int *out)
// REQUIRES: amdgpu-registered-target
// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -S -emit-llvm -o - %s | FileCheck %s
-// CHECK: define amdgpu_kernel void @calling_conv_amdgpu_kernel()
+// CHECK: define{{.*}} amdgpu_kernel void @calling_conv_amdgpu_kernel()
kernel void calling_conv_amdgpu_kernel()
{
}
-// CHECK: define void @calling_conv_none()
+// CHECK: define{{.*}} void @calling_conv_none()
void calling_conv_none()
{
}
out[id] = id;
}
-// CHECK-LABEL: define amdgpu_kernel void @test
+// CHECK-LABEL: define{{.*}} amdgpu_kernel void @test
kernel void test(global char *a, char b, global long *c, long d) {
queue_t default_queue;
unsigned flags = 0;
// CHECK: entry:
// CHECK: %1 = alloca <{ i32, i32, i8*, i8 addrspace(1)*, i8 }>, align 8, addrspace(5)
// CHECK: store <{ i32, i32, i8*, i8 addrspace(1)*, i8 }> %0, <{ i32, i32, i8*, i8 addrspace(1)*, i8 }> addrspace(5)* %1, align 8
-// CHECK: %2 = addrspacecast <{ i32, i32, i8*, i8 addrspace(1)*, i8 }> addrspace(5)* %1 to i8*
+// CHECK: %2 ={{.*}} addrspacecast <{ i32, i32, i8*, i8 addrspace(1)*, i8 }> addrspace(5)* %1 to i8*
// CHECK: call void @__test_block_invoke(i8* %2)
// CHECK: ret void
// CHECK:}
// Test 0 as initializer.
-// CHECK: @private_p = local_unnamed_addr addrspace(1) global i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*), align 4
+// CHECK: @private_p ={{.*}} local_unnamed_addr addrspace(1) global i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*), align 4
private char *private_p = 0;
-// CHECK: @local_p = local_unnamed_addr addrspace(1) global i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*), align 4
+// CHECK: @local_p ={{.*}} local_unnamed_addr addrspace(1) global i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*), align 4
local char *local_p = 0;
-// CHECK: @global_p = local_unnamed_addr addrspace(1) global i8 addrspace(1)* null, align 8
+// CHECK: @global_p ={{.*}} local_unnamed_addr addrspace(1) global i8 addrspace(1)* null, align 8
global char *global_p = 0;
-// CHECK: @constant_p = local_unnamed_addr addrspace(1) global i8 addrspace(4)* null, align 8
+// CHECK: @constant_p ={{.*}} local_unnamed_addr addrspace(1) global i8 addrspace(4)* null, align 8
constant char *constant_p = 0;
-// CHECK: @generic_p = local_unnamed_addr addrspace(1) global i8* null, align 8
+// CHECK: @generic_p ={{.*}} local_unnamed_addr addrspace(1) global i8* null, align 8
generic char *generic_p = 0;
// Test NULL as initializer.
-// CHECK: @private_p_NULL = local_unnamed_addr addrspace(1) global i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*), align 4
+// CHECK: @private_p_NULL ={{.*}} local_unnamed_addr addrspace(1) global i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*), align 4
private char *private_p_NULL = NULL;
-// CHECK: @local_p_NULL = local_unnamed_addr addrspace(1) global i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*), align 4
+// CHECK: @local_p_NULL ={{.*}} local_unnamed_addr addrspace(1) global i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*), align 4
local char *local_p_NULL = NULL;
-// CHECK: @global_p_NULL = local_unnamed_addr addrspace(1) global i8 addrspace(1)* null, align 8
+// CHECK: @global_p_NULL ={{.*}} local_unnamed_addr addrspace(1) global i8 addrspace(1)* null, align 8
global char *global_p_NULL = NULL;
-// CHECK: @constant_p_NULL = local_unnamed_addr addrspace(1) global i8 addrspace(4)* null, align 8
+// CHECK: @constant_p_NULL ={{.*}} local_unnamed_addr addrspace(1) global i8 addrspace(4)* null, align 8
constant char *constant_p_NULL = NULL;
-// CHECK: @generic_p_NULL = local_unnamed_addr addrspace(1) global i8* null, align 8
+// CHECK: @generic_p_NULL ={{.*}} local_unnamed_addr addrspace(1) global i8* null, align 8
generic char *generic_p_NULL = NULL;
// Test constant folding of null pointer.
// A null pointer should be folded to a null pointer in the target address space.
-// CHECK: @fold_generic = local_unnamed_addr addrspace(1) global i32* null, align 8
+// CHECK: @fold_generic ={{.*}} local_unnamed_addr addrspace(1) global i32* null, align 8
generic int *fold_generic = (global int*)(generic float*)(private char*)0;
-// CHECK: @fold_priv = local_unnamed_addr addrspace(1) global i16 addrspace(5)* addrspacecast (i16* null to i16 addrspace(5)*), align 4
+// CHECK: @fold_priv ={{.*}} local_unnamed_addr addrspace(1) global i16 addrspace(5)* addrspacecast (i16* null to i16 addrspace(5)*), align 4
private short *fold_priv = (private short*)(generic int*)(global void*)0;
-// CHECK: @fold_priv_arith = local_unnamed_addr addrspace(1) global i8 addrspace(5)* inttoptr (i32 9 to i8 addrspace(5)*), align 4
+// CHECK: @fold_priv_arith ={{.*}} local_unnamed_addr addrspace(1) global i8 addrspace(5)* inttoptr (i32 9 to i8 addrspace(5)*), align 4
private char *fold_priv_arith = (private char*)0 + 10;
-// CHECK: @fold_local_arith = local_unnamed_addr addrspace(1) global i8 addrspace(3)* inttoptr (i32 9 to i8 addrspace(3)*), align 4
+// CHECK: @fold_local_arith ={{.*}} local_unnamed_addr addrspace(1) global i8 addrspace(3)* inttoptr (i32 9 to i8 addrspace(3)*), align 4
local char *fold_local_arith = (local char*)0 + 10;
-// CHECK: @fold_int = local_unnamed_addr addrspace(1) global i32 13, align 4
+// CHECK: @fold_int ={{.*}} local_unnamed_addr addrspace(1) global i32 13, align 4
int fold_int = (int)(private void*)(generic char*)(global int*)0 + 14;
-// CHECK: @fold_int2 = local_unnamed_addr addrspace(1) global i32 12, align 4
+// CHECK: @fold_int2 ={{.*}} local_unnamed_addr addrspace(1) global i32 12, align 4
int fold_int2 = (int) ((private void*)0 + 13);
-// CHECK: @fold_int3 = local_unnamed_addr addrspace(1) global i32 -1, align 4
+// CHECK: @fold_int3 ={{.*}} local_unnamed_addr addrspace(1) global i32 -1, align 4
int fold_int3 = (int) ((private int*)0);
-// CHECK: @fold_int4 = local_unnamed_addr addrspace(1) global i32 7, align 4
+// CHECK: @fold_int4 ={{.*}} local_unnamed_addr addrspace(1) global i32 7, align 4
int fold_int4 = (int) &((private int*)0)[2];
-// CHECK: @fold_int5 = local_unnamed_addr addrspace(1) global i32 3, align 4
+// CHECK: @fold_int5 ={{.*}} local_unnamed_addr addrspace(1) global i32 3, align 4
int fold_int5 = (int) &((private StructTy1*)0)->p2;
-// CHECK: @fold_int_local = local_unnamed_addr addrspace(1) global i32 13, align 4
+// CHECK: @fold_int_local ={{.*}} local_unnamed_addr addrspace(1) global i32 13, align 4
int fold_int_local = (int)(local void*)(generic char*)(global int*)0 + 14;
-// CHECK: @fold_int2_local = local_unnamed_addr addrspace(1) global i32 12, align 4
+// CHECK: @fold_int2_local ={{.*}} local_unnamed_addr addrspace(1) global i32 12, align 4
int fold_int2_local = (int) ((local void*)0 + 13);
-// CHECK: @fold_int3_local = local_unnamed_addr addrspace(1) global i32 -1, align 4
+// CHECK: @fold_int3_local ={{.*}} local_unnamed_addr addrspace(1) global i32 -1, align 4
int fold_int3_local = (int) ((local int*)0);
-// CHECK: @fold_int4_local = local_unnamed_addr addrspace(1) global i32 7, align 4
+// CHECK: @fold_int4_local ={{.*}} local_unnamed_addr addrspace(1) global i32 7, align 4
int fold_int4_local = (int) &((local int*)0)[2];
-// CHECK: @fold_int5_local = local_unnamed_addr addrspace(1) global i32 3, align 4
+// CHECK: @fold_int5_local ={{.*}} local_unnamed_addr addrspace(1) global i32 3, align 4
int fold_int5_local = (int) &((local StructTy1*)0)->p2;
// cannot have common linkage since common linkage requires zero initialization
// and does not have explicit section.
-// CHECK: @p1 = local_unnamed_addr addrspace(1) global i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*), align 4
+// CHECK: @p1 ={{.*}} local_unnamed_addr addrspace(1) global i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*), align 4
// COMMON: @p1 = weak local_unnamed_addr addrspace(1) global i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*), align 4
private char *p1;
-// CHECK: @p2 = local_unnamed_addr addrspace(1) global i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*), align 4
+// CHECK: @p2 ={{.*}} local_unnamed_addr addrspace(1) global i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*), align 4
// COMMON: @p2 = weak local_unnamed_addr addrspace(1) global i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*), align 4
local char *p2;
-// CHECK: @p3 = local_unnamed_addr addrspace(1) global i8 addrspace(4)* null, align 8
+// CHECK: @p3 ={{.*}} local_unnamed_addr addrspace(1) global i8 addrspace(4)* null, align 8
// COMMON: @p3 = common local_unnamed_addr addrspace(1) global i8 addrspace(4)* null, align 8
constant char *p3;
-// CHECK: @p4 = local_unnamed_addr addrspace(1) global i8 addrspace(1)* null, align 8
+// CHECK: @p4 ={{.*}} local_unnamed_addr addrspace(1) global i8 addrspace(1)* null, align 8
// COMMON: @p4 = common local_unnamed_addr addrspace(1) global i8 addrspace(1)* null, align 8
global char *p4;
-// CHECK: @p5 = local_unnamed_addr addrspace(1) global i8* null, align 8
+// CHECK: @p5 ={{.*}} local_unnamed_addr addrspace(1) global i8* null, align 8
// COMMON: @p5 = common local_unnamed_addr addrspace(1) global i8* null, align 8
generic char *p5;
// Test default initialization of structure.
-// CHECK: @S1 = local_unnamed_addr addrspace(1) global %struct.StructTy1 { i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*), i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*), i8 addrspace(4)* null, i8 addrspace(1)* null, i8* null }, align 8
+// CHECK: @S1 ={{.*}} local_unnamed_addr addrspace(1) global %struct.StructTy1 { i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*), i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*), i8 addrspace(4)* null, i8 addrspace(1)* null, i8* null }, align 8
StructTy1 S1;
-// CHECK: @S2 = local_unnamed_addr addrspace(1) global %struct.StructTy2 zeroinitializer, align 8
+// CHECK: @S2 ={{.*}} local_unnamed_addr addrspace(1) global %struct.StructTy2 zeroinitializer, align 8
StructTy2 S2;
// Test default initialization of array.
-// CHECK: @A1 = local_unnamed_addr addrspace(1) global [2 x %struct.StructTy1] [%struct.StructTy1 { i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*), i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*), i8 addrspace(4)* null, i8 addrspace(1)* null, i8* null }, %struct.StructTy1 { i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*), i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*), i8 addrspace(4)* null, i8 addrspace(1)* null, i8* null }], align 8
+// CHECK: @A1 ={{.*}} local_unnamed_addr addrspace(1) global [2 x %struct.StructTy1] [%struct.StructTy1 { i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*), i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*), i8 addrspace(4)* null, i8 addrspace(1)* null, i8* null }, %struct.StructTy1 { i8 addrspace(5)* addrspacecast (i8* null to i8 addrspace(5)*), i8 addrspace(3)* addrspacecast (i8* null to i8 addrspace(3)*), i8 addrspace(4)* null, i8 addrspace(1)* null, i8* null }], align 8
StructTy1 A1[2];
-// CHECK: @A2 = local_unnamed_addr addrspace(1) global [2 x %struct.StructTy2] zeroinitializer, align 8
+// CHECK: @A2 ={{.*}} local_unnamed_addr addrspace(1) global [2 x %struct.StructTy2] zeroinitializer, align 8
StructTy2 A2[2];
// Test comparison with 0.
typedef __attribute__(( ext_vector_type(16) )) char char16;
typedef __attribute__(( ext_vector_type(3) )) int int3;
-//CHECK: define spir_func <3 x i8> @f1(<4 x i8> %[[x:.*]])
+//CHECK: define{{.*}} spir_func <3 x i8> @f1(<4 x i8> %[[x:.*]])
//CHECK: %[[astype:.*]] = shufflevector <4 x i8> %[[x]], <4 x i8> poison, <3 x i32> <i32 0, i32 1, i32 2>
//CHECK: ret <3 x i8> %[[astype]]
char3 f1(char4 x) {
return __builtin_astype(x, char3);
}
-//CHECK: define spir_func <4 x i8> @f2(<3 x i8> %[[x:.*]])
+//CHECK: define{{.*}} spir_func <4 x i8> @f2(<3 x i8> %[[x:.*]])
//CHECK: %[[astype:.*]] = shufflevector <3 x i8> %[[x]], <3 x i8> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
//CHECK: ret <4 x i8> %[[astype]]
char4 f2(char3 x) {
return __builtin_astype(x, char4);
}
-//CHECK: define spir_func <3 x i8> @f3(i32 %[[x:.*]])
+//CHECK: define{{.*}} spir_func <3 x i8> @f3(i32 %[[x:.*]])
//CHECK: %[[cast:.*]] = bitcast i32 %[[x]] to <4 x i8>
//CHECK: %[[astype:.*]] = shufflevector <4 x i8> %[[cast]], <4 x i8> poison, <3 x i32> <i32 0, i32 1, i32 2>
//CHECK: ret <3 x i8> %[[astype]]
return __builtin_astype(x, char3);
}
-//CHECK: define spir_func <4 x i8> @f4(i32 %[[x:.*]])
+//CHECK: define{{.*}} spir_func <4 x i8> @f4(i32 %[[x:.*]])
//CHECK: %[[astype:.*]] = bitcast i32 %[[x]] to <4 x i8>
//CHECK-NOT: shufflevector
//CHECK: ret <4 x i8> %[[astype]]
return __builtin_astype(x, char4);
}
-//CHECK: define spir_func i32 @f5(<3 x i8> %[[x:.*]])
+//CHECK: define{{.*}} spir_func i32 @f5(<3 x i8> %[[x:.*]])
//CHECK: %[[shuffle:.*]] = shufflevector <3 x i8> %[[x]], <3 x i8> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
//CHECK: %[[astype:.*]] = bitcast <4 x i8> %[[shuffle]] to i32
//CHECK: ret i32 %[[astype]]
return __builtin_astype(x, int);
}
-//CHECK: define spir_func i32 @f6(<4 x i8> %[[x:.*]])
+//CHECK: define{{.*}} spir_func i32 @f6(<4 x i8> %[[x:.*]])
//CHECK: %[[astype:.*]] = bitcast <4 x i8> %[[x]] to i32
//CHECK-NOT: shufflevector
//CHECK: ret i32 %[[astype]]
return __builtin_astype(x, int);
}
-//CHECK: define spir_func <3 x i8> @f7(<3 x i8> returned %[[x:.*]])
+//CHECK: define{{.*}} spir_func <3 x i8> @f7(<3 x i8> returned %[[x:.*]])
//CHECK-NOT: bitcast
//CHECK-NOT: shufflevector
//CHECK: ret <3 x i8> %[[x]]
return __builtin_astype(x, char3);
}
-//CHECK: define spir_func <3 x i32> @f8(<16 x i8> %[[x:.*]])
+//CHECK: define{{.*}} spir_func <3 x i32> @f8(<16 x i8> %[[x:.*]])
//CHECK: %[[cast:.*]] = bitcast <16 x i8> %[[x]] to <4 x i32>
//CHECK: %[[astype:.*]] = shufflevector <4 x i32> %[[cast]], <4 x i32> poison, <3 x i32> <i32 0, i32 1, i32 2>
//CHECK: ret <3 x i32> %[[astype]]
return __builtin_astype(x, int3);
}
-//CHECK: define spir_func i32 addrspace(1)* @addr_cast(i32* readnone %[[x:.*]])
-//CHECK: %[[cast:.*]] = addrspacecast i32* %[[x]] to i32 addrspace(1)*
+//CHECK: define{{.*}} spir_func i32 addrspace(1)* @addr_cast(i32* readnone %[[x:.*]])
+//CHECK: %[[cast:.*]] ={{.*}} addrspacecast i32* %[[x]] to i32 addrspace(1)*
//CHECK: ret i32 addrspace(1)* %[[cast]]
global int* addr_cast(int *x) {
return __builtin_astype(x, global int*);
}
-//CHECK: define spir_func i32 addrspace(1)* @int_to_ptr(i32 %[[x:.*]])
+//CHECK: define{{.*}} spir_func i32 addrspace(1)* @int_to_ptr(i32 %[[x:.*]])
//CHECK: %[[cast:.*]] = inttoptr i32 %[[x]] to i32 addrspace(1)*
//CHECK: ret i32 addrspace(1)* %[[cast]]
global int* int_to_ptr(int x) {
return __builtin_astype(x, global int*);
}
-//CHECK: define spir_func i32 @ptr_to_int(i32* %[[x:.*]])
+//CHECK: define{{.*}} spir_func i32 @ptr_to_int(i32* %[[x:.*]])
//CHECK: %[[cast:.*]] = ptrtoint i32* %[[x]] to i32
//CHECK: ret i32 %[[cast]]
int ptr_to_int(int *x) {
return __builtin_astype(x, int);
}
-//CHECK: define spir_func <3 x i8> @ptr_to_char3(i32* %[[x:.*]])
+//CHECK: define{{.*}} spir_func <3 x i8> @ptr_to_char3(i32* %[[x:.*]])
//CHECK: %[[cast1:.*]] = ptrtoint i32* %[[x]] to i32
//CHECK: %[[cast2:.*]] = bitcast i32 %[[cast1]] to <4 x i8>
//CHECK: %[[astype:.*]] = shufflevector <4 x i8> %[[cast2]], <4 x i8> poison, <3 x i32> <i32 0, i32 1, i32 2>
return __builtin_astype(x, char3);
}
-//CHECK: define spir_func i32* @char3_to_ptr(<3 x i8> %[[x:.*]])
+//CHECK: define{{.*}} spir_func i32* @char3_to_ptr(<3 x i8> %[[x:.*]])
//CHECK: %[[astype:.*]] = shufflevector <3 x i8> %[[x]], <3 x i8> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
//CHECK: %[[cast1:.*]] = bitcast <4 x i8> %[[astype]] to i32
//CHECK: %[[cast2:.*]] = inttoptr i32 %[[cast1]] to i32*
typedef unsigned int int4 __attribute((ext_vector_type(4)));
typedef float float4 __attribute((ext_vector_type(4)));
-// CHECK-LABEL: define spir_kernel void @ker()
+// CHECK-LABEL: define{{.*}} spir_kernel void @ker()
void kernel ker() {
bool t = true;
int4 vec4 = (int4)t;
// For a block global variable, first emit the block literal as a global variable, then emit the block variable itself.
// COMMON: [[BL_GLOBAL:@__block_literal_global[^ ]*]] = internal addrspace(1) constant { i32, i32, i8 addrspace(4)* } { i32 {{[0-9]+}}, i32 {{[0-9]+}}, i8 addrspace(4)* addrspacecast (i8* bitcast (void (i8 addrspace(4)*, i8 addrspace(3)*)* [[INV_G:@[^ ]+]] to i8*) to i8 addrspace(4)*) }
-// COMMON: @block_G = addrspace(1) constant %struct.__opencl_block_literal_generic addrspace(4)* addrspacecast (%struct.__opencl_block_literal_generic addrspace(1)* bitcast ({ i32, i32, i8 addrspace(4)* } addrspace(1)* [[BL_GLOBAL]] to %struct.__opencl_block_literal_generic addrspace(1)*) to %struct.__opencl_block_literal_generic addrspace(4)*)
+// COMMON: @block_G ={{.*}} addrspace(1) constant %struct.__opencl_block_literal_generic addrspace(4)* addrspacecast (%struct.__opencl_block_literal_generic addrspace(1)* bitcast ({ i32, i32, i8 addrspace(4)* } addrspace(1)* [[BL_GLOBAL]] to %struct.__opencl_block_literal_generic addrspace(1)*) to %struct.__opencl_block_literal_generic addrspace(4)*)
// For anonymous blocks without captures, emit block literals as global variable.
// COMMON: [[BLG1:@__block_literal_global[^ ]*]] = internal addrspace(1) constant { i32, i32, i8 addrspace(4)* } { i32 {{[0-9]+}}, i32 {{[0-9]+}}, i8 addrspace(4)* addrspacecast (i8* bitcast (void (i8 addrspace(4)*, i8 addrspace(3)*)* {{@[^ ]+}} to i8*) to i8 addrspace(4)*) }
out[id] = id;
}
-// COMMON-LABEL: define spir_kernel void @device_side_enqueue(i32 addrspace(1)* %{{.*}}, i32 addrspace(1)* %b, i32 %i)
+// COMMON-LABEL: define{{.*}} spir_kernel void @device_side_enqueue(i32 addrspace(1)* %{{.*}}, i32 addrspace(1)* %b, i32 %i)
kernel void device_side_enqueue(global int *a, global int *b, int i) {
// COMMON: %default_queue = alloca %opencl.queue_t*
queue_t default_queue;
// COMMON: store i8 addrspace(4)* addrspacecast (i8* bitcast (void (i8 addrspace(4)*)* [[INVL1:@__device_side_enqueue_block_invoke[^ ]*]] to i8*) to i8 addrspace(4)*), i8 addrspace(4)** %block.invoke
// B32: [[BL:%[0-9]+]] = bitcast <{ i32, i32, i8 addrspace(4)*, i32 addrspace(1)*, i32, i32 addrspace(1)* }>* %block to %struct.__opencl_block_literal_generic*
// B64: [[BL:%[0-9]+]] = bitcast <{ i32, i32, i8 addrspace(4)*, i32 addrspace(1)*, i32 addrspace(1)*, i32 }>* %block to %struct.__opencl_block_literal_generic*
- // COMMON: [[BL_I8:%[0-9]+]] = addrspacecast %struct.__opencl_block_literal_generic* [[BL]] to i8 addrspace(4)*
+ // COMMON: [[BL_I8:%[0-9]+]] ={{.*}} addrspacecast %struct.__opencl_block_literal_generic* [[BL]] to i8 addrspace(4)*
// COMMON-LABEL: call spir_func i32 @__enqueue_kernel_basic(
// COMMON-SAME: %opencl.queue_t{{.*}}* [[DEF_Q]], i32 [[FLAGS]], %struct.ndrange_t* byval(%struct.ndrange_t) [[NDR]]{{([0-9]+)?}},
// COMMON-SAME: i8 addrspace(4)* addrspacecast (i8* bitcast ({{.*}} [[INVLK1:[^ ]+_kernel]] to i8*) to i8 addrspace(4)*),
// Emits block literal on stack and block kernel [[INVLK2]].
// COMMON: [[DEF_Q:%[0-9]+]] = load %opencl.queue_t{{.*}}*, %opencl.queue_t{{.*}}** %default_queue
// COMMON: [[FLAGS:%[0-9]+]] = load i32, i32* %flags
- // COMMON: [[WAIT_EVNT:%[0-9]+]] = addrspacecast %opencl.clk_event_t{{.*}}** %event_wait_list to %opencl.clk_event_t{{.*}}* addrspace(4)*
- // COMMON: [[EVNT:%[0-9]+]] = addrspacecast %opencl.clk_event_t{{.*}}** %clk_event to %opencl.clk_event_t{{.*}}* addrspace(4)*
+ // COMMON: [[WAIT_EVNT:%[0-9]+]] ={{.*}} addrspacecast %opencl.clk_event_t{{.*}}** %event_wait_list to %opencl.clk_event_t{{.*}}* addrspace(4)*
+ // COMMON: [[EVNT:%[0-9]+]] ={{.*}} addrspacecast %opencl.clk_event_t{{.*}}** %clk_event to %opencl.clk_event_t{{.*}}* addrspace(4)*
// COMMON: store i8 addrspace(4)* addrspacecast (i8* bitcast (void (i8 addrspace(4)*)* [[INVL2:@__device_side_enqueue_block_invoke[^ ]*]] to i8*) to i8 addrspace(4)*), i8 addrspace(4)** %block.invoke
// COMMON: [[BL:%[0-9]+]] = bitcast <{ i32, i32, i8 addrspace(4)*, i32{{.*}}, i32{{.*}}, i32{{.*}} }>* %block4 to %struct.__opencl_block_literal_generic*
- // COMMON: [[BL_I8:%[0-9]+]] = addrspacecast %struct.__opencl_block_literal_generic* [[BL]] to i8 addrspace(4)*
+ // COMMON: [[BL_I8:%[0-9]+]] ={{.*}} addrspacecast %struct.__opencl_block_literal_generic* [[BL]] to i8 addrspace(4)*
// COMMON-LABEL: call spir_func i32 @__enqueue_kernel_basic_events
// COMMON-SAME: (%opencl.queue_t{{.*}}* [[DEF_Q]], i32 [[FLAGS]], %struct.ndrange_t* {{.*}}, i32 2, %opencl.clk_event_t{{.*}}* addrspace(4)* [[WAIT_EVNT]], %opencl.clk_event_t{{.*}}* addrspace(4)* [[EVNT]],
// COMMON-SAME: i8 addrspace(4)* addrspacecast (i8* bitcast ({{.*}} [[INVLK2:[^ ]+_kernel]] to i8*) to i8 addrspace(4)*),
// COMMON: [[DEF_Q:%[0-9]+]] = load %opencl.queue_t{{.*}}*, %opencl.queue_t{{.*}}** %default_queue
// COMMON: [[FLAGS:%[0-9]+]] = load i32, i32* %flags
// COMMON: [[AD:%arraydecay[0-9]*]] = getelementptr inbounds [1 x %opencl.clk_event_t*], [1 x %opencl.clk_event_t*]* %event_wait_list2, i{{32|64}} 0, i{{32|64}} 0
- // COMMON: [[WAIT_EVNT:%[0-9]+]] = addrspacecast %opencl.clk_event_t{{.*}}** [[AD]] to %opencl.clk_event_t{{.*}}* addrspace(4)*
- // COMMON: [[EVNT:%[0-9]+]] = addrspacecast %opencl.clk_event_t{{.*}}** %clk_event to %opencl.clk_event_t{{.*}}* addrspace(4)*
+ // COMMON: [[WAIT_EVNT:%[0-9]+]] ={{.*}} addrspacecast %opencl.clk_event_t{{.*}}** [[AD]] to %opencl.clk_event_t{{.*}}* addrspace(4)*
+ // COMMON: [[EVNT:%[0-9]+]] ={{.*}} addrspacecast %opencl.clk_event_t{{.*}}** %clk_event to %opencl.clk_event_t{{.*}}* addrspace(4)*
// CHECK-LIFETIMES: [[LIFETIME_PTR:%[0-9]+]] = bitcast [1 x i64]* %[[BLOCK_SIZES3]] to i8*
// CHECK-LIFETIMES-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull [[LIFETIME_PTR]])
// CHECK-LIFETIMES-NEXT: getelementptr inbounds [1 x i64], [1 x i64]* %[[BLOCK_SIZES3]], i64 0, i64 0
// COMMON: [[DEF_Q:%[0-9]+]] = load %opencl.queue_t{{.*}}*, %opencl.queue_t{{.*}}** %default_queue
// COMMON: [[FLAGS:%[0-9]+]] = load i32, i32* %flags
// COMMON: [[AD:%arraydecay[0-9]*]] = getelementptr inbounds [1 x %opencl.clk_event_t*], [1 x %opencl.clk_event_t*]* %event_wait_list2, i{{32|64}} 0, i{{32|64}} 0
- // COMMON: [[WAIT_EVNT:%[0-9]+]] = addrspacecast %opencl.clk_event_t{{.*}}** [[AD]] to %opencl.clk_event_t{{.*}}* addrspace(4)*
- // COMMON: [[EVNT:%[0-9]+]] = addrspacecast %opencl.clk_event_t{{.*}}** %clk_event to %opencl.clk_event_t{{.*}}* addrspace(4)*
+ // COMMON: [[WAIT_EVNT:%[0-9]+]] ={{.*}} addrspacecast %opencl.clk_event_t{{.*}}** [[AD]] to %opencl.clk_event_t{{.*}}* addrspace(4)*
+ // COMMON: [[EVNT:%[0-9]+]] ={{.*}} addrspacecast %opencl.clk_event_t{{.*}}** %clk_event to %opencl.clk_event_t{{.*}}* addrspace(4)*
// CHECK-LIFETIMES: [[LIFETIME_PTR:%[0-9]+]] = bitcast [1 x i64]* %[[BLOCK_SIZES4]] to i8*
// CHECK-LIFETIMES-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull [[LIFETIME_PTR]])
// CHECK-LIFETIMES-NEXT: getelementptr inbounds [1 x i64], [1 x i64]* %[[BLOCK_SIZES4]], i64 0, i64 0
// COMMON: store i8 addrspace(4)* addrspacecast (i8* bitcast (void (i8 addrspace(4)*)* [[INVL3:@__device_side_enqueue_block_invoke[^ ]*]] to i8*) to i8 addrspace(4)*), i8 addrspace(4)** %block.invoke
// COMMON: [[DEF_Q:%[0-9]+]] = load %opencl.queue_t{{.*}}*, %opencl.queue_t{{.*}}** %default_queue
// COMMON: [[FLAGS:%[0-9]+]] = load i32, i32* %flags
- // COMMON: [[BL_I8:%[0-9]+]] = addrspacecast %struct.__opencl_block_literal_generic* {{.*}} to i8 addrspace(4)*
+ // COMMON: [[BL_I8:%[0-9]+]] ={{.*}} addrspacecast %struct.__opencl_block_literal_generic* {{.*}} to i8 addrspace(4)*
// COMMON-LABEL: call spir_func i32 @__enqueue_kernel_basic(
// COMMON-SAME: %opencl.queue_t{{.*}}* [[DEF_Q]], i32 [[FLAGS]], %struct.ndrange_t* byval(%struct.ndrange_t) [[NDR]]{{([0-9]+)?}},
// COMMON-SAME: i8 addrspace(4)* addrspacecast (i8* bitcast ({{.*}} [[INVLK3:[^ ]+_kernel]] to i8*) to i8 addrspace(4)*),
// RUN: %clang_cc1 %s -triple "spir64-unknown-unknown" -cl-opt-disable -ffake-address-space-map -emit-llvm -o - | FileCheck %s
-// CHECK: @array = addrspace({{[0-9]+}}) constant
+// CHECK: @array ={{.*}} addrspace({{[0-9]+}}) constant
__constant float array[2] = {0.0f, 1.0f};
kernel void test(global float *out) {
// This is initially assumed convergent, but can be deduced to not require it.
-// CHECK-LABEL: define spir_func void @non_convfun() local_unnamed_addr #0
+// CHECK-LABEL: define{{.*}} spir_func void @non_convfun() local_unnamed_addr #0
// CHECK: ret void
__attribute__((noinline))
void non_convfun(void) {
// non_convfun();
// }
//
-// CHECK-LABEL: define spir_func void @test_merge_if(i32 %a) local_unnamed_addr #1 {
+// CHECK-LABEL: define{{.*}} spir_func void @test_merge_if(i32 %a) local_unnamed_addr #1 {
// CHECK: %[[tobool:.+]] = icmp eq i32 %a, 0
// CHECK: br i1 %[[tobool]], label %[[if_end3_critedge:.+]], label %[[if_then:.+]]
// Test two if's are not merged.
-// CHECK-LABEL: define spir_func void @test_no_merge_if(i32 %a) local_unnamed_addr #1
+// CHECK-LABEL: define{{.*}} spir_func void @test_no_merge_if(i32 %a) local_unnamed_addr #1
// CHECK: %[[tobool:.+]] = icmp eq i32 %a, 0
// CHECK: br i1 %[[tobool]], label %[[if_end:.+]], label %[[if_then:.+]]
// CHECK: [[if_then]]:
// CHECK: declare spir_func void @convfun(){{[^#]*}} #2
// Test loop is unrolled for convergent function.
-// CHECK-LABEL: define spir_func void @test_unroll() local_unnamed_addr #1
+// CHECK-LABEL: define{{.*}} spir_func void @test_unroll() local_unnamed_addr #1
// CHECK: tail call spir_func void @convfun() #[[attr4:[0-9]+]]
// CHECK: tail call spir_func void @convfun() #[[attr4]]
// CHECK: tail call spir_func void @convfun() #[[attr4]]
}
// Test loop is not unrolled for noduplicate function.
-// CHECK-LABEL: define spir_func void @test_not_unroll()
+// CHECK-LABEL: define{{.*}} spir_func void @test_not_unroll()
// CHECK: br label %[[for_body:.+]]
// CHECK: [[for_cond_cleanup:.+]]:
// CHECK: ret void
#pragma OPENCL EXTENSION my_ext : enable
-//CHECK: define spir_func void @test_f1(i64 %x)
+//CHECK: define{{.*}} spir_func void @test_f1(i64 %x)
//CHECK: call spir_func void @_Z1fl(i64 %{{.*}})
void test_f1(long x) {
f(x);
#pragma OPENCL EXTENSION my_ext : disable
-//CHECK: define spir_func void @test_f2(i64 %x)
+//CHECK: define{{.*}} spir_func void @test_f2(i64 %x)
//CHECK: call spir_func void @_Z1fi(i32 %{{.*}})
void test_f2(long x) {
f(x);
volatile int volatileint) {
*globalintrestrictp = constint + volatileint;
}
-// CHECK: define spir_kernel void @foo{{[^!]+}}
+// CHECK: define{{.*}} spir_kernel void @foo{{[^!]+}}
// CHECK: !kernel_arg_addr_space ![[MD11:[0-9]+]]
// CHECK: !kernel_arg_access_qual ![[MD12:[0-9]+]]
// CHECK: !kernel_arg_type ![[MD13:[0-9]+]]
kernel void foo2(read_only image1d_t img1, image2d_t img2, write_only image2d_array_t img3, read_write image1d_t img4) {
}
-// CHECK: define spir_kernel void @foo2{{[^!]+}}
+// CHECK: define{{.*}} spir_kernel void @foo2{{[^!]+}}
// CHECK: !kernel_arg_addr_space ![[MD21:[0-9]+]]
// CHECK: !kernel_arg_access_qual ![[MD22:[0-9]+]]
// CHECK: !kernel_arg_type ![[MD23:[0-9]+]]
kernel void foo3(__global half * X) {
}
-// CHECK: define spir_kernel void @foo3{{[^!]+}}
+// CHECK: define{{.*}} spir_kernel void @foo3{{[^!]+}}
// CHECK: !kernel_arg_addr_space ![[MD31:[0-9]+]]
// CHECK: !kernel_arg_access_qual ![[MD32:[0-9]+]]
// CHECK: !kernel_arg_type ![[MD33:[0-9]+]]
typedef unsigned int myunsignedint;
kernel void foo4(__global unsigned int * X, __global myunsignedint * Y) {
}
-// CHECK: define spir_kernel void @foo4{{[^!]+}}
+// CHECK: define{{.*}} spir_kernel void @foo4{{[^!]+}}
// CHECK: !kernel_arg_addr_space ![[MD41:[0-9]+]]
// CHECK: !kernel_arg_access_qual ![[MD42:[0-9]+]]
// CHECK: !kernel_arg_type ![[MD43:[0-9]+]]
typedef image1d_t myImage;
kernel void foo5(myImage img1, write_only image1d_t img2) {
}
-// CHECK: define spir_kernel void @foo5{{[^!]+}}
+// CHECK: define{{.*}} spir_kernel void @foo5{{[^!]+}}
// CHECK: !kernel_arg_addr_space ![[MD41:[0-9]+]]
// CHECK: !kernel_arg_access_qual ![[MD51:[0-9]+]]
// CHECK: !kernel_arg_type ![[MD52:[0-9]+]]
typedef read_write image1d_t RWImage;
kernel void foo7(ROImage ro, WOImage wo, RWImage rw) {
}
-// CHECK: define spir_kernel void @foo7{{[^!]+}}
+// CHECK: define{{.*}} spir_kernel void @foo7{{[^!]+}}
// CHECK: !kernel_arg_addr_space ![[MD71:[0-9]+]]
// CHECK: !kernel_arg_access_qual ![[MD72:[0-9]+]]
// CHECK: !kernel_arg_type ![[MD73:[0-9]+]]
kernel void test_single(int_single input, global int* output) {
// CHECK: spir_kernel
-// AMDGCN: define amdgpu_kernel void @test_single
+// AMDGCN: define{{.*}} amdgpu_kernel void @test_single
// CHECK: struct.int_single* nocapture {{.*}} byval(%struct.int_single)
// CHECK: i32* nocapture %output
output[0] = input.a;
kernel void test_pair(int_pair input, global int* output) {
// CHECK: spir_kernel
-// AMDGCN: define amdgpu_kernel void @test_pair
+// AMDGCN: define{{.*}} amdgpu_kernel void @test_pair
// CHECK: struct.int_pair* nocapture {{.*}} byval(%struct.int_pair)
// CHECK: i32* nocapture %output
output[0] = (int)input.a;
kernel void test_kernel(test_struct input, global int* output) {
// CHECK: spir_kernel
-// AMDGCN: define amdgpu_kernel void @test_kernel
+// AMDGCN: define{{.*}} amdgpu_kernel void @test_kernel
// CHECK: struct.test_struct* nocapture {{.*}} byval(%struct.test_struct)
// CHECK: i32* nocapture %output
output[0] = input.elementA;
void test_function(int_pair input, global int* output) {
// CHECK-NOT: spir_kernel
-// AMDGCN-NOT: define amdgpu_kernel void @test_function
+// AMDGCN-NOT: define{{.*}} amdgpu_kernel void @test_function
// CHECK: i64 %input.coerce0, i64 %input.coerce1, i32* nocapture %output
output[0] = (int)input.a;
output[1] = (int)input.b;
// CHECK: %struct.StrucTy = type { i32, i32, i32 }
-// CHECK: @GA = addrspace(1) global [6 x [6 x float]] {{[[][[]}}6 x float] [float 1.000000e+00, float 2.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00],
+// CHECK: @GA ={{.*}} addrspace(1) global [6 x [6 x float]] {{[[][[]}}6 x float] [float 1.000000e+00, float 2.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00],
// CHECK: [6 x float] zeroinitializer, [6 x float] zeroinitializer, [6 x float] zeroinitializer, [6 x float] zeroinitializer, [6 x float] zeroinitializer], align 4
float GA[6][6] = {1.0f, 2.0f};
int z;
} StrucTy;
-// CHECK: @GS = addrspace(1) global %struct.StrucTy { i32 1, i32 2, i32 0 }, align 4
+// CHECK: @GS ={{.*}} addrspace(1) global %struct.StrucTy { i32 1, i32 2, i32 0 }, align 4
StrucTy GS = {1, 2};
-// CHECK: @GV1 = addrspace(1) global <4 x i32> <i32 1, i32 2, i32 3, i32 4>, align 16
+// CHECK: @GV1 ={{.*}} addrspace(1) global <4 x i32> <i32 1, i32 2, i32 3, i32 4>, align 16
int4 GV1 = (int4)((int2)(1,2),3,4);
-// CHECK: @GV2 = addrspace(1) global <4 x i32> <i32 1, i32 1, i32 1, i32 1>, align 16
+// CHECK: @GV2 ={{.*}} addrspace(1) global <4 x i32> <i32 1, i32 1, i32 1, i32 1>, align 16
int4 GV2 = (int4)(1);
// CHECK: @__const.f.S = private unnamed_addr addrspace(2) constant %struct.StrucTy { i32 1, i32 2, i32 0 }, align 4
-// CHECK-LABEL: define spir_func void @f()
+// CHECK-LABEL: define{{.*}} spir_func void @f()
void f(void) {
// CHECK: %[[A:.*]] = alloca [6 x [6 x float]], align 4
// CHECK: %[[S:.*]] = alloca %struct.StrucTy, align 4
typedef int __attribute__((ext_vector_type(4))) int4;
void test1(read_only pipe int p) {
-// CHECK: define void @test1(%opencl.pipe_ro_t* %p)
+// CHECK: define{{.*}} void @test1(%opencl.pipe_ro_t* %p)
reserve_id_t rid;
// CHECK: %rid = alloca %opencl.reserve_id_t
}
void test2(write_only pipe float p) {
-// CHECK: define void @test2(%opencl.pipe_wo_t* %p)
+// CHECK: define{{.*}} void @test2(%opencl.pipe_wo_t* %p)
}
void test3(read_only pipe const int p) {
-// CHECK: define void @test3(%opencl.pipe_ro_t* %p)
+// CHECK: define{{.*}} void @test3(%opencl.pipe_ro_t* %p)
}
void test4(read_only pipe uchar3 p) {
-// CHECK: define void @test4(%opencl.pipe_ro_t* %p)
+// CHECK: define{{.*}} void @test4(%opencl.pipe_ro_t* %p)
}
void test5(read_only pipe int4 p) {
-// CHECK: define void @test5(%opencl.pipe_ro_t* %p)
+// CHECK: define{{.*}} void @test5(%opencl.pipe_ro_t* %p)
}
typedef read_only pipe int MyPipe;
kernel void test6(MyPipe p) {
-// CHECK: define spir_kernel void @test6(%opencl.pipe_ro_t* %p)
+// CHECK: define{{.*}} spir_kernel void @test6(%opencl.pipe_ro_t* %p)
}
struct Person {
void test_reserved_read_pipe(global struct Person *SDst,
read_only pipe struct Person SPipe) {
-// CHECK: define void @test_reserved_read_pipe
+// CHECK: define{{.*}} void @test_reserved_read_pipe
read_pipe (SPipe, SDst);
// CHECK: call i32 @__read_pipe_2(%opencl.pipe_ro_t* %{{.*}}, i8* %{{.*}}, i32 16, i32 8)
read_pipe (SPipe, SDst);
__attribute__((overloadable))
void test1(read_only pipe int p) {
-// LINUX: define void @_Z5test18ocl_pipe
+// LINUX: define{{.*}} void @_Z5test18ocl_pipe
// WINDOWS: define dso_local void @"?test1@@YAXU?$ocl_pipe@H$00@__clang@@@Z"
// OCLWINDOWS: define dso_local void @"?test1@@$$J0YAXU?$ocl_pipe@H$00@__clang@@@Z"
}
__attribute__((overloadable))
void test2(write_only pipe float p) {
-// LINUX: define void @_Z5test28ocl_pipe
+// LINUX: define{{.*}} void @_Z5test28ocl_pipe
// WINDOWS: define dso_local void @"?test2@@YAXU?$ocl_pipe@M$0A@@__clang@@@Z"
// OCLWINDOWS: define dso_local void @"?test2@@$$J0YAXU?$ocl_pipe@M$0A@@__clang@@@Z"
}
__attribute__((overloadable))
void test3(read_only pipe const int p) {
-// LINUX: define void @_Z5test38ocl_pipe
+// LINUX: define{{.*}} void @_Z5test38ocl_pipe
// WINDOWS: define dso_local void @"?test3@@YAXU?$ocl_pipe@$$CBH$00@__clang@@@Z"
// OCLWINDOWS: define dso_local void @"?test3@@$$J0YAXU?$ocl_pipe@$$CBH$00@__clang@@@Z"
}
__attribute__((overloadable))
void test4(read_only pipe uchar3 p) {
-// LINUX: define void @_Z5test48ocl_pipe
+// LINUX: define{{.*}} void @_Z5test48ocl_pipe
// WINDOWS: define dso_local void @"?test4@@YAXU?$ocl_pipe@T?$__vector@E$02@__clang@@$00@__clang@@@Z"
// OCLWINDOWS: define dso_local void @"?test4@@$$J0YAXU?$ocl_pipe@T?$__vector@E$02@__clang@@$00@__clang@@@Z"
}
__attribute__((overloadable))
void test5(read_only pipe int4 p) {
-// LINUX: define void @_Z5test58ocl_pipe
+// LINUX: define{{.*}} void @_Z5test58ocl_pipe
// WINDOWS: define dso_local void @"?test5@@YAXU?$ocl_pipe@T?$__vector@H$03@__clang@@$00@__clang@@@Z"
// OCLWINDOWS: define dso_local void @"?test5@@$$J0YAXU?$ocl_pipe@T?$__vector@H$03@__clang@@$00@__clang@@@Z"
}
typedef read_only pipe int MyPipe;
kernel void test6(MyPipe p) {
-// LINUX: define spir_kernel void @test6
+// LINUX: define{{.*}} spir_kernel void @test6
// WINDOWS: define dso_local spir_kernel void @test6
// OCLWINDOWS: define dso_local spir_kernel void @test6
}
__attribute__((overloadable))
void test_reserved_read_pipe(global struct Person *SDst,
read_only pipe struct Person SPipe) {
-// LINUX: define void @_Z23test_reserved_read_pipePU8CLglobal6Person8ocl_pipe
+// LINUX: define{{.*}} void @_Z23test_reserved_read_pipePU8CLglobal6Person8ocl_pipe
// WINDOWS: define dso_local void @"?test_reserved_read_pipe@@YAXPEAU?$_ASCLglobal@$$CAUPerson@@@__clang@@U?$ocl_pipe@UPerson@@$00@2@@Z"
// OCLWINDOWS: define dso_local void @"?test_reserved_read_pipe@@$$J0YAXPEAU?$_ASCLglobal@$$CAUPerson@@@__clang@@U?$ocl_pipe@UPerson@@$00@2@@Z"
}
void device_function() {
}
-// CHECK-LABEL: define void @device_function()
+// CHECK-LABEL: define{{.*}} void @device_function()
__kernel void kernel_function() {
device_function();
}
-// CHECK-LABEL: define spir_kernel void @kernel_function()
+// CHECK-LABEL: define{{.*}} spir_kernel void @kernel_function()
// CHECK: call void @device_function()
// CHECK: !{{[0-9]+}} = !{void ()* @kernel_function, !"kernel", i32 1}
void device_function() {
}
-// CHECK-LABEL: define void @device_function()
+// CHECK-LABEL: define{{.*}} void @device_function()
__kernel void kernel_function() {
}
-// CHECK-LABEL: define spir_kernel void @kernel_function()
+// CHECK-LABEL: define{{.*}} spir_kernel void @kernel_function()
// CHECK: !{{[0-9]+}} = !{void ()* @kernel_function, !"kernel", i32 1}
int get_sampler_initializer(void);
void fnc4smp(sampler_t s) {}
-// CHECK: define spir_func void [[FUNCNAME:@.*fnc4smp.*]](%opencl.sampler_t addrspace(2)* %
+// CHECK: define{{.*}} spir_func void [[FUNCNAME:@.*fnc4smp.*]](%opencl.sampler_t addrspace(2)* %
kernel void foo(sampler_t smp_par) {
- // CHECK-LABEL: define spir_kernel void @foo(%opencl.sampler_t addrspace(2)* %smp_par)
+ // CHECK-LABEL: define{{.*}} spir_kernel void @foo(%opencl.sampler_t addrspace(2)* %smp_par)
// CHECK: [[smp_par_ptr:%[A-Za-z0-9_\.]+]] = alloca %opencl.sampler_t addrspace(2)*
// Case 2b
// bits before evaluating. Test this both for variables and constants
// evaluated in the front-end.
-// OPT: @gtest1 = local_unnamed_addr constant i64 2147483648
+// OPT: @gtest1 ={{.*}} local_unnamed_addr constant i64 2147483648
__constant const unsigned long gtest1 = 1UL << 31;
// NOOPT: @negativeShift32
kernel void bar(global int *A);
kernel void foo(global int *A)
-// CHECK: define spir_kernel void @foo(i32 addrspace(1)* %A)
+// CHECK: define{{.*}} spir_kernel void @foo(i32 addrspace(1)* %A)
{
int id = get_dummy_id(0);
// CHECK: %{{[a-z0-9_]+}} = tail call spir_func i32 @get_dummy_id(i32 0)
// CHECK: %{{.*}} = shufflevector <4 x i8> %{{.*}}, <4 x i8> poison, <3 x i32> <i32 0, i32 1, i32 2>
}
-// CHECK: define spir_func void @alignment()
+// CHECK: define{{.*}} spir_func void @alignment()
void alignment() {
__private char2 data_generic[100];
__private char8 data_private[100];
// REQUIRES: amdgpu-registered-target
-// FVIS-DEFAULT: @glob = local_unnamed_addr
+// FVIS-DEFAULT: @glob ={{.*}} local_unnamed_addr addrspace(1) global i32 0
// FVIS-PROTECTED: @glob = protected local_unnamed_addr
// FVIS-HIDDEN: @glob = hidden local_unnamed_addr
int glob = 0;
// FVIS-PROTECTED: @glob_protected = protected local_unnamed_addr
// FVIS-HIDDEN: @glob_protected = protected local_unnamed_addr
__attribute__((visibility("protected"))) int glob_protected = 0;
-// FVIS-DEFAULT: @glob_default = local_unnamed_addr
-// FVIS-PROTECTED: @glob_default = local_unnamed_addr
-// FVIS-HIDDEN: @glob_default = local_unnamed_addr
+// FVIS-DEFAULT: @glob_default ={{( dso_local)?}} local_unnamed_addr
+// FVIS-PROTECTED: @glob_default ={{( dso_local)?}} local_unnamed_addr
+// FVIS-HIDDEN: @glob_default ={{( dso_local)?}} local_unnamed_addr
__attribute__((visibility("default"))) int glob_default = 0;
// FVIS-DEFAULT: @ext = external local_unnamed_addr
// FVIS-HIDDEN: @ext_default = external local_unnamed_addr
__attribute__((visibility("default"))) extern int ext_default;
-// FVIS-DEFAULT: define amdgpu_kernel void @kern()
+// FVIS-DEFAULT: define{{.*}} amdgpu_kernel void @kern()
// FVIS-PROTECTED: define protected amdgpu_kernel void @kern()
// FVIS-HIDDEN: define protected amdgpu_kernel void @kern()
kernel void kern() {}
// FVIS-PROTECTED: define protected amdgpu_kernel void @kern_protected()
// FVIS-HIDDEN: define protected amdgpu_kernel void @kern_protected()
__attribute__((visibility("protected"))) kernel void kern_protected() {}
-// FVIS-DEFAULT: define amdgpu_kernel void @kern_default()
-// FVIS-PROTECTED: define amdgpu_kernel void @kern_default()
-// FVIS-HIDDEN: define amdgpu_kernel void @kern_default()
+// FVIS-DEFAULT: define{{.*}} amdgpu_kernel void @kern_default()
+// FVIS-PROTECTED: define{{.*}} amdgpu_kernel void @kern_default()
+// FVIS-HIDDEN: define{{.*}} amdgpu_kernel void @kern_default()
__attribute__((visibility("default"))) kernel void kern_default() {}
-// FVIS-DEFAULT: define void @func()
+// FVIS-DEFAULT: define{{.*}} void @func()
// FVIS-PROTECTED: define protected void @func()
// FVIS-HIDDEN: define hidden void @func()
void func() {}
// FVIS-PROTECTED: define protected void @func_protected()
// FVIS-HIDDEN: define protected void @func_protected()
__attribute__((visibility("protected"))) void func_protected() {}
-// FVIS-DEFAULT: define void @func_default()
-// FVIS-PROTECTED: define void @func_default()
-// FVIS-HIDDEN: define void @func_default()
+// FVIS-DEFAULT: define{{.*}} void @func_default()
+// FVIS-PROTECTED: define{{.*}} void @func_default()
+// FVIS-HIDDEN: define{{.*}} void @func_default()
__attribute__((visibility("default"))) void func_default() {}
extern kernel void ext_kern();
// RUN: %clang_cc1 -emit-llvm -triple amdgcn-amd-amdhsa -O0 -cl-std=CL2.0 -o - %s | FileCheck -check-prefixes=CHECK,AMDGCN %s
constant int sz0 = 5;
-// SPIR: @sz0 = addrspace(2) constant i32 5
-// AMDGCN: @sz0 = addrspace(4) constant i32 5
+// SPIR: @sz0 ={{.*}} addrspace(2) constant i32 5
+// AMDGCN: @sz0 ={{.*}} addrspace(4) constant i32 5
const global int sz1 = 16;
-// CHECK: @sz1 = addrspace(1) constant i32 16
+// CHECK: @sz1 ={{.*}} addrspace(1) constant i32 16
const constant int sz2 = 8;
-// SPIR: @sz2 = addrspace(2) constant i32 8
-// AMDGCN: @sz2 = addrspace(4) constant i32 8
+// SPIR: @sz2 ={{.*}} addrspace(2) constant i32 8
+// AMDGCN: @sz2 ={{.*}} addrspace(4) constant i32 8
// CHECK: @testvla.vla2 = internal addrspace(3) global [8 x i16] undef
kernel void testvla()
#define ADR(x) &x
#endif
-//COMMON: @glob = addrspace(1) global i32
+//COMMON: @glob ={{.*}} addrspace(1) global i32
int glob;
-//PTR: @glob_p = addrspace(1) global i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @glob to i32 addrspace(4)*)
-//REF: @glob_p = addrspace(1) constant i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @glob to i32 addrspace(4)*)
+//PTR: @glob_p ={{.*}} addrspace(1) global i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @glob to i32 addrspace(4)*)
+//REF: @glob_p ={{.*}} addrspace(1) constant i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @glob to i32 addrspace(4)*)
int PTR glob_p = ADR(glob);
//COMMON: @_ZZ3fooi{{P|R}}U3AS4iE6loc_st = internal addrspace(1) global i32
//COMMON: @loc_ext_p = external addrspace(1) {{global|constant}} i32 addrspace(4)*
//COMMON: @loc_ext = external addrspace(1) global i32
-//COMMON: define spir_func i32 @_Z3fooi{{P|R}}U3AS4i(i32 %par, i32 addrspace(4)*{{.*}} %par_p)
+//COMMON: define{{.*}} spir_func i32 @_Z3fooi{{P|R}}U3AS4i(i32 %par, i32 addrspace(4)*{{.*}} %par_p)
int foo(int par, int PTR par_p){
//COMMON: %loc = alloca i32
int loc;
//COMMON: %loc_p = alloca i32 addrspace(4)*
//COMMON: %loc_p_const = alloca i32*
- //COMMON: [[GAS:%[._a-z0-9]*]] = addrspacecast i32* %loc to i32 addrspace(4)*
+ //COMMON: [[GAS:%[._a-z0-9]*]] ={{.*}} addrspacecast i32* %loc to i32 addrspace(4)*
//COMMON: store i32 addrspace(4)* [[GAS]], i32 addrspace(4)** %loc_p
int PTR loc_p = ADR(loc);
//COMMON: store i32* %loc, i32** %loc_p_const
__global E globE;
volatile __global int globVI;
__global int globI;
-//CHECK-LABEL: define spir_func void @_Z3barv()
+//CHECK-LABEL: define{{.*}} spir_func void @_Z3barv()
void bar() {
C c;
- //CHECK: [[A1:%[.a-z0-9]+]] = addrspacecast %class.C* [[C:%[a-z0-9]+]] to %class.C addrspace(4)*
+ //CHECK: [[A1:%[.a-z0-9]+]] ={{.*}} addrspacecast %class.C* [[C:%[a-z0-9]+]] to %class.C addrspace(4)*
//CHECK: call spir_func void @_ZNU3AS41C6AssignE1E(%class.C addrspace(4)* {{[^,]*}} [[A1]], i32 0)
c.Assign(a);
- //CHECK: [[A2:%[.a-z0-9]+]] = addrspacecast %class.C* [[C]] to %class.C addrspace(4)*
+ //CHECK: [[A2:%[.a-z0-9]+]] ={{.*}} addrspacecast %class.C* [[C]] to %class.C addrspace(4)*
//CHECK: call spir_func void @_ZNU3AS41C8OrAssignE1E(%class.C addrspace(4)* {{[^,]*}} [[A2]], i32 0)
c.OrAssign(a);
//RUN: %clang_cc1 %s -cl-std=clc++ -triple spir -emit-llvm -o - | FileCheck %s
int bar(const unsigned int &i);
-// CHECK-LABEL: define spir_func void @_Z3foov()
+// CHECK-LABEL: define{{.*}} spir_func void @_Z3foov()
void foo() {
// The generic addr space reference parameter object will be bound
// to a temporary value allocated in private addr space. We need an
// addrspacecast before passing the value to the function.
// CHECK: [[REF:%.*]] = alloca i32
// CHECK: store i32 1, i32* [[REF]]
- // CHECK: [[REG:%[.a-z0-9]+]] = addrspacecast i32* [[REF]] to i32 addrspace(4)*
+ // CHECK: [[REG:%[.a-z0-9]+]] ={{.*}} addrspacecast i32* [[REF]] to i32 addrspace(4)*
// CHECK: call spir_func i32 @_Z3barRU3AS4Kj(i32 addrspace(4)* align 4 dereferenceable(4) [[REG]])
bar(1);
}
int i;
};
-// CHECK: @const1 = addrspace(2) global %struct.MyType zeroinitializer
+// CHECK: @const1 ={{.*}} addrspace(2) global %struct.MyType zeroinitializer
__constant MyType const1 = 1;
-// CHECK: @const2 = addrspace(2) global %struct.MyType zeroinitializer
+// CHECK: @const2 ={{.*}} addrspace(2) global %struct.MyType zeroinitializer
__constant MyType const2(2);
-// CHECK: @glob = addrspace(1) global %struct.MyType zeroinitializer
+// CHECK: @glob ={{.*}} addrspace(1) global %struct.MyType zeroinitializer
MyType glob(1);
// CHECK: call spir_func void @_ZNU3AS26MyTypeC1Ei(%struct.MyType addrspace(2)* {{[^,]*}} @const1, i32 1)
// CHECK: call spir_func void @_ZNU3AS26MyTypeC1Ei(%struct.MyType addrspace(2)* {{[^,]*}} @const2, i32 2)
// CHECK: call spir_func void @_ZNU3AS46MyTypeC1Ei(%struct.MyType addrspace(4)* {{[^,]*}} addrspacecast (%struct.MyType addrspace(1)* @glob to %struct.MyType addrspace(4)*), i32 1)
-// CHECK-LABEL: define spir_kernel void @fooGlobal()
+// CHECK-LABEL: define{{.*}} spir_kernel void @fooGlobal()
kernel void fooGlobal() {
// CHECK: call spir_func i32 @_ZNU3AS46MyType3barEv(%struct.MyType addrspace(4)* {{[^,]*}} addrspacecast (%struct.MyType addrspace(1)* @glob to %struct.MyType addrspace(4)*))
glob.bar();
const1.~MyType();
}
-// CHECK-LABEL: define spir_kernel void @fooLocal()
+// CHECK-LABEL: define{{.*}} spir_kernel void @fooLocal()
kernel void fooLocal() {
// CHECK: [[VAR:%.*]] = alloca %struct.MyType
- // CHECK: [[REG:%.*]] = addrspacecast %struct.MyType* [[VAR]] to %struct.MyType addrspace(4)*
+ // CHECK: [[REG:%.*]] ={{.*}} addrspacecast %struct.MyType* [[VAR]] to %struct.MyType addrspace(4)*
// CHECK: call spir_func void @_ZNU3AS46MyTypeC1Ei(%struct.MyType addrspace(4)* {{[^,]*}} [[REG]], i32 3)
MyType myLocal(3);
- // CHECK: [[REG:%.*]] = addrspacecast %struct.MyType* [[VAR]] to %struct.MyType addrspace(4)*
+ // CHECK: [[REG:%.*]] ={{.*}} addrspacecast %struct.MyType* [[VAR]] to %struct.MyType addrspace(4)*
// CHECK: call spir_func i32 @_ZNU3AS46MyType3barEv(%struct.MyType addrspace(4)* {{[^,]*}} [[REG]])
myLocal.bar();
- // CHECK: [[REG:%.*]] = addrspacecast %struct.MyType* [[VAR]] to %struct.MyType addrspace(4)*
+ // CHECK: [[REG:%.*]] ={{.*}} addrspacecast %struct.MyType* [[VAR]] to %struct.MyType addrspace(4)*
// CHECK: call spir_func void @_ZNU3AS46MyTypeD1Ev(%struct.MyType addrspace(4)* {{[^,]*}} [[REG]])
}
//RUN: %clang_cc1 %s -triple spir -cl-std=clc++ -emit-llvm -O0 -o - | FileCheck %s
-//CHECK-LABEL: define spir_func void @_Z3barPU3AS1i
+//CHECK-LABEL: define{{.*}} spir_func void @_Z3barPU3AS1i
void bar(global int *gl) {
//CHECK: addrspacecast i32 addrspace(1)* %{{[0-9]+}} to i32 addrspace(4)*
int *gen = addrspace_cast<int *>(gl);
constexpr float FloatConstant = compute();
-// CHECK-LABEL: define spir_kernel void @foo
+// CHECK-LABEL: define{{.*}} spir_kernel void @foo
// CHECK: store float 2.000000e+00
kernel void foo(global float *x) {
*x = FloatConstant;
}
// Test evaluation of constant vectors.
-// CHECK-LABEL: define spir_kernel void @vecEval
+// CHECK-LABEL: define{{.*}} spir_kernel void @vecEval
// CHECK: store i32 3
// CHECK: store <2 x i32> <i32 22, i32 33>, <2 x i32>
}
// Test evaluation of vectors initialized through a constexpr function.
-// CHECK-LABEL: define spir_kernel void @vecEval2
+// CHECK-LABEL: define{{.*}} spir_kernel void @vecEval2
// CHECK: store <2 x i32>
constexpr int2 addOne(int2 x) {
return (int2)(x.x + 1, x.y + 1);
}
// Test evaluation of vec_step
-// CHECK-LABEL: define spir_kernel void @vec_step_test
+// CHECK-LABEL: define{{.*}} spir_kernel void @vec_step_test
// CHECK: store i32 6
constexpr int vsize1 = vec_step(fromConstexprFunc);
constexpr int vsize2 = vec_step(int4);
// RUN: llvm-dis %t.bc -o - | FileCheck %s --check-prefix=CHECK-BC
// RUN: llvm-objcopy --dump-section=.llvmcmd=- %t.o /dev/null | FileCheck %s --check-prefix=CHECK-CMD
-// CHECK-BC-LABEL: define void @bar() #0 {
+// CHECK-BC-LABEL: define{{.*}} void @bar() #0 {
// CHECK-BC-NEXT: entry:
// CHECK-BC-NEXT: ret void
// CHECK-BC-NEXT: }
-// CHECK-BC-LABEL: define void @foo() #1 {
+// CHECK-BC-LABEL: define{{.*}} void @foo() #1 {
// CHECK-BC-NEXT: entry:
// CHECK-BC-NEXT: call void @bar()
// CHECK-BC-NEXT: ret void
FOO: $_ZZ3foovE1i = comdat any
FOO: @_ZZ3foovE1i = linkonce_odr global i32 0, comdat
FOO-NOT: {{comdat|define|declare}}
-FOO: define void @_Z7foo_extv()
+FOO: define{{.*}} void @_Z7foo_extv()
FOO-NOT: {{define|declare}}
FOO: define weak_odr void @_Z3foov() #{{[0-9]+}} comdat
FOO-NOT: {{define|declare}}
USE-OPT: @_ZZ3foovE1i = linkonce_odr global i32 0, comdat
USE-CMN-NOT: {{comdat|define|declare}}
-USE-CMN: define i32 @main()
+USE-CMN: define{{.*}} i32 @main()
USE-CMN-NOT: {{define|declare}}
USE: declare void @_Z3barv()
Include all the available_externally definitions required for main (bar -> foo -> f2)
#pragma clang module load m
#endif
-// CHECK-IMPORT-NO-NS-DAG: @[[A:a]] = global i32 0, align 4
+// CHECK-IMPORT-NO-NS-DAG: @[[A:a]] ={{.*}} global i32 0, align 4
// CHECK-IMPORT-NO-NS-DAG: @[[B:b]] = linkonce_odr global i32 0, comdat, align 4
-// CHECK-IMPORT-NO-NS-DAG: @[[C:c]] = thread_local global i32 0, align 4
+// CHECK-IMPORT-NO-NS-DAG: @[[C:c]] ={{.*}} thread_local global i32 0, align 4
// CHECK-IMPORT-NO-NS-DAG: @[[D:d]] = linkonce_odr thread_local global i32 0, comdat, align 4
// CHECK-NO-NS-DAG: @[[E:_Z1eIiE]] = linkonce_odr global i32 0, comdat, align 4
// CHECK-NO-NS-DAG: @[[F:_Z1fIiE]] = linkonce_odr global i32 0, comdat, align 4
// CHECK-NO-NS-DAG: @[[G:_Z1gIiE]] = linkonce_odr thread_local global i32 0, comdat, align 4
// CHECK-NO-NS-DAG: @[[H:_Z1hIiE]] = linkonce_odr thread_local global i32 0, comdat, align 4
-// CHECK-IMPORT-NS-DAG: @[[A:_ZN2ns1aE]] = global i32 0, align 4
+// CHECK-IMPORT-NS-DAG: @[[A:_ZN2ns1aE]] ={{.*}} global i32 0, align 4
// CHECK-IMPORT-NS-DAG: @[[B:_ZN2ns1bE]] = linkonce_odr global i32 0, comdat, align 4
// CHECK-IMPORT-NS-DAG: @[[BG:_ZGVN2ns1bE]] = linkonce_odr global i64 0, comdat($[[B]]), align 8
-// CHECK-IMPORT-NS-DAG: @[[C:_ZN2ns1cE]] = thread_local global i32 0, align 4
+// CHECK-IMPORT-NS-DAG: @[[C:_ZN2ns1cE]] ={{.*}} thread_local global i32 0, align 4
// CHECK-IMPORT-NS-DAG: @[[D:_ZN2ns1dE]] = linkonce_odr thread_local global i32 0, comdat, align 4
// CHECK-IMPORT-NS-DAG: @[[DG:_ZGVN2ns1dE]] = linkonce_odr thread_local global i64 0, comdat($[[D]]), align 8
// CHECK-NS-DAG: @[[E:_ZN2ns1eIiEE]] = linkonce_odr global i32 0, comdat, align 4
@import templates_right;
-// CHECK-DAG: @list_left = global %[[LIST:.*]] { %[[LISTNODE:.*]]* null, i32 8 }, align 8
-// CHECK-DAG: @list_right = global %[[LIST]] { %[[LISTNODE]]* null, i32 12 }, align 8
+// CHECK-DAG: @list_left ={{.*}} global %[[LIST:.*]] { %[[LISTNODE:.*]]* null, i32 8 }, align 8
+// CHECK-DAG: @list_right ={{.*}} global %[[LIST]] { %[[LISTNODE]]* null, i32 12 }, align 8
// CHECK-DAG: @__const._Z15testMixedStructv.l = {{.*}} constant %[[LIST]] { %{{.*}}* null, i32 1 }, align 8
// CHECK-DAG: @__const._Z15testMixedStructv.r = {{.*}} constant %[[LIST]] { %{{.*}}* null, i32 2 }, align 8
// CHECK-DAG: @_ZN29WithUndefinedStaticDataMemberIA_iE9undefinedE = external global
static_assert(size_left == size_right, "same field both ways");
void useListInt(List<int> &);
-// CHECK-LABEL: define i32 @_Z15testMixedStructv(
+// CHECK-LABEL: define{{.*}} i32 @_Z15testMixedStructv(
unsigned testMixedStruct() {
// CHECK: %[[l:.*]] = alloca %[[ListInt:[^ ]*]], align 8
// CHECK: %[[r:.*]] = alloca %[[ListInt]], align 8
#ifndef HEADER
#define HEADER
-// CHECK: @{{.*}}Foo{{.*}}bar{{.*}} = constant i32 1,
+// CHECK: @{{.*}}Foo{{.*}}bar{{.*}} ={{.*}} constant i32 1,
// Section A - Define a class with a static constexpr data member.
struct Foo {
#pragma omp declare variant(dev) match(device = {kind(gpu)})
int base();
-// HOST-LABEL: define void @foo()
+// HOST-LABEL: define{{.*}} void @foo()
// HOST: call i32 @hst(double -1.000000e+00)
// HOST: call i32 @hst(double -2.000000e+00)
// HOST: call void [[OFFL:@.+_foo_l36]]()
// CHECK: [[IDENT_T_TY:%.+]] = type { i32, i32, i32, i32, i8* }
// CHECK-DAG: [[IMPLICIT_BARRIER_LOC:@.+]] = private unnamed_addr constant %{{.+}} { i32 0, i32 66, i32 0, i32 0, i8*
// CHECK-DAG: [[LOOP_LOC:@.+]] = private unnamed_addr constant %{{.+}} { i32 0, i32 514, i32 0, i32 0, i8*
-// CHECK-DAG: [[I:@.+]] = global i8 1,
-// CHECK-DAG: [[J:@.+]] = global i8 2,
-// CHECK-DAG: [[K:@.+]] = global i8 3,
+// CHECK-DAG: [[I:@.+]] ={{.*}} global i8 1,
+// CHECK-DAG: [[J:@.+]] ={{.*}} global i8 2,
+// CHECK-DAG: [[K:@.+]] ={{.*}} global i8 3,
// CHECK-LABEL: loop_with_counter_collapse
void loop_with_counter_collapse() {
#endif
}
-// CHECK: define i{{[0-9]+}} @main()
+// CHECK: define{{.*}} i{{[0-9]+}} @main()
// CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]],
// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* {{[^,]*}} [[TEST]])
// CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[MAIN_MICROTASK:@.+]] to void
void foo();
void bar();
-// CHECK: define void @{{.*}}baz{{.*}}(i32 %n)
+// CHECK: define{{.*}} void @{{.*}}baz{{.*}}(i32 %n)
void baz(int n) {
static float a[10];
static double b;
void foo();
void bar();
-// CHECK: define void @{{.*}}baz{{.*}}(i32 %n)
+// CHECK: define{{.*}} void @{{.*}}baz{{.*}}(i32 %n)
void baz(int n) {
static float a[10];
static double b;
// DEVICE-DAG: ret void
// HOST-DAG: @.omp_offloading.entry_name{{.*}} = internal unnamed_addr constant [{{[0-9]+}} x i8] c"[[C_ADDR]]\00"
-// HOST-DAG: @.omp_offloading.entry.[[C_ADDR]] = weak constant %struct.__tgt_offload_entry { i8* bitcast (i32* @[[C_ADDR]] to i8*), i8* getelementptr inbounds ([{{[0-9]+}} x i8], [{{[0-9]+}} x i8]* @.omp_offloading.entry_name{{.*}}, i32 0, i32 0), i64 4, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// HOST-DAG: @.omp_offloading.entry.[[C_ADDR]] = weak{{.*}} constant %struct.__tgt_offload_entry { i8* bitcast (i32* @[[C_ADDR]] to i8*), i8* getelementptr inbounds ([{{[0-9]+}} x i8], [{{[0-9]+}} x i8]* @.omp_offloading.entry_name{{.*}}, i32 0, i32 0), i64 4, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// HOST-DAG: @.omp_offloading.entry_name{{.*}} = internal unnamed_addr constant [{{[0-9]+}} x i8] c"[[CD_ADDR]]\00"
-// HOST-DAG: @.omp_offloading.entry.[[CD_ADDR]] = weak constant %struct.__tgt_offload_entry { i8* bitcast (%struct.S* @[[CD_ADDR]] to i8*), i8* getelementptr inbounds ([{{[0-9]+}} x i8], [{{[0-9]+}} x i8]* @.omp_offloading.entry_name{{.*}}, i32 0, i32 0), i64 4, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// HOST-DAG: @.omp_offloading.entry.[[CD_ADDR]] = weak{{.*}} constant %struct.__tgt_offload_entry { i8* bitcast (%struct.S* @[[CD_ADDR]] to i8*), i8* getelementptr inbounds ([{{[0-9]+}} x i8], [{{[0-9]+}} x i8]* @.omp_offloading.entry_name{{.*}}, i32 0, i32 0), i64 4, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// HOST-DAG: @.omp_offloading.entry_name{{.*}} = internal unnamed_addr constant [{{[0-9]+}} x i8] c"[[C_CTOR]]\00"
-// HOST-DAG: @.omp_offloading.entry.[[C_CTOR]] = weak constant %struct.__tgt_offload_entry { i8* @[[C_CTOR]], i8* getelementptr inbounds ([{{[0-9]+}} x i8], [{{[0-9]+}} x i8]* @.omp_offloading.entry_name{{.*}}, i32 0, i32 0), i64 0, i32 2, i32 0 }, section "omp_offloading_entries", align 1
+// HOST-DAG: @.omp_offloading.entry.[[C_CTOR]] = weak{{.*}} constant %struct.__tgt_offload_entry { i8* @[[C_CTOR]], i8* getelementptr inbounds ([{{[0-9]+}} x i8], [{{[0-9]+}} x i8]* @.omp_offloading.entry_name{{.*}}, i32 0, i32 0), i64 0, i32 2, i32 0 }, section "omp_offloading_entries", align 1
// HOST-DAG: @.omp_offloading.entry_name{{.*}}= internal unnamed_addr constant [{{[0-9]+}} x i8] c"[[CD_CTOR]]\00"
-// HOST-DAG: @.omp_offloading.entry.[[CD_CTOR]] = weak constant %struct.__tgt_offload_entry { i8* @[[CD_CTOR]], i8* getelementptr inbounds ([{{[0-9]+}} x i8], [{{[0-9]+}} x i8]* @.omp_offloading.entry_name{{.*}}, i32 0, i32 0), i64 0, i32 2, i32 0 }, section "omp_offloading_entries", align 1
+// HOST-DAG: @.omp_offloading.entry.[[CD_CTOR]] = weak{{.*}} constant %struct.__tgt_offload_entry { i8* @[[CD_CTOR]], i8* getelementptr inbounds ([{{[0-9]+}} x i8], [{{[0-9]+}} x i8]* @.omp_offloading.entry_name{{.*}}, i32 0, i32 0), i64 0, i32 2, i32 0 }, section "omp_offloading_entries", align 1
// HOST-DAG: @.omp_offloading.entry_name{{.*}}= internal unnamed_addr constant [{{[0-9]+}} x i8] c"[[CD_DTOR]]\00"
-// HOST-DAG: @.omp_offloading.entry.[[CD_DTOR]] = weak constant %struct.__tgt_offload_entry { i8* @[[CD_DTOR]], i8* getelementptr inbounds ([{{[0-9]+}} x i8], [{{[0-9]+}} x i8]* @.omp_offloading.entry_name{{.*}}, i32 0, i32 0), i64 0, i32 4, i32 0 }, section "omp_offloading_entries", align 1
+// HOST-DAG: @.omp_offloading.entry.[[CD_DTOR]] = weak{{.*}} constant %struct.__tgt_offload_entry { i8* @[[CD_DTOR]], i8* getelementptr inbounds ([{{[0-9]+}} x i8], [{{[0-9]+}} x i8]* @.omp_offloading.entry_name{{.*}}, i32 0, i32 0), i64 0, i32 4, i32 0 }, section "omp_offloading_entries", align 1
int maini1() {
int a;
#pragma omp target map(tofrom : a)
return 0;
}
-// DEVICE: define weak void @__omp_offloading_{{.*}}_{{.*}}maini1{{.*}}_l[[@LINE-7]](i32* nonnull align {{[0-9]+}} dereferenceable{{[^,]*}}
+// DEVICE: define weak{{.*}} void @__omp_offloading_{{.*}}_{{.*}}maini1{{.*}}_l[[@LINE-7]](i32* nonnull align {{[0-9]+}} dereferenceable{{[^,]*}}
// DEVICE: [[C:%.+]] = load i32, i32* [[C_ADDR]],
// DEVICE: store i32 [[C]], i32* %
return sum;
}
-// CHECK-HOST: [[VAR:@.+]] = global double 1.000000e+01
-// CHECK-HOST: [[VAR_DECL_TGT_LINK_PTR:@.+]] = weak global double* [[VAR]]
+// CHECK-HOST: [[VAR:@.+]] ={{.*}} global double 1.000000e+01
+// CHECK-HOST: [[VAR_DECL_TGT_LINK_PTR:@.+]] = weak{{.*}} global double* [[VAR]]
-// CHECK-HOST: [[TO_VAR:@.+]] = global double 2.000000e+01
-// CHECK-HOST: [[VAR_DECL_TGT_TO_PTR:@.+]] = weak global double* [[TO_VAR]]
+// CHECK-HOST: [[TO_VAR:@.+]] ={{.*}} global double 2.000000e+01
+// CHECK-HOST: [[VAR_DECL_TGT_TO_PTR:@.+]] = weak{{.*}} global double* [[TO_VAR]]
// CHECK-HOST: [[OFFLOAD_SIZES:@.+]] = private unnamed_addr constant [2 x i64] [i64 4, i64 8]
// CHECK-HOST: [[OFFLOAD_MAPTYPES:@.+]] = private unnamed_addr constant [2 x i64] [i64 800, i64 800]
// CHECK-HOST: [[OMP_OFFLOAD_ENTRY_LINK_VAR_PTR_NAME:@.+]] = internal unnamed_addr constant [21 x i8]
-// CHECK-HOST: [[OMP_OFFLOAD_ENTRY_LINK_VAR_PTR:@.+]] = weak constant %struct.__tgt_offload_entry { i8* bitcast (double** [[VAR_DECL_TGT_LINK_PTR]] to i8*), i8* getelementptr inbounds ([21 x i8], [21 x i8]* [[OMP_OFFLOAD_ENTRY_LINK_VAR_PTR_NAME]], i32 0, i32 0), i64 8, i32 1, i32 0 }, section "omp_offloading_entries"
+// CHECK-HOST: [[OMP_OFFLOAD_ENTRY_LINK_VAR_PTR:@.+]] = weak{{.*}} constant %struct.__tgt_offload_entry { i8* bitcast (double** [[VAR_DECL_TGT_LINK_PTR]] to i8*), i8* getelementptr inbounds ([21 x i8], [21 x i8]* [[OMP_OFFLOAD_ENTRY_LINK_VAR_PTR_NAME]], i32 0, i32 0), i64 8, i32 1, i32 0 }, section "omp_offloading_entries"
// CHECK-HOST: [[OMP_OFFLOAD_ENTRY_TO_VAR_PTR_NAME:@.+]] = internal unnamed_addr constant [24 x i8]
-// CHECK-HOST: [[OMP_OFFLOAD_ENTRY_TO_VAR_PTR:@.+]] = weak constant %struct.__tgt_offload_entry { i8* bitcast (double** [[VAR_DECL_TGT_TO_PTR]] to i8*), i8* getelementptr inbounds ([24 x i8], [24 x i8]* [[OMP_OFFLOAD_ENTRY_TO_VAR_PTR_NAME]], i32 0, i32 0), i64 8, i32 0, i32 0 }, section "omp_offloading_entries"
+// CHECK-HOST: [[OMP_OFFLOAD_ENTRY_TO_VAR_PTR:@.+]] = weak{{.*}} constant %struct.__tgt_offload_entry { i8* bitcast (double** [[VAR_DECL_TGT_TO_PTR]] to i8*), i8* getelementptr inbounds ([24 x i8], [24 x i8]* [[OMP_OFFLOAD_ENTRY_TO_VAR_PTR_NAME]], i32 0, i32 0), i64 8, i32 0, i32 0 }, section "omp_offloading_entries"
// CHECK-HOST: [[N_CASTED:%.+]] = alloca i64
// CHECK-HOST: [[SUM_CASTED:%.+]] = alloca i64
// CHECK-HOST: call i32 @__tgt_target_mapper(%struct.ident_t* @{{.+}}, i64 -1, i8* @{{.*}}.region_id, i32 2, i8** [[BPTR7]], i8** [[BPTR8]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* [[OFFLOAD_SIZES]], i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* [[OFFLOAD_MAPTYPES]], i32 0, i32 0), i8** null, i8** null)
-// CHECK-DEVICE: [[VAR_LINK:@.+]] = weak global double* null
-// CHECK-DEVICE: [[VAR_TO:@.+]] = weak global double* null
+// CHECK-DEVICE: [[VAR_LINK:@.+]] = weak{{.*}} global double* null
+// CHECK-DEVICE: [[VAR_TO:@.+]] = weak{{.*}} global double* null
// CHECK-DEVICE: [[VAR_TO_PTR:%.+]] = load double*, double** [[VAR_TO]]
// CHECK-DEVICE: load double, double* [[VAR_TO_PTR]]
// CHECK: appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 0, void ()* @.omp_offloading.requires_reg, i8* null }]
// Check presence of foo() and the outlined target region
-// CHECK: define void [[FOO:@.+]]()
+// CHECK: define{{.*}} void [[FOO:@.+]]()
// CHECK: define internal void [[OUTLINEDTARGET:@.+]]()
// Check registration and unregistration code.
// ALL-NEXT: [[RET:%.+]] = call {{[a-z\_\b]*[ ]?i32}} [[TMAIN:@.+tmain.+]](i8** [[ARGV]])
// ALL: ret i32
// ALL-NEXT: }
-// ALL-DEBUG-LABEL: define i32 @main(i32 %argc, i8** %argv)
+// ALL-DEBUG-LABEL: define{{.*}} i32 @main(i32 %argc, i8** %argv)
// ALL-DEBUG: store i32 %argc, i32* [[ARGC_ADDR:%.+]],
// ALL-DEBUG: [[VLA:%.+]] = alloca i32, i64 [[VLA_SIZE:%[^,]+]],
static int sivar;
SS ss(sivar);
#ifdef LAMBDA
- // LAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // LAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// LAMBDA-LABEL: @main
// LAMBDA: alloca [[SS_TY]],
// LAMBDA: alloca [[CAP_TY:%.+]],
}();
return 0;
#elif defined(BLOCKS)
- // BLOCKS: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // BLOCKS: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// BLOCKS-LABEL: @main
// BLOCKS: call
// BLOCKS: call {{.*}}void {{%.+}}(i8
void foo();
void bar();
-// CHECK: define void @{{.*}}baz{{.*}}(i32 %n)
+// CHECK: define{{.*}} void @{{.*}}baz{{.*}}(i32 %n)
void baz(int n) {
static float a[10];
static double b;
void foo();
void bar();
-// CHECK: define void @{{.*}}baz{{.*}}(i32 %n)
+// CHECK: define{{.*}} void @{{.*}}baz{{.*}}(i32 %n)
void baz(int n) {
static float a[10];
static double b;
foo();
}
-// CK1-LABEL: define void @{{.+}}parallel_master{{.+}}
+// CK1-LABEL: define{{.*}} void @{{.+}}parallel_master{{.+}}
// CK1: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*))
// CK1: define internal {{.*}}void [[OMP_OUTLINED]](i32* noalias [[GTID:%.+]], i32* noalias [[BTID:%.+]])
a++;
}
-// CK2-LABEL: define void @{{.+}}parallel_master_private{{.+}}
+// CK2-LABEL: define{{.*}} void @{{.+}}parallel_master_private{{.+}}
// CK2: [[A_PRIV:%.+]] = alloca i32
// CK2: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*))
a++;
}
-// CK3-LABEL: define void @{{.+}}parallel_master{{.+}}
+// CK3-LABEL: define{{.*}} void @{{.+}}parallel_master{{.+}}
// CK3: [[A_VAL:%.+]] = alloca i32
// CK3: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* {{.+}}, i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* [[OMP_OUTLINED:@.+]] to void
a++;
}
-// CK31-LABEL: define void @{{.+}}parallel_master{{.+}}
+// CK31-LABEL: define{{.*}} void @{{.+}}parallel_master{{.+}}
// CK31: [[A_VAL:%.+]] = alloca i32{{.+}}
// CK31: [[A_CASTED:%.+]] = alloca i64
// CK31: [[ZERO_VAL:%.+]] = load i32, i32* [[A_VAL]]
a++;
}
-// CK4-LABEL: define void @{{.+}}parallel_master_firstprivate{{.+}}
+// CK4-LABEL: define{{.*}} void @{{.+}}parallel_master_firstprivate{{.+}}
// CK4: [[A_VAL:%.+]] = alloca i32
// CK4: [[A_CASTED:%.+]] = alloca i64
// CK4: [[ZERO:%.+]] = load i32, i32* [[A_VAL]]
// CK5-DAG: [[A:@.+]] = {{.+}} i32 0
// CK5-DAG: [[STR:@.+]] = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00"
// CK5-DAG: [[DEF_LOC_1:@.+]] = private unnamed_addr constant %struct.ident_t { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* [[STR]], i32 0, i32 0) }
-// CK5-DAG: [[A_CACHE:@.+]] = common global i8** null
+// CK5-DAG: [[A_CACHE:@.+]] = common{{.*}} global i8** null
// CK5-DAG: [[DEF_LOC_2:@.+]] = private unnamed_addr constant %struct.ident_t { i32 0, i32 66, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* [[STR]], i32 0, i32 0) }
// TLS-CHECK-DAG: %struct.ident_t = type { i32, i32, i32, i32, i8* }
-// TLS-CHECK-DAG: [[A:@.+]] = thread_local global i32 0
+// TLS-CHECK-DAG: [[A:@.+]] ={{.*}} thread_local global i32 0
// TLS-CHECK-DAG: [[STR:@.+]] = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00"
// TLS-CHECK-DAG: [[DEF_LOC_1:@.+]] = private unnamed_addr constant %struct.ident_t { i32 0, i32 66, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* [[STR]], i32 0, i32 0) }
// TLS-CHECK-DAG: [[DEF_LOC_2:@.+]] = private unnamed_addr constant %struct.ident_t { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* [[STR]], i32 0, i32 0) }
a++;
}
-// CK5-LABEL: define void @{{.+}}parallel_master_copyin{{.+}}
+// CK5-LABEL: define{{.*}} void @{{.+}}parallel_master_copyin{{.+}}
// CK5: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC_1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*))
// CK5: ret void
-// TLS-CHECK-LABEL: define void @{{.+}}parallel_master_copyin{{.+}}
+// TLS-CHECK-LABEL: define{{.*}} void @{{.+}}parallel_master_copyin{{.+}}
// TLS-CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC_2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*)
// TLS-CHECK: ret void
// CK6-DAG: %struct.ident_t = type { i32, i32, i32, i32, i8* }
// CK6-DAG: [[STR:@.+]] = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00"
// CK6-DAG: [[DEF_LOC_1:@.+]] = private unnamed_addr constant %struct.ident_t { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* [[STR]], i32 0, i32 0) }
-// CK6-DAG: [[GOMP:@.+]] = common global [8 x i32] zeroinitializer
+// CK6-DAG: [[GOMP:@.+]] = common{{.*}} global [8 x i32] zeroinitializer
// CK6-DAG: [[DEF_LOC_2:@.+]] = private unnamed_addr constant %struct.ident_t { i32 0, i32 18, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* [[STR]], i32 0, i32 0) }
void parallel_master_reduction() {
g = 1;
}
-// CK6-LABEL: define void @{{.+}}parallel_master_reduction{{.+}}
+// CK6-LABEL: define{{.*}} void @{{.+}}parallel_master_reduction{{.+}}
// CK6: [[G_VAR:%.+]] = alloca i32
// CK6: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC_1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* [[OMP_OUTLINED:@.+]] to void (i32*, i32*, ...)*), i32* [[G_VAR]])
// CK6: ret void
a++;
}
-// CK9-LABEL: define void @{{.+}}parallel_master_allocate{{.+}}
+// CK9-LABEL: define{{.*}} void @{{.+}}parallel_master_allocate{{.+}}
// CK9: [[A_VAL:%.+]] = alloca i32,
// CK9: [[A_CASTED:%.+]] = alloca i64
// CK9: [[ZERO:%.+]] = load i32, i32* [[A_VAL]]
#endif
}
-// CHECK: define i{{[0-9]+}} @main()
+// CHECK: define{{.*}} i{{[0-9]+}} @main()
// CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]],
// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* {{[^,]*}} [[TEST]])
// CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[MAIN_MICROTASK:@.+]] to void
#endif
}
-// CHECK: define i{{[0-9]+}} @main()
+// CHECK: define{{.*}} i{{[0-9]+}} @main()
// CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]],
// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* {{[^,]*}} [[TEST]])
// CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[MAIN_MICROTASK:@.+]] to void
void h1(float *c, float *a, double b[], int size)
{
-// CHECK-LABEL: define void @h1
+// CHECK-LABEL: define{{.*}} void @h1
int t = 0;
#pragma omp simd safelen(16) linear(t) aligned(c:32) aligned(a,b)
// CHECK: call void @llvm.assume(i1 true) [ "align"(float* [[PTR4:%.*]], {{i64|i32}} 32) ]
void h2(float *c, float *a, float *b, int size)
{
-// CHECK-LABEL: define void @h2
+// CHECK-LABEL: define{{.*}} void @h2
int t = 0;
#pragma omp simd linear(t)
for (int i = 0; i < size; ++i) {
void h3(float *c, float *a, float *b, int size)
{
-// CHECK-LABEL: define void @h3
+// CHECK-LABEL: define{{.*}} void @h3
#pragma omp simd
for (int i = 0; i < size; ++i) {
for (int j = 0; j < size; ++j) {
// CHECK-DAG: [[IDENT_T_TY:%.+]] = type { i32, i32, i32, i32, i8* }
// CHECK: [[IMPLICIT_BARRIER_SINGLE_LOC:@.+]] = private unnamed_addr constant %{{.+}} { i32 0, i32 322, i32 0, i32 0, i8*
-// CHECK: define void [[FOO:@.+]]()
+// CHECK: define{{( dso_local)?}} void [[FOO:@.+]]()
TestClass tc;
TestClass tc2[2];
#endif
}
-// CHECK: define i{{[0-9]+}} @main()
+// CHECK: define{{.*}} i{{[0-9]+}} @main()
// CHECK: [[TEST:%.+]] = alloca [[S_FLOAT_TY]],
// CHECK: call {{.*}} [[S_FLOAT_TY_DEF_CONSTR:@.+]]([[S_FLOAT_TY]]* {{[^,]*}} [[TEST]])
// CHECK: call void (%{{.+}}*, i{{[0-9]+}}, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)*, ...) @__kmpc_fork_call(%{{.+}}* @{{.+}}, i{{[0-9]+}} 0, void (i{{[0-9]+}}*, i{{[0-9]+}}*, ...)* bitcast (void (i{{[0-9]+}}*, i{{[0-9]+}}*)* [[MAIN_MICROTASK:@.+]] to void
#define HEADER
-// CHECK-DAG: [[GA:@.+]] = global double 1.000000e+00
-// CHECK-DAG: [[GB:@.+]] = global double 2.000000e+00
-// CHECK-DAG: [[GC:@.+]] = global double 3.000000e+00
-// CHECK-DAG: [[GD:@.+]] = global double 4.000000e+00
+// CHECK-DAG: [[GA:@.+]] ={{.*}} global double 1.000000e+00
+// CHECK-DAG: [[GB:@.+]] ={{.*}} global double 2.000000e+00
+// CHECK-DAG: [[GC:@.+]] ={{.*}} global double 3.000000e+00
+// CHECK-DAG: [[GD:@.+]] ={{.*}} global double 4.000000e+00
// CHECK-DAG: [[FA:@.+]] = internal global float 5.000000e+00
// CHECK-DAG: [[FB:@.+]] = internal global float 6.000000e+00
// CHECK-DAG: [[FC:@.+]] = internal global float 7.000000e+00
// TCHECK: [[ENTTY:%.+]] = type { i8*, i8*, i[[SZ:32|64]], i32, i32 }
// CHECK-DAG: [[A1:@.+]] = internal global [[SA]]
-// CHECK-DAG: [[A2:@.+]] = global [[SA]]
-// CHECK-DAG: [[B1:@.+]] = global [[SB]]
-// CHECK-DAG: [[B2:@.+]] = global [[SB]]
+// CHECK-DAG: [[A2:@.+]] ={{.*}} global [[SA]]
+// CHECK-DAG: [[B1:@.+]] ={{.*}} global [[SB]]
+// CHECK-DAG: [[B2:@.+]] ={{.*}} global [[SB]]
// CHECK-DAG: [[C1:@.+]] = internal global [[SC]]
-// CHECK-DAG: [[D1:@.+]] = global [[SD]]
-// CHECK-DAG: [[E1:@.+]] = global [[SE]]
-// CHECK-DAG: [[T1:@.+]] = global [[ST1]]
-// CHECK-DAG: [[T2:@.+]] = global [[ST2]]
+// CHECK-DAG: [[D1:@.+]] ={{.*}} global [[SD]]
+// CHECK-DAG: [[E1:@.+]] ={{.*}} global [[SE]]
+// CHECK-DAG: [[T1:@.+]] ={{.*}} global [[ST1]]
+// CHECK-DAG: [[T2:@.+]] ={{.*}} global [[ST2]]
// CHECK-NTARGET-DAG: [[SA:%.+]] = type { [4 x i32] }
// CHECK-NTARGET-DAG: [[SB:%.+]] = type { [8 x i32] }
// We have 7 target regions
-// CHECK-DAG: {{@.+}} = weak constant i8 0
-// TCHECK-NOT: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
+// TCHECK-NOT: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
// CHECK-NTARGET-NOT: private unnamed_addr constant [1 x i
// CHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// CHECK-DAG: @.omp_offloading.entry.[[NAME1]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: @.omp_offloading.entry.[[NAME1]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// CHECK-DAG: @.omp_offloading.entry.[[NAME2]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: @.omp_offloading.entry.[[NAME2]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// CHECK-DAG: @.omp_offloading.entry.[[NAME3]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: @.omp_offloading.entry.[[NAME3]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// CHECK-DAG: @.omp_offloading.entry.[[NAME4]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: @.omp_offloading.entry.[[NAME4]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// CHECK-DAG: @.omp_offloading.entry.[[NAME5]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: @.omp_offloading.entry.[[NAME5]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// CHECK-DAG: @.omp_offloading.entry.[[NAME6]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: @.omp_offloading.entry.[[NAME6]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// CHECK-DAG: @.omp_offloading.entry.[[NAME7]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: @.omp_offloading.entry.[[NAME7]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// CHECK-DAG: @.omp_offloading.entry.[[NAME8]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: @.omp_offloading.entry.[[NAME8]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// CHECK-DAG: @.omp_offloading.entry.[[NAME9]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: @.omp_offloading.entry.[[NAME9]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// CHECK-DAG: @.omp_offloading.entry.[[NAME10]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: @.omp_offloading.entry.[[NAME10]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// CHECK-DAG: @.omp_offloading.entry.[[NAME11]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: @.omp_offloading.entry.[[NAME11]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// CHECK-DAG: @.omp_offloading.entry.[[NAME12]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: @.omp_offloading.entry.[[NAME12]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// TCHECK-DAG: @.omp_offloading.entry.[[NAME1]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: @.omp_offloading.entry.[[NAME1]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// TCHECK-DAG: @.omp_offloading.entry.[[NAME2]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: @.omp_offloading.entry.[[NAME2]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// TCHECK-DAG: @.omp_offloading.entry.[[NAME3]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: @.omp_offloading.entry.[[NAME3]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// TCHECK-DAG: @.omp_offloading.entry.[[NAME4]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: @.omp_offloading.entry.[[NAME4]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// TCHECK-DAG: @.omp_offloading.entry.[[NAME5]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: @.omp_offloading.entry.[[NAME5]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// TCHECK-DAG: @.omp_offloading.entry.[[NAME6]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: @.omp_offloading.entry.[[NAME6]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// TCHECK-DAG: @.omp_offloading.entry.[[NAME7]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: @.omp_offloading.entry.[[NAME7]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// TCHECK-DAG: @.omp_offloading.entry.[[NAME8]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: @.omp_offloading.entry.[[NAME8]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// TCHECK-DAG: @.omp_offloading.entry.[[NAME9]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: @.omp_offloading.entry.[[NAME9]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// TCHECK-DAG: @.omp_offloading.entry.[[NAME10]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: @.omp_offloading.entry.[[NAME10]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// TCHECK-DAG: @.omp_offloading.entry.[[NAME11]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: @.omp_offloading.entry.[[NAME11]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// TCHECK-DAG: @.omp_offloading.entry.[[NAME12]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: @.omp_offloading.entry.[[NAME12]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// We have 4 initializers, one for the 500 priority, another one for 501, or more for the default priority, and the last one for the offloading registration function.
// CHECK: @llvm.global_ctors = appending global [4 x { i32, void ()*, i8* }] [
//CHECK-DAG: define internal void @[[NAME12]](
//CHECK-DAG: call void @[[NAME12]](
-//TCHECK-DAG: define weak void @[[NAME1]](
-//TCHECK-DAG: define weak void @[[NAME2]](
-//TCHECK-DAG: define weak void @[[NAME3]](
-//TCHECK-DAG: define weak void @[[NAME4]](
-//TCHECK-DAG: define weak void @[[NAME5]](
-//TCHECK-DAG: define weak void @[[NAME6]](
-//TCHECK-DAG: define weak void @[[NAME7]](
-//TCHECK-DAG: define weak void @[[NAME8]](
-//TCHECK-DAG: define weak void @[[NAME9]](
-//TCHECK-DAG: define weak void @[[NAME10]](
-//TCHECK-DAG: define weak void @[[NAME11]](
-//TCHECK-DAG: define weak void @[[NAME12]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME1]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME2]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME3]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME4]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME5]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME6]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME7]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME8]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME9]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME10]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME11]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME12]](
// CHECK-NTARGET-NOT: __tgt_target
// CHECK-NTARGET-NOT: __tgt_register_requires
double *g;
-// CK1: @g = global double*
+// CK1: @g ={{.*}} global double*
// CK1: [[MTYPE00:@.+]] = {{.*}}constant [2 x i64] [i64 51, i64 96]
// CK1: [[MTYPE01:@.+]] = {{.*}}constant [1 x i64] [i64 99]
// CK1: [[MTYPE03:@.+]] = {{.*}}constant [1 x i64] [i64 99]
// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY10 %s
// SIMD-ONLY10-NOT: {{__kmpc|__tgt}}
-// CK1-LABEL: @.__omp_offloading_{{.*}}implicit_maps_double_complex{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK1-LABEL: @.__omp_offloading_{{.*}}implicit_maps_double_complex{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK1-DAG: [[SIZES:@.+]] = {{.+}}constant [1 x i64] [i64 16]
// Map types: OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 544
// SIMD-ONLY10-NOT: {{__kmpc|__tgt}}
#ifdef CK2
-// CK2-LABEL: @.__omp_offloading_{{.*}}implicit_maps_double_complex{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK2-LABEL: @.__omp_offloading_{{.*}}implicit_maps_double_complex{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK2-DAG: [[SIZES:@.+]] = {{.+}}constant [1 x i64] [i64 16]
// Map types: OMP_MAP_TO | OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 545
// SIMD-ONLY10-NOT: {{__kmpc|__tgt}}
#ifdef CK3
-// CK3-LABEL: @.__omp_offloading_{{.*}}implicit_maps_double_complex{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK3-LABEL: @.__omp_offloading_{{.*}}implicit_maps_double_complex{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK3-DAG: [[SIZES:@.+]] = {{.+}}constant [1 x i64] [i64 16]
// Map types: OMP_MAP_FROM | OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 546
// For a 32-bit targets, the value doesn't fit the size of the pointer,
// therefore it is passed by reference with a map 'to' specification.
-// CK4-LABEL: @.__omp_offloading_{{.*}}implicit_maps_double{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK4-LABEL: @.__omp_offloading_{{.*}}implicit_maps_double{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK4-DAG: [[SIZES:@.+]] = {{.+}}constant [1 x i64] [i64 8]
// Map types: OMP_MAP_PRIVATE_VAL | OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 800
// SIMD-ONLY8-NOT: {{__kmpc|__tgt}}
#ifdef CK5
-// CK5-LABEL: @.__omp_offloading_{{.*}}implicit_maps_array{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK5-LABEL: @.__omp_offloading_{{.*}}implicit_maps_array{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK5-DAG: [[SIZES:@.+]] = {{.+}}constant [1 x i64] [i64 16]
// Map types: OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 544
// SIMD-ONLY8-NOT: {{__kmpc|__tgt}}
#ifdef CK6
-// CK6-LABEL: @.__omp_offloading_{{.*}}implicit_maps_array{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK6-LABEL: @.__omp_offloading_{{.*}}implicit_maps_array{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK6-DAG: [[SIZES:@.+]] = {{.+}}constant [1 x i64] [i64 16]
// Map types: OMP_MAP_TO | OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 545
// SIMD-ONLY8-NOT: {{__kmpc|__tgt}}
#ifdef CK7
-// CK7-LABEL: @.__omp_offloading_{{.*}}implicit_maps_array{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK7-LABEL: @.__omp_offloading_{{.*}}implicit_maps_array{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK7-DAG: [[SIZES:@.+]] = {{.+}}constant [1 x i64] [i64 16]
// Map types: OMP_MAP_FROM | OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 546
// SIMD-ONLY8-NOT: {{__kmpc|__tgt}}
#ifdef CK8
-// CK8-LABEL: @.__omp_offloading_{{.*}}implicit_maps_array{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK8-LABEL: @.__omp_offloading_{{.*}}implicit_maps_array{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK8-DAG: [[SIZES:@.+]] = {{.+}}constant [1 x i64] [i64 16]
// Map types: OMP_MAP_TO | OMP_MAP_FROM | OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 547
#ifdef CK9
-// CK9-LABEL: @.__omp_offloading_{{.*}}zero_size_section_and_private_maps{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK9-LABEL: @.__omp_offloading_{{.*}}zero_size_section_and_private_maps{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK9: [[SIZE09:@.+]] = private {{.*}}constant [1 x i64] [i64 40]
// CK9: [[MTYPE09:@.+]] = private {{.*}}constant [1 x i64] [i64 673]
#ifdef CK10
-// CK10-LABEL: @.__omp_offloading_{{.*}}explicit_maps_single{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK10-LABEL: @.__omp_offloading_{{.*}}explicit_maps_single{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK10: [[SIZE:@.+]] = private {{.*}}constant [1 x i64] [i64 {{8|4}}]
// Map types: OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 544
#ifdef CK11
-// CK11-LABEL: @.__omp_offloading_{{.*}}explicit_maps_single{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK11-LABEL: @.__omp_offloading_{{.*}}explicit_maps_single{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK11: [[SIZE09:@.+]] = private {{.*}}constant [1 x i64] [i64 {{8|4}}]
// Map types: OMP_MAP_TO | OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 545
#ifdef CK12
-// CK12-LABEL: @.__omp_offloading_{{.*}}explicit_maps_single{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK12-LABEL: @.__omp_offloading_{{.*}}explicit_maps_single{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK12: [[SIZE09:@.+]] = private {{.*}}constant [1 x i64] [i64 {{8|4}}]
// Map types: OMP_MAP_FROM | OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 546
#ifdef CK13
-// CK13-LABEL: @.__omp_offloading_{{.*}}explicit_maps_single{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK13-LABEL: @.__omp_offloading_{{.*}}explicit_maps_single{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK13: [[SIZE09:@.+]] = private {{.*}}constant [1 x i64] [i64 {{8|4}}]
// Map types: OMP_MAP_TO | OMP_MAP_FROM | OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 547
#ifdef CK14
-// CK14-LABEL: @.__omp_offloading_{{.*}}explicit_maps_single{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK14-LABEL: @.__omp_offloading_{{.*}}explicit_maps_single{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK14: [[SIZE09:@.+]] = private {{.*}}constant [1 x i64] zeroinitializer
// Map types: OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 544
// SIMD-ONLY12-NOT: {{__kmpc|__tgt}}
#ifdef CK15
-// CK15-LABEL: @.__omp_offloading_{{.*}}implicit_maps_variable_length_array{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK15-LABEL: @.__omp_offloading_{{.*}}implicit_maps_variable_length_array{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// We don't have a constant map size for VLAs.
// Map types:
#ifdef CK16
// CK16-DAG: [[ST:%.+]] = type { i32, double }
-// CK16-LABEL: @.__omp_offloading_{{.*}}implicit_maps_struct{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK16-LABEL: @.__omp_offloading_{{.*}}implicit_maps_struct{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK16-DAG: [[SIZES:@.+]] = {{.+}}constant [1 x i64] [i64 {{16|12}}]
// Map types: OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 544
// CK16-DAG: [[TYPES:@.+]] = {{.+}}constant [1 x i64] [i64 544]
#ifdef CK17
// CK17-DAG: [[ST:%.+]] = type { i32, double }
-// CK17-LABEL: @.__omp_offloading_{{.*}}implicit_maps_struct{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK17-LABEL: @.__omp_offloading_{{.*}}implicit_maps_struct{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK17-DAG: [[SIZES:@.+]] = {{.+}}constant [1 x i64] [i64 {{16|12}}]
// Map types: OMP_MAP_TO | OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 545
// CK17-DAG: [[TYPES:@.+]] = {{.+}}constant [1 x i64] [i64 545]
#ifdef CK18
// CK18-DAG: [[ST:%.+]] = type { i32, double }
-// CK18-LABEL: @.__omp_offloading_{{.*}}implicit_maps_struct{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK18-LABEL: @.__omp_offloading_{{.*}}implicit_maps_struct{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK18-DAG: [[SIZES:@.+]] = {{.+}}constant [1 x i64] [i64 {{16|12}}]
// Map types: OMP_MAP_FROM | OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 546
// CK18-DAG: [[TYPES:@.+]] = {{.+}}constant [1 x i64] [i64 546]
#ifdef CK19
// CK19-DAG: [[ST:%.+]] = type { i32, double }
-// CK19-LABEL: @.__omp_offloading_{{.*}}implicit_maps_struct{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK19-LABEL: @.__omp_offloading_{{.*}}implicit_maps_struct{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK19-DAG: [[SIZES:@.+]] = {{.+}}constant [1 x i64] [i64 {{16|12}}]
// Map types: OMP_MAP_TO | OMP_MAP_FROM | OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 547
// CK19-DAG: [[TYPES:@.+]] = {{.+}}constant [1 x i64] [i64 547]
// For a 32-bit targets, the value doesn't fit the size of the pointer,
// therefore it is passed by reference with a map 'to' specification.
-// CK20-LABEL: @.__omp_offloading_{{.*}}implicit_maps_double{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK20-LABEL: @.__omp_offloading_{{.*}}implicit_maps_double{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK20-DAG: [[SIZES:@.+]] = {{.+}}constant [1 x i64] [i64 8]
// Map types: OMP_MAP_LITERAL | OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 800
#ifdef CK21
// CK21-DAG: [[ST:%.+]] = type { i32, double }
-// CK21-LABEL: @.__omp_offloading_{{.*}}implicit_maps_struct{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK21-LABEL: @.__omp_offloading_{{.*}}implicit_maps_struct{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK21-DAG: [[SIZES:@.+]] = {{.+}}constant [1 x i64] [i64 {{16|12}}]
// Map types: OMP_MAP_TO + OMP_MAP_FROM + OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 547
// CK21-DAG: [[TYPES:@.+]] = {{.+}}constant [1 x i64] [i64 547]
// SIMD-ONLY9-NOT: {{__kmpc|__tgt}}
#ifdef CK22
-// CK22-LABEL: @.__omp_offloading_{{.*}}implicit_maps_pointer{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK22-LABEL: @.__omp_offloading_{{.*}}implicit_maps_pointer{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK22-DAG: [[SIZES:@.+]] = {{.+}}constant [1 x i64] zeroinitializer
// Map types: OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 544
double *g;
-// CK23: @g = global double*
+// CK23: @g ={{.*}} global double*
// CK23: [[SIZES00:@.+]] = {{.+}}constant [1 x i[[sz:64|32]]] [i{{64|32}} {{8|4}}]
// CK23: [[TYPES00:@.+]] = {{.+}}constant [1 x i64] [i64 288]
// SIMD-ONLY18-NOT: {{__kmpc|__tgt}}
#ifdef CK24
-// CK24-LABEL: @.__omp_offloading_{{.*}}explicit_maps_single{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK24-LABEL: @.__omp_offloading_{{.*}}explicit_maps_single{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK24: [[SIZE00:@.+]] = private {{.*}}constant [1 x i[[Z:64|32]]] [i[[Z:64|32]] 4]
// CK24: [[MTYPE00:@.+]] = private {{.*}}constant [1 x i64] [i64 1059]
-// CK24-LABEL: @.__omp_offloading_{{.*}}explicit_maps_single{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK24-LABEL: @.__omp_offloading_{{.*}}explicit_maps_single{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
// CK24: [[SIZE01:@.+]] = private {{.*}}constant [1 x i[[Z:64|32]]] [i[[Z:64|32]] 4]
// CK24: [[MTYPE01:@.+]] = private {{.*}}constant [1 x i64] [i64 1063]
extern int x;
#pragma omp declare target to(x)
-// CK25-LABEL: @.__omp_offloading_{{.*}}declare_target_to{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK25-LABEL: @.__omp_offloading_{{.*}}declare_target_to{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
void declare_target_to()
{
double *g;
-// CK1: @g = global double*
+// CK1: @g ={{.*}} global double*
// CK1: [[SIZES00:@.+]] = {{.+}}constant [1 x i[[sz:64|32]]] [i{{64|32}} {{8|4}}]
// CK1: [[TYPES00:@.+]] = {{.+}}constant [1 x i64] [i64 288]
// CK2: [[ST:%.+]] = type { double*, double** }
-// CK2-LABEL: @.__omp_offloading_{{.*}}foo{{.*}}_l244.region_id = weak constant i8 0
+// CK2-LABEL: @.__omp_offloading_{{.*}}foo{{.*}}_l244.region_id = weak{{.*}} constant i8 0
// CK2: [[SIZE00:@.+]] = {{.+}}constant [1 x i[[sz:64|32]]] [i{{64|32}} {{8|4}}]
// CK2: [[MTYPE00:@.+]] = {{.+}}constant [1 x i64] [i64 288]
-// CK2-LABEL: @.__omp_offloading_{{.*}}foo{{.*}}_l259.region_id = weak constant i8 0
+// CK2-LABEL: @.__omp_offloading_{{.*}}foo{{.*}}_l259.region_id = weak{{.*}} constant i8 0
// CK2: [[SIZE01:@.+]] = {{.+}}constant [1 x i[[sz]]] [i[[sz]] {{8|4}}]
// CK2: [[MTYPE01:@.+]] = {{.+}}constant [1 x i64] [i64 288]
-// CK2-LABEL: @.__omp_offloading_{{.*}}foo{{.*}}_l274.region_id = weak constant i8 0
+// CK2-LABEL: @.__omp_offloading_{{.*}}foo{{.*}}_l274.region_id = weak{{.*}} constant i8 0
// CK2: [[SIZE02:@.+]] = {{.+}}constant [1 x i[[sz]]] [i[[sz]] {{8|4}}]
// CK2: [[MTYPE02:@.+]] = {{.+}}constant [1 x i64] [i64 288]
// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=i386-pc-linux-gnu -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap --check-prefix SIMD-ONLY5 %s
// SIMD-ONLY5-NOT: {{__kmpc|__tgt}}
#ifdef CK6
-// CK6-DAG: @.__omp_offloading_{{.*}}implicit_maps_host_global{{.*}}_l{{[0-9]+}}.region_id = weak constant i8 0
+// CK6-DAG: @.__omp_offloading_{{.*}}implicit_maps_host_global{{.*}}_l{{[0-9]+}}.region_id = weak{{.*}} constant i8 0
-// CK6-DAG: [[GBL:@Gi]] = global i32 0
+// CK6-DAG: [[GBL:@Gi]] ={{.*}} global i32 0
// CK6-DAG: [[SIZES:@.+]] = {{.+}}constant [1 x i64] [i64 4]
// Map types: OMP_MAP_PRIVATE_VAL | OMP_MAP_TARGET_PARAM | OMP_MAP_IMPLICIT = 800
// CK6-DAG: [[TYPES:@.+]] = {{.+}}constant [1 x i64] [i64 800]
// TCHECK: [[ENTTY:%.+]] = type { i8*, i8*, i[[SZ:32|64]], i32, i32 }
// CHECK-DAG: [[A1:@.+]] = internal global [[SA]]
-// CHECK-DAG: [[A2:@.+]] = global [[SA]]
-// CHECK-DAG: [[B1:@.+]] = global [[SB]]
-// CHECK-DAG: [[B2:@.+]] = global [[SB]]
+// CHECK-DAG: [[A2:@.+]] ={{.*}} global [[SA]]
+// CHECK-DAG: [[B1:@.+]] ={{.*}} global [[SB]]
+// CHECK-DAG: [[B2:@.+]] ={{.*}} global [[SB]]
// CHECK-DAG: [[C1:@.+]] = internal global [[SC]]
-// CHECK-DAG: [[D1:@.+]] = global [[SD]]
-// CHECK-DAG: [[E1:@.+]] = global [[SE]]
-// CHECK-DAG: [[T1:@.+]] = global [[ST1]]
-// CHECK-DAG: [[T2:@.+]] = global [[ST2]]
+// CHECK-DAG: [[D1:@.+]] ={{.*}} global [[SD]]
+// CHECK-DAG: [[E1:@.+]] ={{.*}} global [[SE]]
+// CHECK-DAG: [[T1:@.+]] ={{.*}} global [[ST1]]
+// CHECK-DAG: [[T2:@.+]] ={{.*}} global [[ST2]]
// CHECK-NTARGET-DAG: [[SA:%.+]] = type { [4 x i32] }
// CHECK-NTARGET-DAG: [[SB:%.+]] = type { [8 x i32] }
// We have 7 target regions
-// CHECK-DAG: {{@.+}} = weak constant i8 0
-// TCHECK-NOT: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
+// TCHECK-NOT: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
// CHECK-NTARGET-NOT: private unnamed_addr constant [1 x i
// CHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// CHECK-DAG: [[ENTRY1:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY1:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// CHECK-DAG: [[ENTRY2:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY2:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// CHECK-DAG: [[ENTRY3:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY3:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// CHECK-DAG: [[ENTRY4:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY4:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// CHECK-DAG: [[ENTRY5:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY5:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// CHECK-DAG: [[ENTRY6:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY6:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// CHECK-DAG: [[ENTRY7:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY7:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// CHECK-DAG: [[ENTRY8:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY8:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// CHECK-DAG: [[ENTRY9:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY9:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// CHECK-DAG: [[ENTRY10:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY10:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// CHECK-DAG: [[ENTRY11:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY11:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// CHECK-DAG: [[ENTRY12:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY12:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// TCHECK-DAG: [[ENTRY1:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY1:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// TCHECK-DAG: [[ENTRY2:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY2:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// TCHECK-DAG: [[ENTRY3:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY3:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// TCHECK-DAG: [[ENTRY4:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY4:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// TCHECK-DAG: [[ENTRY5:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY5:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// TCHECK-DAG: [[ENTRY6:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY6:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// TCHECK-DAG: [[ENTRY7:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY7:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// TCHECK-DAG: [[ENTRY8:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY8:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// TCHECK-DAG: [[ENTRY9:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY9:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// TCHECK-DAG: [[ENTRY10:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY10:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// TCHECK-DAG: [[ENTRY11:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY11:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// TCHECK-DAG: [[ENTRY12:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY12:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// We have 4 initializers, one for the 500 priority, another one for 501, or more for the default priority, and the last one for the offloading registration function.
// CHECK: @llvm.global_ctors = appending global [4 x { i32, void ()*, i8* }] [
//CHECK-DAG: define internal void @[[NAME12]](
//CHECK-DAG: call void @[[NAME12]](
-//TCHECK-DAG: define weak void @[[NAME1]](
-//TCHECK-DAG: define weak void @[[NAME2]](
-//TCHECK-DAG: define weak void @[[NAME3]](
-//TCHECK-DAG: define weak void @[[NAME4]](
-//TCHECK-DAG: define weak void @[[NAME5]](
-//TCHECK-DAG: define weak void @[[NAME6]](
-//TCHECK-DAG: define weak void @[[NAME7]](
-//TCHECK-DAG: define weak void @[[NAME8]](
-//TCHECK-DAG: define weak void @[[NAME9]](
-//TCHECK-DAG: define weak void @[[NAME10]](
-//TCHECK-DAG: define weak void @[[NAME11]](
-//TCHECK-DAG: define weak void @[[NAME12]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME1]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME2]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME3]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME4]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME5]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME6]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME7]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME8]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME9]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME10]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME11]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME12]](
// CHECK-NTARGET-NOT: __tgt_target
// TCHECK: [[ENTTY:%.+]] = type { i8*, i8*, i[[SZ:32|64]], i32, i32 }
// CHECK-DAG: [[A1:@.+]] = internal global [[SA]]
-// CHECK-DAG: [[A2:@.+]] = global [[SA]]
-// CHECK-DAG: [[B1:@.+]] = global [[SB]]
-// CHECK-DAG: [[B2:@.+]] = global [[SB]]
+// CHECK-DAG: [[A2:@.+]] ={{.*}} global [[SA]]
+// CHECK-DAG: [[B1:@.+]] ={{.*}} global [[SB]]
+// CHECK-DAG: [[B2:@.+]] ={{.*}} global [[SB]]
// CHECK-DAG: [[C1:@.+]] = internal global [[SC]]
-// CHECK-DAG: [[D1:@.+]] = global [[SD]]
-// CHECK-DAG: [[E1:@.+]] = global [[SE]]
-// CHECK-DAG: [[T1:@.+]] = global [[ST1]]
-// CHECK-DAG: [[T2:@.+]] = global [[ST2]]
+// CHECK-DAG: [[D1:@.+]] ={{.*}} global [[SD]]
+// CHECK-DAG: [[E1:@.+]] ={{.*}} global [[SE]]
+// CHECK-DAG: [[T1:@.+]] ={{.*}} global [[ST1]]
+// CHECK-DAG: [[T2:@.+]] ={{.*}} global [[ST2]]
// CHECK-NTARGET-DAG: [[SA:%.+]] = type { [4 x i32] }
// CHECK-NTARGET-DAG: [[SB:%.+]] = type { [8 x i32] }
// We have 7 target regions
-// CHECK-DAG: {{@.+}} = weak constant i8 0
-// TCHECK-NOT: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
+// TCHECK-NOT: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
// CHECK-NTARGET-NOT: private unnamed_addr constant [1 x i
// CHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// CHECK-DAG: [[ENTRY1:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY1:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// CHECK-DAG: [[ENTRY2:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY2:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// CHECK-DAG: [[ENTRY3:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY3:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// CHECK-DAG: [[ENTRY4:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY4:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// CHECK-DAG: [[ENTRY5:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY5:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// CHECK-DAG: [[ENTRY6:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY6:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// CHECK-DAG: [[ENTRY7:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY7:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// CHECK-DAG: [[ENTRY8:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY8:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// CHECK-DAG: [[ENTRY9:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY9:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// CHECK-DAG: [[ENTRY10:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY10:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// CHECK-DAG: [[ENTRY11:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY11:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// CHECK-DAG: [[ENTRY12:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY12:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// TCHECK-DAG: [[ENTRY1:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY1:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// TCHECK-DAG: [[ENTRY2:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY2:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// TCHECK-DAG: [[ENTRY3:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY3:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// TCHECK-DAG: [[ENTRY4:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY4:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// TCHECK-DAG: [[ENTRY5:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY5:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// TCHECK-DAG: [[ENTRY6:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY6:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// TCHECK-DAG: [[ENTRY7:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY7:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// TCHECK-DAG: [[ENTRY8:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY8:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// TCHECK-DAG: [[ENTRY9:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY9:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// TCHECK-DAG: [[ENTRY10:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY10:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// TCHECK-DAG: [[ENTRY11:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY11:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// TCHECK-DAG: [[ENTRY12:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY12:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// We have 4 initializers, one for the 500 priority, another one for 501, or more for the default priority, and the last one for the offloading registration function.
// CHECK: @llvm.global_ctors = appending global [4 x { i32, void ()*, i8* }] [
//CHECK-DAG: define internal void @[[NAME12]](
//CHECK-DAG: call void @[[NAME12]](
-//TCHECK-DAG: define weak void @[[NAME1]](
-//TCHECK-DAG: define weak void @[[NAME2]](
-//TCHECK-DAG: define weak void @[[NAME3]](
-//TCHECK-DAG: define weak void @[[NAME4]](
-//TCHECK-DAG: define weak void @[[NAME5]](
-//TCHECK-DAG: define weak void @[[NAME6]](
-//TCHECK-DAG: define weak void @[[NAME7]](
-//TCHECK-DAG: define weak void @[[NAME8]](
-//TCHECK-DAG: define weak void @[[NAME9]](
-//TCHECK-DAG: define weak void @[[NAME10]](
-//TCHECK-DAG: define weak void @[[NAME11]](
-//TCHECK-DAG: define weak void @[[NAME12]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME1]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME2]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME3]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME4]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME5]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME6]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME7]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME8]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME9]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME10]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME11]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME12]](
// CHECK-NTARGET-NOT: __tgt_target
// TCHECK: [[ENTTY:%.+]] = type { i8*, i8*, i[[SZ:32|64]], i32, i32 }
// CHECK-DAG: [[A1:@.+]] = internal global [[SA]]
-// CHECK-DAG: [[A2:@.+]] = global [[SA]]
-// CHECK-DAG: [[B1:@.+]] = global [[SB]]
-// CHECK-DAG: [[B2:@.+]] = global [[SB]]
+// CHECK-DAG: [[A2:@.+]] ={{.*}} global [[SA]]
+// CHECK-DAG: [[B1:@.+]] ={{.*}} global [[SB]]
+// CHECK-DAG: [[B2:@.+]] ={{.*}} global [[SB]]
// CHECK-DAG: [[C1:@.+]] = internal global [[SC]]
-// CHECK-DAG: [[D1:@.+]] = global [[SD]]
-// CHECK-DAG: [[E1:@.+]] = global [[SE]]
-// CHECK-DAG: [[T1:@.+]] = global [[ST1]]
-// CHECK-DAG: [[T2:@.+]] = global [[ST2]]
+// CHECK-DAG: [[D1:@.+]] ={{.*}} global [[SD]]
+// CHECK-DAG: [[E1:@.+]] ={{.*}} global [[SE]]
+// CHECK-DAG: [[T1:@.+]] ={{.*}} global [[ST1]]
+// CHECK-DAG: [[T2:@.+]] ={{.*}} global [[ST2]]
// CHECK-NTARGET-DAG: [[SA:%.+]] = type { [4 x i32] }
// CHECK-NTARGET-DAG: [[SB:%.+]] = type { [8 x i32] }
// We have 7 target regions
-// CHECK-DAG: {{@.+}} = weak constant i8 0
-// TCHECK-NOT: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
+// TCHECK-NOT: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
// CHECK-NTARGET-NOT: private unnamed_addr constant [1 x i
// CHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// CHECK-DAG: [[ENTRY1:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY1:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// CHECK-DAG: [[ENTRY2:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY2:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// CHECK-DAG: [[ENTRY3:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY3:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// CHECK-DAG: [[ENTRY4:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY4:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// CHECK-DAG: [[ENTRY5:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY5:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// CHECK-DAG: [[ENTRY6:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY6:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// CHECK-DAG: [[ENTRY7:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY7:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// CHECK-DAG: [[ENTRY8:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY8:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// CHECK-DAG: [[ENTRY9:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY9:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// CHECK-DAG: [[ENTRY10:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY10:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// CHECK-DAG: [[ENTRY11:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY11:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// CHECK-DAG: [[ENTRY12:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY12:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// TCHECK-DAG: [[ENTRY1:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY1:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// TCHECK-DAG: [[ENTRY2:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY2:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// TCHECK-DAG: [[ENTRY3:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY3:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// TCHECK-DAG: [[ENTRY4:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY4:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// TCHECK-DAG: [[ENTRY5:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY5:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// TCHECK-DAG: [[ENTRY6:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY6:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// TCHECK-DAG: [[ENTRY7:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY7:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// TCHECK-DAG: [[ENTRY8:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY8:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// TCHECK-DAG: [[ENTRY9:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY9:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// TCHECK-DAG: [[ENTRY10:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY10:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// TCHECK-DAG: [[ENTRY11:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY11:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// TCHECK-DAG: [[ENTRY12:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY12:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// We have 4 initializers, one for the 500 priority, another one for 501, or more for the default priority, and the last one for the offloading registration function.
// CHECK: @llvm.global_ctors = appending global [4 x { i32, void ()*, i8* }] [
//CHECK-DAG: define internal void @[[NAME12]](
//CHECK-DAG: call void @[[NAME12]](
-//TCHECK-DAG: define weak void @[[NAME1]](
-//TCHECK-DAG: define weak void @[[NAME2]](
-//TCHECK-DAG: define weak void @[[NAME3]](
-//TCHECK-DAG: define weak void @[[NAME4]](
-//TCHECK-DAG: define weak void @[[NAME5]](
-//TCHECK-DAG: define weak void @[[NAME6]](
-//TCHECK-DAG: define weak void @[[NAME7]](
-//TCHECK-DAG: define weak void @[[NAME8]](
-//TCHECK-DAG: define weak void @[[NAME9]](
-//TCHECK-DAG: define weak void @[[NAME10]](
-//TCHECK-DAG: define weak void @[[NAME11]](
-//TCHECK-DAG: define weak void @[[NAME12]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME1]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME2]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME3]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME4]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME5]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME6]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME7]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME8]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME9]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME10]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME11]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME12]](
// CHECK-NTARGET-NOT: __tgt_target
// TCHECK: [[ENTTY:%.+]] = type { i8*, i8*, i[[SZ:32|64]], i32, i32 }
// CHECK-DAG: [[A1:@.+]] = internal global [[SA]]
-// CHECK-DAG: [[A2:@.+]] = global [[SA]]
-// CHECK-DAG: [[B1:@.+]] = global [[SB]]
-// CHECK-DAG: [[B2:@.+]] = global [[SB]]
+// CHECK-DAG: [[A2:@.+]] ={{.*}} global [[SA]]
+// CHECK-DAG: [[B1:@.+]] ={{.*}} global [[SB]]
+// CHECK-DAG: [[B2:@.+]] ={{.*}} global [[SB]]
// CHECK-DAG: [[C1:@.+]] = internal global [[SC]]
-// CHECK-DAG: [[D1:@.+]] = global [[SD]]
-// CHECK-DAG: [[E1:@.+]] = global [[SE]]
-// CHECK-DAG: [[T1:@.+]] = global [[ST1]]
-// CHECK-DAG: [[T2:@.+]] = global [[ST2]]
+// CHECK-DAG: [[D1:@.+]] ={{.*}} global [[SD]]
+// CHECK-DAG: [[E1:@.+]] ={{.*}} global [[SE]]
+// CHECK-DAG: [[T1:@.+]] ={{.*}} global [[ST1]]
+// CHECK-DAG: [[T2:@.+]] ={{.*}} global [[ST2]]
// CHECK-NTARGET-DAG: [[SA:%.+]] = type { [4 x i32] }
// CHECK-NTARGET-DAG: [[SB:%.+]] = type { [8 x i32] }
// We have 7 target regions
-// CHECK-DAG: {{@.+}} = weak constant i8 0
-// TCHECK-NOT: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
+// TCHECK-NOT: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
// CHECK-NTARGET-NOT: private unnamed_addr constant [1 x i
// CHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// CHECK-DAG: [[ENTRY1:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY1:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// CHECK-DAG: [[ENTRY2:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY2:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// CHECK-DAG: [[ENTRY3:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY3:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// CHECK-DAG: [[ENTRY4:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY4:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// CHECK-DAG: [[ENTRY5:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY5:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// CHECK-DAG: [[ENTRY6:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY6:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// CHECK-DAG: [[ENTRY7:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY7:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// CHECK-DAG: [[ENTRY8:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY8:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// CHECK-DAG: [[ENTRY9:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY9:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// CHECK-DAG: [[ENTRY10:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY10:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// CHECK-DAG: [[ENTRY11:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY11:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// CHECK-DAG: [[ENTRY12:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY12:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// TCHECK-DAG: [[ENTRY1:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY1:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// TCHECK-DAG: [[ENTRY2:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY2:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// TCHECK-DAG: [[ENTRY3:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY3:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// TCHECK-DAG: [[ENTRY4:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY4:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// TCHECK-DAG: [[ENTRY5:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY5:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// TCHECK-DAG: [[ENTRY6:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY6:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// TCHECK-DAG: [[ENTRY7:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY7:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// TCHECK-DAG: [[ENTRY8:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY8:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// TCHECK-DAG: [[ENTRY9:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY9:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// TCHECK-DAG: [[ENTRY10:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY10:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// TCHECK-DAG: [[ENTRY11:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY11:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// TCHECK-DAG: [[ENTRY12:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY12:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// We have 4 initializers, one for the 500 priority, another one for 501, or more for the default priority, and the last one for the offloading registration function.
// CHECK: @llvm.global_ctors = appending global [4 x { i32, void ()*, i8* }] [
//CHECK-DAG: define internal void @[[NAME12]](
//CHECK-DAG: call void @[[NAME12]](
-//TCHECK-DAG: define weak void @[[NAME1]](
-//TCHECK-DAG: define weak void @[[NAME2]](
-//TCHECK-DAG: define weak void @[[NAME3]](
-//TCHECK-DAG: define weak void @[[NAME4]](
-//TCHECK-DAG: define weak void @[[NAME5]](
-//TCHECK-DAG: define weak void @[[NAME6]](
-//TCHECK-DAG: define weak void @[[NAME7]](
-//TCHECK-DAG: define weak void @[[NAME8]](
-//TCHECK-DAG: define weak void @[[NAME9]](
-//TCHECK-DAG: define weak void @[[NAME10]](
-//TCHECK-DAG: define weak void @[[NAME11]](
-//TCHECK-DAG: define weak void @[[NAME12]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME1]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME2]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME3]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME4]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME5]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME6]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME7]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME8]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME9]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME10]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME11]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME12]](
// CHECK-NTARGET-NOT: __tgt_target
// TCHECK: [[ENTTY:%.+]] = type { i8*, i8*, i[[SZ:32|64]], i32, i32 }
// CHECK-DAG: [[A1:@.+]] = internal global [[SA]]
-// CHECK-DAG: [[A2:@.+]] = global [[SA]]
-// CHECK-DAG: [[B1:@.+]] = global [[SB]]
-// CHECK-DAG: [[B2:@.+]] = global [[SB]]
+// CHECK-DAG: [[A2:@.+]] ={{.*}} global [[SA]]
+// CHECK-DAG: [[B1:@.+]] ={{.*}} global [[SB]]
+// CHECK-DAG: [[B2:@.+]] ={{.*}} global [[SB]]
// CHECK-DAG: [[C1:@.+]] = internal global [[SC]]
-// CHECK-DAG: [[D1:@.+]] = global [[SD]]
-// CHECK-DAG: [[E1:@.+]] = global [[SE]]
-// CHECK-DAG: [[T1:@.+]] = global [[ST1]]
-// CHECK-DAG: [[T2:@.+]] = global [[ST2]]
+// CHECK-DAG: [[D1:@.+]] ={{.*}} global [[SD]]
+// CHECK-DAG: [[E1:@.+]] ={{.*}} global [[SE]]
+// CHECK-DAG: [[T1:@.+]] ={{.*}} global [[ST1]]
+// CHECK-DAG: [[T2:@.+]] ={{.*}} global [[ST2]]
// CHECK-NTARGET-DAG: [[SA:%.+]] = type { [4 x i32] }
// CHECK-NTARGET-DAG: [[SB:%.+]] = type { [8 x i32] }
// We have 7 target regions
-// CHECK-DAG: {{@.+}} = weak constant i8 0
-// TCHECK-NOT: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
+// TCHECK-NOT: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
// CHECK-NTARGET-NOT: private unnamed_addr constant [1 x i
// CHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// CHECK-DAG: [[ENTRY1:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY1:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// CHECK-DAG: [[ENTRY2:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY2:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// CHECK-DAG: [[ENTRY3:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY3:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// CHECK-DAG: [[ENTRY4:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY4:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// CHECK-DAG: [[ENTRY5:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY5:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// CHECK-DAG: [[ENTRY6:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY6:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// CHECK-DAG: [[ENTRY7:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY7:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// CHECK-DAG: [[ENTRY8:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY8:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// CHECK-DAG: [[ENTRY9:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY9:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// CHECK-DAG: [[ENTRY10:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY10:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// CHECK-DAG: [[ENTRY11:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY11:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// CHECK-DAG: [[ENTRY12:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY12:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// TCHECK-DAG: [[ENTRY1:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY1:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// TCHECK-DAG: [[ENTRY2:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY2:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// TCHECK-DAG: [[ENTRY3:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY3:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// TCHECK-DAG: [[ENTRY4:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY4:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// TCHECK-DAG: [[ENTRY5:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY5:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// TCHECK-DAG: [[ENTRY6:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY6:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// TCHECK-DAG: [[ENTRY7:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY7:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// TCHECK-DAG: [[ENTRY8:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY8:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// TCHECK-DAG: [[ENTRY9:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY9:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// TCHECK-DAG: [[ENTRY10:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY10:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// TCHECK-DAG: [[ENTRY11:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY11:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// TCHECK-DAG: [[ENTRY12:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY12:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// We have 4 initializers, one for the 500 priority, another one for 501, or more for the default priority, and the last one for the offloading registration function.
// CHECK: @llvm.global_ctors = appending global [4 x { i32, void ()*, i8* }] [
//CHECK-DAG: define internal void @[[NAME12]](
//CHECK-DAG: call void @[[NAME12]](
-//TCHECK-DAG: define weak void @[[NAME1]](
-//TCHECK-DAG: define weak void @[[NAME2]](
-//TCHECK-DAG: define weak void @[[NAME3]](
-//TCHECK-DAG: define weak void @[[NAME4]](
-//TCHECK-DAG: define weak void @[[NAME5]](
-//TCHECK-DAG: define weak void @[[NAME6]](
-//TCHECK-DAG: define weak void @[[NAME7]](
-//TCHECK-DAG: define weak void @[[NAME8]](
-//TCHECK-DAG: define weak void @[[NAME9]](
-//TCHECK-DAG: define weak void @[[NAME10]](
-//TCHECK-DAG: define weak void @[[NAME11]](
-//TCHECK-DAG: define weak void @[[NAME12]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME1]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME2]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME3]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME4]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME5]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME6]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME7]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME8]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME9]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME10]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME11]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME12]](
// CHECK-NTARGET-NOT: __tgt_target
// TCHECK: [[ENTTY:%.+]] = type { i8*, i8*, i[[SZ:32|64]], i32, i32 }
// CHECK-DAG: [[A1:@.+]] = internal global [[SA]]
-// CHECK-DAG: [[A2:@.+]] = global [[SA]]
-// CHECK-DAG: [[B1:@.+]] = global [[SB]]
-// CHECK-DAG: [[B2:@.+]] = global [[SB]]
+// CHECK-DAG: [[A2:@.+]] ={{.*}} global [[SA]]
+// CHECK-DAG: [[B1:@.+]] ={{.*}} global [[SB]]
+// CHECK-DAG: [[B2:@.+]] ={{.*}} global [[SB]]
// CHECK-DAG: [[C1:@.+]] = internal global [[SC]]
-// CHECK-DAG: [[D1:@.+]] = global [[SD]]
-// CHECK-DAG: [[E1:@.+]] = global [[SE]]
-// CHECK-DAG: [[T1:@.+]] = global [[ST1]]
-// CHECK-DAG: [[T2:@.+]] = global [[ST2]]
+// CHECK-DAG: [[D1:@.+]] ={{.*}} global [[SD]]
+// CHECK-DAG: [[E1:@.+]] ={{.*}} global [[SE]]
+// CHECK-DAG: [[T1:@.+]] ={{.*}} global [[ST1]]
+// CHECK-DAG: [[T2:@.+]] ={{.*}} global [[ST2]]
// CHECK-NTARGET-DAG: [[SA:%.+]] = type { [4 x i32] }
// CHECK-NTARGET-DAG: [[SB:%.+]] = type { [8 x i32] }
// We have 7 target regions
-// CHECK-DAG: {{@.+}} = weak constant i8 0
-// TCHECK-NOT: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
+// TCHECK-NOT: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
// CHECK-NTARGET-NOT: private unnamed_addr constant [1 x i
// CHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// CHECK-DAG: [[ENTRY1:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY1:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// CHECK-DAG: [[ENTRY2:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY2:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// CHECK-DAG: [[ENTRY3:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY3:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// CHECK-DAG: [[ENTRY4:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY4:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// CHECK-DAG: [[ENTRY5:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY5:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// CHECK-DAG: [[ENTRY6:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY6:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// CHECK-DAG: [[ENTRY7:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY7:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// CHECK-DAG: [[ENTRY8:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY8:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// CHECK-DAG: [[ENTRY9:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY9:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// CHECK-DAG: [[ENTRY10:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY10:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// CHECK-DAG: [[ENTRY11:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY11:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// CHECK-DAG: [[ENTRY12:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY12:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// TCHECK-DAG: [[ENTRY1:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY1:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// TCHECK-DAG: [[ENTRY2:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY2:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// TCHECK-DAG: [[ENTRY3:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY3:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// TCHECK-DAG: [[ENTRY4:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY4:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// TCHECK-DAG: [[ENTRY5:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY5:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// TCHECK-DAG: [[ENTRY6:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY6:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// TCHECK-DAG: [[ENTRY7:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY7:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// TCHECK-DAG: [[ENTRY8:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY8:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// TCHECK-DAG: [[ENTRY9:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY9:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// TCHECK-DAG: [[ENTRY10:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY10:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// TCHECK-DAG: [[ENTRY11:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY11:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// TCHECK-DAG: [[ENTRY12:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY12:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// We have 4 initializers, one for the 500 priority, another one for 501, or more for the default priority, and the last one for the offloading registration function.
// CHECK: @llvm.global_ctors = appending global [4 x { i32, void ()*, i8* }] [
//CHECK-DAG: define internal void @[[NAME12]](
//CHECK-DAG: call void @[[NAME12]](
-//TCHECK-DAG: define weak void @[[NAME1]](
-//TCHECK-DAG: define weak void @[[NAME2]](
-//TCHECK-DAG: define weak void @[[NAME3]](
-//TCHECK-DAG: define weak void @[[NAME4]](
-//TCHECK-DAG: define weak void @[[NAME5]](
-//TCHECK-DAG: define weak void @[[NAME6]](
-//TCHECK-DAG: define weak void @[[NAME7]](
-//TCHECK-DAG: define weak void @[[NAME8]](
-//TCHECK-DAG: define weak void @[[NAME9]](
-//TCHECK-DAG: define weak void @[[NAME10]](
-//TCHECK-DAG: define weak void @[[NAME11]](
-//TCHECK-DAG: define weak void @[[NAME12]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME1]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME2]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME3]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME4]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME5]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME6]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME7]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME8]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME9]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME10]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME11]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME12]](
// CHECK-NTARGET-NOT: __tgt_target
return T();
}
-// CHECK-DAG: [[TEST:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[TEST:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> test;
-// CHECK-DAG: [[T_VAR:@.+]] = global i{{[0-9]+}} 333,
+// CHECK-DAG: [[T_VAR:@.+]] ={{.*}} global i{{[0-9]+}} 333,
int t_var = 333;
-// CHECK-DAG: [[VEC:@.+]] = global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
+// CHECK-DAG: [[VEC:@.+]] ={{.*}} global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
int vec[] = {1, 2};
-// CHECK-DAG: [[S_ARR:@.+]] = global [2 x [[S_FLOAT_TY]]] zeroinitializer,
+// CHECK-DAG: [[S_ARR:@.+]] ={{.*}} global [2 x [[S_FLOAT_TY]]] zeroinitializer,
S<float> s_arr[] = {1, 2};
-// CHECK-DAG: [[VAR:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[VAR:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> var(3);
// CHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0,
int main() {
static int sivar;
#ifdef LAMBDA
- // LAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // LAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// LAMBDA-LABEL: @main
// LAMBDA: call void [[OUTER_LAMBDA:@.+]](
[&]() {
return T();
}
-// HCHECK-DAG: [[TEST:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// HCHECK-DAG: [[TEST:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> test;
-// HCHECK-DAG: [[T_VAR:@.+]] = global i{{[0-9]+}} 333,
+// HCHECK-DAG: [[T_VAR:@.+]] ={{.*}} global i{{[0-9]+}} 333,
int t_var = 333;
-// HCHECK-DAG: [[VEC:@.+]] = global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
+// HCHECK-DAG: [[VEC:@.+]] ={{.*}} global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
int vec[] = {1, 2};
-// HCHECK-DAG: [[S_ARR:@.+]] = global [2 x [[S_FLOAT_TY]]] zeroinitializer,
+// HCHECK-DAG: [[S_ARR:@.+]] ={{.*}} global [2 x [[S_FLOAT_TY]]] zeroinitializer,
S<float> s_arr[] = {1, 2};
-// HCHECK-DAG: [[VAR:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// HCHECK-DAG: [[VAR:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> var(3);
// HCHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0,
int main() {
static int sivar;
#ifdef LAMBDA
- // HLAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // HLAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// HLAMBDA-LABEL: @main
// HLAMBDA: call void [[OUTER_LAMBDA:@.+]](
[&]() {
#pragma omp target teams distribute parallel for firstprivate(g, g1, sivar)
for (int i = 0; i < 2; ++i) {
// HLAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}})
- // TLAMBDA: define weak void @[[LOFFL1:.+]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}})
+ // TLAMBDA: define weak{{.*}} void @[[LOFFL1:.+]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}})
// LAMBDA: {{%.+}} = alloca i{{[0-9]+}},
// LAMBDA: {{%.+}} = alloca i{{[0-9]+}},
// LAMBDA: {{%.+}} = alloca i{{[0-9]+}},
int main() {
static int sivar;
#ifdef LAMBDA
- // HLAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // HLAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// HLAMBDA-LABEL: @main
// HLAMBDA: call void [[OUTER_LAMBDA:@.+]](
[&]() {
// HCHECK: ret
// HCHECK: define {{.*}}void @[[TOFFL1]]()
-// TCHECK: define weak void @[[TOFFL1:.+]]()
+// TCHECK: define weak{{.*}} void @[[TOFFL1:.+]]()
// CHECK: call void {{.+}} @__kmpc_fork_teams({{.+}}, i32 0, {{.+}} @[[TOUTL1:.+]] to {{.+}})
// CHECK: ret void
// TCHECK: [[ENTTY:%.+]] = type { i8*, i8*, i[[SZ:32|64]], i32, i32 }
// CHECK-DAG: [[A1:@.+]] = internal global [[SA]]
-// CHECK-DAG: [[A2:@.+]] = global [[SA]]
-// CHECK-DAG: [[B1:@.+]] = global [[SB]]
-// CHECK-DAG: [[B2:@.+]] = global [[SB]]
+// CHECK-DAG: [[A2:@.+]] ={{.*}} global [[SA]]
+// CHECK-DAG: [[B1:@.+]] ={{.*}} global [[SB]]
+// CHECK-DAG: [[B2:@.+]] ={{.*}} global [[SB]]
// CHECK-DAG: [[C1:@.+]] = internal global [[SC]]
-// CHECK-DAG: [[D1:@.+]] = global [[SD]]
-// CHECK-DAG: [[E1:@.+]] = global [[SE]]
-// CHECK-DAG: [[T1:@.+]] = global [[ST1]]
-// CHECK-DAG: [[T2:@.+]] = global [[ST2]]
+// CHECK-DAG: [[D1:@.+]] ={{.*}} global [[SD]]
+// CHECK-DAG: [[E1:@.+]] ={{.*}} global [[SE]]
+// CHECK-DAG: [[T1:@.+]] ={{.*}} global [[ST1]]
+// CHECK-DAG: [[T2:@.+]] ={{.*}} global [[ST2]]
// CHECK-NTARGET-DAG: [[SA:%.+]] = type { [4 x i32] }
// CHECK-NTARGET-DAG: [[SB:%.+]] = type { [8 x i32] }
// We have 7 target regions
-// CHECK-DAG: {{@.+}} = weak constant i8 0
-// TCHECK-NOT: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
+// TCHECK-NOT: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
// CHECK-NTARGET-NOT: private unnamed_addr constant [1 x i
// CHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// CHECK-DAG: [[ENTRY1:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY1:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// CHECK-DAG: [[ENTRY2:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY2:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// CHECK-DAG: [[ENTRY3:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY3:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// CHECK-DAG: [[ENTRY4:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY4:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// CHECK-DAG: [[ENTRY5:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY5:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// CHECK-DAG: [[ENTRY6:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY6:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// CHECK-DAG: [[ENTRY7:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY7:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// CHECK-DAG: [[ENTRY8:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY8:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// CHECK-DAG: [[ENTRY9:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY9:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// CHECK-DAG: [[ENTRY10:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY10:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// CHECK-DAG: [[ENTRY11:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY11:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// CHECK-DAG: [[ENTRY12:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY12:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// TCHECK-DAG: [[ENTRY1:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY1:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// TCHECK-DAG: [[ENTRY2:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY2:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// TCHECK-DAG: [[ENTRY3:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY3:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// TCHECK-DAG: [[ENTRY4:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY4:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// TCHECK-DAG: [[ENTRY5:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY5:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// TCHECK-DAG: [[ENTRY6:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY6:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// TCHECK-DAG: [[ENTRY7:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY7:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// TCHECK-DAG: [[ENTRY8:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY8:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// TCHECK-DAG: [[ENTRY9:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY9:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// TCHECK-DAG: [[ENTRY10:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY10:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// TCHECK-DAG: [[ENTRY11:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY11:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// TCHECK-DAG: [[ENTRY12:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY12:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// We have 4 initializers, one for the 500 priority, another one for 501, or more for the default priority, and the last one for the offloading registration function.
// CHECK: @llvm.global_ctors = appending global [4 x { i32, void ()*, i8* }] [
//CHECK-DAG: define internal void @[[NAME12]](
//CHECK-DAG: call void @[[NAME12]](
-//TCHECK-DAG: define weak void @[[NAME1]](
-//TCHECK-DAG: define weak void @[[NAME2]](
-//TCHECK-DAG: define weak void @[[NAME3]](
-//TCHECK-DAG: define weak void @[[NAME4]](
-//TCHECK-DAG: define weak void @[[NAME5]](
-//TCHECK-DAG: define weak void @[[NAME6]](
-//TCHECK-DAG: define weak void @[[NAME7]](
-//TCHECK-DAG: define weak void @[[NAME8]](
-//TCHECK-DAG: define weak void @[[NAME9]](
-//TCHECK-DAG: define weak void @[[NAME10]](
-//TCHECK-DAG: define weak void @[[NAME11]](
-//TCHECK-DAG: define weak void @[[NAME12]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME1]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME2]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME3]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME4]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME5]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME6]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME7]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME8]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME9]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME10]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME11]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME12]](
// CHECK-NTARGET-NOT: __tgt_target
return T();
}
-// HCHECK-DAG: [[TEST:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// HCHECK-DAG: [[TEST:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> test;
-// HCHECK-DAG: [[T_VAR:@.+]] = global i{{[0-9]+}} 333,
+// HCHECK-DAG: [[T_VAR:@.+]] ={{.*}} global i{{[0-9]+}} 333,
int t_var = 333;
-// HCHECK-DAG: [[VEC:@.+]] = global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
+// HCHECK-DAG: [[VEC:@.+]] ={{.*}} global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
int vec[] = {1, 2};
-// HCHECK-DAG: [[S_ARR:@.+]] = global [2 x [[S_FLOAT_TY]]] zeroinitializer,
+// HCHECK-DAG: [[S_ARR:@.+]] ={{.*}} global [2 x [[S_FLOAT_TY]]] zeroinitializer,
S<float> s_arr[] = {1, 2};
-// HCHECK-DAG: [[VAR:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// HCHECK-DAG: [[VAR:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> var(3);
// HCHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0,
int main() {
static int sivar;
#ifdef LAMBDA
- // HLAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // HLAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// HLAMBDA-LABEL: @main
// HLAMBDA: call void [[OUTER_LAMBDA:@.+]](
[&]() {
#pragma omp target teams distribute parallel for simd firstprivate(g, g1, sivar)
for (int i = 0; i < 2; ++i) {
// HLAMBDA: define{{.*}} internal{{.*}} void @[[LOFFL1]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}})
- // TLAMBDA: define weak void @[[LOFFL1:.+]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}})
+ // TLAMBDA: define weak{{.*}} void @[[LOFFL1:.+]](i{{64|32}} {{%.+}}, i{{64|32}} {{%.+}})
// LAMBDA: {{%.+}} = alloca i{{[0-9]+}},
// LAMBDA: {{%.+}} = alloca i{{[0-9]+}},
// LAMBDA: {{%.+}} = alloca i{{[0-9]+}},
int main() {
static int sivar;
#ifdef LAMBDA
- // HLAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // HLAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// HLAMBDA-LABEL: @main
// HLAMBDA: call void [[OUTER_LAMBDA:@.+]](
[&]() {
// HCHECK: ret
// HCHECK: define {{.*}}void @[[TOFFL1]]()
-// TCHECK: define weak void @[[TOFFL1:.+]]()
+// TCHECK: define weak{{.*}} void @[[TOFFL1:.+]]()
// CHECK: call void {{.+}} @__kmpc_fork_teams({{.+}}, i32 0, {{.+}} @[[TOUTL1:.+]] to {{.+}})
// CHECK: ret void
return T();
}
-// CHECK-DAG: [[TEST:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[TEST:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> test;
-// CHECK-DAG: [[T_VAR:@.+]] = global i{{[0-9]+}} 333,
+// CHECK-DAG: [[T_VAR:@.+]] ={{.*}} global i{{[0-9]+}} 333,
int t_var = 333;
-// CHECK-DAG: [[VEC:@.+]] = global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
+// CHECK-DAG: [[VEC:@.+]] ={{.*}} global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
int vec[] = {1, 2};
-// CHECK-DAG: [[S_ARR:@.+]] = global [2 x [[S_FLOAT_TY]]] zeroinitializer,
+// CHECK-DAG: [[S_ARR:@.+]] ={{.*}} global [2 x [[S_FLOAT_TY]]] zeroinitializer,
S<float> s_arr[] = {1, 2};
-// CHECK-DAG: [[VAR:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[VAR:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> var(3);
// CHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0,
int main() {
static int sivar;
#ifdef LAMBDA
- // LAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // LAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// LAMBDA-LABEL: @main
// LAMBDA: call void [[OUTER_LAMBDA:@.+]](
[&]() {
// TCHECK: [[ENTTY:%.+]] = type { i8*, i8*, i[[SZ:32|64]], i32, i32 }
// CHECK-DAG: [[A1:@.+]] = internal global [[SA]]
-// CHECK-DAG: [[A2:@.+]] = global [[SA]]
-// CHECK-DAG: [[B1:@.+]] = global [[SB]]
-// CHECK-DAG: [[B2:@.+]] = global [[SB]]
+// CHECK-DAG: [[A2:@.+]] ={{.*}} global [[SA]]
+// CHECK-DAG: [[B1:@.+]] ={{.*}} global [[SB]]
+// CHECK-DAG: [[B2:@.+]] ={{.*}} global [[SB]]
// CHECK-DAG: [[C1:@.+]] = internal global [[SC]]
-// CHECK-DAG: [[D1:@.+]] = global [[SD]]
-// CHECK-DAG: [[E1:@.+]] = global [[SE]]
-// CHECK-DAG: [[T1:@.+]] = global [[ST1]]
-// CHECK-DAG: [[T2:@.+]] = global [[ST2]]
+// CHECK-DAG: [[D1:@.+]] ={{.*}} global [[SD]]
+// CHECK-DAG: [[E1:@.+]] ={{.*}} global [[SE]]
+// CHECK-DAG: [[T1:@.+]] ={{.*}} global [[ST1]]
+// CHECK-DAG: [[T2:@.+]] ={{.*}} global [[ST2]]
// CHECK-NTARGET-DAG: [[SA:%.+]] = type { [4 x i32] }
// CHECK-NTARGET-DAG: [[SB:%.+]] = type { [8 x i32] }
// We have 7 target regions
-// CHECK-DAG: {{@.+}} = weak constant i8 0
-// TCHECK-NOT: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
+// TCHECK-NOT: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
-// CHECK-DAG: {{@.+}} = weak constant i8 0
+// CHECK-DAG: {{@.+}} = weak{{.*}} constant i8 0
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 4]
// CHECK-DAG: {{@.+}} = private unnamed_addr constant [1 x i64] [i64 800]
// CHECK-NTARGET-NOT: private unnamed_addr constant [1 x i
// CHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// CHECK-DAG: [[ENTRY1:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY1:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// CHECK-DAG: [[ENTRY2:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY2:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// CHECK-DAG: [[ENTRY3:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY3:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// CHECK-DAG: [[ENTRY4:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY4:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// CHECK-DAG: [[ENTRY5:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY5:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// CHECK-DAG: [[ENTRY6:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY6:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// CHECK-DAG: [[ENTRY7:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY7:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// CHECK-DAG: [[ENTRY8:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY8:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// CHECK-DAG: [[ENTRY9:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY9:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// CHECK-DAG: [[ENTRY10:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY10:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// CHECK-DAG: [[ENTRY11:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY11:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// CHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// CHECK-DAG: [[ENTRY12:@.+]] = weak constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// CHECK-DAG: [[ENTRY12:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* @{{.*}}, i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR1:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME1:__omp_offloading_[0-9a-f]+_[0-9a-f]+__Z.+_l[0-9]+]]\00"
-// TCHECK-DAG: [[ENTRY1:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY1:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR1]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR2:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME2:.+]]\00"
-// TCHECK-DAG: [[ENTRY2:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY2:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR2]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR3:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME3:.+]]\00"
-// TCHECK-DAG: [[ENTRY3:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY3:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR3]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR4:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME4:.+]]\00"
-// TCHECK-DAG: [[ENTRY4:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY4:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR4]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR5:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME5:.+]]\00"
-// TCHECK-DAG: [[ENTRY5:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY5:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR5]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR6:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME6:.+]]\00"
-// TCHECK-DAG: [[ENTRY6:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY6:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR6]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR7:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME7:.+]]\00"
-// TCHECK-DAG: [[ENTRY7:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY7:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR7]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR8:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME8:.+]]\00"
-// TCHECK-DAG: [[ENTRY8:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY8:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR8]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR9:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME9:.+]]\00"
-// TCHECK-DAG: [[ENTRY9:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY9:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR9]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR10:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME10:.+]]\00"
-// TCHECK-DAG: [[ENTRY10:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY10:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR10]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR11:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME11:.+]]\00"
-// TCHECK-DAG: [[ENTRY11:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY11:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR11]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// TCHECK-DAG: [[NAMEPTR12:@.+]] = internal unnamed_addr constant [{{.*}} x i8] c"[[NAME12:.+]]\00"
-// TCHECK-DAG: [[ENTRY12:@.+]] = weak constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
+// TCHECK-DAG: [[ENTRY12:@.+]] = weak{{.*}} constant [[ENTTY]] { i8* bitcast (void (i[[SZ]])* @{{.*}} to i8*), i8* getelementptr inbounds ([{{.*}} x i8], [{{.*}} x i8]* [[NAMEPTR12]], i32 0, i32 0), i[[SZ]] 0, i32 0, i32 0 }, section "omp_offloading_entries", align 1
// We have 4 initializers, one for the 500 priority, another one for 501, or more for the default priority, and the last one for the offloading registration function.
// CHECK: @llvm.global_ctors = appending global [4 x { i32, void ()*, i8* }] [
//CHECK-DAG: define internal void @[[NAME12]](
//CHECK-DAG: call void @[[NAME12]](
-//TCHECK-DAG: define weak void @[[NAME1]](
-//TCHECK-DAG: define weak void @[[NAME2]](
-//TCHECK-DAG: define weak void @[[NAME3]](
-//TCHECK-DAG: define weak void @[[NAME4]](
-//TCHECK-DAG: define weak void @[[NAME5]](
-//TCHECK-DAG: define weak void @[[NAME6]](
-//TCHECK-DAG: define weak void @[[NAME7]](
-//TCHECK-DAG: define weak void @[[NAME8]](
-//TCHECK-DAG: define weak void @[[NAME9]](
-//TCHECK-DAG: define weak void @[[NAME10]](
-//TCHECK-DAG: define weak void @[[NAME11]](
-//TCHECK-DAG: define weak void @[[NAME12]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME1]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME2]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME3]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME4]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME5]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME6]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME7]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME8]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME9]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME10]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME11]](
+//TCHECK-DAG: define weak{{.*}} void @[[NAME12]](
// CHECK-NTARGET-NOT: __tgt_target
return T();
}
-// CHECK-DAG: [[TEST:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[TEST:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> test;
-// CHECK-DAG: [[T_VAR:@.+]] = global i{{[0-9]+}} 333,
+// CHECK-DAG: [[T_VAR:@.+]] ={{.*}} global i{{[0-9]+}} 333,
int t_var = 333;
-// CHECK-DAG: [[VEC:@.+]] = global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
+// CHECK-DAG: [[VEC:@.+]] ={{.*}} global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
int vec[] = {1, 2};
-// CHECK-DAG: [[S_ARR:@.+]] = global [2 x [[S_FLOAT_TY]]] zeroinitializer,
+// CHECK-DAG: [[S_ARR:@.+]] ={{.*}} global [2 x [[S_FLOAT_TY]]] zeroinitializer,
S<float> s_arr[] = {1, 2};
-// CHECK-DAG: [[VAR:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[VAR:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> var(3);
// CHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0,
int main() {
static int sivar;
#ifdef LAMBDA
- // LAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // LAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// LAMBDA-LABEL: @main
// LAMBDA: call void [[OUTER_LAMBDA:@.+]](
[&]() {
return T();
}
-// CHECK-DAG: [[TEST:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[TEST:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> test;
-// CHECK-DAG: [[T_VAR:@.+]] = global i{{[0-9]+}} 333,
+// CHECK-DAG: [[T_VAR:@.+]] ={{.*}} global i{{[0-9]+}} 333,
int t_var = 333;
-// CHECK-DAG: [[VEC:@.+]] = global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
+// CHECK-DAG: [[VEC:@.+]] ={{.*}} global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
int vec[] = {1, 2};
-// CHECK-DAG: [[S_ARR:@.+]] = global [2 x [[S_FLOAT_TY]]] zeroinitializer,
+// CHECK-DAG: [[S_ARR:@.+]] ={{.*}} global [2 x [[S_FLOAT_TY]]] zeroinitializer,
S<float> s_arr[] = {1, 2};
-// CHECK-DAG: [[VAR:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[VAR:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> var(3);
// CHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0,
int main() {
static int sivar;
#ifdef LAMBDA
- // LAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // LAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// LAMBDA-LABEL: @main
// LAMBDA: call void [[OUTER_LAMBDA:@.+]](
[&]() {
return T();
}
-// CHECK-DAG: [[TEST:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[TEST:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> test;
-// CHECK-DAG: [[T_VAR:@.+]] = global i{{[0-9]+}} 333,
+// CHECK-DAG: [[T_VAR:@.+]] ={{.*}} global i{{[0-9]+}} 333,
int t_var = 333;
-// CHECK-DAG: [[VEC:@.+]] = global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
+// CHECK-DAG: [[VEC:@.+]] ={{.*}} global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
int vec[] = {1, 2};
-// CHECK-DAG: [[S_ARR:@.+]] = global [2 x [[S_FLOAT_TY]]] zeroinitializer,
+// CHECK-DAG: [[S_ARR:@.+]] ={{.*}} global [2 x [[S_FLOAT_TY]]] zeroinitializer,
S<float> s_arr[] = {1, 2};
-// CHECK-DAG: [[VAR:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[VAR:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> var(3);
// CHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0,
int main() {
static int sivar;
#ifdef LAMBDA
- // LAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // LAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// LAMBDA-LABEL: @main
// LAMBDA: call void [[OUTER_LAMBDA:@.+]](
[&]() {
return T();
}
-// CHECK-DAG: [[TEST:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[TEST:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> test;
-// CHECK-DAG: [[T_VAR:@.+]] = global i{{[0-9]+}} 333,
+// CHECK-DAG: [[T_VAR:@.+]] ={{.*}} global i{{[0-9]+}} 333,
int t_var = 333;
-// CHECK-DAG: [[VEC:@.+]] = global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
+// CHECK-DAG: [[VEC:@.+]] ={{.*}} global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
int vec[] = {1, 2};
-// CHECK-DAG: [[S_ARR:@.+]] = global [2 x [[S_FLOAT_TY]]] zeroinitializer,
+// CHECK-DAG: [[S_ARR:@.+]] ={{.*}} global [2 x [[S_FLOAT_TY]]] zeroinitializer,
S<float> s_arr[] = {1, 2};
-// CHECK-DAG: [[VAR:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[VAR:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> var(3);
// CHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0,
int main() {
static int sivar;
#ifdef LAMBDA
- // LAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // LAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// LAMBDA-LABEL: @main
// LAMBDA: call void [[OUTER_LAMBDA:@.+]](
[&]() {
return T();
}
-// CHECK-DAG: [[TEST:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[TEST:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> test;
-// CHECK-DAG: [[T_VAR:@.+]] = global i{{[0-9]+}} 333,
+// CHECK-DAG: [[T_VAR:@.+]] ={{.*}} global i{{[0-9]+}} 333,
int t_var = 333;
-// CHECK-DAG: [[VEC:@.+]] = global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
+// CHECK-DAG: [[VEC:@.+]] ={{.*}} global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
int vec[] = {1, 2};
-// CHECK-DAG: [[S_ARR:@.+]] = global [2 x [[S_FLOAT_TY]]] zeroinitializer,
+// CHECK-DAG: [[S_ARR:@.+]] ={{.*}} global [2 x [[S_FLOAT_TY]]] zeroinitializer,
S<float> s_arr[] = {1, 2};
-// CHECK-DAG: [[VAR:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[VAR:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> var(3);
// CHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0,
int main() {
static int sivar;
#ifdef LAMBDA
- // LAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // LAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// LAMBDA-LABEL: @main
// LAMBDA: call void [[OUTER_LAMBDA:@.+]](
[&]() {
return T();
}
-// CHECK-DAG: [[TEST:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[TEST:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> test;
-// CHECK-DAG: [[T_VAR:@.+]] = global i{{[0-9]+}} 333,
+// CHECK-DAG: [[T_VAR:@.+]] ={{.*}} global i{{[0-9]+}} 333,
int t_var = 333;
-// CHECK-DAG: [[VEC:@.+]] = global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
+// CHECK-DAG: [[VEC:@.+]] ={{.*}} global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
int vec[] = {1, 2};
-// CHECK-DAG: [[S_ARR:@.+]] = global [2 x [[S_FLOAT_TY]]] zeroinitializer,
+// CHECK-DAG: [[S_ARR:@.+]] ={{.*}} global [2 x [[S_FLOAT_TY]]] zeroinitializer,
S<float> s_arr[] = {1, 2};
-// CHECK-DAG: [[VAR:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[VAR:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> var(3);
// CHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0,
int main() {
static int sivar;
#ifdef LAMBDA
- // LAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // LAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// LAMBDA-LABEL: @main
// LAMBDA: call void [[OUTER_LAMBDA:@.+]](
[&]() {
return T();
}
-// CHECK-DAG: [[TEST:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[TEST:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> test;
-// CHECK-DAG: [[T_VAR:@.+]] = global i{{[0-9]+}} 333,
+// CHECK-DAG: [[T_VAR:@.+]] ={{.*}} global i{{[0-9]+}} 333,
int t_var = 333;
-// CHECK-DAG: [[VEC:@.+]] = global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
+// CHECK-DAG: [[VEC:@.+]] ={{.*}} global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
int vec[] = {1, 2};
-// CHECK-DAG: [[S_ARR:@.+]] = global [2 x [[S_FLOAT_TY]]] zeroinitializer,
+// CHECK-DAG: [[S_ARR:@.+]] ={{.*}} global [2 x [[S_FLOAT_TY]]] zeroinitializer,
S<float> s_arr[] = {1, 2};
-// CHECK-DAG: [[VAR:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[VAR:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> var(3);
// CHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0,
int main() {
static int sivar;
#ifdef LAMBDA
- // LAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // LAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// LAMBDA-LABEL: @main
// LAMBDA: call void [[OUTER_LAMBDA:@.+]](
[&]() {
return T();
}
-// CHECK-DAG: [[TEST:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[TEST:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> test;
-// CHECK-DAG: [[T_VAR:@.+]] = global i{{[0-9]+}} 333,
+// CHECK-DAG: [[T_VAR:@.+]] ={{.*}} global i{{[0-9]+}} 333,
int t_var = 333;
-// CHECK-DAG: [[VEC:@.+]] = global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
+// CHECK-DAG: [[VEC:@.+]] ={{.*}} global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
int vec[] = {1, 2};
-// CHECK-DAG: [[S_ARR:@.+]] = global [2 x [[S_FLOAT_TY]]] zeroinitializer,
+// CHECK-DAG: [[S_ARR:@.+]] ={{.*}} global [2 x [[S_FLOAT_TY]]] zeroinitializer,
S<float> s_arr[] = {1, 2};
-// CHECK-DAG: [[VAR:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[VAR:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> var(3);
// CHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0,
int main() {
static int sivar;
#ifdef LAMBDA
- // LAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // LAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// LAMBDA-LABEL: @main
// LAMBDA: call void [[OUTER_LAMBDA:@.+]](
[&]() {
return T();
}
-// CHECK-DAG: [[TEST:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[TEST:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> test;
-// CHECK-DAG: [[T_VAR:@.+]] = global i{{[0-9]+}} 333,
+// CHECK-DAG: [[T_VAR:@.+]] ={{.*}} global i{{[0-9]+}} 333,
int t_var = 333;
-// CHECK-DAG: [[VEC:@.+]] = global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
+// CHECK-DAG: [[VEC:@.+]] ={{.*}} global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
int vec[] = {1, 2};
-// CHECK-DAG: [[S_ARR:@.+]] = global [2 x [[S_FLOAT_TY]]] zeroinitializer,
+// CHECK-DAG: [[S_ARR:@.+]] ={{.*}} global [2 x [[S_FLOAT_TY]]] zeroinitializer,
S<float> s_arr[] = {1, 2};
-// CHECK-DAG: [[VAR:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[VAR:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> var(3);
// CHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0,
int main() {
static int sivar;
#ifdef LAMBDA
- // LAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // LAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// LAMBDA-LABEL: @main
// LAMBDA: call void [[OUTER_LAMBDA:@.+]](
[&]() {
return T();
}
-// CHECK-DAG: [[TEST:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[TEST:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> test;
-// CHECK-DAG: [[T_VAR:@.+]] = global i{{[0-9]+}} 333,
+// CHECK-DAG: [[T_VAR:@.+]] ={{.*}} global i{{[0-9]+}} 333,
int t_var = 333;
-// CHECK-DAG: [[VEC:@.+]] = global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
+// CHECK-DAG: [[VEC:@.+]] ={{.*}} global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2],
int vec[] = {1, 2};
-// CHECK-DAG: [[S_ARR:@.+]] = global [2 x [[S_FLOAT_TY]]] zeroinitializer,
+// CHECK-DAG: [[S_ARR:@.+]] ={{.*}} global [2 x [[S_FLOAT_TY]]] zeroinitializer,
S<float> s_arr[] = {1, 2};
-// CHECK-DAG: [[VAR:@.+]] = global [[S_FLOAT_TY]] zeroinitializer,
+// CHECK-DAG: [[VAR:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer,
S<float> var(3);
// CHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0,
int main() {
static int sivar;
#ifdef LAMBDA
- // LAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // LAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// LAMBDA-LABEL: @main
// LAMBDA: call void [[OUTER_LAMBDA:@.+]](
[&]() {
static int sivar;
SS ss(sivar);
#ifdef LAMBDA
- // LAMBDA: [[G:@.+]] = global i{{[0-9]+}} 1212,
+ // LAMBDA: [[G:@.+]] ={{.*}} global i{{[0-9]+}} 1212,
// LAMBDA: define {{.+}} @main()
// LAMBDA: alloca [[SS_TY]],
// LAMBDA: alloca [[CAP_TY:%.+]],
};
// CHECK-DAG: [[GS1:@.+]] = internal global [[S1]] zeroinitializer
-// CHECK-DAG: [[GS1]].cache. = common global i8** null
+// CHECK-DAG: [[GS1]].cache. = common{{.*}} global i8** null
// CHECK-DAG: [[DEFAULT_LOC:@.+]] = private unnamed_addr constant [[IDENT]] { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds ([{{[0-9]+}} x i8], [{{[0-9]+}} x i8]* {{@.+}}, i32 0, i32 0) }
// CHECK-DAG: [[GS2:@.+]] = internal global [[S2]] zeroinitializer
-// CHECK-DAG: [[ARR_X:@.+]] = global [2 x [3 x [[S1]]]] zeroinitializer
-// CHECK-DAG: [[ARR_X]].cache. = common global i8** null
+// CHECK-DAG: [[ARR_X:@.+]] ={{.*}} global [2 x [3 x [[S1]]]] zeroinitializer
+// CHECK-DAG: [[ARR_X]].cache. = common{{.*}} global i8** null
// CHECK-DAG: [[SM:@.+]] = internal global [[SMAIN]] zeroinitializer
-// CHECK-DAG: [[SM]].cache. = common global i8** null
+// CHECK-DAG: [[SM]].cache. = common{{.*}} global i8** null
// CHECK-DAG: [[STATIC_S:@.+]] = external global [[S3]]
-// CHECK-DAG: [[STATIC_S]].cache. = common global i8** null
+// CHECK-DAG: [[STATIC_S]].cache. = common{{.*}} global i8** null
// CHECK-DAG: [[GS3:@.+]] = external global [[S5]]
-// CHECK-DAG: [[GS3]].cache. = common global i8** null
+// CHECK-DAG: [[GS3]].cache. = common{{.*}} global i8** null
// CHECK-DAG: [[ST_INT_ST:@.+]] = linkonce_odr global i32 23
-// CHECK-DAG: [[ST_INT_ST]].cache. = common global i8** null
+// CHECK-DAG: [[ST_INT_ST]].cache. = common{{.*}} global i8** null
// CHECK-DAG: [[ST_FLOAT_ST:@.+]] = linkonce_odr global float 2.300000e+01
-// CHECK-DAG: [[ST_FLOAT_ST]].cache. = common global i8** null
+// CHECK-DAG: [[ST_FLOAT_ST]].cache. = common{{.*}} global i8** null
// CHECK-DAG: [[ST_S4_ST:@.+]] = linkonce_odr global %struct.S4 zeroinitializer
-// CHECK-DAG: [[ST_S4_ST]].cache. = common global i8** null
-// CHECK-NOT: .cache. = common global i8** null
+// CHECK-DAG: [[ST_S4_ST]].cache. = common{{.*}} global i8** null
+// CHECK-NOT: .cache. = common{{.*}} global i8** null
// There is no cache for gs2 - it is not threadprivate. Check that there is only
// 8 caches created (for Static::s, gs1, gs3, arr_x, main::sm, ST<int>::st,
// ST<float>::st, ST<S4>::st)
// CHECK-DEBUG-DAG: [[GS1:@.+]] = internal global [[S1]] zeroinitializer
// CHECK-DEBUG-DAG: [[GS2:@.+]] = internal global [[S2]] zeroinitializer
-// CHECK-DEBUG-DAG: [[ARR_X:@.+]] = global [2 x [3 x [[S1]]]] zeroinitializer
+// CHECK-DEBUG-DAG: [[ARR_X:@.+]] ={{.*}} global [2 x [3 x [[S1]]]] zeroinitializer
// CHECK-DEBUG-DAG: [[SM:@.+]] = internal global [[SMAIN]] zeroinitializer
// CHECK-DEBUG-DAG: [[STATIC_S:@.+]] = external global [[S3]]
// CHECK-DEBUG-DAG: [[GS3:@.+]] = external global [[S5]]
// CHECK-TLS-DAG: [[GS1:@.+]] = internal thread_local global [[S1]] zeroinitializer
// CHECK-TLS-DAG: [[GS2:@.+]] = internal global [[S2]] zeroinitializer
-// CHECK-TLS-DAG: [[ARR_X:@.+]] = thread_local global [2 x [3 x [[S1]]]] zeroinitializer
+// CHECK-TLS-DAG: [[ARR_X:@.+]] ={{.*}} thread_local global [2 x [3 x [[S1]]]] zeroinitializer
// CHECK-TLS-DAG: [[SM:@.+]] = internal thread_local global [[SMAIN]] zeroinitializer
// CHECK-TLS-DAG: [[SM_GUARD:@_ZGVZ4mainE2sm]] = internal thread_local global i8 0
// CHECK-TLS-DAG: [[STATIC_S:@.+]] = external thread_local global [[S3]]
// CHECK-TLS-DAG: @__tls_guard = internal thread_local global i8 0
// CHECK-TLS-DAG: @__dso_handle = external hidden global i8
// CHECK-TLS-DAG: [[GS1_TLS_INIT:@_ZTHL3gs1]] = internal alias void (), void ()* @__tls_init
-// CHECK-TLS-DAG: [[ARR_X_TLS_INIT:@_ZTH5arr_x]] = alias void (), void ()* @__tls_init
+// CHECK-TLS-DAG: [[ARR_X_TLS_INIT:@_ZTH5arr_x]] ={{.*}} alias void (), void ()* @__tls_init
// CHECK-TLS-DAG: [[ST_S4_ST_TLS_INIT:@_ZTHN2STI2S4E2stE]] = linkonce_odr alias void (), void ()* [[ST_S4_ST_CXX_INIT:@[^, ]*]]
// OMP50-TLS: define internal void [[GS1_CXX_INIT:@.*]]()
#ifndef HEADER_INCLUDED
#define HEADER_INCLUDED
-// CHECK-DAG: @a = global i8 1,
-// CHECK-DAG: @b = constant i8 1,
-// CXX11-DAG: @c = constant i8 1,
-// CHECK-DAG: @d = global float 1.000000e+00
-// CHECK-DAG: @e = constant float 1.000000e+00
+// CHECK-DAG: @a ={{.*}} global i8 1,
+// CHECK-DAG: @b ={{.*}} constant i8 1,
+// CXX11-DAG: @c ={{.*}} constant i8 1,
+// CHECK-DAG: @d ={{.*}} global float 1.000000e+00
+// CHECK-DAG: @e ={{.*}} constant float 1.000000e+00
bool a = __builtin_is_constant_evaluated();
extern const bool b = __builtin_is_constant_evaluated();
#pragma GCC visibility pop
int v2;
-// CHECK: @v2 = global i32 0, align 4
+// CHECK: @v2 ={{.*}} global i32 0, align 4
_Pragma("GCC visibility push(hidden)");
}
_Static_assert(__is_same(__underlying_type(std::align_val_t), size_t), "");
-// CHECK-LABEL: define void @_Z1fPi(
+// CHECK-LABEL: define{{.*}} void @_Z1fPi(
void f(int *p) {
// CHECK-NOT: call void @_ZdlPvSt11align_val_t(
// CHECK: call void @_ZdlPv(