dt-bindings: clock: mediatek: add support for MT7623
authorMatthias Brugger <matthias.bgg@gmail.com>
Wed, 3 Oct 2018 09:09:09 +0000 (11:09 +0200)
committerMatthias Brugger <matthias.bgg@gmail.com>
Fri, 5 Oct 2018 08:11:31 +0000 (10:11 +0200)
This patch adds bindings for apmixedsys, audsys, bpsys, ethsys,
hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and vdecsys
for MT6723.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt
Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt
Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt
Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt
Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt
Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt
Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt
Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt
Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt
Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt
Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt

index b404d59..4e4a3c0 100644 (file)
@@ -10,6 +10,7 @@ Required Properties:
        - "mediatek,mt2712-apmixedsys", "syscon"
        - "mediatek,mt6797-apmixedsys"
        - "mediatek,mt7622-apmixedsys"
+       - "mediatek,mt7623-apmixedsys", "mediatek,mt2701-apmixedsys"
        - "mediatek,mt8135-apmixedsys"
        - "mediatek,mt8173-apmixedsys"
 - #clock-cells: Must be 1
index 34a69ba..d1606b2 100644 (file)
@@ -8,6 +8,7 @@ Required Properties:
 - compatible: Should be one of:
        - "mediatek,mt2701-audsys", "syscon"
        - "mediatek,mt7622-audsys", "syscon"
+       - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon"
 - #clock-cells: Must be 1
 
 The AUDSYS controller uses the common clk binding from
index 4010e37..149567a 100644 (file)
@@ -8,6 +8,7 @@ Required Properties:
 - compatible: Should be:
        - "mediatek,mt2701-bdpsys", "syscon"
        - "mediatek,mt2712-bdpsys", "syscon"
+       - "mediatek,mt7623-bdpsys", "mediatek,mt2701-bdpsys", "syscon"
 - #clock-cells: Must be 1
 
 The bdpsys controller uses the common clk binding from
index 8f5335b..f17cfe6 100644 (file)
@@ -8,6 +8,7 @@ Required Properties:
 - compatible: Should be:
        - "mediatek,mt2701-ethsys", "syscon"
        - "mediatek,mt7622-ethsys", "syscon"
+       - "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon"
 - #clock-cells: Must be 1
 - #reset-cells: Must be 1
 
index f5629d6..323905a 100644 (file)
@@ -9,6 +9,7 @@ Required Properties:
 - compatible: Should be:
        - "mediatek,mt2701-hifsys", "syscon"
        - "mediatek,mt7622-hifsys", "syscon"
+       - "mediatek,mt7623-hifsys", "mediatek,mt2701-hifsys", "syscon"
 - #clock-cells: Must be 1
 
 The hifsys controller uses the common clk binding from
index 868bd51..3f99672 100644 (file)
@@ -9,6 +9,7 @@ Required Properties:
        - "mediatek,mt2701-imgsys", "syscon"
        - "mediatek,mt2712-imgsys", "syscon"
        - "mediatek,mt6797-imgsys", "syscon"
+       - "mediatek,mt7623-imgsys", "mediatek,mt2701-imgsys", "syscon"
        - "mediatek,mt8173-imgsys", "syscon"
 - #clock-cells: Must be 1
 
index 566f153..89f4272 100644 (file)
@@ -11,6 +11,7 @@ Required Properties:
        - "mediatek,mt2712-infracfg", "syscon"
        - "mediatek,mt6797-infracfg", "syscon"
        - "mediatek,mt7622-infracfg", "syscon"
+       - "mediatek,mt7623-infracfg", "mediatek,mt2701-infracfg", "syscon"
        - "mediatek,mt8135-infracfg", "syscon"
        - "mediatek,mt8173-infracfg", "syscon"
 - #clock-cells: Must be 1
index 4eb8bbe..15d977a 100644 (file)
@@ -9,6 +9,7 @@ Required Properties:
        - "mediatek,mt2701-mmsys", "syscon"
        - "mediatek,mt2712-mmsys", "syscon"
        - "mediatek,mt6797-mmsys", "syscon"
+       - "mediatek,mt7623-mmsys", "mediatek,mt2701-mmsys", "syscon"
        - "mediatek,mt8173-mmsys", "syscon"
 - #clock-cells: Must be 1
 
index fb58ca8..6755514 100644 (file)
@@ -10,6 +10,7 @@ Required Properties:
        - "mediatek,mt2701-pericfg", "syscon"
        - "mediatek,mt2712-pericfg", "syscon"
        - "mediatek,mt7622-pericfg", "syscon"
+       - "mediatek,mt7623-pericfg", "mediatek,mt2701-pericfg", "syscon"
        - "mediatek,mt8135-pericfg", "syscon"
        - "mediatek,mt8173-pericfg", "syscon"
 - #clock-cells: Must be 1
index 24014a7..d849465 100644 (file)
@@ -10,6 +10,7 @@ Required Properties:
        - "mediatek,mt2712-topckgen", "syscon"
        - "mediatek,mt6797-topckgen"
        - "mediatek,mt7622-topckgen"
+       - "mediatek,mt7623-topckgen", "mediatek,mt2701-topckgen"
        - "mediatek,mt8135-topckgen"
        - "mediatek,mt8173-topckgen"
 - #clock-cells: Must be 1
index ea40d05..3212afc 100644 (file)
@@ -9,6 +9,7 @@ Required Properties:
        - "mediatek,mt2701-vdecsys", "syscon"
        - "mediatek,mt2712-vdecsys", "syscon"
        - "mediatek,mt6797-vdecsys", "syscon"
+       - "mediatek,mt7623-vdecsys", "mediatek,mt2701-vdecsys", "syscon"
        - "mediatek,mt8173-vdecsys", "syscon"
 - #clock-cells: Must be 1