mmc: sdhci-pci-gli: GL9755: Mask the replay timer timeout of AER
authorVictor Shih <victor.shih@genesyslogic.com.tw>
Tue, 7 Nov 2023 09:57:41 +0000 (17:57 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 28 Nov 2023 17:19:56 +0000 (17:19 +0000)
commit 85dd3af64965c1c0eb7373b340a1b1f7773586b0 upstream.

Due to a flaw in the hardware design, the GL9755 replay timer frequently
times out when ASPM is enabled. As a result, the warning messages will
often appear in the system log when the system accesses the GL9755
PCI config. Therefore, the replay timer timeout must be masked.

Fixes: 36ed2fd32b2c ("mmc: sdhci-pci-gli: A workaround to allow GL9755 to enter ASPM L1.2")
Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Kai-Heng Feng <kai.heng.geng@canonical.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20231107095741.8832-3-victorshihgli@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/mmc/host/sdhci-pci-gli.c

index 109d4b0..6f4dea4 100644 (file)
 #define PCI_GLI_9755_PM_CTRL     0xFC
 #define   PCI_GLI_9755_PM_STATE    GENMASK(1, 0)
 
+#define PCI_GLI_9755_CORRERR_MASK                              0x214
+#define   PCI_GLI_9755_CORRERR_MASK_REPLAY_TIMER_TIMEOUT         BIT(12)
+
 #define SDHCI_GLI_9767_GM_BURST_SIZE                   0x510
 #define   SDHCI_GLI_9767_GM_BURST_SIZE_AXI_ALWAYS_SET    BIT(8)
 
@@ -756,6 +759,11 @@ static void gl9755_hw_setting(struct sdhci_pci_slot *slot)
        value &= ~PCI_GLI_9755_PM_STATE;
        pci_write_config_dword(pdev, PCI_GLI_9755_PM_CTRL, value);
 
+       /* mask the replay timer timeout of AER */
+       pci_read_config_dword(pdev, PCI_GLI_9755_CORRERR_MASK, &value);
+       value |= PCI_GLI_9755_CORRERR_MASK_REPLAY_TIMER_TIMEOUT;
+       pci_write_config_dword(pdev, PCI_GLI_9755_CORRERR_MASK, value);
+
        gl9755_wt_off(pdev);
 }