ppc4xx: Fix PCIE PLL lock on 440SPe Yucca board

u-boot reports a PCIE PLL lock error at boot time on Yucca board, and
left PCIe nonfunctional. This is fixed by making u-boot function
ppc4xx_init_pcie() to wait 300 uS after negating reset before the
first check of the PLL lock.

Signed-off-by: Rupjyoti Sarmah <rsarmah@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/cpu/ppc4xx/4xx_pcie.c b/cpu/ppc4xx/4xx_pcie.c
index 07fbb0e..e880c28 100644 (file)
--- a/cpu/ppc4xx/4xx_pcie.c
+++ b/cpu/ppc4xx/4xx_pcie.c
@@ -374,28 +374,35 @@ int ppc4xx_init_pcie(void)
        /* Set PLL clock receiver to LVPECL */
        SDR_WRITE(PESDR0_PLLLCT1, SDR_READ(PESDR0_PLLLCT1) | 1 << 28);
 
-       if (check_error())
+       if (check_error()) {
+               printf("ERROR: failed to set PCIe reference clock receiver --"
+                       "PESDR0_PLLLCT1 = 0x%08x\n", SDR_READ(PESDR0_PLLLCT1));
+
                return -1;
+       }
+
+       /* Did resistance calibration work? */
+       if (!(SDR_READ(PESDR0_PLLLCT2) & 0x10000)) {
+               printf("ERROR: PCIe resistance calibration failed --"
+                       "PESDR0_PLLLCT2 = 0x%08x\n", SDR_READ(PESDR0_PLLLCT2));
 
-       if (!(SDR_READ(PESDR0_PLLLCT2) & 0x10000))
-       {
-               printf("PCIE: PESDR_PLLCT2 resistance calibration failed (0x%08x)\n",
-                      SDR_READ(PESDR0_PLLLCT2));
                return -1;
        }
        /* De-assert reset of PCIe PLL, wait for lock */
        SDR_WRITE(PESDR0_PLLLCT1, SDR_READ(PESDR0_PLLLCT1) & ~(1 << 24));
-       udelay(3);
+       udelay(300);    /* 300 uS is maximum time lock should take */
 
        while (time_out) {
                if (!(SDR_READ(PESDR0_PLLLCT3) & 0x10000000)) {
                        time_out--;
-                       udelay(1);
+                       udelay(20);     /* Wait 20 uS more if needed */
                } else
                        break;
        }
        if (!time_out) {
-               printf("PCIE: VCO output not locked\n");
+               printf("ERROR: PCIe PLL VCO output not locked to ref clock --"
+                       "PESDR0_PLLLCTS=0x%08x\n", SDR_READ(PESDR0_PLLLCT3));
+
                return -1;
        }
        return 0;