drm/amd/pm: enable power limit retrieving and setting for SMU 13.0.0

Fulfill the interfaces for retrieving and setting power limit on
SMU 13.0.0.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index e4bc8d85b151498b564c022066110b9f212c3b6b..f4184ea90e866fe5c2993352ce1d8544fc2d78ad 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -114,6 +114,7 @@ static struct cmn2asic_msg_mapping smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] =
        MSG_MAP(AllowGfxOff,                    PPSMC_MSG_AllowGfxOff,                 0),
        MSG_MAP(DisallowGfxOff,                 PPSMC_MSG_DisallowGfxOff,              0),
        MSG_MAP(SetMGpuFanBoostLimitRpm,        PPSMC_MSG_SetMGpuFanBoostLimitRpm,     0),
+       MSG_MAP(GetPptLimit,                    PPSMC_MSG_GetPptLimit,                 0),
 };
 
 static struct cmn2asic_mapping smu_v13_0_0_clk_map[SMU_CLK_COUNT] = {
@@ -138,6 +139,7 @@ static struct cmn2asic_mapping smu_v13_0_0_feature_mask_map[SMU_FEATURE_COUNT] =
        [SMU_FEATURE_DPM_VCLK_BIT] = {1, FEATURE_MM_DPM_BIT},
        [SMU_FEATURE_DPM_DCLK_BIT] = {1, FEATURE_MM_DPM_BIT},
        [SMU_FEATURE_FAN_CONTROL_BIT] = {1, FEATURE_FAN_CONTROL_BIT},
+       [SMU_FEATURE_PPT_BIT] = {1, FEATURE_THROTTLERS_BIT},
 };
 
 static struct cmn2asic_mapping smu_v13_0_0_table_map[SMU_TABLE_COUNT] = {
@@ -1305,6 +1307,44 @@ static int smu_v13_0_0_enable_mgpu_fan_boost(struct smu_context *smu)
                                               NULL);
 }
 
+static int smu_v13_0_0_get_power_limit(struct smu_context *smu,
+                                      uint32_t *current_power_limit,
+                                      uint32_t *default_power_limit,
+                                      uint32_t *max_power_limit)
+{
+       struct smu_table_context *table_context = &smu->smu_table;
+       struct smu_13_0_0_powerplay_table *powerplay_table =
+               (struct smu_13_0_0_powerplay_table *)table_context->power_play_table;
+       PPTable_t *pptable = table_context->driver_pptable;
+       SkuTable_t *skutable = &pptable->SkuTable;
+       uint32_t power_limit, od_percent;
+
+       if (smu_v13_0_get_current_power_limit(smu, &power_limit))
+               power_limit = smu->adev->pm.ac_power ?
+                             skutable->SocketPowerLimitAc[PPT_THROTTLER_PPT0] :
+                             skutable->SocketPowerLimitDc[PPT_THROTTLER_PPT0];
+
+       if (current_power_limit)
+               *current_power_limit = power_limit;
+       if (default_power_limit)
+               *default_power_limit = power_limit;
+
+       if (max_power_limit) {
+               if (smu->od_enabled) {
+                       od_percent = le32_to_cpu(powerplay_table->overdrive_table.max[SMU_13_0_0_ODSETTING_POWERPERCENTAGE]);
+
+                       dev_dbg(smu->adev->dev, "ODSETTING_POWERPERCENTAGE: %d (default: %d)\n", od_percent, power_limit);
+
+                       power_limit *= (100 + od_percent);
+                       power_limit /= 100;
+               }
+               *max_power_limit = power_limit;
+       }
+
+       return 0;
+}
+
+
 static const struct pptable_funcs smu_v13_0_0_ppt_funcs = {
        .get_allowed_feature_mask = smu_v13_0_0_get_allowed_feature_mask,
        .set_default_dpm_table = smu_v13_0_0_set_default_dpm_table,
@@ -1351,6 +1391,8 @@ static const struct pptable_funcs smu_v13_0_0_ppt_funcs = {
        .get_fan_control_mode = smu_v13_0_get_fan_control_mode,
        .set_fan_control_mode = smu_v13_0_set_fan_control_mode,
        .enable_mgpu_fan_boost = smu_v13_0_0_enable_mgpu_fan_boost,
+       .get_power_limit = smu_v13_0_0_get_power_limit,
+       .set_power_limit = smu_v13_0_set_power_limit,
 };
 
 void smu_v13_0_0_set_ppt_funcs(struct smu_context *smu)