r8169: improve RTL8168d PHY initialization
authorHeiner Kallweit <hkallweit1@gmail.com>
Sat, 25 May 2019 18:57:42 +0000 (20:57 +0200)
committerDavid S. Miller <davem@davemloft.net>
Mon, 27 May 2019 05:20:30 +0000 (22:20 -0700)
Certain parts of the PHY initialization are the same for sub versions
1 and 2 of RTL8168d. So let's factor this out to simplify the code.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/realtek/r8169.c

index 1a6b50c..940ff08 100644 (file)
@@ -2910,50 +2910,59 @@ static void rtl8168c_4_hw_phy_config(struct rtl8169_private *tp)
        rtl8168c_3_hw_phy_config(tp);
 }
 
-static void rtl8168d_1_hw_phy_config(struct rtl8169_private *tp)
-{
-       static const struct phy_reg phy_reg_init_0[] = {
-               /* Channel Estimation */
-               { 0x1f, 0x0001 },
-               { 0x06, 0x4064 },
-               { 0x07, 0x2863 },
-               { 0x08, 0x059c },
-               { 0x09, 0x26b4 },
-               { 0x0a, 0x6a19 },
-               { 0x0b, 0xdcc8 },
-               { 0x10, 0xf06d },
-               { 0x14, 0x7f68 },
-               { 0x18, 0x7fd9 },
-               { 0x1c, 0xf0ff },
-               { 0x1d, 0x3d9c },
-               { 0x1f, 0x0003 },
-               { 0x12, 0xf49f },
-               { 0x13, 0x070b },
-               { 0x1a, 0x05ad },
-               { 0x14, 0x94c0 },
+static const struct phy_reg rtl8168d_1_phy_reg_init_0[] = {
+       /* Channel Estimation */
+       { 0x1f, 0x0001 },
+       { 0x06, 0x4064 },
+       { 0x07, 0x2863 },
+       { 0x08, 0x059c },
+       { 0x09, 0x26b4 },
+       { 0x0a, 0x6a19 },
+       { 0x0b, 0xdcc8 },
+       { 0x10, 0xf06d },
+       { 0x14, 0x7f68 },
+       { 0x18, 0x7fd9 },
+       { 0x1c, 0xf0ff },
+       { 0x1d, 0x3d9c },
+       { 0x1f, 0x0003 },
+       { 0x12, 0xf49f },
+       { 0x13, 0x070b },
+       { 0x1a, 0x05ad },
+       { 0x14, 0x94c0 },
 
-               /*
-                * Tx Error Issue
-                * Enhance line driver power
-                */
-               { 0x1f, 0x0002 },
-               { 0x06, 0x5561 },
-               { 0x1f, 0x0005 },
-               { 0x05, 0x8332 },
-               { 0x06, 0x5561 },
+       /*
+        * Tx Error Issue
+        * Enhance line driver power
+        */
+       { 0x1f, 0x0002 },
+       { 0x06, 0x5561 },
+       { 0x1f, 0x0005 },
+       { 0x05, 0x8332 },
+       { 0x06, 0x5561 },
 
-               /*
-                * Can not link to 1Gbps with bad cable
-                * Decrease SNR threshold form 21.07dB to 19.04dB
-                */
-               { 0x1f, 0x0001 },
-               { 0x17, 0x0cc0 },
+       /*
+        * Can not link to 1Gbps with bad cable
+        * Decrease SNR threshold form 21.07dB to 19.04dB
+        */
+       { 0x1f, 0x0001 },
+       { 0x17, 0x0cc0 },
 
-               { 0x1f, 0x0000 },
-               { 0x0d, 0xf880 }
-       };
+       { 0x1f, 0x0000 },
+       { 0x0d, 0xf880 }
+};
 
-       rtl_writephy_batch(tp, phy_reg_init_0);
+static const struct phy_reg rtl8168d_1_phy_reg_init_1[] = {
+       { 0x1f, 0x0002 },
+       { 0x05, 0x669a },
+       { 0x1f, 0x0005 },
+       { 0x05, 0x8330 },
+       { 0x06, 0x669a },
+       { 0x1f, 0x0002 }
+};
+
+static void rtl8168d_1_hw_phy_config(struct rtl8169_private *tp)
+{
+       rtl_writephy_batch(tp, rtl8168d_1_phy_reg_init_0);
 
        /*
         * Rx Error Issue
@@ -2964,17 +2973,9 @@ static void rtl8168d_1_hw_phy_config(struct rtl8169_private *tp)
        rtl_w0w1_phy(tp, 0x0c, 0xa200, 0x5d00);
 
        if (rtl8168d_efuse_read(tp, 0x01) == 0xb1) {
-               static const struct phy_reg phy_reg_init[] = {
-                       { 0x1f, 0x0002 },
-                       { 0x05, 0x669a },
-                       { 0x1f, 0x0005 },
-                       { 0x05, 0x8330 },
-                       { 0x06, 0x669a },
-                       { 0x1f, 0x0002 }
-               };
                int val;
 
-               rtl_writephy_batch(tp, phy_reg_init);
+               rtl_writephy_batch(tp, rtl8168d_1_phy_reg_init_1);
 
                val = rtl_readphy(tp, 0x0d);
 
@@ -3023,62 +3024,12 @@ static void rtl8168d_1_hw_phy_config(struct rtl8169_private *tp)
 
 static void rtl8168d_2_hw_phy_config(struct rtl8169_private *tp)
 {
-       static const struct phy_reg phy_reg_init_0[] = {
-               /* Channel Estimation */
-               { 0x1f, 0x0001 },
-               { 0x06, 0x4064 },
-               { 0x07, 0x2863 },
-               { 0x08, 0x059c },
-               { 0x09, 0x26b4 },
-               { 0x0a, 0x6a19 },
-               { 0x0b, 0xdcc8 },
-               { 0x10, 0xf06d },
-               { 0x14, 0x7f68 },
-               { 0x18, 0x7fd9 },
-               { 0x1c, 0xf0ff },
-               { 0x1d, 0x3d9c },
-               { 0x1f, 0x0003 },
-               { 0x12, 0xf49f },
-               { 0x13, 0x070b },
-               { 0x1a, 0x05ad },
-               { 0x14, 0x94c0 },
-
-               /*
-                * Tx Error Issue
-                * Enhance line driver power
-                */
-               { 0x1f, 0x0002 },
-               { 0x06, 0x5561 },
-               { 0x1f, 0x0005 },
-               { 0x05, 0x8332 },
-               { 0x06, 0x5561 },
-
-               /*
-                * Can not link to 1Gbps with bad cable
-                * Decrease SNR threshold form 21.07dB to 19.04dB
-                */
-               { 0x1f, 0x0001 },
-               { 0x17, 0x0cc0 },
-
-               { 0x1f, 0x0000 },
-               { 0x0d, 0xf880 }
-       };
-
-       rtl_writephy_batch(tp, phy_reg_init_0);
+       rtl_writephy_batch(tp, rtl8168d_1_phy_reg_init_0);
 
        if (rtl8168d_efuse_read(tp, 0x01) == 0xb1) {
-               static const struct phy_reg phy_reg_init[] = {
-                       { 0x1f, 0x0002 },
-                       { 0x05, 0x669a },
-                       { 0x1f, 0x0005 },
-                       { 0x05, 0x8330 },
-                       { 0x06, 0x669a },
-
-                       { 0x1f, 0x0002 }
-               };
                int val;
 
-               rtl_writephy_batch(tp, phy_reg_init);
+               rtl_writephy_batch(tp, rtl8168d_1_phy_reg_init_1);
 
                val = rtl_readphy(tp, 0x0d);
                if ((val & 0x00ff) != 0x006c) {