amd-xgbe: enable PLL_CTL for fixed PHY modes only

PLL control setting(RRC) is needed only in fixed PHY configuration to
fix the peer-peer issues. Without the PLL control setting, the link up
takes longer time in a fixed phy configuration.

Driver implements SW RRC for Autoneg On configuration, hence PLL control
setting (RRC) is not needed for AN On configuration, and can be skipped.

Also, PLL re-initialization is not needed for PHY Power Off and RRC
commands. Otherwise, they lead to mailbox errors. Added the changes
accordingly.

Fixes: daf182d360e5 ("net: amd-xgbe: Toggle PLL settings during rate change")
Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
Acked-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
index 8cf5d81..349ba0d 100644 (file)
--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
@@ -1979,6 +1979,10 @@ static void xgbe_phy_rx_reset(struct xgbe_prv_data *pdata)
 
 static void xgbe_phy_pll_ctrl(struct xgbe_prv_data *pdata, bool enable)
 {
+       /* PLL_CTRL feature needs to be enabled for fixed PHY modes (Non-Autoneg) only */
+       if (pdata->phy.autoneg != AUTONEG_DISABLE)
+               return;
+
        XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_MISC_CTRL0,
                         XGBE_PMA_PLL_CTRL_MASK,
                         enable ? XGBE_PMA_PLL_CTRL_ENABLE
@@ -2029,8 +2033,10 @@ static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata,
        xgbe_phy_rx_reset(pdata);
 
 reenable_pll:
-       /* Enable PLL re-initialization */
-       xgbe_phy_pll_ctrl(pdata, true);
+       /* Enable PLL re-initialization, not needed for PHY Power Off and RRC cmds */
+       if (cmd != XGBE_MB_CMD_POWER_OFF &&
+           cmd != XGBE_MB_CMD_RRC)
+               xgbe_phy_pll_ctrl(pdata, true);
 }
 
 static void xgbe_phy_rrc(struct xgbe_prv_data *pdata)