anv: setup stage bitmask for Wa_22011440098
authorTapani Pälli <tapani.palli@intel.com>
Thu, 10 Nov 2022 16:23:21 +0000 (18:23 +0200)
committerEric Engestrom <eric@engestrom.ch>
Thu, 17 Nov 2022 14:05:03 +0000 (14:05 +0000)
Fixes: 40b66a44998 ("anv, iris: Add Wa_22011440098 for DG2")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19636>
(cherry picked from commit ecd4517560f135f64abf6e40acc48807b400ca41)

.pick_status.json
src/intel/vulkan/genX_cmd_buffer.c

index e1da497..66b373b 100644 (file)
         "description": "anv: setup stage bitmask for Wa_22011440098",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": "40b66a44998407c0a91bf6a1d762d204a56b81a0"
     },
index 9baf481..5e12da0 100644 (file)
@@ -2313,6 +2313,8 @@ cmd_buffer_alloc_push_constants(struct anv_cmd_buffer *cmd_buffer)
     */
    if (intel_device_info_is_dg2(cmd_buffer->device->info)) {
       anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CONSTANT_ALL), c) {
+         /* Update empty push constants for all stages (bitmask = 11111b) */
+         c.ShaderUpdateEnable = 0x1f;
          c.MOCS = anv_mocs(cmd_buffer->device, NULL, 0);
       }
    }