drm/i915/guc: Fix blocked context accounting
authorMatthew Brost <matthew.brost@intel.com>
Thu, 9 Sep 2021 16:47:22 +0000 (09:47 -0700)
committerJohn Harrison <John.C.Harrison@Intel.com>
Mon, 13 Sep 2021 18:30:25 +0000 (11:30 -0700)
Prior to this patch the blocked context counter was cleared on
init_sched_state (used during registering a context & resets) which is
incorrect. This state needs to be persistent or the counter can read the
incorrect value resulting in scheduling never getting enabled again.

Fixes: 62eaf0ae217d ("drm/i915/guc: Support request cancellation")
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: <stable@vger.kernel.org>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210909164744.31249-2-matthew.brost@intel.com
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

index 87d8dc8..69faa39 100644 (file)
@@ -152,7 +152,7 @@ static inline void init_sched_state(struct intel_context *ce)
 {
        /* Only should be called from guc_lrc_desc_pin() */
        atomic_set(&ce->guc_sched_state_no_lock, 0);
-       ce->guc_state.sched_state = 0;
+       ce->guc_state.sched_state &= SCHED_STATE_BLOCKED_MASK;
 }
 
 static inline bool