radeon: rs480 fixes for bus mastering

diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c
index 8e97f03..942ccc5 100644 (file)
--- a/shared-core/radeon_cp.c
+++ b/shared-core/radeon_cp.c
@@ -198,15 +198,16 @@ void radeon_enable_bm(struct drm_radeon_private *dev_priv)
 {
        u32 tmp;
        /* Turn on bus mastering */
-       if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
-           ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
+       if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
-               /* rs400, rs690/rs740 */
-               tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS400_BUS_MASTER_DIS;
+               /* rs600/rs690/rs740 */
+               tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS;
                RADEON_WRITE(RADEON_BUS_CNTL, tmp);
-       } else if (!(((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) ||
-                   ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R423))) {
-               /* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */
+       } else if (((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV350) ||
+                  ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) ||
+                  ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
+                  ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
+               /* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
                tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
                RADEON_WRITE(RADEON_BUS_CNTL, tmp);
        } /* PCIE cards appears to not need this */

diff --git a/shared-core/radeon_drv.h b/shared-core/radeon_drv.h
index 73e5a26..85a22e9 100644 (file)
--- a/shared-core/radeon_drv.h
+++ b/shared-core/radeon_drv.h
@@ -591,7 +591,11 @@ int radeon_resume(struct drm_device *dev);
 #      define RADEON_SCISSOR_2_ENABLE          (1 << 30)
 
 #define RADEON_BUS_CNTL                        0x0030
+/* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
 #      define RADEON_BUS_MASTER_DIS            (1 << 6)
+/* rs600/rs690/rs740 */
+#      define RS600_BUS_MASTER_DIS             (1 << 14)
+#      define RS600_MSI_REARM                  (1 << 20)
 
 #define RADEON_CLOCK_CNTL_DATA         0x000c
 #      define RADEON_PLL_WR_EN                 (1 << 7)
@@ -1053,6 +1057,7 @@ int radeon_resume(struct drm_device *dev);
 
 #define RADEON_AIC_CNTL                        0x01d0
 #      define RADEON_PCIGART_TRANSLATE_EN      (1 << 0)
+#      define RS400_MSI_REARM                  (1 << 3)
 #define RADEON_AIC_STAT                        0x01d4
 #define RADEON_AIC_PT_BASE             0x01d8
 #define RADEON_AIC_LO_ADDR             0x01dc