ge2d: fix strechblit issue for GE2D [1/1]
authorJian Cao <jian.cao@amlogic.com>
Thu, 10 Jan 2019 08:55:53 +0000 (16:55 +0800)
committerNick Xie <nick@khadas.com>
Mon, 5 Aug 2019 07:11:10 +0000 (15:11 +0800)
PD#SWPL-4075

Problem:
dst data is not normal by using strechblit function
such as 1920x1080 --> 640x360

Solution:
add bit width restriction for
horizontal scaler initial phase

Verify:
verified on g12b-w400

Change-Id: Ibcd85cc08f49254e90100beb952e711736531134
Signed-off-by: Jian Cao <jian.cao@amlogic.com>
ge2d: add enhanced hsc adv num support [2/2]

PD#SWPL-4075

Problem:
add enhanced hsc adv num support

Solution:
add enhanced hsc adv num support

Verify:
verified on g12b-w400

Change-Id: I13b52a0b10e8f3830c57ff691ef3472a34cbe89c
Signed-off-by: Jian Cao <jian.cao@amlogic.com>
drivers/amlogic/media/common/ge2d/ge2d_hw.c
include/linux/amlogic/media/ge2d/ge2d.h

index ad0a01d..1634870 100644 (file)
@@ -910,9 +910,7 @@ void ge2d_set_cmd(struct ge2d_cmd_s *cfg)
                cfg->hsc_div_length = (124 << 24) / cfg->hsc_phase_step;
 
                multo = cfg->hsc_phase_step * cfg->hsc_div_length;
-#ifndef CONFIG_GE2D_ADV_NUM
                cfg->hsc_adv_num   = multo >> 24;
-#endif
                cfg->hsc_adv_phase = multo & 0xffffff;
        }
 
@@ -990,10 +988,12 @@ void ge2d_set_cmd(struct ge2d_cmd_s *cfg)
                       );
        if (cfg->hsc_adv_num > 255)
                cfg->hsc_adv_num = cfg->hsc_adv_num >> 8;
+       else
+               cfg->hsc_adv_num = 0;
        ge2d_reg_write(GE2D_HSC_INI_CTRL,
                        (cfg->hsc_rpt_p0_num << 29) |
                        (cfg->hsc_adv_num << 24) |
-                       (cfg->hsc_ini_phase << 0)
+                       ((cfg->hsc_ini_phase & 0xffffff) << 0)
                       );
 #else
        ge2d_reg_write(GE2D_HSC_ADV_CTRL,
@@ -1002,7 +1002,7 @@ void ge2d_set_cmd(struct ge2d_cmd_s *cfg)
                       );
        ge2d_reg_write(GE2D_HSC_INI_CTRL,
                        (cfg->hsc_rpt_p0_num << 29) |
-                       (cfg->hsc_ini_phase << 0)
+                       ((cfg->hsc_ini_phase & 0xffffff) << 0)
                       );
 #endif
 
index c262542..af2f0fc 100644 (file)
@@ -37,7 +37,7 @@ enum ge2d_memtype_s {
 #define MAX_BITBLT_WORK_CONFIG 4
 #define MAX_GE2D_CMD  32   /* 64 */
 
-/* #define CONFIG_GE2D_ADV_NUM */
+#define CONFIG_GE2D_ADV_NUM
 #define CONFIG_GE2D_SRC2
 #define GE2D_STATE_IDLE                 0
 #define GE2D_STATE_RUNNING              1