deinterlace: add NR 5 line set for TL1 [1/1]

PD#SWPL-2850

Problem:
add NR 5 line set for TL1

Solution:
add NR setting

Verify:
TL1

Change-Id: Iba105103a38ec244190f7cefbe66e7d662c7d0a2
Signed-off-by: Jihong Sui <jihong.sui@amlogic.com>

diff --git a/drivers/amlogic/media/deinterlace/nr_drv.c b/drivers/amlogic/media/deinterlace/nr_drv.c
index 8a07fca..0460421 100644 (file)
--- a/drivers/amlogic/media/deinterlace/nr_drv.c
+++ b/drivers/amlogic/media/deinterlace/nr_drv.c
@@ -280,7 +280,10 @@ static void dnr_config(struct DNR_PARM_s *dnr_parm_p,
        DI_Wr(DNR_DM_CTRL, Rd(DNR_DM_CTRL)|(1 << 11));
        DI_Wr_reg_bits(DNR_CTRL, dnr_en?1:0, 16, 1);
        /* dm for sd, hd will slower */
-       DI_Wr(DNR_CTRL, 0x1df00);
+       if (is_meson_tl1_cpu())
+               DI_Wr(DNR_CTRL, 0x1df00 | (0x03 << 18)); //5 line
+       else
+               DI_Wr(DNR_CTRL, 0x1df00);
        if (is_meson_gxlx_cpu()) {
                /* disable chroma dm according to baozheng */
                DI_Wr_reg_bits(DNR_DM_CTRL, 0, 8, 1);
@@ -1117,7 +1120,10 @@ void nr_hw_init(void)
 {
 
        nr_gate_control(true);
-       DI_Wr(DNR_CTRL, 0x1df00);
+       if (is_meson_tl1_cpu())
+               DI_Wr(DNR_CTRL, 0x1df00|(0x03<<18));//5 line
+       else
+               DI_Wr(DNR_CTRL, 0x1df00);
        DI_Wr(NR3_MODE, 0x3);
        DI_Wr(NR3_COOP_PARA, 0x28ff00);
        DI_Wr(NR3_CNOOP_GAIN, 0x881900);