drm/amdgpu: correct emit frame size for vcn dec/enc ring
authorHawking Zhang <Hawking.Zhang@amd.com>
Mon, 15 May 2017 10:08:18 +0000 (18:08 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 24 May 2017 22:08:59 +0000 (18:08 -0400)
only mmhub will be invalidated during vcn dec/enc vm flush

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

index 94104a9..ad1862f 100644 (file)
@@ -1110,7 +1110,7 @@ static const struct amdgpu_ring_funcs vcn_v1_0_dec_ring_vm_funcs = {
        .set_wptr = vcn_v1_0_dec_ring_set_wptr,
        .emit_frame_size =
                2 + /* vcn_v1_0_dec_ring_emit_hdp_invalidate */
-               34 * AMDGPU_MAX_VMHUBS + /* vcn_v1_0_dec_ring_emit_vm_flush */
+               34 + /* vcn_v1_0_dec_ring_emit_vm_flush */
                14 + 14 + /* vcn_v1_0_dec_ring_emit_fence x2 vm fence */
                6,
        .emit_ib_size = 8, /* vcn_v1_0_dec_ring_emit_ib */
@@ -1138,7 +1138,7 @@ static const struct amdgpu_ring_funcs vcn_v1_0_enc_ring_vm_funcs = {
        .get_wptr = vcn_v1_0_enc_ring_get_wptr,
        .set_wptr = vcn_v1_0_enc_ring_set_wptr,
        .emit_frame_size =
-               17 * AMDGPU_MAX_VMHUBS + /* vcn_v1_0_enc_ring_emit_vm_flush */
+               17 + /* vcn_v1_0_enc_ring_emit_vm_flush */
                5 + 5 + /* vcn_v1_0_enc_ring_emit_fence x2 vm fence */
                1, /* vcn_v1_0_enc_ring_insert_end */
        .emit_ib_size = 5, /* vcn_v1_0_enc_ring_emit_ib */