PR bootstrap/6315
authorjakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 17 Apr 2002 08:24:03 +0000 (08:24 +0000)
committerjakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 17 Apr 2002 08:24:03 +0000 (08:24 +0000)
* config/sparc/sparc.md (movtf reg<-reg split): Allow spliting
even if hard quad and register is not floating.
(movtf reg<-mem split): Disallow splitting if hard quad and
register is floating.
(movtf mem<-reg split): Likewise.
* config/sparc/sparc.c (fp_register_operand): New predicate.
* config/sparc/sparc.h (PREDICATE_CODES): Add fp_register_operand.

* gcc.dg/20020416-1.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@52412 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/sparc/sparc.c
gcc/config/sparc/sparc.h
gcc/config/sparc/sparc.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.dg/20020416-1.c [new file with mode: 0644]

index 5c19dbe..76871fd 100644 (file)
@@ -1,3 +1,14 @@
+2002-04-17  Jakub Jelinek  <jakub@redhat.com>
+
+       PR bootstrap/6315
+       * config/sparc/sparc.md (movtf reg<-reg split): Allow spliting
+       even if hard quad and register is not floating.
+       (movtf reg<-mem split): Disallow splitting if hard quad and
+       register is floating.
+       (movtf mem<-reg split): Likewise.
+       * config/sparc/sparc.c (fp_register_operand): New predicate.
+       * config/sparc/sparc.h (PREDICATE_CODES): Add fp_register_operand.
+
 2002-04-17  Zack Weinberg  <zack@codesourcery.com>
 
        * Makefile.in (PROTO_OBJS): Add cppdefault.o.
index ccfbc90..f2b3585 100644 (file)
@@ -484,6 +484,20 @@ fp_zero_operand (op, mode)
   return op == CONST0_RTX (mode);
 }
 
+/* Nonzero if OP is a register operand in floating point register.  */
+
+int
+fp_register_operand (op, mode)
+     rtx op;
+     enum machine_mode mode;
+{
+  if (! register_operand (op, mode))
+    return 0;
+  if (GET_CODE (op) == SUBREG)
+    op = SUBREG_REG (op);
+  return GET_CODE (op) == REG && SPARC_FP_REG_P (REGNO (op));
+}
+
 /* Nonzero if OP is a floating point constant which can
    be loaded into an integer register using a single
    sethi instruction.  */
index d48b8dd..fd15297 100644 (file)
@@ -2947,6 +2947,7 @@ do {                                                                      \
 #define PREDICATE_CODES                                                        \
 {"reg_or_0_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}},          \
 {"fp_zero_operand", {CONST_DOUBLE}},                                   \
+{"fp_register_operand", {SUBREG, REG}},                                        \
 {"intreg_operand", {SUBREG, REG}},                                     \
 {"fcc_reg_operand", {REG}},                                            \
 {"fcc0_reg_operand", {REG}},                                           \
index cc362dc..d09f648 100644 (file)
   "reload_completed
    && (! TARGET_ARCH64
        || (TARGET_FPU
-           && ! TARGET_HARD_QUAD))"
+           && ! TARGET_HARD_QUAD)
+       || ! fp_register_operand (operands[0], TFmode))"
   [(clobber (const_int 0))]
   "
 {
   [(set (match_operand:TF 0 "register_operand" "")
         (match_operand:TF 1 "memory_operand" ""))]
   "(reload_completed
-    && offsettable_memref_p (operands[1]))"
+    && offsettable_memref_p (operands[1])
+    && (! TARGET_ARCH64
+       || ! TARGET_HARD_QUAD
+       || ! fp_register_operand (operands[0], TFmode)))"
   [(clobber (const_int 0))]
   "
 {
   [(set (match_operand:TF 0 "memory_operand" "")
        (match_operand:TF 1 "register_operand" ""))]
   "(reload_completed
-    && offsettable_memref_p (operands[0]))"
+    && offsettable_memref_p (operands[0])
+    && (! TARGET_ARCH64
+       || ! TARGET_HARD_QUAD
+       || ! fp_register_operand (operands[1], TFmode)))"
   [(clobber (const_int 0))]
   "
 {
index 826b30d..36ea8b7 100644 (file)
@@ -1,3 +1,7 @@
+2002-04-17  Jakub Jelinek  <jakub@redhat.com>
+
+       * gcc.dg/20020416-1.c: New test.
+
 2002-04-16  Jakub Jelinek  <jakub@redhat.com>
 
        * gcc.dg/altivec-5.c: New test.
diff --git a/gcc/testsuite/gcc.dg/20020416-1.c b/gcc/testsuite/gcc.dg/20020416-1.c
new file mode 100644 (file)
index 0000000..db1a261
--- /dev/null
@@ -0,0 +1,16 @@
+/* PR bootstrap/6315 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-options "-O2 -mhard-quad-float" { target sparc*-*-* } } */
+/* { dg-options "-O2" { target sparclet*-*-* sparclite*-*-* sparc86x-*-* } } */
+
+void bar (const char *, ...);
+
+void
+foo (const char *x, long double y, int z)
+{
+  if (z >= 0)
+    bar (x, z, y);
+  else
+    bar (x, y);
+}