// generate broken code.
report_fatal_error("Memory offset field overflow");
}
- MI.getOperand(1).setImm(Offset);
- MI.getOperand(2).ChangeToRegister(WebAssembly::SP32, /*IsDef=*/false);
+ MI.getOperand(FIOperandNum - 1).setImm(Offset);
+ MI.getOperand(FIOperandNum)
+ .ChangeToRegister(WebAssembly::SP32, /*IsDef=*/false);
} else {
// Otherwise create an i32.add SP, offset and make it the operand.
auto &MRI = MF.getRegInfo();
case WebAssembly::STORE_F64:
case WebAssembly::STORE_I32:
case WebAssembly::STORE_I64: {
- unsigned ToReg = MI.getOperand(0).getReg();
- unsigned FromReg =
- MI.getOperand(WebAssembly::StoreValueOperandNo).getReg();
- Changed |= ReplaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT);
+ const auto &Stored = MI.getOperand(WebAssembly::StoreValueOperandNo);
+ if (Stored.isReg()) {
+ unsigned ToReg = MI.getOperand(0).getReg();
+ unsigned FromReg = Stored.getReg();
+ Changed |= ReplaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT);
+ } else if (Stored.isFI()) {
+ break;
+ } else {
+ report_fatal_error(
+ "Store results: store not consuming reg or frame index");
+ }
break;
}
case WebAssembly::CALL_I32:
for.cond.cleanup4.i:
ret void
}
+
+; CHECK-LABEL: fi_ret:
+; CHECK: i32.store $discard=,
+define hidden i8* @fi_ret(i8** %addr) {
+entry:
+ %buf = alloca [27 x i8], align 16
+ %0 = getelementptr inbounds [27 x i8], [27 x i8]* %buf, i32 0, i32 0
+ store i8* %0, i8** %addr
+ ret i8* %0
+}