Convert CONFIG_ENABLE_36BIT_PHYS to Kconfig
authorTom Rini <trini@konsulko.com>
Wed, 15 Jun 2022 16:03:45 +0000 (12:03 -0400)
committerTom Rini <trini@konsulko.com>
Tue, 5 Jul 2022 21:03:01 +0000 (17:03 -0400)
This converts the following to Kconfig:
   CONFIG_ENABLE_36BIT_PHYS

Signed-off-by: Tom Rini <trini@konsulko.com>
95 files changed:
arch/powerpc/cpu/mpc85xx/Kconfig
configs/MPC8548CDS_36BIT_defconfig
configs/MPC8548CDS_defconfig
configs/MPC8548CDS_legacy_defconfig
configs/P1010RDB-PA_36BIT_NAND_defconfig
configs/P1010RDB-PA_36BIT_NOR_defconfig
configs/P1010RDB-PA_36BIT_SDCARD_defconfig
configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
configs/P1010RDB-PA_NAND_defconfig
configs/P1010RDB-PA_NOR_defconfig
configs/P1010RDB-PA_SDCARD_defconfig
configs/P1010RDB-PA_SPIFLASH_defconfig
configs/P1010RDB-PB_36BIT_NAND_defconfig
configs/P1010RDB-PB_36BIT_NOR_defconfig
configs/P1010RDB-PB_36BIT_SDCARD_defconfig
configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
configs/P1010RDB-PB_NAND_defconfig
configs/P1010RDB-PB_NOR_defconfig
configs/P1010RDB-PB_SDCARD_defconfig
configs/P1010RDB-PB_SPIFLASH_defconfig
configs/P1020RDB-PC_36BIT_NAND_defconfig
configs/P1020RDB-PC_36BIT_SDCARD_defconfig
configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
configs/P1020RDB-PC_36BIT_defconfig
configs/P1020RDB-PC_NAND_defconfig
configs/P1020RDB-PC_SDCARD_defconfig
configs/P1020RDB-PC_SPIFLASH_defconfig
configs/P1020RDB-PC_defconfig
configs/P1020RDB-PD_NAND_defconfig
configs/P1020RDB-PD_SDCARD_defconfig
configs/P1020RDB-PD_SPIFLASH_defconfig
configs/P1020RDB-PD_defconfig
configs/P2020RDB-PC_36BIT_NAND_defconfig
configs/P2020RDB-PC_36BIT_SDCARD_defconfig
configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
configs/P2020RDB-PC_36BIT_defconfig
configs/P2020RDB-PC_NAND_defconfig
configs/P2020RDB-PC_SDCARD_defconfig
configs/P2020RDB-PC_SPIFLASH_defconfig
configs/P2020RDB-PC_defconfig
configs/P2041RDB_NAND_defconfig
configs/P2041RDB_SDCARD_defconfig
configs/P2041RDB_SPIFLASH_defconfig
configs/P2041RDB_defconfig
configs/P3041DS_NAND_defconfig
configs/P3041DS_SDCARD_defconfig
configs/P3041DS_SPIFLASH_defconfig
configs/P3041DS_defconfig
configs/P4080DS_SDCARD_defconfig
configs/P4080DS_SPIFLASH_defconfig
configs/P4080DS_defconfig
configs/P5040DS_NAND_defconfig
configs/P5040DS_SDCARD_defconfig
configs/P5040DS_SPIFLASH_defconfig
configs/P5040DS_defconfig
configs/T1024RDB_NAND_defconfig
configs/T1024RDB_SDCARD_defconfig
configs/T1024RDB_SPIFLASH_defconfig
configs/T1024RDB_defconfig
configs/T1042D4RDB_NAND_defconfig
configs/T1042D4RDB_SDCARD_defconfig
configs/T1042D4RDB_SPIFLASH_defconfig
configs/T1042D4RDB_defconfig
configs/T2080QDS_NAND_defconfig
configs/T2080QDS_SDCARD_defconfig
configs/T2080QDS_SECURE_BOOT_defconfig
configs/T2080QDS_SPIFLASH_defconfig
configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
configs/T2080QDS_defconfig
configs/T2080RDB_NAND_defconfig
configs/T2080RDB_SDCARD_defconfig
configs/T2080RDB_SPIFLASH_defconfig
configs/T2080RDB_defconfig
configs/T2080RDB_revD_NAND_defconfig
configs/T2080RDB_revD_SDCARD_defconfig
configs/T2080RDB_revD_SPIFLASH_defconfig
configs/T2080RDB_revD_defconfig
configs/T4240RDB_SDCARD_defconfig
configs/T4240RDB_defconfig
configs/kmcent2_defconfig
configs/qemu-ppce500_defconfig
configs/socrates_defconfig
include/configs/MPC8548CDS.h
include/configs/P1010RDB.h
include/configs/P2041RDB.h
include/configs/T102xRDB.h
include/configs/T104xRDB.h
include/configs/T208xQDS.h
include/configs/T208xRDB.h
include/configs/T4240RDB.h
include/configs/corenet_ds.h
include/configs/kmcent2.h
include/configs/p1_p2_rdb_pc.h
include/configs/qemu-ppce500.h
include/configs/socrates.h

index 02efa1c..5510bc7 100644 (file)
@@ -1185,6 +1185,9 @@ config SYS_FSL_LBC_CLK_DIV
                Defines divider of platform clock(clock input to
                eLBC controller).
 
+config ENABLE_36BIT_PHYS
+       bool "Enable 36bit physical address space support"
+
 config SYS_MPC85XX_NO_RESETVEC
        bool "Discard resetvec section and move bootpg section up"
        depends on MPC85xx
index f2dd5d3..14eeef9 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_MPC8548CDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_PHYS_64BIT=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
index 55acf63..04f086e 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_MPC8548CDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_DYNAMIC_SYS_CLK_FREQ=y
index 4bd0b1a..874de6a 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_MPC8548CDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_TARGET_MPC8548CDS_LEGACY=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
index d1de705..dfedc1f 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PHYS_64BIT=y
index 570ba4b..fb71365 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
index c407c27..3623190 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PHYS_64BIT=y
index fd2156a..ad30bbb 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PHYS_64BIT=y
index eaa9efc..3e52bba 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_FIT=y
index 681af51..6770981 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index e18919e..c7b6008 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_FIT=y
index 9f3c337..68c7bcc 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_FIT=y
index 7a55298..84e8f65 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PHYS_64BIT=y
index 7f749ed..427073a 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
index 3e7db0a..81231e1 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PHYS_64BIT=y
index c93e4d4..9313a52 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PHYS_64BIT=y
index b85d14a..2534a2e 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_FIT=y
index 5861409..44f91fb 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index f9a0664..dba240c 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_FIT=y
index 45945ca..800d094 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_FIT=y
index 3b320bc..7d695af 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PHYS_64BIT=y
index c4d5fe8..11894a1 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PHYS_64BIT=y
index cc9b113..86f41ca 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PHYS_64BIT=y
index 6d98c2e..de5b326 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PHYS_64BIT=y
 CONFIG_MP=y
index d77c3ed..54b78e8 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
index 75a967b..70a7569 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
index f0d9d29..5c58c4a 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
index 2631bb3..247d28a 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
 CONFIG_FIT=y
index f92e3f0..fb5d582 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PD=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
index bb60f1f..98661bf 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PD=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
index c03914e..b25b8da 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PD=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
index 2e81747..92ae634 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PD=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
 CONFIG_FIT=y
index 91ebd89..00d5afa 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PHYS_64BIT=y
index fddd5da..3cc100a 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PHYS_64BIT=y
index 69ccb8d..0a61313 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PHYS_64BIT=y
index d9bf4dc..8804c7b 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PHYS_64BIT=y
 CONFIG_MP=y
index 5a62055..9a42388 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
index 3e152f8..1cd2da1 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_SPL=y
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
index 1b6ed86..361b436 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
index d69e948..b070cb0 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
 CONFIG_FIT=y
index 193e471..53d97d9 100644 (file)
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p2041rdb"
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index 4a97e85..a54f35a 100644 (file)
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p2041rdb"
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index 3a19e4d..76cabd3 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p2041rdb"
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index 5dddbda..e6df3c8 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index d9bc803..6da4e06 100644 (file)
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p3041ds"
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index e0e65ee..8288962 100644 (file)
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p3041ds"
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index 761a902..ea2e1eb 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p3041ds"
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index 6798c1d..6277952 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index dde3351..867f8aa 100644 (file)
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p4080ds"
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index 1db4471..59984c9 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p4080ds"
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index 9eb49bf..2733bb2 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index 75b9c96..e7f9755 100644 (file)
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p5040ds"
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index 015feac..32c1065 100644 (file)
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p5040ds"
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index 7aa0769..054f43e 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p5040ds"
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index 8d5f107..44abf8f 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index 940538b..88abd06 100644 (file)
@@ -12,6 +12,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SYS_MEMTEST_START=0x00200000
index ac31a55..4897676 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SYS_MEMTEST_START=0x00200000
 CONFIG_SYS_MEMTEST_END=0x00400000
index 7688304..ed2ad98 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SYS_MEMTEST_START=0x00200000
 CONFIG_SYS_MEMTEST_END=0x00400000
index a88b6a3..adfad98 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MEMTEST_START=0x00200000
 CONFIG_SYS_MEMTEST_END=0x00400000
 CONFIG_MP=y
index f8772cc..e803f8b 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
index 99280a0..a0179c4 100644 (file)
@@ -12,6 +12,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
 CONFIG_FIT=y
index 0f624f7..1f26a21 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
 CONFIG_FIT=y
index ae2f005..7160e05 100644 (file)
@@ -7,6 +7,7 @@ CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index 3299fcd..a546992 100644 (file)
@@ -18,6 +18,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
index b35c964..4024354 100644 (file)
@@ -19,6 +19,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
 CONFIG_FIT=y
index 6959754..0a3e55b 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_FSL_QIXIS=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 # CONFIG_SYS_MALLOC_F is not set
 CONFIG_MP=y
 CONFIG_FIT=y
index ce0b15c..b0247be 100644 (file)
@@ -21,6 +21,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
 CONFIG_FIT=y
index 362d9fd..a39587d 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_ENV_ADDR=0xFFE20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SRIO_PCIE_BOOT_SLAVE=y
 CONFIG_MP=y
 CONFIG_FIT=y
index e2b3ee1..aa6d559 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index c33ff6f..2b5249c 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SYS_MEMTEST_START=0x00200000
index 4d4c37b..9878c54 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SYS_MEMTEST_START=0x00200000
 CONFIG_SYS_MEMTEST_END=0x00400000
index 040e5bc..5042e2a 100644 (file)
@@ -18,6 +18,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SYS_MEMTEST_START=0x00200000
 CONFIG_SYS_MEMTEST_END=0x00400000
index 0e001e2..e43168e 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MEMTEST_START=0x00200000
 CONFIG_SYS_MEMTEST_END=0x00400000
 CONFIG_MP=y
index 26ee297..bc2e758 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y
index c3c399c..31fe8be 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y
 CONFIG_SYS_MEMTEST_START=0x00200000
index fbae2c4..9d629ad 100644 (file)
@@ -18,6 +18,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y
 CONFIG_SYS_MEMTEST_START=0x00200000
index ef87c2e..1af317a 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_T2080RDB_REV_D=y
 CONFIG_SYS_MEMTEST_START=0x00200000
 CONFIG_SYS_MEMTEST_END=0x00400000
index dd5861e..b0c9776 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T4240RDB=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_MP=y
 CONFIG_FIT=y
index 01236ed..e5355eb 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T4240RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_MP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index 17e899a..8540923 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_ENV_ADDR=0xebf20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_KMCENT2=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_KM_DEF_NETDEV="eth2"
 CONFIG_KM_IVM_BUS=2
 CONFIG_MP=y
index 8c7b8b4..034f7e6 100644 (file)
@@ -6,6 +6,7 @@ CONFIG_SYS_CLK_FREQ=33000000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_QEMU_PPCE500=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index d902019..28ea447 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_ENV_ADDR=0xFFF40000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_SOCRATES=y
+CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
index d8ffa2e..5fba5bb 100644 (file)
@@ -34,7 +34,6 @@
 /*
  * Only possible on E500 Version 2 or newer cores.
  */
-#define CONFIG_ENABLE_36BIT_PHYS       1
 
 #define CONFIG_SYS_CCSRBAR             0xe0000000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
index ad78dba..53c7198 100644 (file)
  */
 #define CONFIG_L2_CACHE                        /* toggle L2 cache */
 
-
-#define CONFIG_ENABLE_36BIT_PHYS
-
 /* DDR Setup */
 #define CONFIG_SYS_DDR_RAW_TIMING
 #define CONFIG_SYS_SPD_BUS_NUM         1
index df16319..8e5d18f 100644 (file)
@@ -58,8 +58,6 @@
 #define CONFIG_SYS_CACHE_STASHING
 #define CONFIG_SYS_INIT_L2CSR0         L2CSR0_L2E
 
-#define CONFIG_ENABLE_36BIT_PHYS
-
 #define CONFIG_POST CONFIG_SYS_POST_MEMORY     /* test POST memory test */
 
 /*
index bd458ff..3f32354 100644 (file)
@@ -15,7 +15,6 @@
 
 /* High Level Configuration Options */
 #define CONFIG_SYS_BOOK3E_HV           /* Category E.HV supported */
-#define CONFIG_ENABLE_36BIT_PHYS
 
 #define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
index 505bae9..bda2524 100644 (file)
@@ -83,8 +83,6 @@
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
 #endif
 
-#define CONFIG_ENABLE_36BIT_PHYS
-
 /*
  *  Config the L3 Cache as L3 SRAM
  */
index 2db2b07..0c13550 100644 (file)
@@ -22,7 +22,6 @@
 
 /* High Level Configuration Options */
 #define CONFIG_SYS_BOOK3E_HV   /* Category E.HV supported */
-#define CONFIG_ENABLE_36BIT_PHYS
 
 #define CONFIG_SYS_FSL_CPC     /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC     CONFIG_SYS_NUM_DDR_CTLRS
index 07e1108..5fb768a 100644 (file)
@@ -17,7 +17,6 @@
 
 /* High Level Configuration Options */
 #define CONFIG_SYS_BOOK3E_HV   /* Category E.HV supported */
-#define CONFIG_ENABLE_36BIT_PHYS
 
 #define CONFIG_SYS_FSL_CPC     /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC     CONFIG_SYS_NUM_DDR_CTLRS
index 526d40f..6f5b759 100644 (file)
@@ -56,8 +56,6 @@
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
 #endif
 
-#define CONFIG_ENABLE_36BIT_PHYS
-
 /*
  *  Config the L3 Cache as L3 SRAM
  */
index f563a5f..034cd00 100644 (file)
@@ -62,8 +62,6 @@
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
 #endif
 
-#define CONFIG_ENABLE_36BIT_PHYS
-
 #define CONFIG_POST CONFIG_SYS_POST_MEMORY     /* test POST memory test */
 
 /*
index 4de5736..798688a 100644 (file)
 #define CONFIG_SYS_CACHE_STASHING
 #define CONFIG_SYS_INIT_L2CSR0         L2CSR0_L2E
 
-#define CONFIG_ENABLE_36BIT_PHYS
-
 /* POST memory regions test */
 #define CONFIG_POST CONFIG_SYS_POST_MEM_REGIONS
 
index 2a24236..1be548e 100644 (file)
  */
 #define CONFIG_L2_CACHE
 
-#define CONFIG_ENABLE_36BIT_PHYS
-
 #define CONFIG_SYS_CCSRBAR             0xffe00000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
index c3fef0d..006593a 100644 (file)
@@ -11,8 +11,6 @@
 
 #define CONFIG_SYS_RAMBOOT
 
-#define CONFIG_ENABLE_36BIT_PHYS
-
 /* Needed to fill the ccsrbar pointer */
 
 /* Virtual address to CCSRBAR */
index 3309779..73f82fc 100644 (file)
@@ -22,7 +22,6 @@
 /*
  * Only possible on E500 Version 2 or newer cores.
  */
-#define CONFIG_ENABLE_36BIT_PHYS       1
 
 /*
  * sysclk for MPC85xx