}
/* PAE Paging or IA-32e Paging */
+#define PLM4_ADDR_MASK 0xffffffffff000 /* selects bits 51:12 */
+
static void walk_pde(MemoryMappingList *list, hwaddr pde_start_addr,
int32_t a20_mask, target_ulong start_line_addr)
{
continue;
}
- pte_start_addr = (pde & ~0xfff) & a20_mask;
+ pte_start_addr = (pde & PLM4_ADDR_MASK) & a20_mask;
walk_pte(list, pte_start_addr, a20_mask, line_addr);
}
}
continue;
}
- pde_start_addr = (pdpe & ~0xfff) & a20_mask;
+ pde_start_addr = (pdpe & PLM4_ADDR_MASK) & a20_mask;
walk_pde(list, pde_start_addr, a20_mask, line_addr);
}
}
}
line_addr = ((i & 0x1ffULL) << 39) | (0xffffULL << 48);
- pdpe_start_addr = (pml4e & ~0xfff) & a20_mask;
+ pdpe_start_addr = (pml4e & PLM4_ADDR_MASK) & a20_mask;
walk_pdpe(list, pdpe_start_addr, a20_mask, line_addr);
}
}
if (env->hflags & HF_LMA_MASK) {
hwaddr pml4e_addr;
- pml4e_addr = (env->cr[3] & ~0xfff) & env->a20_mask;
+ pml4e_addr = (env->cr[3] & PLM4_ADDR_MASK) & env->a20_mask;
walk_pml4e(list, pml4e_addr, env->a20_mask);
} else
#endif