def TuneNeoverseN1 : SubtargetFeature<"neoversen1", "ARMProcFamily", "NeoverseN1",
"Neoverse N1 ARM processors", [
FeaturePostRAScheduler,
- FeatureFuseAES
+ FeatureFuseAES,
+ FeatureFuseAdrpAdd
]>;
def TuneNeoverseN2 : SubtargetFeature<"neoversen2", "ARMProcFamily", "NeoverseN2",
; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=exynos-m3 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKFUSE
; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=exynos-m4 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKFUSE
; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=exynos-m5 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKFUSE
+; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-n1 | FileCheck %s --check-prefix=CHECKFUSE-NEOVERSE
@g = common local_unnamed_addr global i8* null, align 8
; CHECK-NEXT: add {{x[0-9]+}}, [[R]], :lo12:litp_tune_generic
}
+define dso_local i8* @litp_tune_neoverse_n1(i32 %a, i32 %b) "tune-cpu"="neoverse-n1" {
+entry:
+ %add = add nsw i32 %b, %a
+ %idx.ext = sext i32 %add to i64
+ %add.ptr = getelementptr i8, i8* bitcast (i8* (i32, i32)* @litp_tune_generic to i8*), i64 %idx.ext
+ store i8* %add.ptr, i8** @g, align 8
+ ret i8* %add.ptr
+
+; CHECKFUSE-NEOVERSE-LABEL: litp_tune_neoverse_n1:
+; CHECKFUSE-NEOVERSE: adrp [[R:x[0-9]+]], litp_tune_generic
+; CHECKFUSE-NEOVERSE-NEXT: add {{x[0-9]+}}, [[R]], :lo12:litp_tune_generic
+}
+
define dso_local i32 @liti(i32 %a, i32 %b) {
entry:
%add = add i32 %a, -262095121