crypto: mediatek - add DT bindings documentation
authorRyder Lee <ryder.lee@mediatek.com>
Mon, 19 Dec 2016 02:20:45 +0000 (10:20 +0800)
committerHerbert Xu <herbert@gondor.apana.org.au>
Tue, 27 Dec 2016 09:51:31 +0000 (17:51 +0800)
Add DT bindings documentation for the crypto driver

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Documentation/devicetree/bindings/crypto/mediatek-crypto.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt b/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt
new file mode 100644 (file)
index 0000000..c204725
--- /dev/null
@@ -0,0 +1,27 @@
+MediaTek cryptographic accelerators
+
+Required properties:
+- compatible: Should be "mediatek,eip97-crypto"
+- reg: Address and length of the register set for the device
+- interrupts: Should contain the five crypto engines interrupts in numeric
+       order. These are global system and four descriptor rings.
+- clocks: the clock used by the core
+- clock-names: the names of the clock listed in the clocks property. These are
+       "ethif", "cryp"
+- power-domains: Must contain a reference to the PM domain.
+
+
+Example:
+       crypto: crypto@1b240000 {
+               compatible = "mediatek,eip97-crypto";
+               reg = <0 0x1b240000 0 0x20000>;
+               interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>;
+               clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
+                        <&ethsys CLK_ETHSYS_CRYPTO>;
+               clock-names = "ethif","cryp";
+               power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
+       };