drm/bridge: anx7625: Use uint8 for lane-swing arrays
authorNícolas F. R. A. Prado <nfraprado@collabora.com>
Fri, 8 Apr 2022 01:30:34 +0000 (21:30 -0400)
committerRobert Foss <robert.foss@linaro.org>
Tue, 19 Apr 2022 16:59:12 +0000 (18:59 +0200)
As defined in the anx7625 dt-binding, the analogix,lane0-swing and
analogix,lane1-swing properties are uint8 arrays. Yet, the driver was
reading the array as if it were of uint32 and masking to 8-bit before
writing to the registers. This means that a devicetree written in
accordance to the dt-binding would have its values incorrectly parsed.

Fix the issue by reading the array as uint8 and storing them as uint8
internally, so that we can also drop the masking when writing the
registers.

Fixes: fd0310b6fe7d ("drm/bridge: anx7625: add MIPI DPI input feature")
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220408013034.673418-1-nfraprado@collabora.com
drivers/gpu/drm/bridge/analogix/anx7625.c
drivers/gpu/drm/bridge/analogix/anx7625.h

index f2bc30c98c770ca5f9e0ca789f7faf46b2cd94ca..376da01243a3452dae5ae2849f34401afb4650c8 100644 (file)
@@ -1486,12 +1486,12 @@ static void anx7625_dp_adjust_swing(struct anx7625_data *ctx)
        for (i = 0; i < ctx->pdata.dp_lane0_swing_reg_cnt; i++)
                anx7625_reg_write(ctx, ctx->i2c.tx_p1_client,
                                  DP_TX_LANE0_SWING_REG0 + i,
-                                 ctx->pdata.lane0_reg_data[i] & 0xFF);
+                                 ctx->pdata.lane0_reg_data[i]);
 
        for (i = 0; i < ctx->pdata.dp_lane1_swing_reg_cnt; i++)
                anx7625_reg_write(ctx, ctx->i2c.tx_p1_client,
                                  DP_TX_LANE1_SWING_REG0 + i,
-                                 ctx->pdata.lane1_reg_data[i] & 0xFF);
+                                 ctx->pdata.lane1_reg_data[i]);
 }
 
 static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on)
@@ -1598,8 +1598,8 @@ static int anx7625_get_swing_setting(struct device *dev,
                        num_regs = DP_TX_SWING_REG_CNT;
 
                pdata->dp_lane0_swing_reg_cnt = num_regs;
-               of_property_read_u32_array(dev->of_node, "analogix,lane0-swing",
-                                          pdata->lane0_reg_data, num_regs);
+               of_property_read_u8_array(dev->of_node, "analogix,lane0-swing",
+                                         pdata->lane0_reg_data, num_regs);
        }
 
        if (of_get_property(dev->of_node,
@@ -1608,8 +1608,8 @@ static int anx7625_get_swing_setting(struct device *dev,
                        num_regs = DP_TX_SWING_REG_CNT;
 
                pdata->dp_lane1_swing_reg_cnt = num_regs;
-               of_property_read_u32_array(dev->of_node, "analogix,lane1-swing",
-                                          pdata->lane1_reg_data, num_regs);
+               of_property_read_u8_array(dev->of_node, "analogix,lane1-swing",
+                                         pdata->lane1_reg_data, num_regs);
        }
 
        return 0;
index edbbfe410a56e82b43edd5c3bee9644708eb85a5..e257a84db9626a7a3c687136cd8620149c8e9004 100644 (file)
@@ -426,9 +426,9 @@ struct anx7625_platform_data {
        int mipi_lanes;
        int audio_en;
        int dp_lane0_swing_reg_cnt;
-       int lane0_reg_data[DP_TX_SWING_REG_CNT];
+       u8 lane0_reg_data[DP_TX_SWING_REG_CNT];
        int dp_lane1_swing_reg_cnt;
-       int lane1_reg_data[DP_TX_SWING_REG_CNT];
+       u8 lane1_reg_data[DP_TX_SWING_REG_CNT];
        u32 low_power_mode;
        struct device_node *mipi_host_node;
 };