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mxs: spl_mem_init: Change EMI port priority
author
Fabio Estevam
<fabio.estevam@freescale.com>
Fri, 3 May 2013 04:37:13 +0000
(
04:37
+0000)
committer
Stefano Babic
<sbabic@denx.de>
Sun, 5 May 2013 15:08:47 +0000
(17:08 +0200)
FSL bootlets code set the PORT_PRIORITY_ORDER field of register HW_EMI_CTRL
as 0x2, which means:
PORT0231 = 0x02 Priority Order: AXI0, AHB2, AHB3, AHB1
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
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diff --git
a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index
5eacd36
..
41fb803
100644
(file)
--- a/
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@
-287,7
+287,7
@@
static void mx23_mem_init(void)
early_delay(20000);
/* Adjust EMI port priority. */
- clrsetbits_le32(0x80020000, 0x1f << 16, 0x
8
);
+ clrsetbits_le32(0x80020000, 0x1f << 16, 0x
2
);
early_delay(20000);
setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 19);