dma-names = "tx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
clock-names = "sha_clk";
- status = "okay";
};
trng: trng@f0030000 {
reg = <0xf0030000 0x100>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
- status = "okay";
};
aes: aes@f0034000 {
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
clock-names = "aes_clk";
- status = "okay";
};
tdes: tdes@f0038000 {
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
clock-names = "tdes_clk";
- status = "okay";
};
classd: classd@f003c000 {
dma-names = "tx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
clock-names = "sha_clk";
- status = "okay";
};
aes@f002c000 {
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
clock-names = "aes_clk";
- status = "okay";
};
spi0: spi@f8000000 {
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
clock-names = "tdes_clk";
- status = "okay";
};
classd: classd@fc048000 {
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
clock-names = "aes_clk";
- status = "okay";
};
tdes@fc04c000 {
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
clock-names = "tdes_clk";
- status = "okay";
};
sha@fc050000 {
dma-names = "tx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
clock-names = "sha_clk";
- status = "okay";
};
hsmc: smc@fc05c000 {
#size-cells = <1>;
ranges = <0 0xe0000000 0x4000>;
no-memory-wc;
- status = "okay";
};
secumod: secumod@e0004000 {
uddrc: uddrc@e3800000 {
compatible = "microchip,sama7g5-uddrc";
reg = <0xe3800000 0x4000>;
- status = "okay";
};
ddr3phy: ddr3phy@e3804000 {
compatible = "microchip,sama7g5-ddr3phy";
reg = <0xe3804000 0x1000>;
- status = "okay";
};
gic: interrupt-controller@e8c11000 {