fpga: add option for loading FPGA secure bitstreams

It allows using this feature without enabling the "fpga loads"
command.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Co-developed-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-2-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index b3820f1..a8260aa 100644 (file)
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1038,8 +1038,9 @@ config CMD_FPGA_LOADP
          a partial bitstream.
 
 config CMD_FPGA_LOAD_SECURE
-       bool "fpga loads - loads secure bitstreams (Xilinx only)"
+       bool "fpga loads - loads secure bitstreams"
        depends on CMD_FPGA
+       select FPGA_LOAD_SECURE
        help
          Enables the fpga loads command which is used to load secure
          (authenticated or encrypted or both) bitstreams on to FPGA.

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 696ea92..e07a9cf 100644 (file)
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -104,4 +104,18 @@ config SYS_FPGA_PROG_FEEDBACK
        help
          Enable printing of hash marks during FPGA configuration.
 
+config FPGA_LOAD_SECURE
+       bool "Enable loading secure bitstreams"
+       depends on FPGA
+       help
+         Enables the fpga loads() functions that are used to load secure
+         (authenticated or encrypted or both) bitstreams on to FPGA.
+
+config SPL_FPGA_LOAD_SECURE
+       bool "Enable loading secure bitstreams for SPL"
+       depends on SPL_FPGA
+       help
+         Enables the fpga loads() functions that are used to load secure
+         (authenticated or encrypted or both) bitstreams on to FPGA.
+
 endmenu

diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index fe3dfa1..3b0a44b 100644 (file)
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -220,7 +220,7 @@ int fpga_fsload(int devnum, const void *buf, size_t size,
 }
 #endif
 
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
 int fpga_loads(int devnum, const void *buf, size_t size,
               struct fpga_secure_info *fpga_sec_info)
 {

diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index cbebefb..6bc1bc4 100644 (file)
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -172,7 +172,7 @@ int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
 }
 #endif
 
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
 int xilinx_loads(xilinx_desc *desc, const void *buf, size_t bsize,
                 struct fpga_secure_info *fpga_sec_info)
 {

diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 6b39486..8ff12bf 100644 (file)
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -245,7 +245,7 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
        return ret;
 }
 
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD)
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
 static int zynqmp_loads(xilinx_desc *desc, const void *buf, size_t bsize,
                        struct fpga_secure_info *fpga_sec_info)
 {
@@ -306,7 +306,7 @@ static int zynqmp_pcap_info(xilinx_desc *desc)
 
 struct xilinx_fpga_op zynqmp_op = {
        .load = zynqmp_load,
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD)
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
        .loads = zynqmp_loads,
 #endif
        .info = zynqmp_pcap_info,