powerpc: dts: add QorIQ DPAA 1 FMan to P3041DS

Introduce the QorIQ DPAA 1 Frame Manager nodes in the P3041DS
device tree. The device tree fragments are copied over with little
modification from the Linux kernel source code.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

diff --git a/arch/powerpc/dts/p3041ds.dts b/arch/powerpc/dts/p3041ds.dts
index c30bf7ac77f6473c6f0caf1debc9d0e7ac4cc635..b984ddea9856fbd6a32e0c671585477de1aa87c1 100644 (file)
--- a/arch/powerpc/dts/p3041ds.dts
+++ b/arch/powerpc/dts/p3041ds.dts
@@ -3,7 +3,7 @@
  * P3041DS Device Tree Source
  *
  * Copyright 2010 - 2015 Freescale Semiconductor Inc.
- * Copyright 2019 NXP
+ * Copyright 2019-2020 NXP
  */
 
 /include/ "p3041.dtsi"
@@ -15,4 +15,131 @@
        #size-cells = <2>;
        interrupt-parent = <&mpic>;
 
+       aliases{
+               phy_rgmii_0 = &phy_rgmii_0;
+               phy_rgmii_1 = &phy_rgmii_1;
+               phy_sgmii_1c = &phy_sgmii_1c;
+               phy_sgmii_1d = &phy_sgmii_1d;
+               phy_sgmii_1e = &phy_sgmii_1e;
+               phy_sgmii_1f = &phy_sgmii_1f;
+               phy_xgmii_1 = &phy_xgmii_1;
+               phy_xgmii_2 = &phy_xgmii_2;
+               emi1_rgmii = &hydra_mdio_rgmii;
+               emi1_sgmii = &hydra_mdio_sgmii;
+               emi2_xgmii = &hydra_mdio_xgmii;
+       };
+
+       soc: soc@ffe000000 {
+               ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+               reg = <0xf 0xfe000000 0 0x00001000>;
+               fman@400000{
+                       ethernet@e0000 {
+                               phy-handle = <&phy_sgmii_1c>;
+                               phy-connection-type = "sgmii";
+                       };
+
+                       ethernet@e2000 {
+                               phy-handle = <&phy_sgmii_1d>;
+                               phy-connection-type = "sgmii";
+                       };
+
+                       ethernet@e4000 {
+                               phy-handle = <&phy_sgmii_1e>;
+                               phy-connection-type = "sgmii";
+                       };
+
+                       ethernet@e6000 {
+                               phy-handle = <&phy_sgmii_1f>;
+                               phy-connection-type = "sgmii";
+                       };
+
+                       ethernet@e8000 {
+                               phy-handle = <&phy_rgmii_1>;
+                               phy-connection-type = "rgmii";
+                       };
+
+                       ethernet@f0000 {
+                               phy-handle = <&phy_xgmii_1>;
+                               phy-connection-type = "xgmii";
+                       };
+
+                       hydra_mdio_xgmii: mdio@f1000 {
+                               status = "disabled";
+
+                               phy_xgmii_1: ethernet-phy@4 {
+                                       compatible = "ethernet-phy-ieee802.3-c45";
+                                       reg = <0x4>;
+                               };
+
+                               phy_xgmii_2: ethernet-phy@0 {
+                                       compatible = "ethernet-phy-ieee802.3-c45";
+                                       reg = <0x0>;
+                               };
+                       };
+               };
+       };
+
+       lbc: localbus@ffe124000 {
+               reg = <0xf 0xfe124000 0 0x1000>;
+               ranges = <0 0 0xf 0xe8000000 0x08000000
+                         2 0 0xf 0xffa00000 0x00040000
+                         3 0 0xf 0xffdf0000 0x00008000>;
+
+               board-control@3,0 {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       compatible = "fsl,p3041ds-fpga", "fsl,fpga-ngpixis";
+                       reg = <3 0 0x30>;
+                       ranges = <0 3 0 0x30>;
+
+                       mdio-mux-emi1 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "mdio-mux-mmioreg", "mdio-mux";
+                               mdio-parent-bus = <&mdio0>;
+                               reg = <9 1>;
+                               mux-mask = <0x78>;
+
+                               hydra_mdio_rgmii: rgmii-mdio@8 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       reg = <8>;
+                                       status = "disabled";
+
+                                       phy_rgmii_0: ethernet-phy@0 {
+                                               reg = <0x0>;
+                                       };
+
+                                       phy_rgmii_1: ethernet-phy@1 {
+                                               reg = <0x1>;
+                                       };
+                               };
+
+                               hydra_mdio_sgmii: sgmii-mdio@28 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       reg = <0x28>;
+                                       status = "disabled";
+
+                                       phy_sgmii_1c: ethernet-phy@1c {
+                                               reg = <0x1c>;
+                                       };
+
+                                       phy_sgmii_1d: ethernet-phy@1d {
+                                               reg = <0x1d>;
+                                       };
+
+                                       phy_sgmii_1e: ethernet-phy@1e {
+                                               reg = <0x1e>;
+                                       };
+
+                                       phy_sgmii_1f: ethernet-phy@1f {
+                                               reg = <0x1f>;
+                                       };
+                               };
+                       };
+               };
+       };
 };
+
+/include/ "p3041si-post.dtsi"