}
Zone* instruction_zone() const { return instruction_zone_; }
+ // RawMachineAssembler generally produces graphs which cannot be verified.
+ bool MayHaveUnverifiableGraph() const { return outer_zone_ == nullptr; }
void DeleteGraphZone() {
// Destroy objects with destructors first.
selector.SelectInstructions();
}
- if (FLAG_trace_turbo) {
- OFStream os(stdout);
- PrintableInstructionSequence printable = {
- RegisterConfiguration::ArchDefault(), &sequence};
- os << "----- Instruction sequence before register allocation -----\n"
- << printable;
+ if (FLAG_trace_turbo && !data->MayHaveUnverifiableGraph()) {
TurboCfgFile tcf(isolate());
tcf << AsC1V("CodeGen", data->schedule(), data->source_positions(),
&sequence);
info()->AbortOptimization(kNotEnoughVirtualRegistersRegalloc);
return Handle<Code>::null();
}
- if (FLAG_trace_turbo) {
+ if (FLAG_trace_turbo && !data->MayHaveUnverifiableGraph()) {
TurboCfgFile tcf(isolate());
tcf << AsC1VAllocator("CodeGen", &allocator);
}
PhaseScope phase_scope(stats, "meet register constraints");
MeetRegisterConstraints();
}
- if (!AllocationOk()) return false;
{
PhaseScope phase_scope(stats, "resolve phis");
ResolvePhis();
PhaseScope phase_scope(stats, "build live ranges");
BuildLiveRanges();
}
+ if (FLAG_trace_turbo) {
+ OFStream os(stdout);
+ PrintableInstructionSequence printable = {config(), code()};
+ os << "----- Instruction sequence before register allocation -----\n"
+ << printable;
+ }
+ // This can be triggered in debug mode.
+ DCHECK(!ExistsUseWithoutDefinition());
{
PhaseScope phase_scope(stats, "allocate general registers");
AllocateGeneralRegisters();
live_in_sets_[i]->Union(*live);
}
}
-
-#ifdef DEBUG
- if (block_id == 0) {
- BitVector::Iterator iterator(live);
- bool found = false;
- while (!iterator.Done()) {
- found = true;
- int operand_index = iterator.Current();
- PrintF("Register allocator error: live v%d reached first block.\n",
- operand_index);
- LiveRange* range = LiveRangeFor(operand_index);
- PrintF(" (first use is at %d)\n", range->first_pos()->pos().Value());
- if (debug_name() == nullptr) {
- PrintF("\n");
- } else {
- PrintF(" (function: %s)\n", debug_name());
- }
- iterator.Advance();
- }
- DCHECK(!found);
- }
-#endif
}
for (int i = 0; i < live_ranges_.length(); ++i) {
}
+bool RegisterAllocator::ExistsUseWithoutDefinition() {
+ bool found = false;
+ BitVector::Iterator iterator(live_in_sets_[0]);
+ while (!iterator.Done()) {
+ found = true;
+ int operand_index = iterator.Current();
+ PrintF("Register allocator error: live v%d reached first block.\n",
+ operand_index);
+ LiveRange* range = LiveRangeFor(operand_index);
+ PrintF(" (first use is at %d)\n", range->first_pos()->pos().Value());
+ if (debug_name() == nullptr) {
+ PrintF("\n");
+ } else {
+ PrintF(" (function: %s)\n", debug_name());
+ }
+ iterator.Advance();
+ }
+ return found;
+}
+
+
bool RegisterAllocator::SafePointsAreInOrder() const {
int safe_point = 0;
const PointerMapDeque* pointer_maps = code()->pointer_maps();
bool IsOutputRegisterOf(Instruction* instr, int index);
bool IsOutputDoubleRegisterOf(Instruction* instr, int index);
void ProcessInstructions(const InstructionBlock* block, BitVector* live);
+ bool ExistsUseWithoutDefinition();
void MeetRegisterConstraints(const InstructionBlock* block);
void MeetConstraintsBetween(Instruction* first, Instruction* second,
int gap_index);