freedreno: update generated headers
authorRob Clark <robclark@freedesktop.org>
Sat, 21 Feb 2015 18:50:52 +0000 (13:50 -0500)
committerRob Clark <robclark@freedesktop.org>
Sat, 21 Feb 2015 22:11:02 +0000 (17:11 -0500)
Signed-off-by: Rob Clark <robclark@freedesktop.org>
src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
src/gallium/drivers/freedreno/a4xx/fd4_emit.c
src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
src/gallium/drivers/freedreno/adreno_common.xml.h
src/gallium/drivers/freedreno/adreno_pm4.xml.h

index 6ef5126..70e03db 100644 (file)
@@ -13,8 +13,8 @@ The rules-ng-ng source files this header was generated from are:
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml          (  32901 bytes, from 2014-06-02 15:21:30)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10551 bytes, from 2014-11-13 22:44:30)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  15085 bytes, from 2014-12-20 21:49:41)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  64344 bytes, from 2014-12-12 20:22:26)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  51270 bytes, from 2015-01-18 23:05:48)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  64848 bytes, from 2015-02-20 18:21:24)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  51566 bytes, from 2015-02-21 18:31:59)
 
 Copyright (C) 2013-2014 by the following authors:
 - Rob Clark <robdclark@gmail.com> (robclark)
index d268f17..275df60 100644 (file)
@@ -13,10 +13,10 @@ The rules-ng-ng source files this header was generated from are:
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml          (  32901 bytes, from 2014-06-02 15:21:30)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10551 bytes, from 2014-11-13 22:44:30)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  15085 bytes, from 2014-12-20 21:49:41)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  64344 bytes, from 2014-12-12 20:22:26)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  51270 bytes, from 2015-01-18 23:05:48)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  64848 bytes, from 2015-02-20 18:21:24)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  51566 bytes, from 2015-02-21 18:31:59)
 
-Copyright (C) 2013-2014 by the following authors:
+Copyright (C) 2013-2015 by the following authors:
 - Rob Clark <robdclark@gmail.com> (robclark)
 
 Permission is hereby granted, free of charge, to any person obtaining
@@ -130,7 +130,10 @@ enum a3xx_tex_fmt {
        TFMT_I420_Y = 24,
        TFMT_I420_U = 26,
        TFMT_I420_V = 27,
+       TFMT_ATC_RGB = 32,
+       TFMT_ATC_RGBA_EXPLICIT = 33,
        TFMT_ETC1 = 34,
+       TFMT_ATC_RGBA_INTERPOLATED = 35,
        TFMT_DXT1 = 36,
        TFMT_DXT3 = 37,
        TFMT_DXT5 = 38,
@@ -858,6 +861,12 @@ static inline uint32_t A3XX_RB_MODE_CONTROL_RENDER_MODE(enum a3xx_render_mode va
 {
        return ((val) << A3XX_RB_MODE_CONTROL_RENDER_MODE__SHIFT) & A3XX_RB_MODE_CONTROL_RENDER_MODE__MASK;
 }
+#define A3XX_RB_MODE_CONTROL_MRT__MASK                         0x00003000
+#define A3XX_RB_MODE_CONTROL_MRT__SHIFT                                12
+static inline uint32_t A3XX_RB_MODE_CONTROL_MRT(uint32_t val)
+{
+       return ((val) << A3XX_RB_MODE_CONTROL_MRT__SHIFT) & A3XX_RB_MODE_CONTROL_MRT__MASK;
+}
 #define A3XX_RB_MODE_CONTROL_MARB_CACHE_SPLIT_MODE             0x00008000
 #define A3XX_RB_MODE_CONTROL_PACKER_TIMER_ENABLE               0x00010000
 
@@ -2111,6 +2120,12 @@ static inline uint32_t A3XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)
 #define REG_A3XX_SP_FS_FLAT_SHAD_MODE_REG_1                    0x000022e9
 
 #define REG_A3XX_SP_FS_OUTPUT_REG                              0x000022ec
+#define A3XX_SP_FS_OUTPUT_REG_MRT__MASK                                0x00000003
+#define A3XX_SP_FS_OUTPUT_REG_MRT__SHIFT                       0
+static inline uint32_t A3XX_SP_FS_OUTPUT_REG_MRT(uint32_t val)
+{
+       return ((val) << A3XX_SP_FS_OUTPUT_REG_MRT__SHIFT) & A3XX_SP_FS_OUTPUT_REG_MRT__MASK;
+}
 #define A3XX_SP_FS_OUTPUT_REG_DEPTH_ENABLE                     0x00000080
 #define A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID__MASK                        0x0000ff00
 #define A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID__SHIFT               8
index 155231f..1f1a554 100644 (file)
@@ -13,8 +13,8 @@ The rules-ng-ng source files this header was generated from are:
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml          (  32901 bytes, from 2014-06-02 15:21:30)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10551 bytes, from 2014-11-13 22:44:30)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  15085 bytes, from 2014-12-20 21:49:41)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  64344 bytes, from 2014-12-12 20:22:26)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  51270 bytes, from 2015-01-18 23:05:48)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  64848 bytes, from 2015-02-20 18:21:24)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  51566 bytes, from 2015-02-21 18:31:59)
 
 Copyright (C) 2013-2015 by the following authors:
 - Rob Clark <robdclark@gmail.com> (robclark)
@@ -936,6 +936,10 @@ static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1_REG(uint32_t i0)
 
 #define REG_A4XX_CP_IB2_BUFSZ                                  0x00000209
 
+#define REG_A4XX_CP_ME_NRT_ADDR                                        0x0000020c
+
+#define REG_A4XX_CP_ME_NRT_DATA                                        0x0000020d
+
 #define REG_A4XX_CP_ME_RB_DONE_DATA                            0x00000217
 
 #define REG_A4XX_CP_QUEUE_THRESH2                              0x00000219
@@ -946,9 +950,9 @@ static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1_REG(uint32_t i0)
 
 #define REG_A4XX_CP_ROQ_DATA                                   0x0000021d
 
-#define REG_A4XX_CP_MEQ_ADDR                                   0x0000021e
+#define REG_A4XX_CP_MEQ_ADDR                                   0x0000021e
 
-#define REG_A4XX_CP_MEQ_DATA                                   0x0000021f
+#define REG_A4XX_CP_MEQ_DATA                                   0x0000021f
 
 #define REG_A4XX_CP_MERCIU_ADDR                                        0x00000220
 
@@ -1424,6 +1428,10 @@ static inline uint32_t REG_A4XX_VSC_PIPE_DATA_LENGTH_REG(uint32_t i0) { return 0
 
 #define REG_A4XX_VFD_PERFCTR_VFD_SEL_7                         0x00000e4a
 
+#define REG_A4XX_VGT_CL_INITIATOR                              0x000021d0
+
+#define REG_A4XX_VGT_EVENT_INITIATOR                           0x000021d9
+
 #define REG_A4XX_VFD_CONTROL_0                                 0x00002200
 #define A4XX_VFD_CONTROL_0_TOTALATTRTOVS__MASK                 0x000000ff
 #define A4XX_VFD_CONTROL_0_TOTALATTRTOVS__SHIFT                        0
@@ -2041,7 +2049,12 @@ static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH(uint32_t val)
 #define REG_A4XX_PC_BIN_BASE                                   0x000021c0
 
 #define REG_A4XX_PC_PRIM_VTX_CNTL                              0x000021c4
-#define A4XX_PC_PRIM_VTX_CNTL_VAROUT                           0x00000001
+#define A4XX_PC_PRIM_VTX_CNTL_VAROUT__MASK                     0x0000000f
+#define A4XX_PC_PRIM_VTX_CNTL_VAROUT__SHIFT                    0
+static inline uint32_t A4XX_PC_PRIM_VTX_CNTL_VAROUT(uint32_t val)
+{
+       return ((val) << A4XX_PC_PRIM_VTX_CNTL_VAROUT__SHIFT) & A4XX_PC_PRIM_VTX_CNTL_VAROUT__MASK;
+}
 #define A4XX_PC_PRIM_VTX_CNTL_PROVOKING_VTX_LAST               0x02000000
 #define A4XX_PC_PRIM_VTX_CNTL_PSIZE                            0x04000000
 
index 1d098f2..7359639 100644 (file)
@@ -440,7 +440,7 @@ fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
                                ->pc_prim_vtx_cntl;
 
                val |= COND(vp->writes_psize, A4XX_PC_PRIM_VTX_CNTL_PSIZE);
-               val |= COND(fp->total_in > 0, A4XX_PC_PRIM_VTX_CNTL_VAROUT);
+               val |= COND(fp->total_in > 0, A4XX_PC_PRIM_VTX_CNTL_VAROUT(1));
 
                OUT_PKT0(ring, REG_A4XX_PC_PRIM_VTX_CNTL, 2);
                OUT_RING(ring, val);
index c52fa99..7f852e0 100644 (file)
@@ -375,7 +375,7 @@ fd4_emit_tile_mem2gmem(struct fd_context *ctx, struct fd_tile *tile)
 
        OUT_PKT0(ring, REG_A4XX_PC_PRIM_VTX_CNTL, 1);
        OUT_RING(ring, A4XX_PC_PRIM_VTX_CNTL_PROVOKING_VTX_LAST |
-                       A4XX_PC_PRIM_VTX_CNTL_VAROUT);
+                       A4XX_PC_PRIM_VTX_CNTL_VAROUT(1));
 
        OUT_PKT0(ring, REG_A4XX_VFD_INDEX_OFFSET, 2);
        OUT_RING(ring, 0);            /* VFD_INDEX_OFFSET */
index 065f127..9510d8d 100644 (file)
@@ -13,8 +13,8 @@ The rules-ng-ng source files this header was generated from are:
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml          (  32901 bytes, from 2014-06-02 15:21:30)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10551 bytes, from 2014-11-13 22:44:30)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  15085 bytes, from 2014-12-20 21:49:41)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  64344 bytes, from 2014-12-12 20:22:26)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  51270 bytes, from 2015-01-18 23:05:48)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  64848 bytes, from 2015-02-20 18:21:24)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  51566 bytes, from 2015-02-21 18:31:59)
 
 Copyright (C) 2013-2014 by the following authors:
 - Rob Clark <robdclark@gmail.com> (robclark)
index aacc024..f1c22b8 100644 (file)
@@ -13,8 +13,8 @@ The rules-ng-ng source files this header was generated from are:
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml          (  32901 bytes, from 2014-06-02 15:21:30)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10551 bytes, from 2014-11-13 22:44:30)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  15085 bytes, from 2014-12-20 21:49:41)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  64344 bytes, from 2014-12-12 20:22:26)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  51270 bytes, from 2015-01-18 23:05:48)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  64848 bytes, from 2015-02-20 18:21:24)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  51566 bytes, from 2015-02-21 18:31:59)
 
 Copyright (C) 2013-2014 by the following authors:
 - Rob Clark <robdclark@gmail.com> (robclark)