i386.md (rounding_insn): New int attribute.
authorUros Bizjak <uros@gcc.gnu.org>
Wed, 20 Jun 2012 10:25:17 +0000 (12:25 +0200)
committerUros Bizjak <uros@gcc.gnu.org>
Wed, 20 Jun 2012 10:25:17 +0000 (12:25 +0200)
2012-06-20  Uros Bizjak  <ubizjak@gmail.com>

* config/i386/i386.md (rounding_insn): New int attribute.
(<rounding_insn>xf2): Macroize insn from
{floor,ceil,btrunc}xf2 using FRNDINT_ROUNDING int iterator.
(l<rounding_insn>xf<mode>2): Rename from l<rounding>xf<mode>2.

2012-06-20  Uros Bizjak  <ubizjak@gmail.com>

* config/i386/i386.md (IEEE_MAXMIN): New int iterator.
(ieee_maxmin): New int attribute.
(*ieee_s<ieee_maxmin><mode>3): Macroize insn from
*ieee_s{max,min}<mode>3 using IEEE_MAXMIN mode iterator.

From-SVN: r188824

gcc/ChangeLog
gcc/config/i386/i386.md

index 623635d..d1fca42 100644 (file)
@@ -1,3 +1,17 @@
+2012-06-20  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.md (rounding_insn): New int attribute.
+       (<rounding_insn>xf2): Macroize insn from
+       {floor,ceil,btrunc}xf2 using FRNDINT_ROUNDING int iterator.
+       (l<rounding_insn>xf<mode>2): Rename from l<rounding>xf<mode>2.
+
+2012-06-20  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.md (IEEE_MAXMIN): New int iterator.
+       (ieee_maxmin): New int attribute.
+       (*ieee_s<ieee_maxmin><mode>3): Macroize insn from
+       *ieee_s{max,min}<mode>3 using IEEE_MAXMIN mode iterator.
+
 2012-06-20  Steven Bosscher  <steven@gcc.gnu.org>
 
        * config/arm/arm.h (EMIT_EABI_ATTRIBUTE): Remove.
        it is used.
 
 2012-06-19  Tom de Vries  <vries@codesourcery.com>
-            Maxim Kuvyrkov  <maxim@codesourcery.com>
+           Maxim Kuvyrkov  <maxim@codesourcery.com>
 
        * config/mips/constraints.md (ZR): New constraint.
        * config/mips/predicates.md (mem_noofs_operand): New predicate.
        * config/mips/mips.c (mips_print_operand): Handle new print modifier.
-        * config/mips/mips.h (TARGET_XLP): Define.
+       * config/mips/mips.h (TARGET_XLP): Define.
        (TARGET_SYNC_AFTER_SC): Update.
        (ISA_HAS_SWAP, ISA_HAS_LDADD): Define.
        * config/mips/sync.md (atomic_exchange, atomic_fetch_add): Use
index 1dce880..af80786 100644 (file)
        [UNSPEC_FIST_FLOOR
         UNSPEC_FIST_CEIL])
 
+;; Base name for define_insn
+(define_int_attr rounding_insn
+       [(UNSPEC_FRNDINT_FLOOR "floor")
+        (UNSPEC_FRNDINT_CEIL "ceil")
+        (UNSPEC_FRNDINT_TRUNC "btrunc")
+        (UNSPEC_FIST_FLOOR "floor")
+        (UNSPEC_FIST_CEIL "ceil")])
+
 (define_int_attr rounding
        [(UNSPEC_FRNDINT_FLOOR "floor")
         (UNSPEC_FRNDINT_CEIL "ceil")
    (set_attr "i387_cw" "<rounding>")
    (set_attr "mode" "XF")])
 
-(define_expand "floorxf2"
-  [(use (match_operand:XF 0 "register_operand"))
-   (use (match_operand:XF 1 "register_operand"))]
+(define_expand "<rounding_insn>xf2"
+  [(parallel [(set (match_operand:XF 0 "register_operand")
+                  (unspec:XF [(match_operand:XF 1 "register_operand")]
+                             FRNDINT_ROUNDING))
+             (clobber (reg:CC FLAGS_REG))])]
   "TARGET_USE_FANCY_MATH_387
-   && flag_unsafe_math_optimizations"
-{
-  if (optimize_insn_for_size_p ())
-    FAIL;
-  emit_insn (gen_frndintxf2_floor (operands[0], operands[1]));
-  DONE;
-})
+   && flag_unsafe_math_optimizations
+   && !optimize_insn_for_size_p ()")
 
 (define_expand "floor<mode>2"
   [(use (match_operand:MODEF 0 "register_operand"))
   DONE;
 })
 
-(define_expand "ceilxf2"
-  [(use (match_operand:XF 0 "register_operand"))
-   (use (match_operand:XF 1 "register_operand"))]
-  "TARGET_USE_FANCY_MATH_387
-   && flag_unsafe_math_optimizations"
-{
-  if (optimize_insn_for_size_p ())
-    FAIL;
-  emit_insn (gen_frndintxf2_ceil (operands[0], operands[1]));
-  DONE;
-})
-
 (define_expand "ceil<mode>2"
   [(use (match_operand:MODEF 0 "register_operand"))
    (use (match_operand:MODEF 1 "register_operand"))]
   DONE;
 })
 
-(define_expand "btruncxf2"
-  [(use (match_operand:XF 0 "register_operand"))
-   (use (match_operand:XF 1 "register_operand"))]
-  "TARGET_USE_FANCY_MATH_387
-   && flag_unsafe_math_optimizations"
-{
-  if (optimize_insn_for_size_p ())
-    FAIL;
-  emit_insn (gen_frndintxf2_trunc (operands[0], operands[1]));
-  DONE;
-})
-
 (define_expand "btrunc<mode>2"
   [(use (match_operand:MODEF 0 "register_operand"))
    (use (match_operand:MODEF 1 "register_operand"))]
    (set_attr "mode" "XF")])
 
 (define_expand "nearbyintxf2"
-  [(use (match_operand:XF 0 "register_operand"))
-   (use (match_operand:XF 1 "register_operand"))]
+  [(parallel [(set (match_operand:XF 0 "register_operand")
+                  (unspec:XF [(match_operand:XF 1 "register_operand")]
+                             UNSPEC_FRNDINT_MASK_PM))
+             (clobber (reg:CC FLAGS_REG))])]
   "TARGET_USE_FANCY_MATH_387
-   && flag_unsafe_math_optimizations"
-{
-  emit_insn (gen_frndintxf2_mask_pm (operands[0], operands[1]));
-  DONE;
-})
+   && flag_unsafe_math_optimizations")
 
 (define_expand "nearbyint<mode>2"
   [(use (match_operand:MODEF 0 "register_operand"))
              (use (match_dup 2))
              (use (match_dup 3))])])
 
-(define_expand "l<rounding>xf<mode>2"
+(define_expand "l<rounding_insn>xf<mode>2"
   [(parallel [(set (match_operand:SWI248x 0 "nonimmediate_operand")
                   (unspec:SWI248x [(match_operand:XF 1 "register_operand")]
                                   FIST_ROUNDING))
 ;; Their operands are not commutative, and thus they may be used in the
 ;; presence of -0.0 and NaN.
 
-(define_insn "*ieee_smin<mode>3"
-  [(set (match_operand:MODEF 0 "register_operand" "=x,x")
-       (unspec:MODEF
-         [(match_operand:MODEF 1 "register_operand" "0,x")
-          (match_operand:MODEF 2 "nonimmediate_operand" "xm,xm")]
-        UNSPEC_IEEE_MIN))]
-  "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
-  "@
-   min<ssemodesuffix>\t{%2, %0|%0, %2}
-   vmin<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
-  [(set_attr "isa" "noavx,avx")
-   (set_attr "prefix" "orig,vex")
-   (set_attr "type" "sseadd")
-   (set_attr "mode" "<MODE>")])
+(define_int_iterator IEEE_MAXMIN
+       [UNSPEC_IEEE_MAX
+        UNSPEC_IEEE_MIN])
+
+(define_int_attr ieee_maxmin
+       [(UNSPEC_IEEE_MAX "max")
+        (UNSPEC_IEEE_MIN "min")])
 
-(define_insn "*ieee_smax<mode>3"
+(define_insn "*ieee_s<ieee_maxmin><mode>3"
   [(set (match_operand:MODEF 0 "register_operand" "=x,x")
        (unspec:MODEF
          [(match_operand:MODEF 1 "register_operand" "0,x")
           (match_operand:MODEF 2 "nonimmediate_operand" "xm,xm")]
-        UNSPEC_IEEE_MAX))]
+         IEEE_MAXMIN))]
   "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
   "@
-   max<ssemodesuffix>\t{%2, %0|%0, %2}
-   vmax<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
+   <ieee_maxmin><ssemodesuffix>\t{%2, %0|%0, %2}
+   v<ieee_maxmin><ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "isa" "noavx,avx")
    (set_attr "prefix" "orig,vex")
    (set_attr "type" "sseadd")