RISC-V: Allow marking IPIs as suitable for remote FENCEs
authorAnup Patel <apatel@ventanamicro.com>
Tue, 28 Mar 2023 03:52:20 +0000 (09:22 +0530)
committerMarc Zyngier <maz@kernel.org>
Sat, 8 Apr 2023 10:26:24 +0000 (11:26 +0100)
To do remote FENCEs (i.e. remote TLB flushes) using IPI calls on the
RISC-V kernel, we need hardware mechanism to directly inject IPI from
the supervisor mode (i.e. RISC-V kernel) instead of using SBI calls.

The upcoming AIA IMSIC devices allow direct IPI injection from the
supervisor mode (i.e. RISC-V kernel). To support this, we extend the
riscv_ipi_set_virq_range() function so that IPI provider (i.e. irqchip
drivers can mark IPIs as suitable for remote FENCEs.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230328035223.1480939-5-apatel@ventanamicro.com
arch/riscv/include/asm/smp.h
arch/riscv/kernel/sbi-ipi.c
arch/riscv/kernel/smp.c
drivers/clocksource/timer-clint.c

index 4fe7a88..c4b7701 100644 (file)
@@ -16,6 +16,9 @@ struct seq_file;
 extern unsigned long boot_cpu_hartid;
 
 #ifdef CONFIG_SMP
+
+#include <linux/jump_label.h>
+
 /*
  * Mapping between linux logical cpu index and hartid.
  */
@@ -46,7 +49,12 @@ void riscv_ipi_disable(void);
 bool riscv_ipi_have_virq_range(void);
 
 /* Set the IPI interrupt numbers for arch (called by irqchip drivers) */
-void riscv_ipi_set_virq_range(int virq, int nr);
+void riscv_ipi_set_virq_range(int virq, int nr, bool use_for_rfence);
+
+/* Check if we can use IPIs for remote FENCEs */
+DECLARE_STATIC_KEY_FALSE(riscv_ipi_for_rfence);
+#define riscv_use_ipi_for_rfence() \
+       static_branch_unlikely(&riscv_ipi_for_rfence)
 
 /* Check other CPUs stop or not */
 bool smp_crash_stop_failed(void);
@@ -96,10 +104,16 @@ static inline bool riscv_ipi_have_virq_range(void)
        return false;
 }
 
-static inline void riscv_ipi_set_virq_range(int virq, int nr)
+static inline void riscv_ipi_set_virq_range(int virq, int nr,
+                                           bool use_for_rfence)
 {
 }
 
+static inline bool riscv_use_ipi_for_rfence(void)
+{
+       return false;
+}
+
 #endif /* CONFIG_SMP */
 
 #if defined(CONFIG_HOTPLUG_CPU) && (CONFIG_SMP)
index 41981ab..a455969 100644 (file)
@@ -72,6 +72,6 @@ void __init sbi_ipi_init(void)
                          "irqchip/sbi-ipi:starting",
                          sbi_ipi_starting_cpu, NULL);
 
-       riscv_ipi_set_virq_range(virq, BITS_PER_BYTE);
+       riscv_ipi_set_virq_range(virq, BITS_PER_BYTE, false);
        pr_info("providing IPIs using SBI IPI extension\n");
 }
index 47e7ecf..5f985a1 100644 (file)
@@ -177,7 +177,10 @@ bool riscv_ipi_have_virq_range(void)
        return (ipi_virq_base) ? true : false;
 }
 
-void riscv_ipi_set_virq_range(int virq, int nr)
+DEFINE_STATIC_KEY_FALSE(riscv_ipi_for_rfence);
+EXPORT_SYMBOL_GPL(riscv_ipi_for_rfence);
+
+void riscv_ipi_set_virq_range(int virq, int nr, bool use_for_rfence)
 {
        int i, err;
 
@@ -200,6 +203,12 @@ void riscv_ipi_set_virq_range(int virq, int nr)
 
        /* Enabled IPIs for boot CPU immediately */
        riscv_ipi_enable();
+
+       /* Update RFENCE static key */
+       if (use_for_rfence)
+               static_branch_enable(&riscv_ipi_for_rfence);
+       else
+               static_branch_disable(&riscv_ipi_for_rfence);
 }
 
 static const char * const ipi_names[] = {
index 7ccc16d..9a55e73 100644 (file)
@@ -251,7 +251,7 @@ static int __init clint_timer_init_dt(struct device_node *np)
        }
 
        irq_set_chained_handler(clint_ipi_irq, clint_ipi_interrupt);
-       riscv_ipi_set_virq_range(rc, BITS_PER_BYTE);
+       riscv_ipi_set_virq_range(rc, BITS_PER_BYTE, true);
        clint_clear_ipi();
 #endif