Merge remote branch 'origin/modesetting-101' into modesetting-gem

diff --combined linux-core/drm_crtc_helper.c
index 7e5d8fc,ec76aa9..6f16dad
--- 1/linux-core/drm_crtc_helper.c
--- 2/linux-core/drm_crtc_helper.c
+++ b/linux-core/drm_crtc_helper.c
@@@ -95,7 -95,7 +95,7 @@@ void drm_helper_probe_single_connector_
        }
        
        
 -      drm_mode_prune_invalid(dev, &connector->modes, TRUE);
 +      drm_mode_prune_invalid(dev, &connector->modes, true);
        
        if (list_empty(&connector->modes)) {
                struct drm_display_mode *stdmode;
@@@ -566,7 -566,8 +566,8 @@@ int drm_crtc_helper_set_config(struct d
                ret = -EINVAL;
                goto fail_no_encoder;
        }
-       
+ 
+       count = 0;
        list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
                if (!connector->encoder)
                        continue;

diff --combined linux-core/drm_drv.c
index 24a6df2,4e7c531..9113fa5
--- 1/linux-core/drm_drv.c
--- 2/linux-core/drm_drv.c
+++ b/linux-core/drm_drv.c
@@@ -175,10 -175,6 +175,10 @@@ static struct drm_ioctl_desc drm_ioctls
        DRM_IOCTL_DEF(DRM_IOCTL_BO_VERSION, drm_bo_version_ioctl, 0),
  
        DRM_IOCTL_DEF(DRM_IOCTL_MM_INFO, drm_mm_info_ioctl, 0),
 +
 +      DRM_IOCTL_DEF(DRM_IOCTL_GEM_CLOSE, drm_gem_close_ioctl, 0),
 +      DRM_IOCTL_DEF(DRM_IOCTL_GEM_FLINK, drm_gem_flink_ioctl, DRM_AUTH),
 +      DRM_IOCTL_DEF(DRM_IOCTL_GEM_OPEN, drm_gem_open_ioctl, DRM_AUTH),
  };
  
  #define DRM_CORE_IOCTL_COUNT  ARRAY_SIZE( drm_ioctls )
@@@ -246,7 -242,10 +246,10 @@@ int drm_lastclose(struct drm_device * d
                dev->agp->acquired = 0;
                dev->agp->enabled = 0;
        }
-       if (drm_core_check_feature(dev, DRIVER_SG) && dev->sg) {
+ 
+       /* You're supposed to have a real memory manager for modesetting, but this'll suffice as a temporary workaround. */
+       /* This assumes sgdma is inited at load time. */
+       if (drm_core_check_feature(dev, DRIVER_SG) && !drm_core_check_feature(dev, DRIVER_MODESET) && dev->sg) {
                drm_sg_cleanup(dev->sg);
                dev->sg = NULL;
        }
@@@ -425,13 -424,12 +428,13 @@@ static void drm_cleanup(struct drm_devi
  
        drm_ctxbitmap_cleanup(dev);
        drm_ht_remove(&dev->map_hash);
 -      drm_mm_takedown(&dev->offset_manager);
 +      drm_memrange_takedown(&dev->offset_manager);
        drm_ht_remove(&dev->object_hash);
  
 -      drm_put_minor(&dev->primary);
 +      drm_put_minor(dev, &dev->primary);
        if (drm_core_check_feature(dev, DRIVER_MODESET))
 -              drm_put_minor(&dev->control);
 +              drm_put_minor(dev, &dev->control);
 +
        if (drm_put_dev(dev))
                DRM_ERROR("Cannot unload module\n");
  }

diff --combined linux-core/intel_crt.c
index 2ed1cb7,8e1b833..2505d98
--- 1/linux-core/intel_crt.c
--- 2/linux-core/intel_crt.c
+++ b/linux-core/intel_crt.c
@@@ -136,8 -136,8 +136,8 @@@ static void intel_crt_mode_set(struct d
   *
   * Not for i915G/i915GM
   *
 - * \return TRUE if CRT is connected.
 - * \return FALSE if CRT is disconnected.
 + * \return true if CRT is connected.
 + * \return false if CRT is disconnected.
   */
  static bool intel_crt_detect_hotplug(struct drm_connector *connector)
  {
@@@ -210,7 -210,7 +210,7 @@@ static int intel_crt_get_modes(struct d
        return intel_ddc_get_modes(intel_output);
  }
  
- static bool intel_crt_set_property(struct drm_connector *connector,
+ static int intel_crt_set_property(struct drm_connector *connector,
                                  struct drm_property *property,
                                  uint64_t value)
  {
@@@ -219,7 -219,7 +219,7 @@@
        if (property == dev->mode_config.dpms_property && connector->encoder)
                intel_crt_dpms(connector->encoder, (uint32_t)(value & 0xf));
  
-       return true;
+       return 0;
  }
  
  /*

diff --combined linux-core/intel_tv.c
index b89ccec,29cfc03..3efa9d2
--- 1/linux-core/intel_tv.c
--- 2/linux-core/intel_tv.c
+++ b/linux-core/intel_tv.c
@@@ -422,18 -422,18 +422,18 @@@ const static struct tv_mode tv_modes[] 
                .hsync_end      = 64,               .hblank_end         = 124,
                .hblank_start   = 836,              .htotal             = 857,
  
 -              .progressive    = FALSE,            .trilevel_sync = FALSE,
 +              .progressive    = false,            .trilevel_sync = false,
  
                .vsync_start_f1 = 6,                .vsync_start_f2     = 7,
                .vsync_len      = 6,
  
 -              .veq_ena        = TRUE,             .veq_start_f1       = 0,
 +              .veq_ena        = true,             .veq_start_f1       = 0,
                .veq_start_f2   = 1,                .veq_len            = 18,
  
                .vi_end_f1      = 20,               .vi_end_f2          = 21,
                .nbr_end        = 240,
  
 -              .burst_ena      = TRUE,
 +              .burst_ena      = true,
                .hburst_start   = 72,               .hburst_len         = 34,
                .vburst_start_f1 = 9,               .vburst_end_f1      = 240,
                .vburst_start_f2 = 10,              .vburst_end_f2      = 240,
@@@ -445,7 -445,7 +445,7 @@@
                .dda2_inc       =   7624,           .dda2_size          =  20013,
                .dda3_inc       =      0,           .dda3_size          =      0,
                .sc_reset       = TV_SC_RESET_EVERY_4,
 -              .pal_burst      = FALSE,
 +              .pal_burst      = false,
  
                .composite_levels = &ntsc_m_levels_composite,
                .composite_color = &ntsc_m_csc_composite,
@@@ -464,12 -464,12 +464,12 @@@
                .hsync_end      = 64,               .hblank_end         = 124,
                .hblank_start   = 836,              .htotal             = 857,
  
 -              .progressive    = FALSE,            .trilevel_sync = FALSE,
 +              .progressive    = false,            .trilevel_sync = false,
  
                .vsync_start_f1 = 6,                .vsync_start_f2     = 7,
                .vsync_len      = 6,
  
 -              .veq_ena        = TRUE,             .veq_start_f1       = 0,
 +              .veq_ena        = true,             .veq_start_f1       = 0,
                .veq_start_f2   = 1,                .veq_len            = 18,
  
                .vi_end_f1      = 20,               .vi_end_f2          = 21,
@@@ -487,7 -487,7 +487,7 @@@
                .dda2_inc       =  18557,       .dda2_size      =  20625,
                .dda3_inc       =      0,       .dda3_size      =      0,
                .sc_reset   = TV_SC_RESET_EVERY_8,
 -              .pal_burst  = TRUE,
 +              .pal_burst  = true,
  
                .composite_levels = &ntsc_m_levels_composite,
                .composite_color = &ntsc_m_csc_composite,
@@@ -507,18 -507,18 +507,18 @@@
                .hsync_end      = 64,               .hblank_end         = 124,
                .hblank_start = 836,        .htotal             = 857,
  
 -              .progressive    = FALSE,    .trilevel_sync = FALSE,
 +              .progressive    = false,    .trilevel_sync = false,
  
                .vsync_start_f1 = 6,        .vsync_start_f2     = 7,
                .vsync_len      = 6,
  
 -              .veq_ena        = TRUE,             .veq_start_f1       = 0,
 +              .veq_ena        = true,             .veq_start_f1       = 0,
                .veq_start_f2 = 1,          .veq_len            = 18,
  
                .vi_end_f1      = 20,               .vi_end_f2          = 21,
                .nbr_end        = 240,
  
 -              .burst_ena      = TRUE,
 +              .burst_ena      = true,
                .hburst_start   = 72,               .hburst_len         = 34,
                .vburst_start_f1 = 9,               .vburst_end_f1      = 240,
                .vburst_start_f2 = 10,              .vburst_end_f2      = 240,
@@@ -530,7 -530,7 +530,7 @@@
                .dda2_inc       =   7624,           .dda2_size          =  20013,
                .dda3_inc       =      0,           .dda3_size          =      0,
                .sc_reset       = TV_SC_RESET_EVERY_4,
 -              .pal_burst      = FALSE,
 +              .pal_burst      = false,
  
                .composite_levels = &ntsc_j_levels_composite,
                .composite_color = &ntsc_j_csc_composite,
@@@ -550,18 -550,18 +550,18 @@@
                .hsync_end      = 64,             .hblank_end           = 124,
                .hblank_start = 836,      .htotal               = 857,
  
 -              .progressive    = FALSE,            .trilevel_sync = FALSE,
 +              .progressive    = false,            .trilevel_sync = false,
  
                .vsync_start_f1 = 6,                .vsync_start_f2     = 7,
                .vsync_len      = 6,
  
 -              .veq_ena        = TRUE,             .veq_start_f1       = 0,
 +              .veq_ena        = true,             .veq_start_f1       = 0,
                .veq_start_f2   = 1,                .veq_len            = 18,
  
                .vi_end_f1      = 20,               .vi_end_f2          = 21,
                .nbr_end        = 240,
  
 -              .burst_ena      = TRUE,
 +              .burst_ena      = true,
                .hburst_start   = 72,               .hburst_len         = 34,
                .vburst_start_f1 = 9,               .vburst_end_f1      = 240,
                .vburst_start_f2 = 10,              .vburst_end_f2      = 240,
@@@ -573,7 -573,7 +573,7 @@@
                .dda2_inc       =    7624,          .dda2_size          =  20013,
                .dda3_inc       =      0,           .dda3_size          =      0,
                .sc_reset       = TV_SC_RESET_EVERY_4,
 -              .pal_burst  = FALSE,
 +              .pal_burst  = false,
  
                .composite_levels = &pal_m_levels_composite,
                .composite_color = &pal_m_csc_composite,
@@@ -593,19 -593,19 +593,19 @@@
                .hsync_end      = 64,               .hblank_end         = 128,
                .hblank_start = 844,        .htotal             = 863,
  
 -              .progressive  = FALSE,    .trilevel_sync = FALSE,
 +              .progressive  = false,    .trilevel_sync = false,
  
  
                .vsync_start_f1 = 6,       .vsync_start_f2      = 7,
                .vsync_len      = 6,
  
 -              .veq_ena        = TRUE,             .veq_start_f1       = 0,
 +              .veq_ena        = true,             .veq_start_f1       = 0,
                .veq_start_f2   = 1,                .veq_len            = 18,
  
                .vi_end_f1      = 24,               .vi_end_f2          = 25,
                .nbr_end        = 286,
  
 -              .burst_ena      = TRUE,
 +              .burst_ena      = true,
                .hburst_start = 73,                 .hburst_len         = 34,
                .vburst_start_f1 = 8,       .vburst_end_f1      = 285,
                .vburst_start_f2 = 8,       .vburst_end_f2      = 286,
@@@ -618,7 -618,7 +618,7 @@@
                .dda2_inc       =  18557,       .dda2_size      =  20625,
                .dda3_inc       =      0,       .dda3_size      =      0,
                .sc_reset   = TV_SC_RESET_EVERY_8,
 -              .pal_burst  = TRUE,
 +              .pal_burst  = true,
  
                .composite_levels = &pal_n_levels_composite,
                .composite_color = &pal_n_csc_composite,
@@@ -638,18 -638,18 +638,18 @@@
                .hsync_end      = 64,               .hblank_end         = 128,
                .hblank_start   = 844,      .htotal             = 863,
  
 -              .progressive    = FALSE,    .trilevel_sync = FALSE,
 +              .progressive    = false,    .trilevel_sync = false,
  
                .vsync_start_f1 = 5,        .vsync_start_f2     = 6,
                .vsync_len      = 5,
  
 -              .veq_ena        = TRUE,             .veq_start_f1       = 0,
 +              .veq_ena        = true,             .veq_start_f1       = 0,
                .veq_start_f2   = 1,        .veq_len            = 15,
  
                .vi_end_f1      = 24,               .vi_end_f2          = 25,
                .nbr_end        = 286,
  
 -              .burst_ena      = TRUE,
 +              .burst_ena      = true,
                .hburst_start   = 73,               .hburst_len         = 32,
                .vburst_start_f1 = 8,               .vburst_end_f1      = 285,
                .vburst_start_f2 = 8,               .vburst_end_f2      = 286,
@@@ -661,7 -661,7 +661,7 @@@
                .dda2_inc       =  18557,       .dda2_size      =  20625,
                .dda3_inc       =      0,       .dda3_size      =      0,
                .sc_reset   = TV_SC_RESET_EVERY_8,
 -              .pal_burst  = TRUE,
 +              .pal_burst  = true,
  
                .composite_levels = &pal_levels_composite,
                .composite_color = &pal_csc_composite,
@@@ -680,17 -680,17 +680,17 @@@
                .hsync_end      = 64,               .hblank_end         = 122,
                .hblank_start   = 842,              .htotal             = 857,
  
 -              .progressive    = TRUE,.trilevel_sync = FALSE,
 +              .progressive    = true,.trilevel_sync = false,
  
                .vsync_start_f1 = 12,               .vsync_start_f2     = 12,
                .vsync_len      = 12,
  
 -              .veq_ena        = FALSE,
 +              .veq_ena        = false,
  
                .vi_end_f1      = 44,               .vi_end_f2          = 44,
                .nbr_end        = 496,
  
 -              .burst_ena      = FALSE,
 +              .burst_ena      = false,
  
                .filter_table = filter_table,
        },
@@@ -704,17 -704,17 +704,17 @@@
                .hsync_end      = 64,               .hblank_end         = 122,
                .hblank_start   = 842,              .htotal             = 856,
  
 -              .progressive    = TRUE,.trilevel_sync = FALSE,
 +              .progressive    = true,.trilevel_sync = false,
  
                .vsync_start_f1 = 12,               .vsync_start_f2     = 12,
                .vsync_len      = 12,
  
 -              .veq_ena        = FALSE,
 +              .veq_ena        = false,
  
                .vi_end_f1      = 44,               .vi_end_f2          = 44,
                .nbr_end        = 496,
  
 -              .burst_ena      = FALSE,
 +              .burst_ena      = false,
  
                .filter_table = filter_table,
        },
@@@ -728,17 -728,17 +728,17 @@@
                .hsync_end      = 64,               .hblank_end         = 139,
                .hblank_start   = 859,              .htotal             = 863,
  
 -              .progressive    = TRUE,         .trilevel_sync = FALSE,
 +              .progressive    = true,         .trilevel_sync = false,
  
                .vsync_start_f1 = 10,               .vsync_start_f2     = 10,
                .vsync_len      = 10,
  
 -              .veq_ena        = FALSE,
 +              .veq_ena        = false,
  
                .vi_end_f1      = 48,               .vi_end_f2          = 48,
                .nbr_end        = 575,
  
 -              .burst_ena      = FALSE,
 +              .burst_ena      = false,
  
                .filter_table = filter_table,
        },
@@@ -752,17 -752,17 +752,17 @@@
                .hsync_end      = 80,               .hblank_end         = 300,
                .hblank_start   = 1580,             .htotal             = 1649,
  
 -              .progressive    = TRUE,             .trilevel_sync = TRUE,
 +              .progressive    = true,             .trilevel_sync = true,
  
                .vsync_start_f1 = 10,               .vsync_start_f2     = 10,
                .vsync_len      = 10,
  
 -              .veq_ena        = FALSE,
 +              .veq_ena        = false,
  
                .vi_end_f1      = 29,               .vi_end_f2          = 29,
                .nbr_end        = 719,
  
 -              .burst_ena      = FALSE,
 +              .burst_ena      = false,
  
                .filter_table = filter_table,
        },
@@@ -776,17 -776,17 +776,17 @@@
                .hsync_end      = 80,               .hblank_end         = 300,
                .hblank_start   = 1580,             .htotal             = 1651,
  
 -              .progressive    = TRUE,             .trilevel_sync = TRUE,
 +              .progressive    = true,             .trilevel_sync = true,
  
                .vsync_start_f1 = 10,               .vsync_start_f2     = 10,
                .vsync_len      = 10,
  
 -              .veq_ena        = FALSE,
 +              .veq_ena        = false,
  
                .vi_end_f1      = 29,               .vi_end_f2          = 29,
                .nbr_end        = 719,
  
 -              .burst_ena      = FALSE,
 +              .burst_ena      = false,
  
                .filter_table = filter_table,
        },
@@@ -800,17 -800,17 +800,17 @@@
                .hsync_end      = 80,               .hblank_end         = 300,
                .hblank_start   = 1580,             .htotal             = 1979,
  
 -              .progressive    = TRUE,                 .trilevel_sync = TRUE,
 +              .progressive    = true,                 .trilevel_sync = true,
  
                .vsync_start_f1 = 10,               .vsync_start_f2     = 10,
                .vsync_len      = 10,
  
 -              .veq_ena        = FALSE,
 +              .veq_ena        = false,
  
                .vi_end_f1      = 29,               .vi_end_f2          = 29,
                .nbr_end        = 719,
  
 -              .burst_ena      = FALSE,
 +              .burst_ena      = false,
  
                .filter_table = filter_table,
                .max_srcw = 800
@@@ -825,19 -825,19 +825,19 @@@
                .hsync_end      = 88,               .hblank_end         = 235,
                .hblank_start   = 2155,             .htotal             = 2639,
  
 -              .progressive    = FALSE,            .trilevel_sync = TRUE,
 +              .progressive    = false,            .trilevel_sync = true,
  
                .vsync_start_f1 = 4,              .vsync_start_f2     = 5,
                .vsync_len      = 10,
  
 -              .veq_ena        = TRUE,             .veq_start_f1       = 4,
 +              .veq_ena        = true,             .veq_start_f1       = 4,
                .veq_start_f2   = 4,        .veq_len            = 10,
  
  
                .vi_end_f1      = 21,           .vi_end_f2          = 22,
                .nbr_end        = 539,
  
 -              .burst_ena      = FALSE,
 +              .burst_ena      = false,
  
                .filter_table = filter_table,
        },
@@@ -851,19 -851,19 +851,19 @@@
                .hsync_end      = 88,               .hblank_end         = 235,
                .hblank_start   = 2155,             .htotal             = 2199,
  
 -              .progressive    = FALSE,            .trilevel_sync = TRUE,
 +              .progressive    = false,            .trilevel_sync = true,
  
                .vsync_start_f1 = 4,               .vsync_start_f2     = 5,
                .vsync_len      = 10,
  
 -              .veq_ena        = TRUE,             .veq_start_f1       = 4,
 +              .veq_ena        = true,             .veq_start_f1       = 4,
                .veq_start_f2   = 4,                .veq_len            = 10,
  
  
                .vi_end_f1      = 21,               .vi_end_f2          = 22,
                .nbr_end        = 539,
  
 -              .burst_ena      = FALSE,
 +              .burst_ena      = false,
  
                .filter_table = filter_table,
        },
@@@ -877,19 -877,19 +877,19 @@@
                .hsync_end      = 88,               .hblank_end         = 235,
                .hblank_start   = 2155,             .htotal             = 2200,
  
 -              .progressive    = FALSE,            .trilevel_sync = TRUE,
 +              .progressive    = false,            .trilevel_sync = true,
  
                .vsync_start_f1 = 4,            .vsync_start_f2    = 5,
                .vsync_len      = 10,
  
 -              .veq_ena        = TRUE,             .veq_start_f1       = 4,
 +              .veq_ena        = true,             .veq_start_f1       = 4,
                .veq_start_f2 = 4,                  .veq_len = 10,
  
  
                .vi_end_f1      = 21,           .vi_end_f2              = 22,
                .nbr_end        = 539,
  
 -              .burst_ena      = FALSE,
 +              .burst_ena      = false,
  
                .filter_table = filter_table,
        },
@@@ -1098,17 -1098,17 +1098,17 @@@ intel_tv_mode_fixup(struct drm_encoder 
        struct drm_encoder *other_encoder;
  
        if (!tv_mode)
 -              return FALSE;
 +              return false;
      
        /* FIXME: lock encoder list */
        list_for_each_entry(other_encoder, &drm_config->encoder_list, head) {
                if (other_encoder != encoder &&
                    other_encoder->crtc == encoder->crtc)
 -                      return FALSE;
 +                      return false;
        }
  
        adjusted_mode->clock = tv_mode->clock;
 -      return TRUE;
 +      return true;
  }
  
  static void
@@@ -1152,7 -1152,7 +1152,7 @@@ intel_tv_mode_set(struct drm_encoder *e
                        color_conversion = &sdtv_csc_yprpb;
                else
                        color_conversion = &hdtv_csc_yprpb;
 -              burst_ena = FALSE;
 +              burst_ena = false;
                break;
        case DRM_MODE_CONNECTOR_SVIDEO:
                tv_ctl |= TV_ENC_OUTPUT_SVIDEO;
@@@ -1352,8 -1352,8 +1352,8 @@@ static const struct drm_display_mode re
   *
   * Requires that the current pipe's DPLL is active.
  
 - * \return TRUE if TV is connected.
 - * \return FALSE if TV is disconnected.
 + * \return true if TV is connected.
 + * \return false if TV is disconnected.
   */
  static int
  intel_tv_detect_type (struct drm_crtc *crtc, struct intel_output *intel_output)
@@@ -1560,7 -1560,7 +1560,7 @@@ intel_tv_destroy (struct drm_connector 
  }
  
  
- static bool
+ static int
  intel_tv_set_property(struct drm_connector *connector, struct drm_property *property,
                      uint64_t val)
  {
@@@ -1703,8 -1703,8 +1703,8 @@@ intel_tv_init(struct drm_device *dev
      
        drm_encoder_helper_add(&intel_output->enc, &intel_tv_helper_funcs);
        drm_connector_helper_add(connector, &intel_tv_connector_helper_funcs);
 -      connector->interlace_allowed = FALSE;
 -      connector->doublescan_allowed = FALSE;
 +      connector->interlace_allowed = false;
 +      connector->doublescan_allowed = false;
  
        /* Create TV properties then attach current values */
        tv_format_names = drm_alloc(sizeof(char *) * NUM_TV_MODES,

diff --combined shared-core/drm.h
index 017c012,4119064..900bffc
--- 1/shared-core/drm.h
--- 2/shared-core/drm.h
+++ b/shared-core/drm.h
@@@ -993,30 -993,6 +993,30 @@@ struct drm_mm_info_arg 
        uint64_t p_size;
  };
  
 +struct drm_gem_close {
 +      /** Handle of the object to be closed. */
 +      uint32_t handle;
 +      uint32_t pad;
 +};
 +
 +struct drm_gem_flink {
 +      /** Handle for the object being named */
 +      uint32_t handle;
 +
 +      /** Returned global name */
 +      uint32_t name;
 +};
 +
 +struct drm_gem_open {
 +      /** Name of object being opened */
 +      uint32_t name;
 +
 +      /** Returned handle for the object */
 +      uint32_t handle;
 +      
 +      /** Returned size of the object */
 +      uint64_t size;
 +};
  
  /*
   * Drm mode setting
@@@ -1058,6 -1034,16 +1058,16 @@@
  #define DRM_MODE_DPMS_SUSPEND 2
  #define DRM_MODE_DPMS_OFF 3
  
+ /* Scaling mode options */
+ #define DRM_MODE_SCALE_NON_GPU 0
+ #define DRM_MODE_SCALE_FULLSCREEN 1
+ #define DRM_MODE_SCALE_NO_SCALE 2
+ #define DRM_MODE_SCALE_ASPECT 3
+ 
+ /* Dithering mode options */
+ #define DRM_MODE_DITHERING_OFF 0
+ #define DRM_MODE_DITHERING_ON 1
+ 
  struct drm_mode_modeinfo {
        unsigned int clock;
        unsigned short hdisplay, hsync_start, hsync_end, htotal, hskew;
@@@ -1271,11 -1257,7 +1281,11 @@@ struct drm_mode_crtc_lut 
  #define DRM_IOCTL_GET_CLIENT            DRM_IOWR(0x05, struct drm_client)
  #define DRM_IOCTL_GET_STATS             DRM_IOR( 0x06, struct drm_stats)
  #define DRM_IOCTL_SET_VERSION         DRM_IOWR(0x07, struct drm_set_version)
 -#define DRM_IOCTL_MODESET_CTL           DRM_IOW(0x08, struct drm_modeset_ctl)
 +#define DRM_IOCTL_MODESET_CTL           DRM_IOW(0x08,  struct drm_modeset_ctl)
 +
 +#define DRM_IOCTL_GEM_CLOSE           DRM_IOW (0x09, struct drm_gem_close)
 +#define DRM_IOCTL_GEM_FLINK           DRM_IOWR(0x0a, struct drm_gem_flink)
 +#define DRM_IOCTL_GEM_OPEN            DRM_IOWR(0x0b, struct drm_gem_open)
  
  #define DRM_IOCTL_SET_UNIQUE          DRM_IOW( 0x10, struct drm_unique)
  #define DRM_IOCTL_AUTH_MAGIC          DRM_IOW( 0x11, struct drm_auth)