h8300.c (compute_mov_length): Fix the length of loading CONST0_RTX (SFmode).
authorKazu Hirata <kazu@cs.umass.edu>
Wed, 2 Jul 2003 20:48:04 +0000 (20:48 +0000)
committerKazu Hirata <kazu@gcc.gnu.org>
Wed, 2 Jul 2003 20:48:04 +0000 (20:48 +0000)
* config/h8300/h8300.c (compute_mov_length): Fix the length of
loading CONST0_RTX (SFmode).
* config/h8300/h8300.h (CONST_DOUBLE_OK_FOR_LETTER_P): Change
'G' to CONST0_RTX (SFmode).
* config/h8300/h8300.md (movsf_h8300): Change the first
constraint to 'G'.
(movsf_h8300h): Likewise.

From-SVN: r68854

gcc/ChangeLog
gcc/config/h8300/h8300.c
gcc/config/h8300/h8300.h
gcc/config/h8300/h8300.md

index d18086a..02d6731 100644 (file)
@@ -1,3 +1,13 @@
+2003-07-02  Kazu Hirata  <kazu@cs.umass.edu>
+
+       * config/h8300/h8300.c (compute_mov_length): Fix the length of
+       loading CONST0_RTX (SFmode).
+       * config/h8300/h8300.h (CONST_DOUBLE_OK_FOR_LETTER_P): Change
+       'G' to CONST0_RTX (SFmode).
+       * config/h8300/h8300.md (movsf_h8300): Change the first
+       constraint to 'G'.
+       (movsf_h8300h): Likewise.
+
 2003-07-02  Neil Booth  <neil@daikokuya.co.uk>
 
        * c-common.h (c_common_init_options): New prototype.
index f1d3577..da0cd3f 100644 (file)
@@ -2010,7 +2010,7 @@ compute_mov_length (rtx *operands)
              if (REG_P (src))
                return 2;
 
-             if (src == const0_rtx)
+             if (CONST_DOUBLE_OK_FOR_LETTER_P (src, 'G'))
                return 2;
              return 6;
            }
index c6918c2..ba8dcff 100644 (file)
@@ -484,7 +484,7 @@ enum reg_class {
   `G' is a floating-point zero.  */
 
 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
-  ((C) == 'G' ? (VALUE) == CONST0_RTX (DFmode) \
+  ((C) == 'G' ? (VALUE) == CONST0_RTX (SFmode) \
    : 0)
 
 /* Given an rtx X being reloaded into a reg required to be
index ad1d348..9a579ec 100644 (file)
 
 (define_insn "*movsf_h8300"
   [(set (match_operand:SF 0 "general_operand_dst" "=r,r,r,o,<,r")
-       (match_operand:SF 1 "general_operand_src" "I,r,io,r,r,>"))]
+       (match_operand:SF 1 "general_operand_src" "G,r,io,r,r,>"))]
   "TARGET_H8300
    && (register_operand (operands[0], SFmode)
        || register_operand (operands[1], SFmode))"
 
 (define_insn "*movsf_h8300h"
   [(set (match_operand:SF 0 "general_operand_dst" "=r,r,r,m,<,r")
-       (match_operand:SF 1 "general_operand_src" "I,r,im,r,r,>"))]
+       (match_operand:SF 1 "general_operand_src" "G,r,im,r,r,>"))]
   "(TARGET_H8300H || TARGET_H8300S)
    && (register_operand (operands[0], SFmode)
        || register_operand (operands[1], SFmode))"