ARM: dts: OMAP: Add timer nodes
authorJon Hunter <jon-hunter@ti.com>
Fri, 19 Oct 2012 14:59:00 +0000 (09:59 -0500)
committerBenoit Cousson <b-cousson@ti.com>
Mon, 29 Oct 2012 15:56:32 +0000 (16:56 +0100)
Add the 12 GP timers nodes present in OMAP2.
Add the 12 GP timers nodes present in OMAP3.
Add the 11 GP timers nodes present in OMAP4.
Add the 7 GP timers nodes present in AM33xx.

Add documentation for timer properties specific to OMAP.

Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified
Vaibhav's original nodes adding information on which timers support a PWM
output.

V5 changes:
- Updated timer register sizes for OMAP2/3/4.
- Modified AM335x timer register size to be 1KB instead of 4KB to align with
  HWMOD.

Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Documentation/devicetree/bindings/arm/omap/timer.txt [new file with mode: 0644]
arch/arm/boot/dts/am33xx.dtsi
arch/arm/boot/dts/omap2.dtsi
arch/arm/boot/dts/omap2420.dtsi
arch/arm/boot/dts/omap2430.dtsi
arch/arm/boot/dts/omap3.dtsi
arch/arm/boot/dts/omap4.dtsi

diff --git a/Documentation/devicetree/bindings/arm/omap/timer.txt b/Documentation/devicetree/bindings/arm/omap/timer.txt
new file mode 100644 (file)
index 0000000..8732d4d
--- /dev/null
@@ -0,0 +1,31 @@
+OMAP Timer bindings
+
+Required properties:
+- compatible:          Must be "ti,omap2-timer" for OMAP2+ controllers.
+- reg:                 Contains timer register address range (base address and
+                       length).
+- interrupts:          Contains the interrupt information for the timer. The
+                       format is being dependent on which interrupt controller
+                       the OMAP device uses.
+- ti,hwmods:           Name of the hwmod associated to the timer, "timer<X>",
+                       where <X> is the instance number of the timer from the
+                       HW spec.
+
+Optional properties:
+- ti,timer-alwon:      Indicates the timer is in an alway-on power domain.
+- ti,timer-dsp:                Indicates the timer can interrupt the on-chip DSP in
+                       addition to the ARM CPU.
+- ti,timer-pwm:        Indicates the timer can generate a PWM output.
+- ti,timer-secure:     Indicates the timer is reserved on a secure OMAP device
+                       and therefore cannot be used by the kernel.
+
+Example:
+
+timer12: timer@48304000 {
+       compatible = "ti,omap2-timer";
+       reg = <0x48304000 0x400>;
+       interrupts = <95>;
+       ti,hwmods = "timer12"
+       ti,timer-alwon;
+       ti,timer-secure;
+};
index 4709269..70d24b8 100644 (file)
                        interrupts = <55>;
                        status = "disabled";
                };
+
+               timer1: timer@44e31000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x44e31000 0x400>;
+                       interrupts = <67>;
+                       ti,hwmods = "timer1";
+                       ti,timer-alwon;
+               };
+
+               timer2: timer@48040000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48040000 0x400>;
+                       interrupts = <68>;
+                       ti,hwmods = "timer2";
+               };
+
+               timer3: timer@48042000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48042000 0x400>;
+                       interrupts = <69>;
+                       ti,hwmods = "timer3";
+               };
+
+               timer4: timer@48044000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48044000 0x400>;
+                       interrupts = <92>;
+                       ti,hwmods = "timer4";
+                       ti,timer-pwm;
+               };
+
+               timer5: timer@48046000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48046000 0x400>;
+                       interrupts = <93>;
+                       ti,hwmods = "timer5";
+                       ti,timer-pwm;
+               };
+
+               timer6: timer@48048000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48048000 0x400>;
+                       interrupts = <94>;
+                       ti,hwmods = "timer6";
+                       ti,timer-pwm;
+               };
+
+               timer7: timer@4804a000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x4804a000 0x400>;
+                       interrupts = <95>;
+                       ti,hwmods = "timer7";
+                       ti,timer-pwm;
+               };
        };
 };
index f366482..761c4b6 100644 (file)
                        ti,hwmods = "uart3";
                        clock-frequency = <48000000>;
                };
+
+               timer2: timer@4802a000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x4802a000 0x400>;
+                       interrupts = <38>;
+                       ti,hwmods = "timer2";
+               };
+
+               timer3: timer@48078000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48078000 0x400>;
+                       interrupts = <39>;
+                       ti,hwmods = "timer3";
+               };
+
+               timer4: timer@4807a000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x4807a000 0x400>;
+                       interrupts = <40>;
+                       ti,hwmods = "timer4";
+               };
+
+               timer5: timer@4807c000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x4807c000 0x400>;
+                       interrupts = <41>;
+                       ti,hwmods = "timer5";
+                       ti,timer-dsp;
+               };
+
+               timer6: timer@4807e000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x4807e000 0x400>;
+                       interrupts = <42>;
+                       ti,hwmods = "timer6";
+                       ti,timer-dsp;
+               };
+
+               timer7: timer@48080000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48080000 0x400>;
+                       interrupts = <43>;
+                       ti,hwmods = "timer7";
+                       ti,timer-dsp;
+               };
+
+               timer8: timer@48082000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48082000 0x400>;
+                       interrupts = <44>;
+                       ti,hwmods = "timer8";
+                       ti,timer-dsp;
+               };
+
+               timer9: timer@48084000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48084000 0x400>;
+                       interrupts = <45>;
+                       ti,hwmods = "timer9";
+                       ti,timer-pwm;
+               };
+
+               timer10: timer@48086000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48086000 0x400>;
+                       interrupts = <46>;
+                       ti,hwmods = "timer10";
+                       ti,timer-pwm;
+               };
+
+               timer11: timer@48088000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48088000 0x400>;
+                       interrupts = <47>;
+                       ti,hwmods = "timer11";
+                       ti,timer-pwm;
+               };
+
+               timer12: timer@4808a000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x4808a000 0x400>;
+                       interrupts = <48>;
+                       ti,hwmods = "timer12";
+                       ti,timer-pwm;
+               };
        };
 };
index 4d5ce91..af5ee26 100644 (file)
                        interrupt-names = "tx", "rx";
                        ti,hwmods = "mcbsp2";
                };
+
+               timer1: timer@48028000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48028000 0x400>;
+                       interrupts = <37>;
+                       ti,hwmods = "timer1";
+                       ti,timer-alwon;
+               };
        };
 };
index fa84532..6887298 100644 (file)
                        ti,buffer-size = <128>;
                        ti,hwmods = "mcbsp5";
                };
+
+               timer1: timer@49018000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x49018000 0x400>;
+                       interrupts = <37>;
+                       ti,hwmods = "timer1";
+                       ti,timer-alwon;
+               };
        };
 };
index fa15541..af9b182 100644 (file)
                        ti,buffer-size = <128>;
                        ti,hwmods = "mcbsp5";
                };
+
+               timer1: timer@48318000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48318000 0x400>;
+                       interrupts = <37>;
+                       ti,hwmods = "timer1";
+                       ti,timer-alwon;
+               };
+
+               timer2: timer@49032000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x49032000 0x400>;
+                       interrupts = <38>;
+                       ti,hwmods = "timer2";
+               };
+
+               timer3: timer@49034000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x49034000 0x400>;
+                       interrupts = <39>;
+                       ti,hwmods = "timer3";
+               };
+
+               timer4: timer@49036000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x49036000 0x400>;
+                       interrupts = <40>;
+                       ti,hwmods = "timer4";
+               };
+
+               timer5: timer@49038000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x49038000 0x400>;
+                       interrupts = <41>;
+                       ti,hwmods = "timer5";
+                       ti,timer-dsp;
+               };
+
+               timer6: timer@4903a000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x4903a000 0x400>;
+                       interrupts = <42>;
+                       ti,hwmods = "timer6";
+                       ti,timer-dsp;
+               };
+
+               timer7: timer@4903c000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x4903c000 0x400>;
+                       interrupts = <43>;
+                       ti,hwmods = "timer7";
+                       ti,timer-dsp;
+               };
+
+               timer8: timer@4903e000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x4903e000 0x400>;
+                       interrupts = <44>;
+                       ti,hwmods = "timer8";
+                       ti,timer-pwm;
+                       ti,timer-dsp;
+               };
+
+               timer9: timer@49040000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x49040000 0x400>;
+                       interrupts = <45>;
+                       ti,hwmods = "timer9";
+                       ti,timer-pwm;
+               };
+
+               timer10: timer@48086000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48086000 0x400>;
+                       interrupts = <46>;
+                       ti,hwmods = "timer10";
+                       ti,timer-pwm;
+               };
+
+               timer11: timer@48088000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48088000 0x400>;
+                       interrupts = <47>;
+                       ti,hwmods = "timer11";
+                       ti,timer-pwm;
+               };
+
+               timer12: timer@48304000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48304000 0x400>;
+                       interrupts = <95>;
+                       ti,hwmods = "timer12";
+                       ti,timer-alwon;
+                       ti,timer-secure;
+               };
        };
 };
index 2ab6e68..d3a82e0 100644 (file)
                        ranges;
                        ti,hwmods = "ocp2scp_usb_phy";
                };
+
+               timer1: timer@4a318000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x4a318000 0x80>;
+                       interrupts = <0 37 0x4>;
+                       ti,hwmods = "timer1";
+                       ti,timer-alwon;
+               };
+
+               timer2: timer@48032000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48032000 0x80>;
+                       interrupts = <0 38 0x4>;
+                       ti,hwmods = "timer2";
+               };
+
+               timer3: timer@48034000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48034000 0x80>;
+                       interrupts = <0 39 0x4>;
+                       ti,hwmods = "timer3";
+               };
+
+               timer4: timer@48036000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48036000 0x80>;
+                       interrupts = <0 40 0x4>;
+                       ti,hwmods = "timer4";
+               };
+
+               timer5: timer@49038000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x49038000 0x80>;
+                       interrupts = <0 41 0x4>;
+                       ti,hwmods = "timer5";
+                       ti,timer-dsp;
+               };
+
+               timer6: timer@4903a000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x4903a000 0x80>;
+                       interrupts = <0 42 0x4>;
+                       ti,hwmods = "timer6";
+                       ti,timer-dsp;
+               };
+
+               timer7: timer@4903c000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x4903c000 0x80>;
+                       interrupts = <0 43 0x4>;
+                       ti,hwmods = "timer7";
+                       ti,timer-dsp;
+               };
+
+               timer8: timer@4903e000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x4903e000 0x80>;
+                       interrupts = <0 44 0x4>;
+                       ti,hwmods = "timer8";
+                       ti,timer-pwm;
+                       ti,timer-dsp;
+               };
+
+               timer9: timer@4803e000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x4803e000 0x80>;
+                       interrupts = <0 45 0x4>;
+                       ti,hwmods = "timer9";
+                       ti,timer-pwm;
+               };
+
+               timer10: timer@48086000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48086000 0x80>;
+                       interrupts = <0 46 0x4>;
+                       ti,hwmods = "timer10";
+                       ti,timer-pwm;
+               };
+
+               timer11: timer@48088000 {
+                       compatible = "ti,omap2-timer";
+                       reg = <0x48088000 0x80>;
+                       interrupts = <0 47 0x4>;
+                       ti,hwmods = "timer11";
+                       ti,timer-pwm;
+               };
        };
 };