regmap-irq: Introduce config registers for irq types
authorAidan MacDonald <aidanmacdonald.0x0@gmail.com>
Thu, 23 Jun 2022 21:14:16 +0000 (22:14 +0100)
committerMark Brown <broonie@kernel.org>
Wed, 29 Jun 2022 17:13:13 +0000 (18:13 +0100)
Config registers provide a more uniform approach to handling irq type
registers. They are essentially an extension of the virtual registers
used by the qcom-pm8008 driver.

Config registers can be represented as a 2D array:

    config_base[0]      reg0,0      reg0,1      reg0,2      reg0,3
    config_base[1]      reg1,0      reg1,1      reg1,2      reg1,3
    config_base[2]      reg2,0      reg2,1      reg2,2      reg2,3

There are 'num_config_bases' base registers, each of which is used to
address 'num_config_regs' registers. The addresses are calculated in
the same way as for other bases. It is assumed that an irq's type is
controlled by one column of registers; that column is identified by
the irq's 'type_reg_offset'.

The set_type_config() callback is responsible for updating the config
register contents. It receives an array of buffers (each represents a
row of registers) and the index of the column to update, along with
the 'struct regmap_irq' description and requested irq type.

Buffered values are written to registers in regmap_irq_sync_unlock().
Note that the entire register contents are overwritten, which is a
minor change in behavior from type registers via 'type_base'.

Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20220623211420.918875-9-aidanmacdonald.0x0@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/base/regmap/regmap-irq.c
include/linux/regmap.h

index 5f9a585..e3dbf55 100644 (file)
@@ -39,6 +39,7 @@ struct regmap_irq_chip_data {
        unsigned int *type_buf;
        unsigned int *type_buf_def;
        unsigned int **virt_buf;
+       unsigned int **config_buf;
 
        unsigned int irq_reg_stride;
 
@@ -228,6 +229,17 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
                }
        }
 
+       for (i = 0; i < d->chip->num_config_bases; i++) {
+               for (j = 0; j < d->chip->num_config_regs; j++) {
+                       reg = sub_irq_reg(d, d->chip->config_base[i], j);
+                       ret = regmap_write(map, reg, d->config_buf[i][j]);
+                       if (ret)
+                               dev_err(d->map->dev,
+                                       "Failed to write config %x: %d\n",
+                                       reg, ret);
+               }
+       }
+
        if (d->chip->runtime_pm)
                pm_runtime_put(map->dev);
 
@@ -287,7 +299,7 @@ static int regmap_irq_set_type(struct irq_data *data, unsigned int type)
        struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
        struct regmap *map = d->map;
        const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
-       int reg;
+       int reg, ret;
        const struct regmap_irq_type *t = &irq_data->type;
 
        if ((t->types_supported & type) != type)
@@ -327,9 +339,19 @@ static int regmap_irq_set_type(struct irq_data *data, unsigned int type)
                return -EINVAL;
        }
 
-       if (d->chip->set_type_virt)
-               return d->chip->set_type_virt(d->virt_buf, type, data->hwirq,
-                                             reg);
+       if (d->chip->set_type_virt) {
+               ret = d->chip->set_type_virt(d->virt_buf, type, data->hwirq,
+                                            reg);
+               if (ret)
+                       return ret;
+       }
+
+       if (d->chip->set_type_config) {
+               ret = d->chip->set_type_config(d->config_buf, type,
+                                              irq_data, reg);
+               if (ret)
+                       return ret;
+       }
 
        return 0;
 }
@@ -600,6 +622,61 @@ static const struct irq_domain_ops regmap_domain_ops = {
 };
 
 /**
+ * regmap_irq_set_type_config_simple() - Simple IRQ type configuration callback.
+ * @buf: Buffer containing configuration register values, this is a 2D array of
+ *       `num_config_bases` rows, each of `num_config_regs` elements.
+ * @type: The requested IRQ type.
+ * @irq_data: The IRQ being configured.
+ * @idx: Index of the irq's config registers within each array `buf[i]`
+ *
+ * This is a &struct regmap_irq_chip->set_type_config callback suitable for
+ * chips with one config register. Register values are updated according to
+ * the &struct regmap_irq_type data associated with an IRQ.
+ */
+int regmap_irq_set_type_config_simple(unsigned int **buf, unsigned int type,
+                                     const struct regmap_irq *irq_data, int idx)
+{
+       const struct regmap_irq_type *t = &irq_data->type;
+
+       if (t->type_reg_mask)
+               buf[0][idx] &= ~t->type_reg_mask;
+       else
+               buf[0][idx] &= ~(t->type_falling_val |
+                                t->type_rising_val |
+                                t->type_level_low_val |
+                                t->type_level_high_val);
+
+       switch (type) {
+       case IRQ_TYPE_EDGE_FALLING:
+               buf[0][idx] |= t->type_falling_val;
+               break;
+
+       case IRQ_TYPE_EDGE_RISING:
+               buf[0][idx] |= t->type_rising_val;
+               break;
+
+       case IRQ_TYPE_EDGE_BOTH:
+               buf[0][idx] |= (t->type_falling_val |
+                               t->type_rising_val);
+               break;
+
+       case IRQ_TYPE_LEVEL_HIGH:
+               buf[0][idx] |= t->type_level_high_val;
+               break;
+
+       case IRQ_TYPE_LEVEL_LOW:
+               buf[0][idx] |= t->type_level_low_val;
+               break;
+
+       default:
+               return -EINVAL;
+       }
+
+       return 0;
+}
+EXPORT_SYMBOL_GPL(regmap_irq_set_type_config_simple);
+
+/**
  * regmap_add_irq_chip_fwnode() - Use standard regmap IRQ controller handling
  *
  * @fwnode: The firmware node where the IRQ domain should be added to.
@@ -724,6 +801,24 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
                }
        }
 
+       if (chip->num_config_bases && chip->num_config_regs) {
+               /*
+                * Create config_buf[num_config_bases][num_config_regs]
+                */
+               d->config_buf = kcalloc(chip->num_config_bases,
+                                       sizeof(*d->config_buf), GFP_KERNEL);
+               if (!d->config_buf)
+                       goto err_alloc;
+
+               for (i = 0; i < chip->num_config_regs; i++) {
+                       d->config_buf[i] = kcalloc(chip->num_config_regs,
+                                                  sizeof(**d->config_buf),
+                                                  GFP_KERNEL);
+                       if (!d->config_buf[i])
+                               goto err_alloc;
+               }
+       }
+
        d->irq_chip = regmap_irq_chip;
        d->irq_chip.name = chip->name;
        d->irq = irq;
@@ -894,6 +989,11 @@ err_alloc:
                        kfree(d->virt_buf[i]);
                kfree(d->virt_buf);
        }
+       if (d->config_buf) {
+               for (i = 0; i < chip->num_config_bases; i++)
+                       kfree(d->config_buf[i]);
+               kfree(d->config_buf);
+       }
        kfree(d);
        return ret;
 }
@@ -934,7 +1034,7 @@ EXPORT_SYMBOL_GPL(regmap_add_irq_chip);
 void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
 {
        unsigned int virq;
-       int hwirq;
+       int i, hwirq;
 
        if (!d)
                return;
@@ -964,6 +1064,11 @@ void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
        kfree(d->mask_buf);
        kfree(d->status_reg_buf);
        kfree(d->status_buf);
+       if (d->config_buf) {
+               for (i = 0; i < d->chip->num_config_bases; i++)
+                       kfree(d->config_buf[i]);
+               kfree(d->config_buf);
+       }
        kfree(d);
 }
 EXPORT_SYMBOL_GPL(regmap_del_irq_chip);
index 6489b36..791c15a 100644 (file)
@@ -1475,6 +1475,7 @@ struct regmap_irq_sub_irq_map {
  * @wake_base:   Base address for wake enables.  If zero unsupported.
  * @type_base:   Base address for irq type.  If zero unsupported.
  * @virt_reg_base:   Base addresses for extra config regs.
+ * @config_base: Base address for IRQ type config regs. If null unsupported.
  * @irq_reg_stride:  Stride to use for chips where registers are not contiguous.
  * @init_ack_masked: Ack all masked interrupts once during initalization.
  * @mask_invert: Inverted mask register: cleared bits are masked out.
@@ -1504,12 +1505,15 @@ struct regmap_irq_sub_irq_map {
  * @num_type_reg:    Number of type registers.
  * @num_virt_regs:   Number of non-standard irq configuration registers.
  *                  If zero unsupported.
+ * @num_config_bases:  Number of config base registers.
+ * @num_config_regs:   Number of config registers for each config base register.
  * @handle_pre_irq:  Driver specific callback to handle interrupt from device
  *                  before regmap_irq_handler process the interrupts.
  * @handle_post_irq: Driver specific callback to handle interrupt from device
  *                  after handling the interrupts in regmap_irq_handler().
  * @set_type_virt:   Driver specific callback to extend regmap_irq_set_type()
  *                  and configure virt regs.
+ * @set_type_config: Callback used for configuring irq types.
  * @irq_drv_data:    Driver specific IRQ data which is passed as parameter when
  *                  driver specific pre/post interrupt handler is called.
  *
@@ -1532,6 +1536,7 @@ struct regmap_irq_chip {
        unsigned int wake_base;
        unsigned int type_base;
        unsigned int *virt_reg_base;
+       const unsigned int *config_base;
        unsigned int irq_reg_stride;
        unsigned int init_ack_masked:1;
        unsigned int mask_invert:1;
@@ -1553,16 +1558,23 @@ struct regmap_irq_chip {
 
        int num_type_reg;
        int num_virt_regs;
+       int num_config_bases;
+       int num_config_regs;
 
        int (*handle_pre_irq)(void *irq_drv_data);
        int (*handle_post_irq)(void *irq_drv_data);
        int (*set_type_virt)(unsigned int **buf, unsigned int type,
                             unsigned long hwirq, int reg);
+       int (*set_type_config)(unsigned int **buf, unsigned int type,
+                              const struct regmap_irq *irq_data, int idx);
        void *irq_drv_data;
 };
 
 struct regmap_irq_chip_data;
 
+int regmap_irq_set_type_config_simple(unsigned int **buf, unsigned int type,
+                                     const struct regmap_irq *irq_data, int idx);
+
 int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
                        int irq_base, const struct regmap_irq_chip *chip,
                        struct regmap_irq_chip_data **data);