clk: tegra: Remove CLK_IS_CRITICAL flag from fuse clock
authorDmitry Osipenko <digetx@gmail.com>
Mon, 2 Aug 2021 22:13:36 +0000 (01:13 +0300)
committerThierry Reding <treding@nvidia.com>
Wed, 11 Aug 2021 09:57:01 +0000 (11:57 +0200)
FUSE driver now takes care of keeping the clock enabled when necessary.
Remove the CLK_IS_CRITICAL flag from the clock.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-tegra-periph.c

index 292d626..4dcf7f7 100644 (file)
@@ -777,11 +777,7 @@ static struct tegra_periph_init_data gate_clks[] = {
        GATE("ahbdma", "hclk", 33, 0, tegra_clk_ahbdma, 0),
        GATE("apbdma", "pclk", 34, 0, tegra_clk_apbdma, 0),
        GATE("kbc", "clk_32k", 36, TEGRA_PERIPH_ON_APB | TEGRA_PERIPH_NO_RESET, tegra_clk_kbc, 0),
-       /*
-        * Critical for RAM re-repair operation, which must occur on resume
-        * from LP1 system suspend and as part of CCPLEX cluster switching.
-        */
-       GATE("fuse", "clk_m", 39, TEGRA_PERIPH_ON_APB, tegra_clk_fuse, CLK_IS_CRITICAL),
+       GATE("fuse", "clk_m", 39, TEGRA_PERIPH_ON_APB, tegra_clk_fuse, 0),
        GATE("fuse_burn", "clk_m", 39, TEGRA_PERIPH_ON_APB, tegra_clk_fuse_burn, 0),
        GATE("kfuse", "clk_m", 40, TEGRA_PERIPH_ON_APB, tegra_clk_kfuse, 0),
        GATE("apbif", "clk_m", 107, TEGRA_PERIPH_ON_APB, tegra_clk_apbif, 0),