clk: k210: Fix k210_clk_set_parent()
authorDamien Le Moal <damien.lemoal@wdc.com>
Tue, 22 Jun 2021 06:45:02 +0000 (15:45 +0900)
committerStephen Boyd <sboyd@kernel.org>
Wed, 30 Jun 2021 18:34:36 +0000 (11:34 -0700)
In k210_clk_set_parent(), add missing writel() call to update the mux
register of a clock to change its parent. This also fixes a compilation
warning with clang when compiling with W=1.

Fixes: c6ca7616f7d5 ("clk: Add RISC-V Canaan Kendryte K210 clock driver")
Cc: stable@vger.kernel.org
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Link: https://lore.kernel.org/r/20210622064502.14841-1-damien.lemoal@wdc.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/clk-k210.c

index 6c84abf..67a7cb3 100644 (file)
@@ -722,6 +722,7 @@ static int k210_clk_set_parent(struct clk_hw *hw, u8 index)
                reg |= BIT(cfg->mux_bit);
        else
                reg &= ~BIT(cfg->mux_bit);
+       writel(reg, ksc->regs + cfg->mux_reg);
        spin_unlock_irqrestore(&ksc->clk_lock, flags);
 
        return 0;