config.gcc: Add armv6{k,z,zk}
authorPaul Brook <paul@codesourcery.com>
Tue, 12 Oct 2004 15:38:30 +0000 (15:38 +0000)
committerPaul Brook <pbrook@gcc.gnu.org>
Tue, 12 Oct 2004 15:38:30 +0000 (15:38 +0000)
* config.gcc: Add armv6{k,z,zk}
* config/arm/arm-cores.def: Add arm1176 and mpcore.
* config/arm/tune.md: Regenerate.
* config/arm/arm.c (FL_FOR_ARCH6K, FL_FOR_ARCH6Z, FL_FOR_ARCH6ZK):
Define.
(all_architectures): Add armv6k, armv6z, armv6zk.
* config/arm/lib1funcs.asm: Recognise new arm arcitectures.
* doc/invoke.texi: Document new arch and cpu values.

From-SVN: r88937

gcc/ChangeLog
gcc/config.gcc
gcc/config/arm/arm-cores.def
gcc/config/arm/arm-tune.md
gcc/config/arm/arm.c
gcc/config/arm/lib1funcs.asm
gcc/doc/invoke.texi

index 7367505..75a1e16 100644 (file)
@@ -1,3 +1,14 @@
+2004-10-12  Paul Brook  <paul@coudesourcery.com>
+
+       * config.gcc: Add armv6{k,z,zk}
+       * config/arm/arm-cores.def: Add arm1176 and mpcore.
+       * config/arm/tune.md: Regenerate.
+       * config/arm/arm.c (FL_FOR_ARCH6K, FL_FOR_ARCH6Z, FL_FOR_ARCH6ZK):
+       Define.
+       (all_architectures): Add armv6k, armv6z, armv6zk.
+       * config/arm/lib1funcs.asm: Recognise new arm arcitectures.
+       * doc/invoke.texi: Document new arch and cpu values.
+
 2004-10-12  Paul Brook  <paul@coodesourcery.com>
 
        * config/arm/bpabi.h (SUBTARGET_EXTRA_ASM_SPEC): Change meabi=3 to
index 9b7800e..0308fc9 100644 (file)
@@ -2307,7 +2307,8 @@ fi
                case "$with_arch" in
                "" \
                | armv[23456] | armv2a | armv3m | armv4t | armv5t \
-               | armv5te | armv6j | iwmmxt | ep9312)
+               | armv5te | armv6j |armv6k | armv6z | armv6zk \
+               | iwmmxt | ep9312)
                        # OK
                        ;;
                *)
index e070603..d01fc7a 100644 (file)
@@ -111,3 +111,7 @@ ARM_CORE("arm1026ej-s",   arm1026ejs,       5TEJ,                            0, 9e)
 /* V6 Architecture Processors */
 ARM_CORE("arm1136j-s",    arm1136js,   6J,                              0, 9e)
 ARM_CORE("arm1136jf-s",   arm1136jfs,  6J,                              FL_VFPV2, 9e)
+ARM_CORE("arm1176jz-s",          arm1176jzs,   6ZK,                             0, 9e)
+ARM_CORE("arm1176jzf-s",  arm1176jzfs, 6ZK,                             FL_VFPV2, 9e)
+ARM_CORE("mpcorenovfp",          mpcorenovfp,  6K,                              0, 9e)
+ARM_CORE("mpcore",       mpcore,       6K,                              FL_VFPV2, 9e)
index a457df3..950cd91 100644 (file)
@@ -1,5 +1,5 @@
 ;; -*- buffer-read-only: t -*-
 ;; Generated automatically by gentune.sh from arm-cores.def
 (define_attr "tune"
-       "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,arm926ejs,arm1026ejs,arm1136js,arm1136jfs"
+       "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore"
        (const (symbol_ref "arm_tune")))
index 6f0f6fb..761fdba 100644 (file)
@@ -387,6 +387,9 @@ int    arm_structure_size_boundary = DEFAULT_STRUCTURE_SIZE_BOUNDARY;
 #define FL_FOR_ARCH5TEJ        FL_FOR_ARCH5TE
 #define FL_FOR_ARCH6   (FL_FOR_ARCH5TE | FL_ARCH6)
 #define FL_FOR_ARCH6J  FL_FOR_ARCH6
+#define FL_FOR_ARCH6K  FL_FOR_ARCH6
+#define FL_FOR_ARCH6Z  FL_FOR_ARCH6
+#define FL_FOR_ARCH6ZK FL_FOR_ARCH6
 
 /* The bits in this mask specify which
    instructions we are allowed to generate.  */
@@ -526,6 +529,9 @@ static const struct processors all_architectures[] =
   {"armv5te", arm1026ejs, "5TE", FL_CO_PROC |             FL_FOR_ARCH5TE, NULL},
   {"armv6",   arm1136js,  "6",   FL_CO_PROC |             FL_FOR_ARCH6, NULL},
   {"armv6j",  arm1136js,  "6J",  FL_CO_PROC |             FL_FOR_ARCH6J, NULL},
+  {"armv6k",  mpcore,    "6K",  FL_CO_PROC |             FL_FOR_ARCH6K, NULL},
+  {"armv6z",  arm1176jzs, "6Z",  FL_CO_PROC |             FL_FOR_ARCH6Z, NULL},
+  {"armv6zk", arm1176jzs, "6ZK", FL_CO_PROC |             FL_FOR_ARCH6ZK, NULL},
   {"ep9312",  ep9312,     "4T",  FL_LDSCHED | FL_CIRRUS | FL_FOR_ARCH4, NULL},
   {"iwmmxt",  iwmmxt,     "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT , NULL},
   {NULL, arm_none, NULL, 0 , NULL}
index bc425e5..a432ef2 100644 (file)
@@ -80,7 +80,9 @@ Boston, MA 02111-1307, USA.  */
 # define __ARM_ARCH__ 5
 #endif
 
-#if defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__)
+#if defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \
+       || defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) \
+       || defined(__ARM_ARCH_6ZK__)
 # undef __ARM_ARCH__
 # define __ARM_ARCH__ 6
 #endif
index 8e39ba7..3a62a12 100644 (file)
@@ -6777,7 +6777,8 @@ assembly code.  Permissible names are: @samp{arm2}, @samp{arm250},
 @samp{arm968e-s}, @samp{arm926ej-s}, @samp{arm940t}, @samp{arm9tdmi},
 @samp{arm10tdmi}, @samp{arm1020t}, @samp{arm1026ej-s},
 @samp{arm10e}, @samp{arm1020e}, @samp{arm1022e},
-@samp{arm1136j-s}, @samp{arm1136jf-s} ,@samp{xscale}, @samp{iwmmxt},
+@samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp},
+@samp{arm1176jz-s}, @samp{arm1176jzf-s}, @samp{xscale}, @samp{iwmmxt},
 @samp{ep9312}.
 
 @itemx -mtune=@var{name}