#include <linux/device.h>
#include <linux/delay.h>
#include <linux/clk.h>
+#include <linux/atmel_pdc.h>
+
#include <sound/driver.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_ssc.h>
-#include <asm/arch/at91_pdc.h>
#include "at91-pcm.h"
#include "at91-i2s.h"
* SSC PDC registers required by the PCM DMA engine.
*/
static struct at91_pdc_regs pdc_tx_reg = {
- .xpr = AT91_PDC_TPR,
- .xcr = AT91_PDC_TCR,
- .xnpr = AT91_PDC_TNPR,
- .xncr = AT91_PDC_TNCR,
+ .xpr = ATMEL_PDC_TPR,
+ .xcr = ATMEL_PDC_TCR,
+ .xnpr = ATMEL_PDC_TNPR,
+ .xncr = ATMEL_PDC_TNCR,
};
static struct at91_pdc_regs pdc_rx_reg = {
- .xpr = AT91_PDC_RPR,
- .xcr = AT91_PDC_RCR,
- .xnpr = AT91_PDC_RNPR,
- .xncr = AT91_PDC_RNCR,
+ .xpr = ATMEL_PDC_RPR,
+ .xcr = ATMEL_PDC_RCR,
+ .xnpr = ATMEL_PDC_RNPR,
+ .xncr = ATMEL_PDC_RNCR,
};
/*
.ssc_disable = AT91_SSC_TXDIS,
.ssc_endx = AT91_SSC_ENDTX,
.ssc_endbuf = AT91_SSC_TXBUFE,
- .pdc_enable = AT91_PDC_TXTEN,
- .pdc_disable = AT91_PDC_TXTDIS,
+ .pdc_enable = ATMEL_PDC_TXTEN,
+ .pdc_disable = ATMEL_PDC_TXTDIS,
};
static struct at91_ssc_mask ssc_rx_mask = {
.ssc_disable = AT91_SSC_RXDIS,
.ssc_endx = AT91_SSC_ENDRX,
.ssc_endbuf = AT91_SSC_RXBUFF,
- .pdc_enable = AT91_PDC_RXTEN,
- .pdc_disable = AT91_PDC_RXTDIS,
+ .pdc_enable = ATMEL_PDC_RXTEN,
+ .pdc_disable = ATMEL_PDC_RXTDIS,
};
/* Reset the SSC and its PDC registers */
at91_ssc_write(ssc_p->ssc.base + AT91_SSC_CR, AT91_SSC_SWRST);
- at91_ssc_write(ssc_p->ssc.base + AT91_PDC_RPR, 0);
- at91_ssc_write(ssc_p->ssc.base + AT91_PDC_RCR, 0);
- at91_ssc_write(ssc_p->ssc.base + AT91_PDC_RNPR, 0);
- at91_ssc_write(ssc_p->ssc.base + AT91_PDC_RNCR, 0);
- at91_ssc_write(ssc_p->ssc.base + AT91_PDC_TPR, 0);
- at91_ssc_write(ssc_p->ssc.base + AT91_PDC_TCR, 0);
- at91_ssc_write(ssc_p->ssc.base + AT91_PDC_TNPR, 0);
- at91_ssc_write(ssc_p->ssc.base + AT91_PDC_TNCR, 0);
+ at91_ssc_write(ssc_p->ssc.base + ATMEL_PDC_RPR, 0);
+ at91_ssc_write(ssc_p->ssc.base + ATMEL_PDC_RCR, 0);
+ at91_ssc_write(ssc_p->ssc.base + ATMEL_PDC_RNPR, 0);
+ at91_ssc_write(ssc_p->ssc.base + ATMEL_PDC_RNCR, 0);
+ at91_ssc_write(ssc_p->ssc.base + ATMEL_PDC_TPR, 0);
+ at91_ssc_write(ssc_p->ssc.base + ATMEL_PDC_TCR, 0);
+ at91_ssc_write(ssc_p->ssc.base + ATMEL_PDC_TNPR, 0);
+ at91_ssc_write(ssc_p->ssc.base + ATMEL_PDC_TNCR, 0);
if ((ret = request_irq(ssc_p->ssc.pid, at91_i2s_interrupt,
0, ssc_p->name, ssc_p)) < 0) {
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/dma-mapping.h>
+#include <linux/atmel_pdc.h>
#include <sound/driver.h>
#include <sound/core.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_ssc.h>
-#include <asm/arch/at91_pdc.h>
#include "at91-pcm.h"
params->name, ssc_sr, count);
/* re-start the PDC */
- at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_disable);
+ at91_ssc_write(params->ssc_base + ATMEL_PDC_PTCR, params->mask->pdc_disable);
prtd->period_ptr += prtd->period_size;
if (prtd->period_ptr >= prtd->dma_buffer_end) {
at91_ssc_write(params->ssc_base + params->pdc->xcr,
prtd->period_size / params->pdc_xfer_size);
- at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_enable);
+ at91_ssc_write(params->ssc_base + ATMEL_PDC_PTCR, params->mask->pdc_enable);
}
if (ssc_sr & params->mask->ssc_endx) {
struct at91_pcm_dma_params *params = prtd->params;
if (params != NULL) {
- at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_disable);
+ at91_ssc_write(params->ssc_base + ATMEL_PDC_PTCR, params->mask->pdc_disable);
prtd->params->dma_intr_handler = NULL;
}
at91_ssc_write(params->ssc_base + AT91_SSC_IDR,
params->mask->ssc_endx | params->mask->ssc_endbuf);
- at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_disable);
+ at91_ssc_write(params->ssc_base + ATMEL_PDC_PTCR, params->mask->pdc_disable);
return 0;
}
at91_ssc_write(params->ssc_base + AT91_SSC_IER,
params->mask->ssc_endx | params->mask->ssc_endbuf);
- at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_enable);
+ at91_ssc_write(params->ssc_base + ATMEL_PDC_PTCR, params->mask->pdc_enable);
DBG("sr=%lx imr=%lx\n", at91_ssc_read(params->ssc_base + AT91_SSC_SR),
at91_ssc_read(params->ssc_base + AT91_SSC_IER));
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
- at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_disable);
+ at91_ssc_write(params->ssc_base + ATMEL_PDC_PTCR, params->mask->pdc_disable);
break;
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
- at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_enable);
+ at91_ssc_write(params->ssc_base + ATMEL_PDC_PTCR, params->mask->pdc_enable);
break;
default:
/* disable the PDC and save the PDC registers */
- at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_disable);
+ at91_ssc_write(params->ssc_base + ATMEL_PDC_PTCR, params->mask->pdc_disable);
prtd->pdc_xpr_save = at91_ssc_read(params->ssc_base + params->pdc->xpr);
prtd->pdc_xcr_save = at91_ssc_read(params->ssc_base + params->pdc->xcr);
at91_ssc_write(params->ssc_base + params->pdc->xnpr, prtd->pdc_xnpr_save);
at91_ssc_write(params->ssc_base + params->pdc->xncr, prtd->pdc_xncr_save);
- at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_enable);
+ at91_ssc_write(params->ssc_base + ATMEL_PDC_PTCR, params->mask->pdc_enable);
return 0;
}
#else