arm64: dts: qcom: sc7180: Add bandwidth votes for eMMC and SDcard
authorPradeep P V K <ppvk@codeaurora.org>
Mon, 17 Aug 2020 06:41:04 +0000 (12:11 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Thu, 10 Sep 2020 22:28:06 +0000 (22:28 +0000)
Add the bandwidth domain supporting performance state and
the corresponding OPP tables for the sdhc device on sc7180.

Signed-off-by: Pradeep P V K <ppvk@codeaurora.org>
Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org>
Link: https://lore.kernel.org/r/1597646464-1863-1-git-send-email-sbhanu@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/sc7180.dtsi

index a43f8fe..e7c4762 100644 (file)
                        clocks = <&gcc GCC_SDCC1_APPS_CLK>,
                                        <&gcc GCC_SDCC1_AHB_CLK>;
                        clock-names = "core", "iface";
+                       interconnects = <&aggre1_noc MASTER_EMMC 0 &mc_virt SLAVE_EBI1 0>,
+                                       <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_EMMC_CFG 0>;
+                       interconnect-names = "sdhc-ddr","cpu-sdhc";
                        power-domains = <&rpmhpd SC7180_CX>;
                        operating-points-v2 = <&sdhc1_opp_table>;
 
                                opp-100000000 {
                                        opp-hz = /bits/ 64 <100000000>;
                                        required-opps = <&rpmhpd_opp_low_svs>;
+                                       opp-peak-kBps = <100000 100000>;
+                                       opp-avg-kBps = <100000 50000>;
                                };
 
                                opp-384000000 {
                                        opp-hz = /bits/ 64 <384000000>;
                                        required-opps = <&rpmhpd_opp_svs_l1>;
+                                       opp-peak-kBps = <600000 900000>;
+                                       opp-avg-kBps = <261438 300000>;
                                };
                        };
                };
                        clocks = <&gcc GCC_SDCC2_APPS_CLK>,
                                        <&gcc GCC_SDCC2_AHB_CLK>;
                        clock-names = "core", "iface";
+
+                       interconnects = <&aggre1_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>,
+                                       <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>;
+                       interconnect-names = "sdhc-ddr","cpu-sdhc";
                        power-domains = <&rpmhpd SC7180_CX>;
                        operating-points-v2 = <&sdhc2_opp_table>;
 
                                opp-100000000 {
                                        opp-hz = /bits/ 64 <100000000>;
                                        required-opps = <&rpmhpd_opp_low_svs>;
+                                       opp-peak-kBps = <160000 100000>;
+                                       opp-avg-kBps = <80000 50000>;
                                };
 
                                opp-202000000 {
                                        opp-hz = /bits/ 64 <202000000>;
                                        required-opps = <&rpmhpd_opp_svs_l1>;
+                                       opp-peak-kBps = <200000 120000>;
+                                       opp-avg-kBps = <100000 60000>;
                                };
                        };
                };