[AArch64] Fix off by one error in instruction relaxation mask.

The AArch64 TLSDESC to IE relaxation code uses a bit mask intended to
ensure that destination register in a relaxed ldr instruction is
always X0.  The mask has an off by one error resulting in the most
significant bit of the destination register being retained in the
relaxed instruction.  The issue generally appears when the compiler
emits TLS accesses code under high register pressure resulting in a
broken code sequence.

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 9331477..55d4828 100644 (file)
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,7 @@
+2014-04-15  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+
+       * (elfNN_aarch64_tls_relax): Fix instruction mask.
+
 2014-04-14  Alan Modra  <amodra@gmail.com>
 
        * elf32-ppc.c (BA): Define

diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index 638938d..a251698 100644 (file)
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -3957,7 +3957,7 @@ elfNN_aarch64_tls_relax (struct elf_aarch64_link_hash_table *globals,
             ldr xd, [x0, #:tlsdesc_lo12:var] => ldr x0, [x0, #:gottprel_lo12:var]
           */
          insn = bfd_getl32 (contents + rel->r_offset);
-         insn &= 0xfffffff0;
+         insn &= 0xffffffe0;
          bfd_putl32 (insn, contents + rel->r_offset);
          return bfd_reloc_continue;
        }

diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index e239ce8..ae0fa89 100644 (file)
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2014-04-15  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+
+       * ld-aarch64/tls-relax-gdesc-ie.s (var): Adjust test case
+       to include all 5 bits of LDR destination register.
+
 2014-04-10  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
 
        * ld-avr/norelax_diff.d: New testcase.

diff --git a/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie.s b/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie.s
index c20690c..38b3721 100644 (file)
--- a/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie.s
+++ b/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie.s
@@ -4,7 +4,7 @@ var:
        .word   2
        .text
        adrp    x0, :tlsdesc:var
-       ldr     x1, [x0, #:tlsdesc_lo12:var]
+       ldr     x17, [x0, #:tlsdesc_lo12:var]
        add     x0, x0, :tlsdesc_lo12:var
        .tlsdesccall    var
        blr     x1