ARM64: dts: meson-gx: Add SPICC nodes

Add nodes for the SPICC controller on GX common dtsi, GXBB and
GXL dtsi files.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index 603491d..35b8c88 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -304,6 +304,15 @@
                                status = "disabled";
                        };
 
+                       spicc: spi@8d80 {
+                               compatible = "amlogic,meson-gx-spicc";
+                               reg = <0x0 0x08d80 0x0 0x80>;
+                               interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
                        spifc: spi@8c80 {
                                compatible = "amlogic,meson-gx-spifc", "amlogic,meson-gxbb-spifc";
                                reg = <0x0 0x08c80 0x0 0x80>;

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index dbd300f..17d3efd 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -671,6 +671,13 @@
        clock-names = "core", "clkin0", "clkin1";
 };
 
+&spicc {
+       clocks = <&clkc CLKID_SPICC>;
+       clock-names = "core";
+       resets = <&reset RESET_PERIPHS_SPICC>;
+       num-cs = <1>;
+};
+
 &spifc {
        clocks = <&clkc CLKID_SPI>;
 };

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
index 4dfc22b..8d4f316 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
@@ -612,6 +612,13 @@
        clock-names = "core", "clkin0", "clkin1";
 };
 
+&spicc {
+       clocks = <&clkc CLKID_SPICC>;
+       clock-names = "core";
+       resets = <&reset RESET_PERIPHS_SPICC>;
+       num-cs = <1>;
+};
+
 &spifc {
        clocks = <&clkc CLKID_SPI>;
 };